; -------------------------------------------------------------------------------- ; @Title: RZN1 On-Chip Peripherals ; @Props: Released ; @Author: DRE, BCA, DPR ; @Changelog: 2018-09-26 DRE ; @Manufacturer: RENESAS - Renesas Technology, Corp. ; @Doc: r01ds0323ej0080-rzn1.pdf (Rev.0.8 2017-10) ; r01uh0750ej0080-rzn1-introduction.pdf (Rev.0.8 2017-10) ; r01uh0751ej0080-rzn1-system.pdf (Rev.0.8 2017-10) ; r01uh0752ej0080-rzn1-peripheral.pdf (Rev.0.8 2017-10) ; r01uh0753ej0080-rzn1-ether.pdf (Rev.0.8 2017-10) ; r01ds0323ej0090-rzn1.pdf (Rev.90 2017-12) ; r01uh0750ej0090-rzn1-introduction.pdf (Rev.90 2017-12) ; r01uh0751ej0090-rzn1-system.pdf (Rev.90 2017-12) ; r01uh0752ej0090-rzn1-peripheral.pdf (Rev.90 2017-12) ; r01uh0753ej0090-rzn1-ether.pdf (Rev.90 2017-12) ; @Core: Cortex-A7, Cortex-M3 ; @Chip: R9A06G032, R9A06G033, R9A06G034 ; @Copyright: (C) 1989-2018 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perrzn1.per 17736 2024-04-08 09:26:07Z kwisniewski $ ; Known problems: ; MODULE DESCRIPTION ; EtherCAT Slave Controller Misleading information about access type to bits in registers (whole module) ; Inserted if statement according to states in WR_REG_ENABLE,WR_REG_PROTECT,ESC_WR_ENABLE,ESC_WR_PROTECT ; Hardware Real Time OS (HW-RTOS) There are no description of this module in available documentation sif CORENAME()=="CORTEXA7MPCORE" tree "Core Registers (Cortex-A7MPCore)" AUTOINDENT.PUSH AUTOINDENT.OFF ; -------------------------------------------------------------------------------- ; Identification registers ; -------------------------------------------------------------------------------- width 10. tree "ID Registers" group.long c15:0x0++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..." bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." textline " " bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,Reserved,Physical" bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,16 words,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..." bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." textline " " bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,?..." endif rgroup.long c15:0x300++0x0 line.long 0x0 "TLBTR,TLB Type Register" bitfld.long 0x0 0. " NU ,Unified or Separate TLBs" "Unified,?..." rgroup.long c15:0x500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 31. " MPERF ,Multiprocessing Extensions register format" "Not supported,Supported" bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.long 0x00 24. " MT ,Lowest level of affinity consist of logical processors" "Not implemented,Implemented" textline " " bitfld.long 0x00 8.--11. " CLUSTERID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "1,2,3,4" rgroup.long c15:0x400++0x0 line.long 0x0 "MIDR2,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x600++0x0 line.long 0x0 "REVIDR,Revision ID Register" rgroup.long c15:0x700++0x0 line.long 0x0 "MIDR3,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,PXN,64-bit,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." endif rgroup.long c15:0x0610++0x00 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. " PMS ,Physical memory size supported by processor caches" "Reserved,Reserved,40-bit,?..." bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MB ,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..." if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Supported,?..." endif rgroup.long c15:0x0120++0x00 line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " EARI ,Exception A and R Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " EXIN ,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,MUL/MLA/MLS,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLWD,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,LDRD/STRD,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. " TEEEI ,Thumb-EE Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,TBB/TBH,?..." bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. " SWP_FRAC ,Memory System Locking Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Supported,?..." textline " " bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,DMB/DSB/ISB,?..." bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " STATE3 ,Thumb Execution Environment (Thumb-EE) Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " STATE2 ,Support for Jazelle extension" "Not supported,?..." bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 16.--19. " GT ,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " VE ,Virtualization Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. " PMM ,Performance Monitor Model Support" "Reserved,Reserved,ID_DFR0,?..." bitfld.long 0x00 20.--23. " MDM_MM ,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. " TM_MM ,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CTM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1,?..." bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..." textline " " bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..." if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented" bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented" textline " " bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented" textline " " bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 15. " [15] ,Instruction architecturally executed, condition code check pass, unaligned load or store" "Not implemented,Implemented" textline " " bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Instruction architecturally executed, immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Instruction architecturally executed, condition code check pass, software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented" textline " " bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. " [7] ,Instruction architecturally executed, condition code check pass, store" "Not implemented,Implemented" textline " " bitfld.long 0x00 6. " [6] ,Instruction architecturally executed, condition code check pass, load" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 31. " PMCEID0[31] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 30. " [30] ,Level 1 data memory access" "Not implemented,Implemented" bitfld.long 0x00 29. " [29] ,Level 1 data memory access" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Level 1 data memory access" "Not implemented,Implemented" textline " " bitfld.long 0x00 27. " [27] ,Branches or other change in program flow that could have been predicted by the branch prediction resources of the processor" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Branch mispredicted or not predicted" "Not implemented,Implemented" bitfld.long 0x00 25. " [25] ,Unaligned access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Unaligned access" "Not implemented,Implemented" textline " " bitfld.long 0x00 23. " [23] ,Branch speculatively executed - Procedure return" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Branch speculatively executed - Immediate branch" "Not implemented,Implemented" bitfld.long 0x00 21. " [21] ,Instruction speculatively executed - Software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Write to translation table register (TTBR0 or TTBR1)" "Not implemented,Implemented" textline " " bitfld.long 0x00 19. " [19] ,Change to ContextID retired" "Not implemented,Implemented" bitfld.long 0x00 18. " [18] ,Exception return architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 17. " [17] ,Exception taken. Counts the number of exceptions architecturally taken" "Not implemented,Implemented" bitfld.long 0x00 16. " [16] ,Instruction architecturally executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 15. " [15] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Instruction architecturally executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Store instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Store instruction speculatively executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 7. " [7] ,Load instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 6. " [6] ,Load instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Data read or write operation that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented" bitfld.long 0x00 4. " [4] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" textline " " bitfld.long 0x00 3. " [3] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Data read or write operation that causes a refill at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Instruction fetch that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented" bitfld.long 0x00 0. " [0] ,Instruction fetch that causes a refill at (at least) the lowest level of instruction or unified cache" "Not implemented,Implemented" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented" bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented" textline " " bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented" textline " " bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented" textline " " bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented" endif tree.end width 12. tree "System Control and Configuration" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" textline " " bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled" bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled" textline " " endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled" bitfld.long 0x00 3. " ASSE ,ACE STREX Signalling Enable" "Disabled,Enabled" bitfld.long 0x00 2. " L2PF ,Enable L2 prefetch" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " L1PF ,Enable L1 prefetch" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 31. " SDEH ,Snoop-delayed exclusive handling" "Normal,Modified" bitfld.long 0x00 30. " FMCEA ,Force main clock processor enable active" "Not prevented,Prevented" bitfld.long 0x00 29. " FNVCEA ,Force NEON/VFP clock enable active" "Not prevented,Prevented" textline " " bitfld.long 0x00 27.--28. " WSNAT ,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" bitfld.long 0x00 25.--26. " WSNL1AT ,Write streaming no L1-allocate threshold" "14th,64th,128th,Disabled" bitfld.long 0x00 24. " NCSE ,Non-cacheable streaming enhancement" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " FIORRTTSSAW ,Forces in-order requests to the same set and way" "Not forced,Forced" bitfld.long 0x00 22. " FIOLI ,Force in-order load issue" "Not forced,Forced" bitfld.long 0x00 21. " DL2TLBP ,Disabled L2 TLB prefetching" "No,Yes" textline " " bitfld.long 0x00 20. " DL2TBWIPAPAC ,Disable L2 TBW IPA PA cache" "No,Yes" bitfld.long 0x00 19. " DL2TBWS1WC ,Disable L2 TBW Stage 1 walk cache" "No,Yes" bitfld.long 0x00 18. " DL2TBWS1L2PAC ,Disable L2 TBW stage 1 L2 PA cache" "No,Yes" textline " " bitfld.long 0x00 17. " DL2TLBPO ,Disable L2 TLB Performance Optimization" "No,Yes" bitfld.long 0x00 16. " EFSOADLR ,Enables full Strongly-ordered and Device load replay" "Disabled,Enabled" bitfld.long 0x00 15. " FIIBEU ,Force in-order issue in branch execution unit" "Not forced,Forced" textline " " bitfld.long 0x00 14. " FLOIGCDPC ,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Limited" bitfld.long 0x00 13. " FACP14WCP15 ,Flush after CP14 and CP15 writes" "Normal,Flushed" bitfld.long 0x00 12. " FPCP14CP15 ,Force push of CP14 and CP15 registers" "Not forced,Pushed" textline " " bitfld.long 0x00 11. " FOISEG ,Force one instruction to start and end a group" "Not forced,Forced" bitfld.long 0x00 10. " FSAEIG ,Force serialization after each instruction group" "Not forced,Forced" bitfld.long 0x00 9. " DFRO ,Disable flag renaming optimization" "No,Yes" textline " " bitfld.long 0x00 8. " EWFIIANOPI ,Executes WFI instructions as NOP instructions" "Disabled,Enabled" bitfld.long 0x00 7. " EWFEIANOPI ,Executes WFE instructions as NOP instructions" "Disabled,Enabled" bitfld.long 0x00 6. " SMP ,Broadcast of cache and TLB maintenance operations enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EPLDIANOP ,Execute PLD and PLDW instructions as a NOP instruction" "Disabled,Enabled" bitfld.long 0x00 4. " DIP ,Disable indirect predictor" "No,Yes" bitfld.long 0x00 3. " DMBTB ,Disable micro-BTB" "No,Yes" textline " " bitfld.long 0x00 2. " LOLBDPF ,Limits to one loop buffer detect per flush" "Normal,Limited" bitfld.long 0x00 1. " DLB ,Disable loop buffer" "No,Yes" bitfld.long 0x00 0. " EIBTB ,Enable invalidate of BTB" "Disabled,Enabled" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 28. " DBDI ,Disable branch dual issue" "No,Yes" bitfld.long 0x00 15. " DDVM ,Disable Distributed Virtual Memory (DVM) transactions" "No,Yes" bitfld.long 0x00 13.--14. " L1PCTL ,L1 Data prefetch control" "Disabled,1 pre-fetch,2 pre-fetches,3 pre-fetches" textline " " bitfld.long 0x00 12. " L1RADIS ,L1 Data Cache read-allocate mode disable" "No,Yes" bitfld.long 0x00 11. " L2RADIS ,L2 Data Cache read-allocate mode disable" "No,Yes" bitfld.long 0x00 10. " DODMBS ,Disable optimised data memory barrier behaviour" "No,Yes" textline " " bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x140F++0x00 line.long 0x0 "ACTLR2,Auxiliary Control Register 2" bitfld.long 0x00 31. " ECRCG ,Enable CPU regional clock gates" "Disabled,Enabled" bitfld.long 0x00 0. " EDCCADCCI ,Execute data cache clean as data cache clean/invalidate" "Disabled,Enabled" textline " " else hgroup.long c15:0x140F++0x00 hide.long 0x0 "ACTLR2,Auxiliary Control Register 2" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 30. " D32DIS ,Disable use of registers D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" endif group.long c15:0x11++0x0 line.long 0x0 "SCR,Secure Configuration Register" bitfld.long 0x00 9. " SIF ,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. " HCE ,Hyp Call enable" "Undefined,Enabled" bitfld.long 0x00 7. " SCD ,Secure Monitor Call disable" "No,Yes" textline " " bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 4. " FW ,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" textline " " bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure" group.long c15:0x0111++0x00 line.long 0x00 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 17. " NS_L2ERR ,L2 internal asynchronous error and AXI asynchronous error writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Non-writeable,Writeable" bitfld.long 0x00 17. " NS_L2ERR ,Determines if the L2 Extended Control Register(L2ECTLR), is writeable in Non-secure state" "Non-writeable,Writeable" bitfld.long 0x00 16. " NS_ACTLR_PF_WRITE ,Determines if the ACTLR.L1PF and ACTLR.L2PF registers are writeable in Non-secure state" "Non-writeable,Writeable" textline " " bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" endif group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " VBADDR ,Vector Base Address" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " MVBADDR ,Monitor Vector Base Address" textline " " rgroup.long c15:0x001C++0x00 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 8. " A ,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. " I ,Interrupt pending flag" "Not pending,Pending" bitfld.long 0x00 6. " F ,Fast interrupt pending flag" "Not pending,Pending" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x400F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.tbyte 0x00 15.--31. 1. " PERIPHBASE[31:15] ,Periphbase[31:15]" hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]" else hgroup.long c15:0x400F++0x00 hide.long 0x00 "CBAR,Configuration Base Address Register" endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x1609))&0x3)==0x3) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 30. " PRM3 ,Disable processor 3 retention" "No,Yes" bitfld.long 0x00 28.--29. " PPS3 ,Processor 3 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes" textline " " bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" textline " " bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 7. " CPSMP[3] ,Copy of the ACTLR.SMP for processor 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x2) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes" bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" textline " " bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" textline " " bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x1) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" textline " " bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x0) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " endif group.long c15:0x410F++0x00 line.long 0x00 "FILASTARTR,Peripheral port start address register" hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_START_ADDR ,Start address of the peripheral port physical memory region" bitfld.long 0x00 0. " FILT_EN ,FLT_START_ADDR and FLT_END_ADDR are valid" "Invalid,Valid" group.long c15:0x420F++0x00 line.long 0x00 "FILAENDR,Peripheral port end address register" hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_END_ADDR ,End address of the peripheral port physical memory region" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") hgroup.long c15:0x1609++0x00 hide.long 0x00 "SCUCTLR,SCU Control Register" hgroup.long c15:0x410F++0x00 hide.long 0x00 "FILASTARTR,Peripheral port start address register" hgroup.long c15:0x420F++0x00 hide.long 0x00 "FILAENDR,Peripheral port end address register" endif tree.end width 12. tree "Memory Management Unit" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled" bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled" textline " " elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" textline " " endif if (((d.l(c15:0x0002))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address" bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0002))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" textline " " bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Register 0" hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" endif if (((d.l(c15:0x0102))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address" bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0102))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" textline " " bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Register 1" hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" endif if (((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. " PD1 ,Translation table walk Disable bit for TTBR1" "No,Yes" bitfld.long 0x00 4. " PD0 ,Translation table walk Disable bit for TTBR0" "No,Yes" textline " " bitfld.long 0x00 0.--2. " N ,Indicate the width of the base address held in TTBR0" "16KB,8KB,4KB,2KB,1KB,512 bytes,256 bytes,128 bytes" else group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 30. " IMP ,IMPLEMENTATION DEFINED" "Low,High" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 23. " EPD1 ,Translation table walk disable for translations using TTBR1" "No,Yes" textline " " bitfld.long 0x00 22. " A1 ,Selects whether TTBR0 or TTBR1 defines the ASID" "TTBR0,TTBR1" bitfld.long 0x00 16.--18. " T1SZ ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR0" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" textline " " bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 7. " EPD0 ,Translation table walk disable for translations using TTBR0" "No,Yes" textline " " bitfld.long 0x00 0.--2. " T0SZ ,The Size offset of the TTBR0 addressed memory region" "0,1,2,3,4,5,6,7" endif textline " " group.long c15:0x0003++0x00 line.long 0x00 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Lockdown Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Coprocessor Abort,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Fault Status" "Reserved,Alignment fault,Reserved,Reserved,Instruction cache maintenance fault,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort/First level,Permission fault/First level,Synchronous external abort/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk/First level,Reserved,Synchronous parity error on translation table walk/Second level,Reserved" endif elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/synchronous external,Permission/section,L2/synchronous external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." endif elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." endif endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier" bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error" textline " " bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" else hgroup.long c15:0x0015++0x00 hide.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" endif group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug event,Access flag fault/First level,Reserved,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Non-translation/synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort on translation table walk/First level,Permission fault/First level,Synchronous external abort on translation table walk/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk,Reserved,Synchronous parity error on translation table walk,Reserved" endif elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--5. " STATUS ,Generated Exception Type" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access fault flag/First level,Access fault flag/Second level,Access fault flag/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,?..." endif elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." endif endif group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" if (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x0) group.quad c15:0x0047++0x01 line.quad 0x00 "PAR,Physical Address Register" hexmask.quad.byte 0x00 56.--63. 1. " ATTR ,Memory attributes for the returned PA" hexmask.quad 0x00 12.--39. 0x1000 " PA ,Physical Address" bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" textline " " bitfld.quad 0x00 9. " NS ,Non-secure" "Secure,Non-secure" bitfld.quad 0x00 7.--8. " SH ,Shareability attribute" "Non-shareable,Unpredictable,Outer Shareable,Inner Shareable" bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x1) group.quad c15:0x0047++0x01 line.quad 0x00 "PAR,Physical Address Register" bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" bitfld.quad 0x00 9. " FSTAGE ,Translation stage at which the translation aborted" "Stage 1,Stage 2" bitfld.quad 0x00 8. " S2WLK ,Stage 2 fault during a stage 1 translation table walk" "Not occurred,Occurred" textline " " bitfld.quad 0x00 1.--6. " FS ,Fault status field" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access, Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st lvl,Synchronous parity error on memory access on translation table walk/2nd lvl,Synchronous parity error on memory access on translation table walk/3rd lvl,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Domain fault/1st lvl,Domain fault/2nd lvl,Reserved" textline " " bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x0) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" hexmask.long.tbyte 0x00 12.--31. 0x1000 " PA ,Physical Address" bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable" textline " " bitfld.long 0x00 9. " NS ,Non-secure" "Secure,Non-secure" bitfld.long 0x00 7. " SH ,Shareability attribute" "Non-shareable,Shareable" bitfld.long 0x00 4.--6. " INNER ,Inner memory attributes" "Non-cacheable,Strongly-ordered,-,Device,-,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate" textline " " bitfld.long 0x00 2.--3. " OUTER ,Outer memory attributes" "Non-cacheable,Write-Back Write-Allocate,Write-Through no Write-Allocate,Write-Back no Write-Allocate" bitfld.long 0x00 1. " SS ,Supersection" "Not a Supersection,Supersection" bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x1) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" textline " " bitfld.long 0x00 1.--6. " FS ,Fault status" "Reserved,Alignment fault,Debug event,Access flag fault/1st lvl,Fault on instruction cache maintenance,Translation fault/1st lvl,Access flag fault/2nd lvl,Translation fault/2nd lvl,Synchronous external abort,Domain fault/1st lvl,Reserved,Domain fault/2nd lvl,Synchronous external abort on translation table walk/1st lvl,Permission fault/1st lvl,Synchronous external abort on translation table walk/2nd lvl,Permission fault/2nd lvl,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,,,Synchronous parity error on translation table walk/1st lvl,Reserved,Synchronous parity error on translation table walk/2nd lvl,Reserved,?..." textline " " bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " endif if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x002A++0x00 line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x012A++0x00 line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x003A++0x00 line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x013A++0x00 line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") hgroup.long c15:0x003A++0x00 hide.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" hgroup.long c15:0x013A++0x00 hide.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" endif else group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" textline " " bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP" group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " endif if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x400F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.tbyte 0x00 15.--31. 0x80 " PERIPHBASE[31:15] ,Periphbase[31:15]" hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") hgroup.long c15:0x400F++0x00 hide.long 0x00 "CBAR,Configuration Base Address Register" endif textline " " if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x10d++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" else group.long c15:0x10d++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x00 8.--31. 1. " PROCID ,Process identifier" hexmask.long.byte 0x00 0.--7. 1. " ASID ,Address space identifier" endif group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hyp Software Thread ID Register" tree.end width 15. tree "Virtualization Extensions" group.long c15:0x4000++0x00 line.long 0x0 "VPIDR,Virtualization Processor ID Register" group.long c15:0x4500++0x00 line.long 0x0 "VMPIDR,Virtualization Multiprocessor ID Register" group.long c15:0x4001++0x00 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 19. " WXN ,Write permission implies XN" "Not forced,Forced" textline " " bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,Enable address translation" "Disabled,Enabled" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hyp Configuration Register" bitfld.long 0x00 27. " TGE ,Trap General Exceptions" "Disabled,Enabled" bitfld.long 0x00 26. " TVM ,Trap Virtual Memory Controls" "Disabled,Enabled" bitfld.long 0x00 25. " TTLB ,Trap TLB maintenance instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TPU ,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" bitfld.long 0x00 23. " TPC ,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" bitfld.long 0x00 22. " TSW ,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " TAC ,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" bitfld.long 0x00 20. " TIDCP ,Trap Lockdown" "Disabled,Enabled" bitfld.long 0x00 19. " TSC ,Trap SMC" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " TID3 ,Trap ID Group 3" "Disabled,Enabled" bitfld.long 0x00 17. " TID2 ,Trap ID Group 2" "Disabled,Enabled" bitfld.long 0x00 16. " TID1 ,Trap ID Group 1" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " TID0 ,Trap ID Group 0" "Disabled,Enabled" bitfld.long 0x00 14. " TWE ,Trap WFE" "Disabled,Enabled" bitfld.long 0x00 13. " TWI ,Trap WFI" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " DC ,Default Cacheable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " BSU ,Barrier Shareability Upgrade" "No effect,Inner,Outer,Full system" bitfld.long 0x00 9. " FB ,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " VA ,Virtual External Asynchronous Abort" "Not aborted,Aborted" bitfld.long 0x00 7. " VI ,Virtual IRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VF ,Virtual FIQ interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AMO ,A-bit Mask Override" "No override,Override" bitfld.long 0x00 4. " IMO ,I-bit Mask Override" "No override,Override" bitfld.long 0x00 3. " FMO ,F-bit Mask Override" "No override,Override" textline " " bitfld.long 0x00 2. " PTW ,Protected Table Walk" "Disabled,Enabled" bitfld.long 0x00 1. " SWIO ,Set/Way Invalidation Override" "No override,Override" bitfld.long 0x00 0. " VM ,Second Stage of Translation Enable" "Disabled,Enabled" group.long c15:0x4111++0x00 line.long 0x00 "HDCR,Hyp Debug Control Register" bitfld.long 0x00 11. " TDRA ,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. " TDOSA ,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. " TDA ,Trap Debug Access" "No effect,Valid" textline " " bitfld.long 0x00 8. " TDE ,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. " HPME ,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TPM ,Trap Performance Monitors accesses" "No effect,Valid" textline " " bitfld.long 0x00 5. " TPMCR ,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. " HPMN ,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x4211++0x00 line.long 0x00 "HCPTR,Hyp Coprocessor Trap Register" bitfld.long 0x0 31. " TCPAC ,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 15. " TASE ,Trap Advanced SIMD extensions" "Not trapped,Trapped" bitfld.long 0x0 11. " TCP11 ,Trap coprocessor 11" "Not trapped,Trapped" textline " " bitfld.long 0x0 10. " TCP10 ,Trap coprocessor 10" "Not trapped,Trapped" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hyp Syndrome Register" bitfld.long 0x00 26.--31. " EC ,Exception class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome" group.long c15:0x4311++0x00 line.long 0x00 "HSTR,Hyp System Trap Register" bitfld.long 0x00 17. " TJDBX ,Trap Jazelle-DBX" "Disabled,Enabled" bitfld.long 0x00 16. " TTEE ,Trap ThumbEE" "Disabled,Enabled" bitfld.long 0x00 15. " T15 ,Trap to Hyp mode Non-secure priv 15" "Not trapped,Trapped" textline " " bitfld.long 0x00 13. " T13 ,Trap to Hyp mode Non-secure priv 13" "Not trapped,Trapped" bitfld.long 0x00 12. " T12 ,Trap to Hyp mode Non-secure priv 12" "Not trapped,Trapped" bitfld.long 0x00 11. " T11 ,Trap to Hyp mode Non-secure priv 11" "Not trapped,Trapped" textline " " bitfld.long 0x00 10. " T10 ,Trap to Hyp mode Non-secure priv 10" "Not trapped,Trapped" bitfld.long 0x00 9. " T9 ,Trap to Hyp mode Non-secure priv 9" "Not trapped,Trapped" bitfld.long 0x00 8. " T8 ,Trap to Hyp mode Non-secure priv 8" "Not trapped,Trapped" textline " " bitfld.long 0x00 7. " T7 ,Trap to Hyp mode Non-secure priv 7" "Not trapped,Trapped" bitfld.long 0x00 6. " T6 ,Trap to Hyp mode Non-secure priv 6" "Not trapped,Trapped" bitfld.long 0x00 5. " T5 ,Trap to Hyp mode Non-secure priv 5" "Not trapped,Trapped" textline " " bitfld.long 0x00 3. " T3 ,Trap to Hyp mode Non-secure priv 3" "Not trapped,Trapped" bitfld.long 0x00 2. " T2 ,Trap to Hyp mode Non-secure priv 2" "Not trapped,Trapped" bitfld.long 0x00 1. " T1 ,Trap to Hyp mode Non-secure priv 1" "Not trapped,Trapped" textline " " bitfld.long 0x00 0. " T0 ,Trap to Hyp mode Non-secure priv 0" "Not trapped,Trapped" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hyp Translation Table Base Register" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hyp Translation Control Register" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using HTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1" group.quad c15:0x16020++0x01 line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register" hexmask.quad.byte 0x00 48.--55. 1. " VMID ,VMID for the translation table" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" group.long c15:0x4212++0x00 line.long 0x00 "VTCR,Virtualization Translation Control Register" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 6.--7. " SL0 ,Starting Level for VTCR addressed region" "Second level,First level,Reserved,Reserved" bitfld.long 0x00 4. " S ,Sign extension bit" "0,1" bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x4015++0x00 line.long 0x00 "HADFSR,Hyp Auxiliary Data Fault Status Syndrome Register" bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier" bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error" textline " " bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" endif group.long c15:0x4006++0x00 line.long 0x00 "HDFAR,Hyp Data Fault Address Register" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hyp Syndrome Register" bitfld.long 0x00 26.--31. " EC ,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,Reserved,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..." textline " " bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome" group.long c15:0x4206++0x00 line.long 0x00 "HIFAR,Hyp Instruction Fault Address Register" group.long c15:0x4406++0x00 line.long 0x00 "HPFAR,Hyp IPA Fault Address Register" hexmask.long 0x00 4.--31. 1. " FIPA ,Faulting IPA bits" textline " " hgroup.long c15:0x407++0x00 hide.long 0x00 "NOP,No Operation Register" in wgroup.long c15:0x17++0x00 line.long 0x00 "ICIALLUIS,Invalidate All Instruction Caches To PoU Inner Shareable Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x617++0x00 line.long 0x00 "BPIALLIS,Invalidate Entire Branch Predictor Array Inner Shareable Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x57++0x00 line.long 0x00 "ICIALLU,Invalidate Entire Instruction Cache Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x157++0x00 line.long 0x00 "ICIMVAU,Invalidate Instruction Cache Line by VA to Point-of-Unification Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x457++0x00 line.long 0x00 "CP15ISB,Instruction Synchronization Barrier Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x657++0x00 line.long 0x00 "BPIALL,Invalidate Entire Branch Predictor Array (NOP) Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x757++0x00 line.long 0x00 "BPIMVA,Invalidate MVA From Branch Predictors Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.word 0x00 5.--15. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x167++0x00 line.long 0x00 "DCIMVAC,Invalidate Data Cache Line by VA to PoC Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x267++0x00 line.long 0x00 "DCISW,Invalidate Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x0087++0x00 line.long 0x00 "ATS1CPR,Stage 1 current state PL1 read" wgroup.long c15:0x0187++0x00 line.long 0x00 "ATS1CPW,Stage 1 current state PL1 write" wgroup.long c15:0x0287++0x00 line.long 0x00 "ATS1CUR,Stage 1 current state unprivileged (PL0) read" wgroup.long c15:0x0387++0x00 line.long 0x00 "ATS1CUW,Stage 1 current state unprivileged (PL0) write" wgroup.long c15:0x0487++0x00 line.long 0x00 "ATS12NSOPR,Stages 1 and 2 Non-secure PL1 read" wgroup.long c15:0x0587++0x00 line.long 0x00 "ATS12NSOPW,Stages 1 and 2 Non-secure PL1 write" wgroup.long c15:0x0687++0x00 line.long 0x00 "ATS12NSOUR,Stages 1 and 2 Non-secure unprivileged (PL0) read" wgroup.long c15:0x0787++0x00 line.long 0x00 "ATS12NSOUW,Stages 1 and 2 Non-secure unprivileged (PL0) write" wgroup.long c15:0x1a7++0x00 line.long 0x00 "DCCMVAC,Clean Data Cache Line to PoC by VA Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x2a7++0x00 line.long 0x00 "DCCSW,Clean Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x4a7++0x00 line.long 0x00 "CP15DSB,Data Synchronization Barrier Register" hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean" wgroup.long c15:0x5a7++0x00 line.long 0x00 "CP15DMB,Data Memory Barrier Register" hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean" wgroup.long c15:0x1b7++0x00 line.long 0x00 "DCCMVAU,Clean Data Or Unified Cache Line By VA To PoU Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x1e7++0x00 line.long 0x00 "DCCIMVAC,Clean and Invalidate Data Cache Line by VA to PoC Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x2e7++0x00 line.long 0x00 "DCCISW,Clean and Invalidate Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x4087++0x00 line.long 0x00 "ATS1HR,Address Translate Stage 1 Hyp mode Read" wgroup.long c15:0x4187++0x00 line.long 0x00 "ATS1HW,Address Translate Stage 1 Hyp mode Write" wgroup.long c15:0x0038++0x00 line.long 0x00 "TLBIALLIS,Invalidate entire TLB Inner Shareable" wgroup.long c15:0x0138++0x00 line.long 0x00 "TLBIMVAIS,Invalidate unified TLB entry by MVA Inner Shareable" wgroup.long c15:0x0238++0x00 line.long 0x00 "TLBIASIDIS,Invalidate unified TLB byASID match Inner Shareable" wgroup.long c15:0x0338++0x00 line.long 0x00 "TLBIMVAAIS,Invalidate unified TLB by MVA all ASID Inner Shareable" wgroup.long c15:0x0058++0x00 line.long 0x00 "ITLBIALL,Invalidate instruction TLB" wgroup.long c15:0x0158++0x00 line.long 0x00 "ITLBIMVA,Invalidate instruction TLB entry by MVA" wgroup.long c15:0x0258++0x00 line.long 0x00 "ITLBIASID,Invalidate instruction TLB by ASID match" wgroup.long c15:0x0068++0x00 line.long 0x00 "DTLBIALL,Invalidate data TLB" wgroup.long c15:0x0168++0x00 line.long 0x00 "DTLBIMVA,Invalidate data TLB entry by MVA" wgroup.long c15:0x0268++0x00 line.long 0x00 "DTLBIASID,Invalidate data TLB by ASID match" wgroup.long c15:0x0078++0x00 line.long 0x00 "TLBIALL,Invalidate unified TLB" wgroup.long c15:0x0178++0x00 line.long 0x00 "TLBIMVA,Invalidate unified TLB entry by MVA" wgroup.long c15:0x0278++0x00 line.long 0x00 "TLBIASID,Invalidate unified TLB byASID match" wgroup.long c15:0x0378++0x00 line.long 0x00 "TLBIMVAA,Invalidate unified TLB by MVA all ASID" wgroup.long c15:0x4038++0x00 line.long 0x00 "TLBIALLHIS,Invalidate entire Hyp unified TLB Inner Shareable" wgroup.long c15:0x4138++0x00 line.long 0x00 "TLBIMVAHIS,Invalidate Hyp unified TLB entry by MVA Inner Shareable" wgroup.long c15:0x4438++0x00 line.long 0x00 "TLBIALLNSNHIS,Invalidate entire Non-secure Non-Hyp unified TLB Inner Shareable" wgroup.long c15:0x4078++0x00 line.long 0x00 "TLBIALLH,Invalidate entire Hyp unified TLB" wgroup.long c15:0x4178++0x00 line.long 0x00 "TLBIMVAH,Invalidate Hyp unified TLB entry by MVA" wgroup.long c15:0x4478++0x00 line.long 0x00 "TLBIALLNSNH,Invalidate entire Non-secure Non-Hyp unified TLB" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" else hgroup.long c15:0x403A++0x00 hide.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0" hgroup.long c15:0x413A++0x00 hide.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1" endif group.long c15:0x400C++0x00 line.long 0x00 "HVBAR,Hyp Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " HVBADDR ,Hyp Vector Base Address" tree.end width 12. tree "Cache Control and Configuration" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..." bitfld.long 0x00 18.--20. " CTYPE7 ,Cache type for levels 7" "No cache,?..." textline " " bitfld.long 0x00 15.--17. " CTYPE6 ,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. " CTYPE5 ,Cache type for levels 5" "No cache,?..." bitfld.long 0x00 9.--11. " CTYPE4 ,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. " CTYPE3 ,Cache type for levels 3" "No cache,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Not implemented,Reserved,Reserved,Reserved,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..." endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,Reserved,16 words,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,8 words,16 words,?..." endif group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data/Unified,Instruction" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") wgroup.long c15:0x10EF++0x00 line.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register" bitfld.long 0x00 1.--2. " LEVEL ,Cache level" "L1,L2,Reserved,Reserved" else hgroup.long c15:0x10EF++0x00 hide.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register" endif tree "Level 1 memory system" width 10. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x000F++0x00 line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register" group.long c15:0x010F++0x00 line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register" group.long c15:0x020F++0x00 line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register" group.long c15:0x001F++0x00 line.long 0x00 "DL1DATA0,Data L1 Data 0 Register" group.long c15:0x011F++0x00 line.long 0x00 "DL1DATA1,Data L1 Data 1 Register" group.long c15:0x021F++0x00 line.long 0x00 "DL1DATA2,Data L1 Data 2 Register" group.long c15:0x031F++0x00 line.long 0x00 "DL1DATA3,Data L1 Data 3 Register" wgroup.long c15:0x004F++0x00 line.long 0x00 "RAMINDEX,RAM Index Register" hexmask.long.byte 0x00 24.--31. 1. " RAMID ,RAM identifier" bitfld.long 0x00 18.--21. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" textline " " group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count" hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count" bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid" textline " " hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier" bitfld.quad 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x300F++0x0 line.long 0x00 "CDBGDR0,Data Register 0" rgroup.long c15:0x310F++0x0 line.long 0x00 "CDBGDR1,Data Register 1" rgroup.long c15:0x320F++0x0 line.long 0x00 "CDBGDR2,Data Register 2" wgroup.long c15:0x302F++0x0 line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x312F++0x0 line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 31. " CW ,Cache Way" "Low,High" hexmask.long 0x00 5.--30. 1. " SI ,Set index" bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x304F++0x0 line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 31. " CW ,Cache Way" "Low,High" hexmask.long 0x00 5.--30. 1. " SI ,Set index" bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 31. " TLB_WAY ,TLB Way" "Low,High" hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x300F++0x0 line.long 0x00 "CDBGDR0,Data Register 0" bitfld.long 0x00 31. " PMOESID ,Partial MOESI state / Dirty" "Low,High" bitfld.long 0x00 30. " POMA ,Partial Outer memory attribute" "Low,High" bitfld.long 0x00 29. " PMOESIE ,Partial MOESI state / Exclusive" "Low,High" textline " " bitfld.long 0x00 28. " PMOESIV ,Partial MOESI state / Valid" "Low,High" bitfld.long 0x00 27. " NS ,Non-Secure state" "Low,High" hexmask.long 0x00 0.--26. 1. " TA ,Tag Address" rgroup.long c15:0x310F++0x0 line.long 0x00 "CDBGDR1,Data Register 1" bitfld.long 0x00 0. " PMOESID ,Partial MOESI state / Globally shared" "Low,High" rgroup.long c15:0x320F++0x0 line.long 0x00 "CDBGDR2,Data Register 2" wgroup.long c15:0x302F++0x0 line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" wgroup.long c15:0x312F++0x0 line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long 0x00 6.--30. 1. " SI ,Set index" wgroup.long c15:0x304F++0x0 line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" if (((d.l(c15:0x1000))&0xFFFE000)==0x1DE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x1) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--13. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x2) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--15. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--16. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x7FE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--17. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0xFFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--18. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--19. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--20. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" else hgroup.long c15:0x314F++0x0 hide.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" endif if (((d.l(c15:0x324F))&0x100)==0x100) wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1" else wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 30.--31. " TLB_WAY ,TLB Way" "0,1,2,3" bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1" hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index" endif endif tree.end tree "Level 2 memory system" width 11. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes" bitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4" bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present" textline " " bitfld.long 0x00 21. " ECCPE ,ECC and parity enable" "Disabled,Enabled" bitfld.long 0x00 12. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 10.--11. " DRAMSLICE ,Data RAM slice" "0,1,2,Invalid" textline " " bitfld.long 0x00 9. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 6.--8. " TRAML ,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" bitfld.long 0x00 5. " DRAMS ,L2 Data RAM setup" "0 cycle,1 cycle" textline " " bitfld.long 0x00 0.--2. " DRAML ,L2 Data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 24.--25. " NCPU ,Number of CPU" "1,2,3,4" bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present" bitfld.long 0x00 0. " DRAML ,L2 data RAM latency" "2 cycles,3 cycles" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes" bitfld.long 0x00 27.--30. " IWINC ,Controls index incrementation method" "1.,1.,3.,7.,15.,31.,63.,127.,255.,511.,1023.,2047.,4095.,8191.,8191.,8191." rbitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4" bitfld.long 0x00 20. " SFEN , Snoop Filter Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " L2ECCD ,L2 ECC Disable" "No,Yes" bitfld.long 0x00 18. " L2CD ,L2 cache disable" "No,Yes" bitfld.long 0x00 15.--17. " TRAMSL ,Tag RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 12.--14. " TRAMRL ,Tag RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x00 9.--11. " TRAMWL ,Tag RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 6.--8. " DRAMSL ,Data RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 3.--5. " DRAMRL ,Data RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 0.--2. " DRAMWL ,Data RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. " L2INTASYNCERR ,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 28. " FL2TBCEA ,Forces L2 tag bank clock enable active" "Not forced,Forced" bitfld.long 0x00 27. " FL2LCEA ,Forces L2 logic clock enable active" "Not forced,Forced" bitfld.long 0x00 26. " EL2GTRCG ,Enables L2 GIC and Timer regional clock gates" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ERTSI ,Enables replay threshold single issue" "Disabled,Enabled" bitfld.long 0x00 15. " ECWRM ,Enable CPU WFI retention mode" "Disabled,Enabled" bitfld.long 0x00 14. " EUCE ,Enables UniqueClean evictions with data" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DSCDT ,Disables SharedClean data transfers" "No,Yes" bitfld.long 0x00 12. " DWCWBE ,Disable multiple outstanding WriteClean/WriteBack/Evicts using the same AWID" "No,Yes" bitfld.long 0x00 11. " DDSB ,Disables DSB with no DVM synchronization" "No,Yes" textline " " bitfld.long 0x00 10. " DNSDAR ,Disables non-secure debug array read" "No,Yes" bitfld.long 0x00 9. " EPF ,Enable use of Prefetch bit in L2 cache replacement algorithm" "Disabled,Enabled" bitfld.long 0x00 8. " DDVMCMOMB ,Disables Distributed Virtual Memory (DVM) transactions and cache maintenance operation message broadcast" "No,Yes" textline " " bitfld.long 0x00 7. " EHDT ,Enables hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. " DSTFM ,Disables shared transactions from master" "No,Yes" bitfld.long 0x00 4. " DWUAWLUTFM ,Disables WriteUnique and WriteLineUnique transactions from master" "No,Yes" textline " " bitfld.long 0x00 3. " DCEPTE ,Disables clean/evict push to external" "No,Yes" bitfld.long 0x00 2. " LTORPTB ,Limit to one request per tag bank" "Disabled,Enabled" bitfld.long 0x00 1. " EARTT ,Enable arbitration replay threshold timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DPF ,Disable prefetch forwarding" "No,Yes" group.long c15:0x130F++0x00 line.long 0x00 "L2PFR,L2 Prefetch Control Register" bitfld.long 0x00 12. " DDTOLSPR ,Disable dynamic throttling of load/store prefetch requests" "No,Yes" bitfld.long 0x00 11. " EPRFRUT ,Enable prefetch request from ReadUnique transactions" "Disabled,Enabled" bitfld.long 0x00 10. " DTWDAP ,Disable table walk descriptor access prefetch" "No,Yes" textline " " bitfld.long 0x00 7.--8. " L2IFPD ,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" bitfld.long 0x00 4.--5. " L2LSDPD ,L2 load/store data prefetch distance" "0 lines,2 lines,4 lines,8 lines" textline " " group.quad c15:0x110F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count" hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count" bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid" textline " " hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier" bitfld.quad 0x00 18.--21. " C/W ,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" hgroup.quad c15:0x110F0++0x01 hide.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. " ECCUNERR ,ECC uncorrectable error " "No error,Error" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0. " L2DRC ,Disable L2 retention" "No,Yes" rgroup.long c15:0x1609++0x00 line.long 0x00 "L2MRERRSR,L2 Memory Error Syndrome Register" bitfld.long 0x00 31. " FATAL ,Fatal bit" "0,1" bitfld.long 0x00 25.--30. " OEC ,Other error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 19.--24. " REC ,Repeat error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x00 6.--18. 1. " ERRLIND ,Index Error Location" textline " " bitfld.long 0x00 2.--5. " ERRLWAY ,Way Error Location" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " RAMID ,RAM Identifier" "TAG,DATA" bitfld.long 0x00 0. " VALID ,Valid bit" "Not valid,Valid" endif tree.end tree.end width 12. tree "System Performance Monitor" group.long c15:0xc9++0x00 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code" hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code" bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. " X ,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle" textline " " bitfld.long 0x00 2. " C ,Clock Counter Reset" "No reset,Reset" bitfld.long 0x00 1. " P ,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. " E ,All Counters Enable" "Disabled,Enabled" group.long c15:0x1c9++0x00 line.long 0x00 "PMNCNTENSET,Count Enable Set Register " bitfld.long 0x00 5. " P5 ,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event Counter 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,Event Counter 3 enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,Event Counter 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event Counter 0 enable bit" "Disabled,Enabled" group.long c15:0x2c9++0x00 line.long 0x00 "PMCNTENCLR,Count Enable Clear Register" eventfld.long 0x00 5. " P5 ,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. " P4 ,Event Counter 4 clear bit" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Event Counter 3 clear bit" "Disabled,Enabled" textline " " eventfld.long 0x00 2. " P2 ,Event Counter 2 clear bit" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Event Counter 0 clear bit" "Disabled,Enabled" group.long c15:0x3c9++0x00 line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register" eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. " P4 ,PMN4 overflow" "No overflow,Overflow" eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow" textline " " eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow" eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow" group.long c15:0x4c9++0x00 line.long 0x00 "PMSWINC,Performance Monitor Software Increment" bitfld.long 0x00 5. " P5 ,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. " P4 ,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment" textline " " bitfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment" bitfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment" group.long c15:0x5c9++0x00 line.long 0x00 "PMSELR,Performance Monitor Select Register" bitfld.long 0x00 0.--4. " SEL ,Current event counter select" "0,1,2,3,4,5,?..." group.long c15:0xd9++0x00 line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register" group.long c15:0x1d9++0x00 line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register" bitfld.long 0x00 31. " P ,Execution at PL1 events counting disable" "No,Yes" bitfld.long 0x00 30. " U ,Execution at PL0 events counting disable" "No,Yes" bitfld.long 0x00 29. " NSK ,Execution in Non-secure state at PL1 events counting disable" "No,Yes" bitfld.long 0x00 28. " NSU ,Execution in Non-secure state at PL0 events counting disable" "No,Yes" textline " " bitfld.long 0x00 27. " NSH ,Execution in Non-secure state at PL2 events counting enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " EVTCOUNT ,Event to count" group.long c15:0x2d9++0x00 line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register" group.long c15:0xe9++0x00 line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register" bitfld.long 0x00 0. " EN ,User mode access enable" "Disabled,Enabled" group.long c15:0x1e9++0x00 line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x2e9++0x00 line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear" eventfld.long 0x00 5. " P5 ,Overflow Interrupt Clear" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " P4 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,Overflow Interrupt Clear" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " P1 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Overflow Interrupt Clear" "Disabled,Enabled" group.long c15:0x3e9++0x00 line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register" bitfld.long 0x00 31. " C ,PMCCNTR overflow bit" "Not overflowed,Overflowed" bitfld.long 0x00 30. " P30 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 29. " P29 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 28. " P28 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 26. " P26 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 25. " P25 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 24. " P24 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 22. " P22 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 21. " P21 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 20. " P20 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " P19 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 18. " P18 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 17. " P17 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 16. " P16 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " P15 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 14. " P14 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 13. " P13 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 12. " P12 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " P11 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 10. " P10 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 9. " P9 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 8. " P8 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P7 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 6. " P6 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " P3 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 2. " P2 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event Counter Overflow" "Disabled,Enabled" tree.end width 12. tree "System Timer Register" group.long c15:0x000E++0x00 line.long 0x00 "CNTFRQ,Counter Frequency Register" group.long c15:0x001E++0x00 line.long 0x00 "CNTKCTL,Timer PL1 Control Register" bitfld.long 0x00 9. " PL0PTEN ,Controls whether the physical timer registers are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. " PL0VTEN ,Controls whether the virtual timer registers are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. " PL0VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" textline " " bitfld.long 0x00 0. " PL0PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" textline "" group.quad c15:0x100E0++0x01 line.quad 0x00 "CNTPCT,Counter Physical Count Register" group.quad c15:0x120E0++0x01 line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register" group.long c15:0x002E++0x00 line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Timer Value Register" group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" textline "" group.quad c15:0x110E0++0x01 line.quad 0x00 "CNTVCT,Counter Virtual Count Register" group.quad c15:0x130E0++0x01 line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register" group.long c15:0x003E++0x00 line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register" group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" group.quad c15:0x140E0++0x01 line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register" textline "" group.long c15:0x401E++0x00 line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTPCTis the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PL1VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. " PL1PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" group.quad c15:0x160E0++0x01 line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register" group.long c15:0x402E++0x00 line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register" group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" tree.end width 11. width 15. tree "Debug Registers" rgroup.long c14:0.++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " hexmask.long.byte 0x0 16.--19. 1. " VERSION ,Debug Architecture Version" bitfld.long 0x0 15. " DEVID ,Debug Device ID" "Low,High" bitfld.long 0x0 14. " NSUHD ,Secure User halting debug-mode" "Supported,Not supported" textline " " bitfld.long 0x0 13. " PCSR ,PC Sample register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. " SE ,Security Extensions implemented" "Not implemented,Implemented" hexmask.long.byte 0x0 4.--7. 1. " VARIANT ,Implementation-defined Variant Number" textline " " hexmask.long.byte 0x0 0.--3. 1. " REVISION ,Implementation-defined Revision Number" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") wgroup.long c14:6.++0x0 line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" wgroup.long c14:5.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c14:195.))&0x1)==0x1) group.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." rbitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" rbitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " rbitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" else rgroup.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" endif wgroup.long c14:5.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)" endif group.long c14:0x7++0x0 line.long 0x00 "DBGVCR,Debug Vector Catch register" bitfld.long 0x00 31. " NSF ,FIQ vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 30. " NSI ,IRG vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 28. " NSD ,Data Abort vector catch in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " NSP ,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 26. " NSS ,SVC vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 25. " NSU ,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " NSHF ,FIQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 22. " NSHI ,IRQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 21. " NSHE ,Hyp Trap or Hyp mode entry exception vector catch enable in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " NSHD ,Data Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 19. " NSHP ,Prefetch Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 18. " NSHC ,Hypervisor Call. from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " NSHU ,Undefined Instruction, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " MF ,FIQ vector catch enable, in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 14. " MI ,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MD ,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 11. " MP ,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 10. " MS ,SMC vector catch enable in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SF ,FIQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 6. " SI ,IRQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 4. " SD ,Data Abort vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SP ,Prefetch Abort vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 2. " SS ,SVC vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 1. " SU ,Undefined instruction vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " R ,Reset vector catch enable" "Disabled,Enabled" group.long c14:9.++0x0 line.long 0x00 "DBGECR,Debug Event Catch Register" bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled" group.long c14:32.++0x0 line.long 0x00 "DBGDTRRX,Debug Receive Register (External View)" wgroup.long c14:33.++0x0 line.long 0x00 "DBGITR,Debug Instruction Transfer Register" rgroup.long c14:33.++0x0 line.long 0x00 "DBGPCSR,Program Counter Sampling Register" hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value" bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,Reserved,Thumb" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault Status" "Not caused,Caused" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c14:195.))&0x1)==0x1) group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "Low,High" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" else group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " rbitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "Low,High" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" endif endif wgroup.long c14:35.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit Register (External View)" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" bitfld.long 0x00 1. " RRQ ,Restart request" "No effect,Restart" bitfld.long 0x00 0. " HRQ ,Halt request" "No effect,Halt" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 4. " CBRRQ ,CBRRQ" "Low,High" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" textline " " bitfld.long 0x00 1. " RR ,Restart request" "No effect,Restart" bitfld.long 0x00 0. " HR ,Halt request" "No effect,Halt" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c14:37.++0x0 line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register" bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset" bitfld.long 0x00 2. " DECRR ,Debug extend core reset request" "No request,Request" bitfld.long 0x00 1. " DPDO ,Debug power-down override" "Disabled,Enabled" bitfld.long 0x00 0. " DCSC ,Debug clock stop control" "Stopped,Running" textline " " elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:37.++0x0 line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register" bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset" endif rgroup.long c14:40.++0x0 line.long 0x00 "DBGPCSR,Program Counter Sampling Register" hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value" bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,?..." rgroup.long c14:41.++0x0 line.long 0x00 "DBGCIDSR,DBGCIDSR" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c14:42.++0x0 line.long 0x00 "DBGVIDSR,Virtualization ID Sampling Register" bitfld.long 0x00 31. " NS ,NS state sample" "Secure,Non-secure" bitfld.long 0x00 30. " H ,Hyp mode sample" "Not associated,Associated" hexmask.long.byte 0x00 0.--7. 1. " VMID ,VMID sample" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:42.++0x0 line.long 0x00 "DBGVIDSR,DBGVIDSR" endif width 15. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") textline " " wgroup.long c14:958.++0x0 line.long 0x00 "DBGITOCTRL,Debug Integration Output Control Register" bitfld.long 0x00 3. " NPMUIRQ ,Drives the nPMUIRQ output" "Low,High" bitfld.long 0x00 2. " CTI_PMUIRQ ,Drives the internal signal equivalent to PMUIRQ that goes from the Performance Monitor Unit (PMU) to the Cross Trigger Interface (CTI)" "Low,High" bitfld.long 0x00 1. " CTI_DBGRESTARTED ,Drives the internal signal that goes from the Debug unit to the CTI to acknowledge success of a debug restart command" "Low,High" bitfld.long 0x00 0. " CTI_DBGTRIGGER ,Drives the internal signal equivalent to DBGTRIGGER that goes from the Debug unit to the CTI" "Low,High" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") textline " " wgroup.long c14:958.++0x0 line.long 0x00 "DBGITMISCOUT,Integration Miscellaneous Signals Output Register" bitfld.long 0x00 9. " DBGRESTARTED ,Value of the DBGRESTARTED output pin" "Low,High" bitfld.long 0x00 4. " PMUIRQ ,Value of PMUIRQ output pin" "Low,High" bitfld.long 0x00 0. " DBGACK ,Value of the DBGACK output pin" "Low,High" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c14:959.++0x0 line.long 0x00 "DBGITISR,Debug Integration Input Status Register" bitfld.long 0x00 3. " DBGSWENABLE ,Reads the state of the DBGSWENABLE input" "Low,High" bitfld.long 0x00 2. " CTI_DBGRESTART ,CTI debug restart" "Low,High" bitfld.long 0x00 1. " CTI_EDBGRQ ,CTI debug request" "Low,High" bitfld.long 0x00 0. " EDBGRQ ,Reads the state of the EDBGRQ input" "Low,High" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") textline " " rgroup.long c14:959.++0x0 line.long 0x00 "DBGITMISCIN,Integration Miscellaneous Signals Input Register" bitfld.long 0x00 2. " NFIQ ,Read value of nFIQ input pin" "Low,High" bitfld.long 0x00 1. " NIRQ ,Read value of nIRQ input pin" "Low,High" bitfld.long 0x00 0. " EDBGRQ ,Read value of EDBGRQ input pin" "Low,High" endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x202))&0x80000000)==0x80000000) rgroup.quad c14:128.++0x1 line.quad 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.quad 0x0 12.--39. 0x1000 " ROMADDR ,ROM physical address" bitfld.quad 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid" rgroup.quad c14:256.++0x1 line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" hexmask.quad 0x0 12.--39. 0x1000 " SELFOFFSET ,Debug bus self-address offset value" bitfld.quad 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid" else rgroup.long c14:128.++0x0 line.long 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.long 0x0 12.--31. 0x1000 " ROMADDR ,ROM physical address" bitfld.long 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid" rgroup.long c14:256.++0x0 line.long 0x0 "DBGDSAR,Debug Self Address Offset Register" hexmask.long 0x0 12.--31. 0x1000 " SELFOFFSET ,Debug bus self-address offset value" bitfld.long 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid" endif group.long c14:195.++0x00 line.long 0x00 "DBGOSDLR,OS Double Lock Register" bitfld.long 0x00 0. " DLK ,OS Double Lock control bit" "Unlocked,Locked" else hgroup.quad c14:128.++0x1 hide.quad 0x0 "DBGDRAR,Debug ROM Address Register" hgroup.quad c14:256.++0x1 hide.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" hgroup.long c14:195.++0x00 hide.long 0x00 "DBGOSDLR,OS Double Lock Register" endif wgroup.long c14:192.++0x00 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup.long c14:193.++0x00 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 1. " OSLK ,Status of the OS Lock" "Not locked,Locked" bitfld.long 0x00 0. 3. " OSLM ,OS Lock Model implemented Bit" "Reserved,Reserved,W/o DBGOSSRR,?..." group.long c14:196.++0x00 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 3. " COREPURQ ,Core Power Up Request" "Low,High" bitfld.long 0x00 2. " HCWR ,Hold Core Warm Reset" "No reset,Reset" bitfld.long 0x00 1. " CWRR ,Core Warm Reset Request" "Not requested,Requested" textline " " bitfld.long 0x00 0. " CORENPDRQ ,Core No Power down Request" "Low,High" rgroup.long c14:197.++0x0 line.long 0x00 "DBGPRSR,Device Power-down and Reset Status Register" bitfld.long 0x00 6. " DLK ,OS Double Lock status" "Low,High" bitfld.long 0x00 5. " OSLK ,OS Lock status" "Low,High" bitfld.long 0x00 4. " HALTED ,Halted" "Low,High" textline " " bitfld.long 0x00 3. " SR ,Sticky Reset Status" "Low,High" bitfld.long 0x00 2. " RS ,Reset Status" "Low,High" bitfld.long 0x00 1. " SPD ,Sticky Power-down Status" "Low,High" textline " " bitfld.long 0x00 0. " PU ,Power-up Status" "Low,High" tree "Processor ID registers" rgroup.long c14:(832.+0.)++0x00 line.long 0x00 "PIDR0,Processor ID register 0" rgroup.long c14:(832.+1.)++0x00 line.long 0x00 "PIDR1,Processor ID register 1" rgroup.long c14:(832.+2.)++0x00 line.long 0x00 "PIDR2,Processor ID register 2" rgroup.long c14:(832.+3.)++0x00 line.long 0x00 "PIDR3,Processor ID register 3" rgroup.long c14:(832.+4.)++0x00 line.long 0x00 "PIDR4,Processor ID register 4" rgroup.long c14:(832.+5.)++0x00 line.long 0x00 "PIDR5,Processor ID register 5" rgroup.long c14:(832.+6.)++0x00 line.long 0x00 "PIDR6,Processor ID register 6" rgroup.long c14:(832.+7.)++0x00 line.long 0x00 "PIDR7,Processor ID register 7" rgroup.long c14:(832.+8.)++0x00 line.long 0x00 "PIDR8,Processor ID register 8" rgroup.long c14:(832.+9.)++0x00 line.long 0x00 "PIDR9,Processor ID register 9" rgroup.long c14:(832.+10.)++0x00 line.long 0x00 "PIDR10,Processor ID register 10" rgroup.long c14:(832.+11.)++0x00 line.long 0x00 "PIDR11,Processor ID register 11" rgroup.long c14:(832.+12.)++0x00 line.long 0x00 "PIDR12,Processor ID register 12" rgroup.long c14:(832.+13.)++0x00 line.long 0x00 "PIDR13,Processor ID register 13" rgroup.long c14:(832.+14.)++0x00 line.long 0x00 "PIDR14,Processor ID register 14" rgroup.long c14:(832.+15.)++0x00 line.long 0x00 "PIDR15,Processor ID register 15" rgroup.long c14:(832.+16.)++0x00 line.long 0x00 "PIDR16,Processor ID register 16" rgroup.long c14:(832.+17.)++0x00 line.long 0x00 "PIDR17,Processor ID register 17" rgroup.long c14:(832.+18.)++0x00 line.long 0x00 "PIDR18,Processor ID register 18" rgroup.long c14:(832.+19.)++0x00 line.long 0x00 "PIDR19,Processor ID register 19" rgroup.long c14:(832.+20.)++0x00 line.long 0x00 "PIDR20,Processor ID register 20" rgroup.long c14:(832.+21.)++0x00 line.long 0x00 "PIDR21,Processor ID register 21" rgroup.long c14:(832.+22.)++0x00 line.long 0x00 "PIDR22,Processor ID register 22" rgroup.long c14:(832.+23.)++0x00 line.long 0x00 "PIDR23,Processor ID register 23" rgroup.long c14:(832.+24.)++0x00 line.long 0x00 "PIDR24,Processor ID register 24" rgroup.long c14:(832.+25.)++0x00 line.long 0x00 "PIDR25,Processor ID register 25" rgroup.long c14:(832.+26.)++0x00 line.long 0x00 "PIDR26,Processor ID register 26" rgroup.long c14:(832.+27.)++0x00 line.long 0x00 "PIDR27,Processor ID register 27" rgroup.long c14:(832.+28.)++0x00 line.long 0x00 "PIDR28,Processor ID register 28" rgroup.long c14:(832.+29.)++0x00 line.long 0x00 "PIDR29,Processor ID register 29" rgroup.long c14:(832.+30.)++0x00 line.long 0x00 "PIDR30,Processor ID register 30" rgroup.long c14:(832.+31.)++0x00 line.long 0x00 "PIDR31,Processor ID register 31" rgroup.long c14:(832.+32.)++0x00 line.long 0x00 "PIDR32,Processor ID register 32" rgroup.long c14:(832.+33.)++0x00 line.long 0x00 "PIDR33,Processor ID register 33" rgroup.long c14:(832.+34.)++0x00 line.long 0x00 "PIDR34,Processor ID register 34" rgroup.long c14:(832.+35.)++0x00 line.long 0x00 "PIDR35,Processor ID register 35" rgroup.long c14:(832.+36.)++0x00 line.long 0x00 "PIDR36,Processor ID register 36" rgroup.long c14:(832.+37.)++0x00 line.long 0x00 "PIDR37,Processor ID register 37" rgroup.long c14:(832.+38.)++0x00 line.long 0x00 "PIDR38,Processor ID register 38" rgroup.long c14:(832.+39.)++0x00 line.long 0x00 "PIDR39,Processor ID register 39" rgroup.long c14:(832.+40.)++0x00 line.long 0x00 "PIDR40,Processor ID register 40" rgroup.long c14:(832.+41.)++0x00 line.long 0x00 "PIDR41,Processor ID register 41" rgroup.long c14:(832.+42.)++0x00 line.long 0x00 "PIDR42,Processor ID register 42" rgroup.long c14:(832.+43.)++0x00 line.long 0x00 "PIDR43,Processor ID register 43" rgroup.long c14:(832.+44.)++0x00 line.long 0x00 "PIDR44,Processor ID register 44" rgroup.long c14:(832.+45.)++0x00 line.long 0x00 "PIDR45,Processor ID register 45" rgroup.long c14:(832.+46.)++0x00 line.long 0x00 "PIDR46,Processor ID register 46" rgroup.long c14:(832.+47.)++0x00 line.long 0x00 "PIDR47,Processor ID register 47" rgroup.long c14:(832.+48.)++0x00 line.long 0x00 "PIDR48,Processor ID register 48" rgroup.long c14:(832.+49.)++0x00 line.long 0x00 "PIDR49,Processor ID register 49" rgroup.long c14:(832.+50.)++0x00 line.long 0x00 "PIDR50,Processor ID register 50" rgroup.long c14:(832.+51.)++0x00 line.long 0x00 "PIDR51,Processor ID register 51" rgroup.long c14:(832.+52.)++0x00 line.long 0x00 "PIDR52,Processor ID register 52" rgroup.long c14:(832.+53.)++0x00 line.long 0x00 "PIDR53,Processor ID register 53" rgroup.long c14:(832.+54.)++0x00 line.long 0x00 "PIDR54,Processor ID register 54" rgroup.long c14:(832.+55.)++0x00 line.long 0x00 "PIDR55,Processor ID register 55" rgroup.long c14:(832.+56.)++0x00 line.long 0x00 "PIDR56,Processor ID register 56" rgroup.long c14:(832.+57.)++0x00 line.long 0x00 "PIDR57,Processor ID register 57" rgroup.long c14:(832.+58.)++0x00 line.long 0x00 "PIDR58,Processor ID register 58" rgroup.long c14:(832.+59.)++0x00 line.long 0x00 "PIDR59,Processor ID register 59" rgroup.long c14:(832.+60.)++0x00 line.long 0x00 "PIDR60,Processor ID register 60" rgroup.long c14:(832.+61.)++0x00 line.long 0x00 "PIDR61,Processor ID register 61" rgroup.long c14:(832.+62.)++0x00 line.long 0x00 "PIDR62,Processor ID register 62" rgroup.long c14:(832.+63.)++0x00 line.long 0x00 "PIDR63,Processor ID register 63" tree.end tree "Coresight Management Registers" group.long c14:960.++0x0 line.long 0x00 "DBGITCTRL,Debug Integration Mode Control Register" bitfld.long 0x00 0. " IME ,Integration Mode Enable" "Disabled,Enabled" group.long c14:1000.++0x0 line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Set" "Not set,Set" textline " " bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Set" "Not set,Set" bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Set" "Not set,Set" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Set" "Not set,Set" group.long c14:1001.++0x0 line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Clear" "Not cleared,Cleared" textline " " bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Clear" "Not cleared,Cleared" bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Clear" "Not cleared,Cleared" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Clear" "Not cleared,Cleared" wgroup.long c14:1004.++0x00 line.long 0x00 "DBGLAR,Lock Access Register" rgroup.long c14:1005.++0x00 line.long 0x00 "DBGLSR,Lock Status Register" bitfld.long 0x00 2. " NTT ,Not 32-bit access" "32-bit,Not 32-bit" bitfld.long 0x00 1. " SLK ,Software Lock status" "Not locked,Locked" bitfld.long 0x00 0. " SLI ,Software Lock Implemented" "Not implemented,Implemented" textline " " rgroup.long c14:1006.++0x0 line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enable (DBGEN OR NIDEN) AND (SPIDEN OR SPNIDEN)" "Disabled,Enabled" bitfld.long 0x00 5. " SI ,Secure invasive debug features implementation" "No effect,Implemented" textline " " bitfld.long 0x00 4. " SE ,Secure invasive debug enable (DBGEN AND SPIDEN)" "Disabled,Enabled" bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enable (DBGEN OR NIDEN)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enable (DBGEN)" "Disabled,Enabled" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c14:1009.++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Depends on instr set state,No offset,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:1009.++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Reserved,No offset,?..." endif textline " " rgroup.long c14:1010.++0x0 line.long 0x0 "DBGDEVID0,Debug Device ID Register 0" bitfld.long 0x0 24.--27. " AR ,Debug External Auxiliary Control Register support status" "Reserved,Supported,?..." bitfld.long 0x0 20.--23. " DL ,Support for Debug OS Double Lock Register" "Reserved,Supported,?..." bitfld.long 0x0 16.--19. " VE ,Specifies implementation of Virtualization Extension" "Reserved,Implemented,?..." textline " " bitfld.long 0x0 12.--15. " VC ,Form of the vector catch event implemented" "Implemented,?..." bitfld.long 0x0 8.--11. " BPAM ,Level of support for Immediate Virtual Address matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" bitfld.long 0x0 4.--7. " WPAM ,Level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..." textline " " bitfld.long 0x0 0.--3. " PCS ,Level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..." textline " " rgroup.long c14:1011.++0x00 line.long 0x00 "DBGDEVTYPE,Debug Device Type Register" bitfld.long 0x00 4.--7. " T ,Sub type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " C ,Main class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c14:1016.++0x00 line.long 0x00 "DBGPID0,Debug Peripheral ID 0" hexmask.long.byte 0x00 0.--7. 1. " PN[7:0] ,Part Number [7:0]" rgroup.long c14:1017.++0x00 line.long 0x00 "DBGPID1,Debug Peripheral ID 1" hexmask.long.byte 0x00 4.--7. 1. " JEPID[3:0] ,JEP Identity Code[3:0]" hexmask.long.byte 0x00 0.--3. 1. " PN[11:8] ,Part Number [11:8]" rgroup.long c14:1018.++0x00 line.long 0x00 "DBGPID2,Debug Peripheral ID 2" hexmask.long.byte 0x00 4.--7. 1. " REV ,Revision" bitfld.long 0x00 3. " UJEPCODE ,Uses JEP Code" "Disabled,Enabled" hexmask.long.byte 0x00 0.--2. 1. " JEPID[6:4] ,JEP Identity Code[6:4]" rgroup.long c14:1019.++0x00 line.long 0x00 "DBGPID3,Debug Peripheral ID 3" hexmask.long.byte 0x00 4.--7. 1. " REVAND ,Manufacturing revision" hexmask.long.byte 0x00 0.--3. 1. " CM ,Customer modified" rgroup.long c14:1012.++0x00 line.long 0x00 "DBGPID4,Debug Peripheral ID 4" hexmask.long.byte 0x00 4.--7. 1. " 4KB_COUNT ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CONT_CODE ,JEP 106 Continuation code" rgroup.long c14:1020.++0x00 line.long 0x00 "DBGCID0,Debug Component ID 0" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 0" rgroup.long c14:1021.++0x00 line.long 0x00 "DBGCID1,Debug Component ID 1" hexmask.long.byte 0x00 4.--7. 1. " CC ,Component class" hexmask.long.byte 0x00 0.--3. 1. " PREAMBLE ,Preamble byte 1" rgroup.long c14:1022.++0x00 line.long 0x00 "DBGCID2,Debug Component ID 2" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 2" rgroup.long c14:1023.++0x00 line.long 0x00 "DBGCID3,Debug Component ID 3" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 3" tree.end tree.end width 10. tree "Breakpoint Registers" if ((d.l(c14:80.+0.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+0.)++0x0 line.long 0x00 "DBGBVR0,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+0.)++0x0 line.long 0x00 "DBGBVR0,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+0.)++0x0 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+1.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+1.)++0x0 line.long 0x00 "DBGBVR1,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+1.)++0x0 line.long 0x00 "DBGBVR1,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+1.)++0x0 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+2.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+2.)++0x0 line.long 0x00 "DBGBVR2,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+2.)++0x0 line.long 0x00 "DBGBVR2,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+2.)++0x0 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+3.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+3.)++0x0 line.long 0x00 "DBGBVR3,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+3.)++0x0 line.long 0x00 "DBGBVR3,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+3.)++0x0 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+4.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+4.)++0x0 line.long 0x00 "DBGBVR4,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+4.)++0x0 line.long 0x00 "DBGBVR4,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+4.)++0x0 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+5.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+5.)++0x0 line.long 0x00 "DBGBVR5,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+5.)++0x0 line.long 0x00 "DBGBVR5,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+5.)++0x0 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" group.long c14:148.++0x0 line.long 0x00 "DBGBXVR0,Debug Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value" group.long c14:149.++0x0 line.long 0x00 "DBGBXVR1,Debug Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value" tree.end width 10. tree "Watchpoint Control Registers" group.long c14:(96.+0.)++0x00 line.long 0x00 "DBGWVR0,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+0.)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+0.)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+1.)++0x00 line.long 0x00 "DBGWVR1,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+1.)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+1.)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+2.)++0x00 line.long 0x00 "DBGWVR2,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+2.)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+2.)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+3.)++0x00 line.long 0x00 "DBGWVR3,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+3.)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+3.)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif tree.end width 0xb tree.open "Interrupt Controller (GIC-400)" width 17. width 17. base ad:0xf1001000 tree "Distributor Interface" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0xf1001000) group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)" bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" else rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" endif rgroup.long 0x0008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register" bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..." bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure) width 17. tree "Group/Security Registers" if PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0080) group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)" else group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0084)) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" else rgroup.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0088)) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" else rgroup.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x008C)) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" else rgroup.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0090)) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" else rgroup.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0094)) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" else rgroup.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0098)) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" else rgroup.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x009C)) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" else rgroup.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00A0)) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1" else rgroup.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00A4)) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1" else rgroup.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00A8)) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1" else rgroup.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00AC)) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1" else rgroup.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00B0)) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1" else rgroup.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00B4)) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1" else rgroup.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00B8)) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1" else rgroup.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00BC)) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1" else rgroup.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00C0)) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1" else rgroup.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00C4)) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1" else rgroup.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00C8)) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1" else rgroup.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00CC)) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1" else rgroup.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00D0)) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1" else rgroup.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00D4)) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1" else rgroup.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00D8)) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1" else rgroup.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00DC)) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1" else rgroup.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00E0)) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1" else rgroup.long 0x0E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00E4)) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1" else rgroup.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00E8)) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1" else rgroup.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00EC)) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1" else rgroup.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00F0)) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1" else rgroup.long 0x0F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00F4)) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1" else rgroup.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00F8)) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1" else rgroup.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00FC)) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)==0x1F) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1" else rgroup.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end endif width 24. tree "Set/Clear Enable Registers" group.long 0x0100++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB15 ,Set/Clear Enable Bit 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB14 ,Set/Clear Enable Bit 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13 ,Set/Clear Enable Bit 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB12 ,Set/Clear Enable Bit 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB11 ,Set/Clear Enable Bit 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10 ,Set/Clear Enable Bit 10" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB9 ,Set/Clear Enable Bit 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB8 ,Set/Clear Enable Bit 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7 ,Set/Clear Enable Bit 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB6 ,Set/Clear Enable Bit 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB5 ,Set/Clear Enable Bit 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4 ,Set/Clear Enable Bit 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB3 ,Set/Clear Enable Bit 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB2 ,Set/Clear Enable Bit 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1 ,Set/Clear Enable Bit 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB0 ,Set/Clear Enable Bit 0" "Disabled,Enabled" if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled" else rgroup.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled" else rgroup.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled" else rgroup.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled" else rgroup.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled" else rgroup.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled" else rgroup.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled" else rgroup.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled" else rgroup.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled" else rgroup.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled" else rgroup.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled" else rgroup.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled" else rgroup.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled" else rgroup.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled" else rgroup.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled" else rgroup.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled" else rgroup.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled" else rgroup.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled" else rgroup.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled" else rgroup.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled" else rgroup.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled" else rgroup.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled" else rgroup.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled" else rgroup.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled" else rgroup.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled" else rgroup.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled" else rgroup.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled" else rgroup.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled" else rgroup.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled" else rgroup.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled" else rgroup.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)==0x1F) group.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled" else rgroup.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 22. tree "Set/Clear Pending Registers" group.long 0x0200++0x03 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Not pending,Pending" if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Not pending,Pending" else rgroup.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Not pending,Pending" else rgroup.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Not pending,Pending" else rgroup.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Not pending,Pending" else rgroup.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Not pending,Pending" else rgroup.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Not pending,Pending" else rgroup.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Not pending,Pending" else rgroup.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Not pending,Pending" else rgroup.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Not pending,Pending" else rgroup.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Not pending,Pending" else rgroup.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Not pending,Pending" else rgroup.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Not pending,Pending" else rgroup.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Not pending,Pending" else rgroup.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Not pending,Pending" else rgroup.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Not pending,Pending" else rgroup.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Not pending,Pending" else rgroup.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Not pending,Pending" else rgroup.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Not pending,Pending" else rgroup.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Not pending,Pending" else rgroup.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Not pending,Pending" else rgroup.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Not pending,Pending" else rgroup.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Not pending,Pending" else rgroup.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Not pending,Pending" else rgroup.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Not pending,Pending" else rgroup.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Not pending,Pending" else rgroup.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Not pending,Pending" else rgroup.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Not pending,Pending" else rgroup.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Not pending,Pending" else rgroup.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Not pending,Pending" else rgroup.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Not pending,Pending" else rgroup.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)==0x1F) group.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Not pending,Pending" else rgroup.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 24. tree "Set/Clear Active Registers" if (((per.l(ad:0xf1001000+0x08))&0xFF000000)==(0x0000000||0x1000000)) rgroup.long 0x0300++0x03 line.long 0x0 "GICD_ICDABR0,Active Status Register 0" bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active" bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active" bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active" bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active" bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active" bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active" bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active" bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active" bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active" bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active" bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active" bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active" bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active" bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active" bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active" bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active" bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active" bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active" bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active" bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active" bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active" bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active" if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active" bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active" bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active" bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active" bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active" bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active" bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active" bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active" bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active" bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active" bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active" bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active" bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active" bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active" bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active" bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active" bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active" bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active" bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active" bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active" bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active" bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active" bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active" bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active" bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active" bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active" bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active" bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active" bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active" bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active" bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active" bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active" bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active" bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active" bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active" bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active" bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active" bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active" bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active" bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active" bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active" bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active" bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active" bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active" bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active" bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active" bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active" bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active" bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active" bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active" bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active" bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active" bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active" bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active" bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active" bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active" bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active" bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active" bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active" bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active" bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active" bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active" bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active" bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active" bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active" bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active" bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active" bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active" bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active" bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active" bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active" bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active" bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active" bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active" bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active" bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active" bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active" bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active" bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active" bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active" bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active" bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active" bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active" bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active" bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active" bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active" bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active" bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active" bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active" bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active" bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active" bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active" bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active" bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active" bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active" bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active" bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active" bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active" bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active" bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active" bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active" bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active" bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active" bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active" bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active" bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active" bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active" bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active" bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active" bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active" bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active" bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active" bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active" bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active" bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active" bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active" bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active" bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active" bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active" bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active" bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active" bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active" bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active" bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active" bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active" bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active" bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active" bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active" bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active" bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active" bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active" bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active" bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active" bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active" bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active" bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active" bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active" bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active" bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active" bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active" bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active" bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active" bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active" bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active" bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active" bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active" bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active" bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active" bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active" bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active" bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active" bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active" bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active" bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active" bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active" bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active" bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active" bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active" bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active" bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active" bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active" bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active" bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active" bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active" bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active" bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active" bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active" bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active" bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active" bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active" bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active" bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active" bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active" bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active" bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active" bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active" bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active" bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active" bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active" bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active" bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active" bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active" bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active" bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active" bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active" bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active" bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active" bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active" bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active" bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active" bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active" bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active" bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active" bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active" bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active" bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active" bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active" bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active" bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active" bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active" bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active" bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active" bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active" bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active" bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active" bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active" bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active" bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active" bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active" bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active" bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active" bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active" bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active" bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active" bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active" bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active" bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active" bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active" bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active" bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active" bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active" bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active" bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active" bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active" bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active" bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active" bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active" bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active" bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active" bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active" bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active" bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active" bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active" bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active" bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active" bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active" bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active" bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active" bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active" bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active" bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active" bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active" bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active" bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active" bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active" bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active" bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active" bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active" bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active" bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active" bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active" bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active" bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active" bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active" bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active" bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active" bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active" bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active" bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active" bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active" bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active" bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active" bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active" bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active" bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active" bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active" bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active" bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active" bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active" bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active" bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active" bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active" bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active" bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active" bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active" bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active" bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active" bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active" bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active" bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active" bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active" bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active" bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active" bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active" bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active" bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active" bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active" bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active" bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active" bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active" bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active" bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active" bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active" bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active" bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active" bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active" bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active" bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active" bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active" bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active" bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active" bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active" bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active" bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active" bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active" bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active" bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active" bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active" bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active" bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active" bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active" bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active" bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active" bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active" bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active" bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active" bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active" bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active" bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active" bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active" bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active" bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active" bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active" bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active" bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active" bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active" bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active" bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active" bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active" bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active" bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active" bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active" bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active" bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active" bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active" bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active" bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active" else rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active" bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active" bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active" bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active" bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active" bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active" bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active" bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active" bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active" bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active" bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active" bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active" bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active" bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active" bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active" bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active" bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active" bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active" bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active" bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active" bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active" bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active" else rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active" bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active" bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active" bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active" bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active" bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active" bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active" bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active" bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active" bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active" bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active" bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active" bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active" bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active" bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active" bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active" bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active" bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active" bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active" bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active" bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active" bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active" else rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active" bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active" bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active" bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active" bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active" bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active" bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active" bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active" bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active" bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active" bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active" bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active" bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active" bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active" bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active" bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active" bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active" bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active" bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active" bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active" bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active" bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active" else rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active" bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active" bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active" bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active" bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active" bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active" bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active" bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active" bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active" bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active" bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active" bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active" bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active" bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active" bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active" bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active" bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active" bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active" bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active" bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active" bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active" bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active" else rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active" bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active" bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active" bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active" bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active" bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active" bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active" bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active" bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active" bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active" bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active" bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active" bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active" bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active" bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active" bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active" bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active" bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active" bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active" bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active" bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active" bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active" else rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active" bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active" bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active" bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active" bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active" bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active" bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active" bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active" bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active" bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active" bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active" bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active" bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active" bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active" bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active" bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active" bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active" bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active" bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active" bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active" bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active" bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active" else rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active" bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active" bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active" bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active" bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active" bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active" bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active" bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active" bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active" bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active" bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active" bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active" bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active" bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active" bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active" bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active" bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active" bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active" bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active" bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active" bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active" bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active" else rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active" bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active" bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active" bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active" bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active" bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active" bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active" bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active" bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active" bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active" bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active" bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active" bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active" bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active" bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active" bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active" bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active" bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active" bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active" bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active" bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active" bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active" else rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active" bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active" bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active" bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active" bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active" bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active" bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active" bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active" bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active" bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active" bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active" bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active" bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active" bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active" bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active" bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active" bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active" bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active" bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active" bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active" bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active" bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active" else rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active" bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active" bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active" bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active" bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active" bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active" bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active" bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active" bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active" bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active" bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active" bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active" bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active" bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active" bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active" bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active" bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active" bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active" bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active" bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active" bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active" bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active" else rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active" bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active" bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active" bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active" bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active" bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active" bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active" bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active" bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active" bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active" bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active" bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active" bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active" bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active" bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active" bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active" bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active" bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active" bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active" bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active" bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active" bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active" else rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active" bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active" bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active" bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active" bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active" bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active" bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active" bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active" bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active" bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active" bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active" bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active" bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active" bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active" bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active" bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active" bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active" bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active" bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active" bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active" bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active" bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active" else rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active" bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active" bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active" bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active" bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active" bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active" bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active" bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active" bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active" bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active" bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active" bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active" bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active" bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active" bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active" bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active" bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active" bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active" bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active" bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active" bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active" bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active" else rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active" bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active" bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active" bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active" bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active" bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active" bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active" bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active" bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active" bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active" bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active" bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active" bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active" bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active" bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active" bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active" bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active" bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active" bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active" bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active" bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active" bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active" else rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)==0x1F) rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active" bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active" bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active" bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active" bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active" bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active" bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active" bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active" bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active" bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active" bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active" bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active" bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active" bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active" bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active" bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active" bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active" bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active" bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active" else rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif else group.long 0x0300++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE9 ,Set/Clear Active Bit 9" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE8 ,Set/Clear Active Bit 8" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7 ,Set/Clear Active Bit 7" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE6 ,Set/Clear Active Bit 6" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE5 ,Set/Clear Active Bit 5" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4 ,Set/Clear Active Bit 4" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE3 ,Set/Clear Active Bit 3" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE2 ,Set/Clear Active Bit 2" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1 ,Set/Clear Active Bit 1" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE0 ,Set/Clear Active Bit 0" "Not active,Active" if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63 ,Set/Clear Active Bit 63" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE62 ,Set/Clear Active Bit 62" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE61 ,Set/Clear Active Bit 61" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60 ,Set/Clear Active Bit 60" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE59 ,Set/Clear Active Bit 59" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE58 ,Set/Clear Active Bit 58" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57 ,Set/Clear Active Bit 57" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE56 ,Set/Clear Active Bit 56" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE55 ,Set/Clear Active Bit 55" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54 ,Set/Clear Active Bit 54" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE53 ,Set/Clear Active Bit 53" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE52 ,Set/Clear Active Bit 52" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51 ,Set/Clear Active Bit 51" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE50 ,Set/Clear Active Bit 50" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE49 ,Set/Clear Active Bit 49" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48 ,Set/Clear Active Bit 48" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE47 ,Set/Clear Active Bit 47" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE46 ,Set/Clear Active Bit 46" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45 ,Set/Clear Active Bit 45" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE44 ,Set/Clear Active Bit 44" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE43 ,Set/Clear Active Bit 43" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42 ,Set/Clear Active Bit 42" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE41 ,Set/Clear Active Bit 41" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE40 ,Set/Clear Active Bit 40" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39 ,Set/Clear Active Bit 39" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE38 ,Set/Clear Active Bit 38" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE37 ,Set/Clear Active Bit 37" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36 ,Set/Clear Active Bit 36" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE35 ,Set/Clear Active Bit 35" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE34 ,Set/Clear Active Bit 34" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33 ,Set/Clear Active Bit 33" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE32 ,Set/Clear Active Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95 ,Set/Clear Active Bit 95" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE94 ,Set/Clear Active Bit 94" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE93 ,Set/Clear Active Bit 93" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92 ,Set/Clear Active Bit 92" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE91 ,Set/Clear Active Bit 91" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE90 ,Set/Clear Active Bit 90" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89 ,Set/Clear Active Bit 89" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE88 ,Set/Clear Active Bit 88" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE87 ,Set/Clear Active Bit 87" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86 ,Set/Clear Active Bit 86" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE85 ,Set/Clear Active Bit 85" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE84 ,Set/Clear Active Bit 84" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83 ,Set/Clear Active Bit 83" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE82 ,Set/Clear Active Bit 82" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE81 ,Set/Clear Active Bit 81" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80 ,Set/Clear Active Bit 80" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE79 ,Set/Clear Active Bit 79" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE78 ,Set/Clear Active Bit 78" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77 ,Set/Clear Active Bit 77" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE76 ,Set/Clear Active Bit 76" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE75 ,Set/Clear Active Bit 75" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74 ,Set/Clear Active Bit 74" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE73 ,Set/Clear Active Bit 73" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE72 ,Set/Clear Active Bit 72" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71 ,Set/Clear Active Bit 71" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE70 ,Set/Clear Active Bit 70" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE69 ,Set/Clear Active Bit 69" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68 ,Set/Clear Active Bit 68" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE67 ,Set/Clear Active Bit 67" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE66 ,Set/Clear Active Bit 66" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65 ,Set/Clear Active Bit 65" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE64 ,Set/Clear Active Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE99 ,Set/Clear Active Bit 99" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE98 ,Set/Clear Active Bit 98" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97 ,Set/Clear Active Bit 97" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE96 ,Set/Clear Active Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif rgroup.long 0x0340++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0344++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0348++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x034C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0350++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0354++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0358++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x035C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0360++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0364++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0368++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x036C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0370++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0374++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0378++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x037C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER31,Interrupt Set/Clear Active Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end tree "Priority Registers" group.long 0x400++0x03 line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 " group.long 0x404++0x03 line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 " group.long 0x408++0x03 line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 " group.long 0x40C++0x03 line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 " group.long 0x410++0x03 line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 " group.long 0x414++0x03 line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 " group.long 0x418++0x03 line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 " group.long 0x41C++0x03 line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 " if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 " group.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 " group.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 " group.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 " group.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 " group.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 " group.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 " group.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 " else rgroup.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" rgroup.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" rgroup.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" rgroup.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" rgroup.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" rgroup.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" rgroup.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" rgroup.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 " group.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 " group.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 " group.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 " group.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 " group.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 " group.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 " group.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 " else rgroup.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" rgroup.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" rgroup.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" rgroup.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" rgroup.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" rgroup.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" rgroup.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" rgroup.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 " group.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 " group.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 " group.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 " group.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 " group.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 " group.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 " group.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 " else rgroup.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" rgroup.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" rgroup.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" rgroup.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" rgroup.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" rgroup.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" rgroup.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" rgroup.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 " group.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 " group.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 " group.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 " group.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 " group.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 " group.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 " group.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 " else rgroup.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" rgroup.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" rgroup.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" rgroup.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" rgroup.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" rgroup.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" rgroup.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" rgroup.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 " group.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 " group.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 " group.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 " group.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 " group.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 " group.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 " group.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 " else rgroup.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" rgroup.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" rgroup.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" rgroup.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" rgroup.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" rgroup.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" rgroup.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" rgroup.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 " group.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 " group.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 " group.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 " group.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 " group.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 " group.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 " group.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 " else rgroup.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" rgroup.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" rgroup.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" rgroup.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" rgroup.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" rgroup.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" rgroup.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" rgroup.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 " group.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 " group.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 " group.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 " group.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 " group.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 " group.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 " group.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 " else rgroup.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" rgroup.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" rgroup.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" rgroup.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" rgroup.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" rgroup.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" rgroup.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" rgroup.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 " group.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 " group.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 " group.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 " group.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 " group.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 " group.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 " group.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 " else rgroup.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" rgroup.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" rgroup.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" rgroup.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" rgroup.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" rgroup.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" rgroup.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" rgroup.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 " group.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 " group.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 " group.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 " group.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 " group.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 " group.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 " group.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 " else rgroup.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" rgroup.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" rgroup.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" rgroup.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" rgroup.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" rgroup.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" rgroup.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" rgroup.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 " group.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 " group.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 " group.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 " group.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 " group.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 " group.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 " group.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 " else rgroup.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" rgroup.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" rgroup.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" rgroup.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" rgroup.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" rgroup.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" rgroup.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" rgroup.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 " group.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 " group.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 " group.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 " group.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 " group.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 " group.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 " group.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 " else rgroup.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" rgroup.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" rgroup.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" rgroup.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" rgroup.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" rgroup.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" rgroup.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" rgroup.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 " group.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 " group.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 " group.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 " group.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 " group.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 " group.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 " group.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 " else rgroup.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" rgroup.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" rgroup.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" rgroup.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" rgroup.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" rgroup.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" rgroup.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" rgroup.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 " group.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 " group.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 " group.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 " group.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 " group.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 " group.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 " group.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 " else rgroup.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" rgroup.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" rgroup.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" rgroup.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" rgroup.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" rgroup.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" rgroup.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" rgroup.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 " group.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 " group.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 " group.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 " group.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 " group.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 " group.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 " group.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 " else rgroup.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" rgroup.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" rgroup.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" rgroup.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" rgroup.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" rgroup.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" rgroup.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" rgroup.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 " group.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 " group.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 " group.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 " group.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 " group.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 " group.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 " group.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 " else rgroup.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" rgroup.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" rgroup.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" rgroup.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" rgroup.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" rgroup.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" rgroup.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" rgroup.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 " group.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 " group.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 " group.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 " group.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 " group.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 " group.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 " group.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 " else rgroup.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" rgroup.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" rgroup.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" rgroup.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" rgroup.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" rgroup.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" rgroup.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" rgroup.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 " group.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 " group.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 " group.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 " group.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 " group.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 " group.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 " group.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 " else rgroup.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" rgroup.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" rgroup.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" rgroup.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" rgroup.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" rgroup.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" rgroup.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" rgroup.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 " group.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 " group.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 " group.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 " group.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 " group.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 " group.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 " group.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 " else rgroup.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" rgroup.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" rgroup.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" rgroup.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" rgroup.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" rgroup.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" rgroup.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" rgroup.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 " group.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 " group.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 " group.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 " group.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 " group.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 " group.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 " group.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 " else rgroup.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" rgroup.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" rgroup.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" rgroup.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" rgroup.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" rgroup.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" rgroup.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" rgroup.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 " group.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 " group.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 " group.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 " group.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 " group.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 " group.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 " group.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 " else rgroup.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" rgroup.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" rgroup.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" rgroup.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" rgroup.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" rgroup.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" rgroup.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" rgroup.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 " group.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 " group.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 " group.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 " group.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 " group.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 " group.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 " group.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 " else rgroup.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" rgroup.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" rgroup.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" rgroup.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" rgroup.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" rgroup.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" rgroup.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" rgroup.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 " group.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 " group.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 " group.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 " group.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 " group.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 " group.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 " group.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 " else rgroup.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" rgroup.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" rgroup.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" rgroup.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" rgroup.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" rgroup.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" rgroup.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" rgroup.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 " group.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 " group.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 " group.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 " group.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 " group.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 " group.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 " group.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 " else rgroup.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" rgroup.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" rgroup.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" rgroup.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" rgroup.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" rgroup.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" rgroup.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" rgroup.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 " group.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 " group.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 " group.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 " group.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 " group.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 " group.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 " group.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 " else rgroup.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" rgroup.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" rgroup.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" rgroup.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" rgroup.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" rgroup.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" rgroup.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" rgroup.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 " group.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 " group.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 " group.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 " group.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 " group.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 " group.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 " group.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 " else rgroup.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" rgroup.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" rgroup.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" rgroup.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" rgroup.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" rgroup.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" rgroup.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" rgroup.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 " group.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 " group.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 " group.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 " group.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 " group.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 " group.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 " group.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 " else rgroup.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" rgroup.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" rgroup.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" rgroup.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" rgroup.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" rgroup.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" rgroup.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" rgroup.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 " group.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 " group.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 " group.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 " group.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 " group.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 " group.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 " group.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 " else rgroup.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" rgroup.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" rgroup.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" rgroup.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" rgroup.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" rgroup.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" rgroup.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" rgroup.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 " group.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 " group.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 " group.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 " group.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 " group.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 " group.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 " group.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 " else rgroup.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" rgroup.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" rgroup.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" rgroup.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" rgroup.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" rgroup.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" rgroup.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" rgroup.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 " group.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 " group.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 " group.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 " group.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 " group.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 " group.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 " group.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 " else rgroup.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" rgroup.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" rgroup.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" rgroup.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" rgroup.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" rgroup.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" rgroup.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" rgroup.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 " group.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 " group.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 " group.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 " group.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 " group.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 " group.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 " group.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 " else rgroup.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" rgroup.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" rgroup.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" rgroup.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" rgroup.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" rgroup.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" rgroup.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" rgroup.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1F) group.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 " group.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 " group.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000" group.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004" group.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008" group.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012" group.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016" else rgroup.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" rgroup.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" rgroup.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" rgroup.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" rgroup.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" rgroup.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" rgroup.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" endif tree.end width 19. tree "Processor Targets Registers" if (((per.l(ad:0xf1001000+0x04))&0x000000E0)>0x1) rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 " if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 " group.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 " group.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 " group.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 " group.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 " group.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 " group.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 " group.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 " else rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 " group.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 " group.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 " group.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 " group.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 " group.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 " group.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 " group.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 " else rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 " group.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 " group.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 " group.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 " group.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 " group.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 " group.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 " group.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 " else rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 " group.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 " group.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 " group.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 " group.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 " group.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 " group.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 " group.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 " else rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 " group.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 " group.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 " group.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 " group.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 " group.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 " group.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 " group.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 " else rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 " group.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 " group.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 " group.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 " group.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 " group.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 " group.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 " group.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 " else rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 " group.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 " group.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 " group.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 " group.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 " group.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 " group.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 " group.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 " else rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 " group.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 " group.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 " group.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 " group.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 " group.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 " group.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 " group.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 " else rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 " group.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 " group.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 " group.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 " group.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 " group.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 " group.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 " group.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 " else rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 " group.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 " group.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 " group.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 " group.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 " group.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 " group.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 " group.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 " else rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 " group.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 " group.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 " group.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 " group.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 " group.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 " group.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 " group.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 " else rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 " group.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 " group.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 " group.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 " group.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 " group.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 " group.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 " group.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 " else rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 " group.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 " group.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 " group.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 " group.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 " group.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 " group.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 " group.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 " else rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 " group.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 " group.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 " group.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 " group.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 " group.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 " group.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 " group.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 " else rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 " group.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 " group.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 " group.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 " group.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 " group.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 " group.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 " group.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 " else rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 " group.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 " group.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 " group.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 " group.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 " group.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 " group.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 " group.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 " else rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 " group.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 " group.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 " group.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 " group.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 " group.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 " group.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 " group.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 " else rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 " group.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 " group.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 " group.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 " group.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 " group.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 " group.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 " group.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 " else rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 " group.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 " group.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 " group.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 " group.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 " group.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 " group.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 " group.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 " else rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 " group.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 " group.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 " group.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 " group.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 " group.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 " group.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 " group.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 " else rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 " group.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 " group.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 " group.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 " group.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 " group.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 " group.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 " group.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 " else rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 " group.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 " group.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 " group.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 " group.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 " group.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 " group.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 " group.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 " else rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 " group.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 " group.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 " group.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 " group.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 " group.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 " group.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 " group.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 " else rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 " group.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 " group.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 " group.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 " group.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 " group.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 " group.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 " group.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 " else rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 " group.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 " group.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 " group.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 " group.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 " group.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 " group.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 " group.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 " else rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 " group.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 " group.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 " group.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 " group.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 " group.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 " group.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 " group.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 " else rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 " group.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 " group.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 " group.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 " group.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 " group.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 " group.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 " group.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 " else rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 " group.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 " group.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 " group.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 " group.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 " group.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 " group.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 " group.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 " else rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 " group.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 " group.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 " group.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 " group.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 " group.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 " group.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 " group.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 " else rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 " group.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 " group.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 " group.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 " group.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 " group.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 " group.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 " group.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 " else rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1F) group.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 " group.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 " group.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000" group.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004" group.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008" group.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012" group.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016" else rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif else rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 " rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 " rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 " rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 " rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 " rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 " rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 " rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 " rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 " rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 " rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 " rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 " rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 " rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 " rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 " rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 " rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 " rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 " rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 " rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 " rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 " rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 " rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 " rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 " rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 " rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 " rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 " rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 " rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 " rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 " rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 " rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 " rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 " rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 " rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 " rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 " rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 " rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 " rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 " rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 " rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 " rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 " rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 " rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 " rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 " rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 " rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 " rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 " rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 " rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 " rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 " rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 " rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 " rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 " rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 " rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 " rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 " rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 " rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 " rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 " rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 " rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 " rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 " rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 " rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 " rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 " rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 " rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 " rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 " rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 " rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 " rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 " rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 " rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 " rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 " rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 " rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 " rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 " rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 " rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 " rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 " rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 " rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 " rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 " rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 " rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 " rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 " rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 " rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 " rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 " rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 " rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 " rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 " rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif tree.end width 14. tree "Configuration Registers" rgroup.long 0xC00++0x03 line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register" textline " " rgroup.long 0xC04++0x03 line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1) group.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" rgroup.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x2) group.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" rgroup.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x3) group.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" rgroup.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x4) group.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" rgroup.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x5) group.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" rgroup.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x6) group.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" rgroup.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x7) group.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" rgroup.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x8) group.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" rgroup.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x9) group.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" rgroup.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xA) group.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" rgroup.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xB) group.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" rgroup.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xC) group.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" rgroup.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xD) group.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" rgroup.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xE) group.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" rgroup.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xF) group.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" rgroup.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" rgroup.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" rgroup.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" rgroup.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" rgroup.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" rgroup.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" rgroup.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" rgroup.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" rgroup.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" rgroup.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" rgroup.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" rgroup.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" rgroup.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" rgroup.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" rgroup.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" rgroup.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1F) group.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" rgroup.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" endif tree.end width 12. tree "Peripheral Interrupt Status Registers" rgroup.long 0x0D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt" bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt" textline " " width 22. if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0" bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High" bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High" bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High" textline " " bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High" bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High" bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High" textline " " bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High" bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High" bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High" textline " " bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High" bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High" bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High" textline " " bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High" bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High" bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High" textline " " bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High" bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High" bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High" textline " " bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High" bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High" bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High" textline " " bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High" bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High" bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High" textline " " bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High" bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High" bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High" textline " " bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High" bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High" bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High" textline " " bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High" bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High" else rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High" bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High" bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High" textline " " bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High" bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High" bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High" textline " " bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High" bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High" bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High" textline " " bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High" bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High" bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High" textline " " bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High" bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High" bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High" textline " " bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High" bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High" bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High" textline " " bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High" bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High" bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High" textline " " bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High" bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High" bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High" textline " " bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High" bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High" bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High" textline " " bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High" bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High" bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High" textline " " bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High" bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High" else rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High" bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High" bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High" textline " " bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High" bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High" bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High" textline " " bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High" bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High" bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High" textline " " bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High" bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High" bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High" textline " " bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High" bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High" bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High" textline " " bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High" bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High" bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High" textline " " bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High" bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High" bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High" textline " " bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High" bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High" bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High" textline " " bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High" bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High" bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High" textline " " bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High" bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High" bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High" textline " " bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High" bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High" else rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High" bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High" bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High" textline " " bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High" bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High" bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High" textline " " bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High" bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High" bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High" textline " " bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High" bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High" bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High" textline " " bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High" bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High" bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High" textline " " bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High" bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High" bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High" textline " " bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High" bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High" bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High" textline " " bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High" bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High" bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High" textline " " bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High" bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High" bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High" textline " " bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High" bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High" bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High" textline " " bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High" bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High" else rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High" bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High" bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High" textline " " bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High" bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High" bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High" textline " " bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High" bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High" bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High" textline " " bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High" bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High" bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High" textline " " bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High" bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High" bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High" textline " " bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High" bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High" bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High" textline " " bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High" bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High" bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High" textline " " bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High" bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High" bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High" textline " " bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High" bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High" bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High" textline " " bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High" bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High" bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High" textline " " bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High" bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High" else rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High" bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High" bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High" textline " " bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High" bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High" bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High" textline " " bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High" bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High" bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High" textline " " bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High" bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High" bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High" textline " " bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High" bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High" bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High" textline " " bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High" bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High" bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High" textline " " bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High" bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High" bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High" textline " " bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High" bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High" bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High" textline " " bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High" bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High" bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High" textline " " bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High" bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High" bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High" textline " " bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High" bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High" else rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High" bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High" bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High" textline " " bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High" bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High" bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High" textline " " bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High" bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High" bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High" textline " " bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High" bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High" bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High" textline " " bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High" bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High" bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High" textline " " bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High" bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High" bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High" textline " " bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High" bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High" bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High" textline " " bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High" bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High" bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High" textline " " bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High" bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High" bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High" textline " " bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High" bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High" bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High" textline " " bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High" bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High" else rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High" bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High" bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High" textline " " bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High" bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High" bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High" textline " " bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High" bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High" bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High" textline " " bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High" bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High" bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High" textline " " bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High" bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High" bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High" textline " " bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High" bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High" bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High" textline " " bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High" bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High" bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High" textline " " bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High" bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High" bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High" textline " " bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High" bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High" bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High" textline " " bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High" bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High" bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High" textline " " bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High" bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High" else rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High" bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High" bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High" textline " " bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High" bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High" bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High" textline " " bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High" bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High" bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High" textline " " bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High" bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High" bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High" textline " " bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High" bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High" bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High" textline " " bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High" bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High" bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High" textline " " bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High" bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High" bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High" textline " " bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High" bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High" bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High" textline " " bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High" bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High" bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High" textline " " bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High" bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High" bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High" textline " " bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High" bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High" else rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High" bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High" bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High" textline " " bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High" bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High" bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High" textline " " bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High" bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High" bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High" textline " " bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High" bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High" bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High" textline " " bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High" bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High" bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High" textline " " bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High" bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High" bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High" textline " " bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High" bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High" bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High" textline " " bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High" bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High" bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High" textline " " bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High" bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High" bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High" textline " " bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High" bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High" bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High" textline " " bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High" bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High" else rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High" bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High" bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High" textline " " bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High" bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High" bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High" textline " " bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High" bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High" bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High" textline " " bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High" bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High" bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High" textline " " bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High" bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High" bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High" textline " " bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High" bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High" bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High" textline " " bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High" bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High" bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High" textline " " bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High" bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High" bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High" textline " " bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High" bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High" bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High" textline " " bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High" bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High" bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High" textline " " bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High" bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High" else rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High" bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High" bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High" textline " " bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High" bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High" bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High" textline " " bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High" bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High" bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High" textline " " bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High" bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High" bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High" textline " " bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High" bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High" bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High" textline " " bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High" bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High" bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High" textline " " bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High" bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High" bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High" textline " " bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High" bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High" bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High" textline " " bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High" bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High" bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High" textline " " bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High" bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High" bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High" textline " " bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High" bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High" else rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High" bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High" bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High" textline " " bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High" bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High" bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High" textline " " bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High" bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High" bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High" textline " " bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High" bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High" bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High" textline " " bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High" bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High" bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High" textline " " bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High" bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High" bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High" textline " " bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High" bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High" bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High" textline " " bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High" bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High" bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High" textline " " bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High" bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High" bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High" textline " " bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High" bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High" bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High" textline " " bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High" bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High" else rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High" bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High" bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High" textline " " bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High" bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High" bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High" textline " " bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High" bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High" bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High" textline " " bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High" bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High" bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High" textline " " bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High" bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High" bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High" textline " " bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High" bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High" bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High" textline " " bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High" bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High" bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High" textline " " bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High" bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High" bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High" textline " " bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High" bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High" bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High" textline " " bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High" bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High" bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High" textline " " bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High" bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High" else rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High" bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High" bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High" textline " " bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High" bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High" bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High" textline " " bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High" bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High" bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High" textline " " bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High" bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High" bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High" textline " " bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High" bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High" bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High" textline " " bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High" bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High" bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High" textline " " bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High" bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High" bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High" textline " " bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High" bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High" bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High" textline " " bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High" bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High" bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High" textline " " bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High" bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High" bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High" textline " " bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High" bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High" else rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High" bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High" bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High" textline " " bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High" bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High" bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High" textline " " bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High" bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High" bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High" textline " " bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High" bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High" bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High" textline " " bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High" bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High" bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High" textline " " bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High" bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High" bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High" textline " " bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High" bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High" bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High" textline " " bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High" bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High" bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High" textline " " bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High" bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High" bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High" textline " " bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High" bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High" bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High" textline " " bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High" bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High" else rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High" bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High" bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High" textline " " bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High" bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High" bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High" textline " " bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High" bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High" bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High" textline " " bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High" bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High" bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High" textline " " bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High" bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High" bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High" textline " " bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High" bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High" bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High" textline " " bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High" bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High" bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High" textline " " bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High" bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High" bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High" textline " " bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High" bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High" bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High" textline " " bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High" bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High" bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High" textline " " bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High" bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High" else rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High" bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High" bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High" textline " " bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High" bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High" bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High" textline " " bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High" bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High" bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High" textline " " bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High" bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High" bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High" textline " " bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High" bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High" bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High" textline " " bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High" bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High" bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High" textline " " bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High" bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High" bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High" textline " " bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High" bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High" bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High" textline " " bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High" bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High" bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High" textline " " bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High" bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High" bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High" textline " " bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High" bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High" else rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High" bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High" bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High" textline " " bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High" bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High" bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High" textline " " bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High" bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High" bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High" textline " " bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High" bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High" bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High" textline " " bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High" bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High" bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High" textline " " bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High" bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High" bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High" textline " " bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High" bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High" bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High" textline " " bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High" bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High" bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High" textline " " bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High" bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High" bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High" textline " " bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High" bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High" bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High" textline " " bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High" bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High" else rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High" bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High" bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High" textline " " bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High" bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High" bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High" textline " " bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High" bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High" bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High" textline " " bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High" bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High" bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High" textline " " bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High" bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High" bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High" textline " " bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High" bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High" bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High" textline " " bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High" bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High" bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High" textline " " bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High" bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High" bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High" textline " " bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High" bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High" bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High" textline " " bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High" bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High" bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High" textline " " bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High" bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High" else rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High" bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High" bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High" textline " " bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High" bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High" bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High" textline " " bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High" bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High" bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High" textline " " bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High" bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High" bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High" textline " " bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High" bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High" bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High" textline " " bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High" bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High" bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High" textline " " bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High" bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High" bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High" textline " " bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High" bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High" bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High" textline " " bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High" bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High" bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High" textline " " bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High" bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High" bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High" textline " " bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High" bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High" else rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High" bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High" bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High" textline " " bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High" bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High" bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High" textline " " bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High" bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High" bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High" textline " " bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High" bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High" bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High" textline " " bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High" bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High" bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High" textline " " bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High" bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High" bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High" textline " " bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High" bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High" bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High" textline " " bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High" bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High" bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High" textline " " bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High" bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High" bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High" textline " " bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High" bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High" bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High" textline " " bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High" bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High" else rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High" bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High" bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High" textline " " bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High" bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High" bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High" textline " " bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High" bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High" bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High" textline " " bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High" bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High" bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High" textline " " bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High" bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High" bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High" textline " " bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High" bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High" bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High" textline " " bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High" bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High" bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High" textline " " bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High" bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High" bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High" textline " " bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High" bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High" bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High" textline " " bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High" bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High" bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High" textline " " bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High" bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High" else rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) rgroup.long 0x060++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High" bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High" bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High" textline " " bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High" bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High" bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High" textline " " bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High" bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High" bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High" textline " " bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High" bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High" bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High" textline " " bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High" bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High" bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High" textline " " bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High" bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High" bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High" textline " " bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High" bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High" bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High" textline " " bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High" bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High" bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High" textline " " bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High" bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High" bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High" textline " " bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High" bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High" bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High" textline " " bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High" bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High" else rgroup.long 0x0D60++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High" bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High" bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High" textline " " bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High" bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High" bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High" textline " " bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High" bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High" bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High" textline " " bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High" bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High" bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High" textline " " bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High" bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High" bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High" textline " " bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High" bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High" bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High" textline " " bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High" bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High" bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High" textline " " bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High" bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High" bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High" textline " " bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High" bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High" bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High" textline " " bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High" bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High" bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High" textline " " bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High" bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High" else rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High" bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High" bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High" textline " " bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High" bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High" bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High" textline " " bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High" bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High" bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High" textline " " bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High" bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High" bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High" textline " " bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High" bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High" bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High" textline " " bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High" bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High" bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High" textline " " bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High" bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High" bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High" textline " " bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High" bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High" bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High" textline " " bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High" bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High" bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High" textline " " bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High" bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High" bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High" textline " " bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High" bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High" else rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High" bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High" bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High" textline " " bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High" bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High" bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High" textline " " bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High" bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High" bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High" textline " " bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High" bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High" bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High" textline " " bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High" bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High" bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High" textline " " bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High" bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High" bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High" textline " " bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High" bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High" bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High" textline " " bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High" bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High" bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High" textline " " bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High" bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High" bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High" textline " " bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High" bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High" bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High" textline " " bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High" bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High" else rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High" bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High" bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High" textline " " bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High" bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High" bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High" textline " " bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High" bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High" bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High" textline " " bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High" bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High" bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High" textline " " bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High" bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High" bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High" textline " " bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High" bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High" bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High" textline " " bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High" bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High" bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High" textline " " bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High" bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High" bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High" textline " " bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High" bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High" bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High" textline " " bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High" bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High" bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High" textline " " bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High" bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High" else rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High" bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High" bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High" textline " " bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High" bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High" bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High" textline " " bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High" bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High" bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High" textline " " bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High" bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High" bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High" textline " " bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High" bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High" bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High" textline " " bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High" bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High" bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High" textline " " bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High" bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High" bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High" textline " " bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High" bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High" bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High" textline " " bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High" bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High" bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High" textline " " bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High" bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High" bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High" textline " " bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High" bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High" else rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High" bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High" bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High" textline " " bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High" bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High" bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High" textline " " bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High" bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High" bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High" textline " " bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High" bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High" bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High" textline " " bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High" bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High" bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High" textline " " bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High" bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High" bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High" textline " " bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High" bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High" bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High" textline " " bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High" bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High" bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High" textline " " bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High" bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High" bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High" textline " " bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High" bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High" bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High" textline " " bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High" bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High" else rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1F) rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High" bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High" textline " " bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High" bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High" bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High" textline " " bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High" bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High" bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High" textline " " bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High" bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High" bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High" textline " " bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High" bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High" bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High" textline " " bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High" bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High" bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High" textline " " bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High" bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High" bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High" textline " " bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High" bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High" bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High" textline " " bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High" bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High" bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High" textline " " bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High" bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High" else rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 25. tree "Software Generated Interrupt" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x0F20++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F24++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F28++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F2C++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" tree.end width 12. tree "Peripheral/Component ID Registers" rgroup.byte 0x0FE0++0x00 line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.byte 0x00 0.--7. 1. " DEVID ,DevID field" rgroup.byte 0x0FE4++0x00 line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.byte 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FE8++0x00 line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.byte 0x00 4.--7. " ARCHREV ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High" bitfld.byte 0x00 0.--2. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7" rgroup.byte 0x0FEC++0x00 line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.byte 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD0++0x00 line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.byte 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0xFD4++0x00 line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register" rgroup.byte 0xFD8++0x00 line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register" rgroup.byte 0xFDC++0x00 line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register" textline " " rgroup.byte 0xFF0++0x00 line.byte 0x00 "GICD_CIDR0,Component ID0 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GICD_CIDR1,Component ID1 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GICD_CIDR2,Component ID2 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GICD_CIDR3,Component ID3 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" textline " " tree.end tree.end width 0x0B base ad:0xf1002000 width 17. tree "CPU Interface" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x0) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " else if PER.ADDRESS.isSECUREEX(ad:0xf1002000) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)" bitfld.long 0x00 10. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 9. " EOIMODES ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 8. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 6. " IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 4. " CBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" textline " " bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " endif endif group.long 0x0004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0xf1002000+0x0008) group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif hgroup.long 0x000C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) group.long 0x001C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else hgroup.long 0x001C++0x03 hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register" endif hgroup.long 0x0020++0x003 hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register" in if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) wgroup.long 0x0024++0x03 line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" else hgroup.long 0x0024++0x03 hide.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" hgroup.long 0x0028++0x03 hide.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" endif group.long 0x00D0++0x03 line.long 0x00 "GICC_APR0,Active Priorities Register" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) group.long 0x00E0++0x03 line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" else hgroup.long 0x00E0++0x03 hide.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" endif rgroup.long 0x00FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICC_DIR,Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end sif CPU.FEATURE(hypervisor) base ad:0xf1004000 width 12. tree "Virtual CPU Control Interface" group.long 0x0000++0x03 line.long 0x00 "GICH_HCR,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long 0x0004++0x03 line.long 0x00 "GICH_VTR,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long 0x008++0x03 line.long 0x00 "GICH_VMCR,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long 0x0010++0x03 line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long 0x020++0x03 line.long 0x00 "GICH_EISR0,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long 0x0030++0x03 line.long 0x00 "GICH_ELSR0,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long 0x00F0++0x03 line.long 0x00 "GICH_APR0,Active Priorities Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" if (((per.l(ad:0xf1004000+0x100))&0x80000000)==0x80000000) group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0xf1004000+0x104))&0x80000000)==0x80000000) group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0xf1004000+0x108))&0x80000000)==0x80000000) group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0xf1004000+0x10C))&0x80000000)==0x80000000) group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif tree.end base ad:0xf1006000 width 12. tree "Virtual CPU Interface" group.long 0x0000++0x03 line.long 0x00 "GICV_CTLR,Virtual Machine Control Register" bitfld.long 0x00 9. " EOIMODE ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 4. " CBPR ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs" textline " " bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" bitfld.long 0x00 1. " ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" group.long 0x0004++0x03 line.long 0x00 "GICV_PMR,VM Priority Mask Register" bitfld.long 0x00 3.--7. " PRIORITY ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x0008++0x03 line.long 0x00 "GICV_BPR,VM Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x000C++0x03 hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICV_EOIR,VM End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICV_RPR,VM Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the Virtual CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x001C++0x03 line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x0020++0x03 hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register" in wgroup.long 0x0024++0x03 line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x00D0++0x03 line.long 0x00 "GICV_APR0,VM Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" rgroup.long 0x00FC++0x03 line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end endif width 0x0B tree.end AUTOINDENT.POP tree.end elif CORENAME()=="CORTEXM3" tree.close "Core Registers (Cortex-M3)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 11. group 0x10--0x1b line.long 0x00 "SYST_CSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,Clock Source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "Not SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" ;group 0x14++0x03 line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" ;group 0x18++0x03 line.long 0x08 "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Current Value" rgroup 0x1c++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" textline " " rgroup 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code" bitfld.long 0x00 20.--23. " VARIANT ,Implementation Defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " CONSTANT ,Constant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Number of Processor" bitfld.long 0x00 0.--3. " REVISION ,Implementation Defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group 0xd04--0xd17 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Not set,Set" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not set,Set" bitfld.long 0x00 27. " PENDSVCLR ,Clear Pending pendSV Bit" "Not cleared,Cleared" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not set,Set" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "Not cleared,Cleared" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Interrupt Pending Flag" "Not pending,Pending" hexmask.long.word 0x00 12.--21. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,Active ISR Number Field" ;group 0xd08++0x03 line.long 0x04 "VTOR,Vector Table Offset Register" bitfld.long 0x04 29. " TBLBASE ,Table Base" "Code,RAM" hexmask.long.tbyte 0x04 7.--28. 1. " TBLOFF ,Vector Table Base Offset Field" ;group 0xd0c++0x03 line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "Not cleared,Cleared all" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No reset,Reset" ;group 0xd10++0x03 line.long 0x0c "SCR,System Control Register" bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" ;group 0xd14++0x03 line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte,8-byte" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" group 0xd18--0xd23 line.long 0x00 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x04 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x04 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x04 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x04 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x04 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x08 "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x08 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x08 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x08 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x08 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" group 0xd24++0x3 line.long 0x00 "SHCSR,System Handler Control and State Register" bitfld.long 0x00 18. " USGFAULTENA ,USGFAULTENA" "Disabled,Enabled" bitfld.long 0x00 17. " BUSFAULTENA ,BUSFAULTENA" "Disabled,Enabled" bitfld.long 0x00 16. " MEMFAULTENA ,MEMFAULTENA" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced" bitfld.long 0x00 14. " BUSFAULTPENDED ,BusFault is Pended Started" "Not replaced,Replaced" bitfld.long 0x00 13. " MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced" textline " " bitfld.long 0x00 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x00 10. " PENDSVACT ,PendSV is Active" "Not active,Active" bitfld.long 0x00 8. " MONITORACT ,Monitor is Active" "Not active,Active" textline " " bitfld.long 0x00 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x00 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" bitfld.long 0x00 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" textline " " bitfld.long 0x00 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group 0xd28--0xd3b line.byte 0x0 "MMFSR,Memory Manage Fault Status Register" bitfld.byte 0x0 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x0 4. " MSTKERR ,Stacking Access Violations" "No error,Error" bitfld.byte 0x0 3. " MUNSTKERR ,Unstack Access Violations" "No error,Error" textline " " bitfld.byte 0x0 1. " DACCVIOL ,Data Access Violation" "No error,Error" bitfld.byte 0x0 0. " IACCVIOL ,Instruction Access Violation" "No error,Error" ;group 0xd29++0x00 line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid" "Not valid,Valid" bitfld.byte 0x01 4. " STKERR ,Stacking from Exception has Caused Bus Faults" "No error,Error" bitfld.byte 0x01 3. " UNSTKERR ,Unstack from Exception Return has Caused Bus Faults" "No error,Error" textline " " bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise Data Bus Error" "No error,Error" bitfld.byte 0x01 1. " PRECISERR ,Precise Data Bus Error Return" "No error,Error" bitfld.byte 0x01 0. " IBUSERR ,Instruction Bus Error Flag" "No error,Error" ;group 0xd2a++0x01 line.word 0x02 "USAFAULT,Usage Fault Status Register" bitfld.word 0x02 9. " DIVBYZERO ,Illegal PC Load" "No error,Error" bitfld.word 0x02 8. " UNALIGNED ,Illegal Unaligned Access" "No error,Error" bitfld.word 0x02 3. " NOCP ,Attempt to use a coprocessor instruction" "No error,Error" textline " " bitfld.word 0x02 2. " INVPC ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error" bitfld.word 0x02 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x02 0. " UNDEFINSTR ,Illegal Processor State" "No error,Error" ;group 0xd2c++0x03 line.long 0x04 "HFSR,Hard Fault Status Register" bitfld.long 0x04 31. " DEBUGEVT ,This Bit is Set if There is a Fault Related to Debug" "No error,Error" bitfld.long 0x04 30. " FORCED ,Hard Fault Activated" "No error,Error" bitfld.long 0x04 1. " VECTTBL ,Bus Fault" "No error,Error" ;group 0xd30++0x03 line.long 0x08 "DFSR,Debug Fault Status Register" bitfld.long 0x08 4. " EXTERNAL ,External Debug Request Flag" "Not asserted,Asserted" bitfld.long 0x08 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x08 2. " DWTTRAP ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched" textline " " bitfld.long 0x08 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x08 0. " HALTED ,Halt Request Flag" "Not requested,Requested" ;group 0xd34++0x03 line.long 0xc "MMFAR,Memory Manage Fault Address Register" ;group 0xd38++0x03 line.long 0x10 "BFAR,Bus Fault Address Register" wgroup 0xf00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end tree "CoreSight Identification Registers" width 6. rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 5. " C_SNAPSTALL ,Halting debug to gain control of the core" "Disabled,Enabled" bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" textline " " bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif wgroup 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..." group 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group 0x00--0x27 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" ;group 0x04++0x03 line.long 0x04 "FP_REMAP,Flash Patch Remap Register" hexmask.long.tbyte 0x04 5.--28. 1. " REMAP ,Remap Base Address Field" ;group 0x08++0x03 line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x8 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x8 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0xC 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0xC 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x10 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x10 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x14 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x14 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x18 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x18 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x1C 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x1C 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x20 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x20 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x24 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x24 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" tree "Coresight Management Registers" rgroup 0xfd0--0xfff line.long 0x00 "PID4,Peripheral ID4" line.long 0x04 "PID5,Peripheral ID5" line.long 0x08 "PID6,Peripheral ID6" line.long 0x0c "PID7,Peripheral ID7" line.long 0x10 "PID0,Peripheral ID0" line.long 0x14 "PID1,Peripheral ID1" line.long 0x18 "PID2,Peripheral ID2" line.long 0x1c "PID3,Peripheral ID3" line.long 0x20 "CID0,Component ID0" line.long 0x24 "CID1,Component ID1" line.long 0x28 "CID2,Component ID2" line.long 0x2c "CID3,Component ID3" tree.end else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group 0x00--0x1B line.long 0x00 "DWT_CTRL,DWT Control Register" bitfld.long 0x00 28.--31. " NUMCOMP ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 22. " CYCEVTENA ,Enables Cycle Count Event" "Disabled,Enabled" bitfld.long 0x00 21. " FOLDEVTENA ,Enables Folded Instruction Count Event" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " LSUEVTENA ,Enables LSU Count Event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled" bitfld.long 0x00 18. " EXCEVTENA ,Enables Interrupt Overhead Event" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CPIEVTENA ,Enables CPI Count Event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables Interrupt Event Tracing" "Disabled,Enabled" bitfld.long 0x00 12. " PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--11. " SYNCTAP ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28" bitfld.long 0x00 9. " CYCTAP ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10" bitfld.long 0x00 5.--8. " POSTCNT ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled" ;group 0x04++0x03 line.long 0x04 "DWT_CYCCNT,Cycle Count register" ;group 0x08++0x03 line.long 0x08 "DWT_CPICNT,DWT CPI Count Register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" ;group 0x0c++0x03 line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" ;group 0x10++0x03 line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" ;group 0x14++0x03 line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" ;group 0x18++0x03 line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" group.long 0x24++0x03 line.long 0x00 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x34++0x03 line.long 0x00 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x44++0x03 line.long 0x00 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x54++0x03 line.long 0x00 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00) group.long 0x38++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x38++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00) group.long 0x48++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x48++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00) group.long 0x58++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x58++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif tree "Coresight Management Registers" rgroup 0xfd0--0xfff line.long 0x00 "PID4,Peripheral ID4" line.long 0x04 "PID5,Peripheral ID5" line.long 0x08 "PID6,Peripheral ID6" line.long 0x0c "PID7,Peripheral ID7" line.long 0x10 "PID0,Peripheral ID1" line.long 0x14 "PID1,Peripheral ID2" line.long 0x18 "PID2,Peripheral ID3" line.long 0x1c "PID3,Peripheral ID4" line.long 0x20 "CID0,Component ID0" line.long 0x24 "CID1,Component ID1" line.long 0x28 "CID2,Component ID2" line.long 0x2c "CID3,Component ID3" tree.end else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end endif config 16. 8. tree "IO Multiplexing" base ad:0x40067000 width 29. tree "RGPIOS_LEVEL1_CONFIG" if (((per.l((ad:0x40067000)+0x400))&0x00000001)==0x00000001) group.long 0x0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[0],GPIO[0] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[1],GPIO[1] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[2],GPIO[2] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[3],GPIO[3] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x10++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[4],GPIO[4] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x14++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[5],GPIO[5] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x18++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[6],GPIO[6] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[7],GPIO[7] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x20++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[8],GPIO[8] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x24++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[9],GPIO[9] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x28++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[10],GPIO[10] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x2C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[11],GPIO[11] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x30++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[12],GPIO[12] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x34++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[13],GPIO[13] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x38++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[14],GPIO[14] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x3C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[15],GPIO[15] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x40++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[16],GPIO[16] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x44++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[17],GPIO[17] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x48++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[18],GPIO[18] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x4C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[19],GPIO[19] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x50++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[20],GPIO[20] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x54++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[21],GPIO[21] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x58++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[22],GPIO[22] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x5C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[23],GPIO[23] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x60++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[24],GPIO[24] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x64++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[25],GPIO[25] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x68++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[26],GPIO[26] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x6C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[27],GPIO[27] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x70++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[28],GPIO[28] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x74++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[29],GPIO[29] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x78++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[30],GPIO[30] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x7C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[31],GPIO[31] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x80++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[32],GPIO[32] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x84++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[33],GPIO[33] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x88++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[34],GPIO[34] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x8C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[35],GPIO[35] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x90++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[36],GPIO[36] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x94++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[37],GPIO[37] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x98++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[38],GPIO[38] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x9C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[39],GPIO[39] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xA0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[40],GPIO[40] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xA4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[41],GPIO[41] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xA8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[42],GPIO[42] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xAC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[43],GPIO[43] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xB0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[44],GPIO[44] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xB4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[45],GPIO[45] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xB8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[46],GPIO[46] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xBC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[47],GPIO[47] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xC0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[48],GPIO[48] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xC4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[49],GPIO[49] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xC8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[50],GPIO[50] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xCC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[51],GPIO[51] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xD0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[52],GPIO[52] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xD4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[53],GPIO[53] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xD8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[54],GPIO[54] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xDC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[55],GPIO[55] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xE0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[56],GPIO[56] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xE4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[57],GPIO[57] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xE8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[58],GPIO[58] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xEC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[59],GPIO[59] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xF0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[60],GPIO[60] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xF4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[61],GPIO[61] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xF8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[62],GPIO[62] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0xFC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[63],GPIO[63] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x100++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[64],GPIO[64] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x104++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[65],GPIO[65] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x108++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[66],GPIO[66] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x10C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[67],GPIO[67] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x110++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[68],GPIO[68] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x114++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[69],GPIO[69] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x118++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[70],GPIO[70] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x11C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[71],GPIO[71] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x120++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[72],GPIO[72] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x124++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[73],GPIO[73] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x128++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[74],GPIO[74] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x12C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[75],GPIO[75] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x130++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[76],GPIO[76] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x134++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[77],GPIO[77] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x138++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[78],GPIO[78] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x13C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[79],GPIO[79] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x140++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[80],GPIO[80] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x144++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[81],GPIO[81] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x148++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[82],GPIO[82] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x14C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[83],GPIO[83] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x150++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[84],GPIO[84] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x154++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[85],GPIO[85] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x158++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[86],GPIO[86] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x15C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[87],GPIO[87] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x160++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[88],GPIO[88] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x164++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[89],GPIO[89] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x168++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[90],GPIO[90] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x16C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[91],GPIO[91] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x170++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[92],GPIO[92] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x174++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[93],GPIO[93] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x178++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[94],GPIO[94] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x17C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[95],GPIO[95] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x180++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[96],GPIO[96] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x184++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[97],GPIO[97] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x188++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[98],GPIO[98] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x18C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[99],GPIO[99] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x190++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[100],GPIO[100] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x194++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[101],GPIO[101] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x198++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[102],GPIO[102] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x19C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[103],GPIO[103] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1A0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[104],GPIO[104] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1A4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[105],GPIO[105] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1A8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[106],GPIO[106] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1AC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[107],GPIO[107] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1B0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[108],GPIO[108] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1B4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[109],GPIO[109] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1B8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[110],GPIO[110] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1BC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[111],GPIO[111] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1C0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[112],GPIO[112] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1C4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[113],GPIO[113] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1C8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[114],GPIO[114] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1CC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[115],GPIO[115] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1D0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[116],GPIO[116] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1D4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[117],GPIO[117] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1D8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[118],GPIO[118] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1DC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[119],GPIO[119] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1E0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[120],GPIO[120] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1E4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[121],GPIO[121] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1E8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[122],GPIO[122] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1EC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[123],GPIO[123] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1F0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[124],GPIO[124] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1F4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[125],GPIO[125] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1F8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[126],GPIO[126] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x1FC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[127],GPIO[127] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x200++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[128],GPIO[128] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x204++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[129],GPIO[129] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x208++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[130],GPIO[130] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x20C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[131],GPIO[131] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x210++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[132],GPIO[132] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x214++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[133],GPIO[133] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x218++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[134],GPIO[134] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x21C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[135],GPIO[135] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x220++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[136],GPIO[136] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x224++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[137],GPIO[137] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x228++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[138],GPIO[138] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x22C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[139],GPIO[139] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x230++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[140],GPIO[140] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x234++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[141],GPIO[141] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x238++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[142],GPIO[142] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x23C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[143],GPIO[143] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x240++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[144],GPIO[144] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x244++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[145],GPIO[145] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x248++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[146],GPIO[146] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x24C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[147],GPIO[147] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x250++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[148],GPIO[148] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x254++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[149],GPIO[149] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x258++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[150],GPIO[150] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x25C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[151],GPIO[151] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x260++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[152],GPIO[152] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x264++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[153],GPIO[153] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x268++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[154],GPIO[154] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x26C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[155],GPIO[155] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x270++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[156],GPIO[156] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x274++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[157],GPIO[157] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x278++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[158],GPIO[158] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x27C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[159],GPIO[159] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x280++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[160],GPIO[160] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x284++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[161],GPIO[161] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x288++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[162],GPIO[162] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x28C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[163],GPIO[163] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x290++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[164],GPIO[164] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x294++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[165],GPIO[165] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x298++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[166],GPIO[166] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x29C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[167],GPIO[167] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x2A0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[168],GPIO[168] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" group.long 0x2A4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[169],GPIO[169] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" else rgroup.long 0x0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[0],GPIO[0] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[1],GPIO[1] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[2],GPIO[2] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[3],GPIO[3] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x10++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[4],GPIO[4] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x14++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[5],GPIO[5] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x18++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[6],GPIO[6] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[7],GPIO[7] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x20++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[8],GPIO[8] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x24++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[9],GPIO[9] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x28++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[10],GPIO[10] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x2C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[11],GPIO[11] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x30++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[12],GPIO[12] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x34++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[13],GPIO[13] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x38++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[14],GPIO[14] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x3C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[15],GPIO[15] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x40++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[16],GPIO[16] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x44++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[17],GPIO[17] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x48++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[18],GPIO[18] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x4C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[19],GPIO[19] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x50++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[20],GPIO[20] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x54++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[21],GPIO[21] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x58++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[22],GPIO[22] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x5C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[23],GPIO[23] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x60++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[24],GPIO[24] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x64++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[25],GPIO[25] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x68++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[26],GPIO[26] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x6C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[27],GPIO[27] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x70++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[28],GPIO[28] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x74++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[29],GPIO[29] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x78++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[30],GPIO[30] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x7C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[31],GPIO[31] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x80++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[32],GPIO[32] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x84++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[33],GPIO[33] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x88++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[34],GPIO[34] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x8C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[35],GPIO[35] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x90++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[36],GPIO[36] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x94++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[37],GPIO[37] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x98++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[38],GPIO[38] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x9C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[39],GPIO[39] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xA0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[40],GPIO[40] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xA4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[41],GPIO[41] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xA8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[42],GPIO[42] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xAC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[43],GPIO[43] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xB0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[44],GPIO[44] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xB4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[45],GPIO[45] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xB8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[46],GPIO[46] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xBC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[47],GPIO[47] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xC0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[48],GPIO[48] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xC4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[49],GPIO[49] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xC8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[50],GPIO[50] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xCC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[51],GPIO[51] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xD0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[52],GPIO[52] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xD4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[53],GPIO[53] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xD8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[54],GPIO[54] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xDC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[55],GPIO[55] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xE0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[56],GPIO[56] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xE4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[57],GPIO[57] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xE8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[58],GPIO[58] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xEC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGA_[59],GPIO[59] RGMII Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xF0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[60],GPIO[60] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xF4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[61],GPIO[61] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xF8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[62],GPIO[62] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0xFC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[63],GPIO[63] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x100++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[64],GPIO[64] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x104++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[65],GPIO[65] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x108++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[66],GPIO[66] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x10C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[67],GPIO[67] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x110++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[68],GPIO[68] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x114++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[69],GPIO[69] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x118++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[70],GPIO[70] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x11C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[71],GPIO[71] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x120++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[72],GPIO[72] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x124++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[73],GPIO[73] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x128++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[74],GPIO[74] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x12C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[75],GPIO[75] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x130++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[76],GPIO[76] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x134++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[77],GPIO[77] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x138++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[78],GPIO[78] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x13C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[79],GPIO[79] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x140++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[80],GPIO[80] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x144++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[81],GPIO[81] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x148++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[82],GPIO[82] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x14C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[83],GPIO[83] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x150++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[84],GPIO[84] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x154++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[85],GPIO[85] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x158++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[86],GPIO[86] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x15C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[87],GPIO[87] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x160++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[88],GPIO[88] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x164++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[89],GPIO[89] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x168++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[90],GPIO[90] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x16C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[91],GPIO[91] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x170++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[92],GPIO[92] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x174++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[93],GPIO[93] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x178++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[94],GPIO[94] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x17C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[95],GPIO[95] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x180++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[96],GPIO[96] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x184++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[97],GPIO[97] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x188++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[98],GPIO[98] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x18C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[99],GPIO[99] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x190++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[100],GPIO[100] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x194++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[101],GPIO[101] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x198++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[102],GPIO[102] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x19C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[103],GPIO[103] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1A0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[104],GPIO[104] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1A4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[105],GPIO[105] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1A8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[106],GPIO[106] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1AC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[107],GPIO[107] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1B0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[108],GPIO[108] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1B4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[109],GPIO[109] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1B8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[110],GPIO[110] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1BC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[111],GPIO[111] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1C0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[112],GPIO[112] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1C4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[113],GPIO[113] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1C8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[114],GPIO[114] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1CC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[115],GPIO[115] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1D0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[116],GPIO[116] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1D4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[117],GPIO[117] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1D8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[118],GPIO[118] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1DC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[119],GPIO[119] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1E0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[120],GPIO[120] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1E4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[121],GPIO[121] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1E8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[122],GPIO[122] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1EC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[123],GPIO[123] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1F0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[124],GPIO[124] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1F4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[125],GPIO[125] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1F8++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[126],GPIO[126] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x1FC++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[127],GPIO[127] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x200++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[128],GPIO[128] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x204++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[129],GPIO[129] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x208++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[130],GPIO[130] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x20C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[131],GPIO[131] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x210++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[132],GPIO[132] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x214++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[133],GPIO[133] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x218++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[134],GPIO[134] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x21C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[135],GPIO[135] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x220++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[136],GPIO[136] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x224++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[137],GPIO[137] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x228++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[138],GPIO[138] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x22C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[139],GPIO[139] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x230++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[140],GPIO[140] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x234++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[141],GPIO[141] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x238++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[142],GPIO[142] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x23C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[143],GPIO[143] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x240++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[144],GPIO[144] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x244++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[145],GPIO[145] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x248++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[146],GPIO[146] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x24C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[147],GPIO[147] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x250++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[148],GPIO[148] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x254++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[149],GPIO[149] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x258++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[150],GPIO[150] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x25C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[151],GPIO[151] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x260++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[152],GPIO[152] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x264++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[153],GPIO[153] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x268++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[154],GPIO[154] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x26C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[155],GPIO[155] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x270++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[156],GPIO[156] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x274++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[157],GPIO[157] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x278++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[158],GPIO[158] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x27C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[159],GPIO[159] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x280++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[160],GPIO[160] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x284++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[161],GPIO[161] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x288++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[162],GPIO[162] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x28C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[163],GPIO[163] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x290++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[164],GPIO[164] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x294++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[165],GPIO[165] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x298++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[166],GPIO[166] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x29C++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[167],GPIO[167] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x2A0++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[168],GPIO[168] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" rgroup.long 0x2A4++0x03 line.long 0x00 "RGPIOS_LEVEL1_CONFIGB_[169],GPIO[169] Standard Multiplexing Level1 Configuration Register" bitfld.long 0x00 10.--11. " BGPIOS_LEVEL1_STANDARD_DRIVESTRENGTH ,GPIO drive strength capability" "4 mA,6 mA,8 mA,12 mA" bitfld.long 0x00 8.--9. " BGPIOS_LEVEL1_STANDARD_PULUP_PULLDOWN ,GPIO pull-up\pull-down resistor" "None,Pull up,None,Pull down" textline " " bitfld.long 0x00 0.--3. " BGPIOS_LEVEL1_STANDARD_IOFUNCTION ,GPIO level1 function" "Floating,Drive level logic 0,RGMII/RMII/MII and Ethernet clock,NAND and Ethernet clock,QSPI1/2,SDIO1/2,LCDC,,MSEBIM,MSEBIS,,,,,,Controlled by Level2" endif tree.end textline " " group.long 0x400++0x03 line.long 0x00 "RGPIOS_LEVEL1_STATUSPROTECT,GPIO Multiplexing Level1 Status And Protect Register" bitfld.long 0x00 4. " BGPIOS_LEVEL1_BADSEQUENCE ,Bad sequence detection" "Not detected,Detected" bitfld.long 0x00 0. " BGPIOS_LEVEL1_CONFIG_STATUSPROTECT ,Protection registers status" "Protected,Not protected" tree "RGPIOS_LEVEL2_CONFIG" if (((per.l((ad:0x40067000)+0x10F99400))&0x00000001)==0x00000001) group.long 0x10F99000++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[0],GPIO[0] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99004++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[1],GPIO[1] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99008++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[2],GPIO[2] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9900C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[3],GPIO[3] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99010++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[4],GPIO[4] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99014++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[5],GPIO[5] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99018++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[6],GPIO[6] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9901C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[7],GPIO[7] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99020++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[8],GPIO[8] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99024++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[9],GPIO[9] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99028++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[10],GPIO[10] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9902C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[11],GPIO[11] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99030++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[12],GPIO[12] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99034++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[13],GPIO[13] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99038++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[14],GPIO[14] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9903C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[15],GPIO[15] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99040++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[16],GPIO[16] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99044++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[17],GPIO[17] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99048++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[18],GPIO[18] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9904C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[19],GPIO[19] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99050++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[20],GPIO[20] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99054++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[21],GPIO[21] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99058++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[22],GPIO[22] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9905C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[23],GPIO[23] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99060++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[24],GPIO[24] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99064++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[25],GPIO[25] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99068++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[26],GPIO[26] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9906C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[27],GPIO[27] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99070++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[28],GPIO[28] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99074++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[29],GPIO[29] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99078++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[30],GPIO[30] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9907C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[31],GPIO[31] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99080++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[32],GPIO[32] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99084++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[33],GPIO[33] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99088++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[34],GPIO[34] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9908C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[35],GPIO[35] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99090++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[36],GPIO[36] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99094++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[37],GPIO[37] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99098++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[38],GPIO[38] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9909C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[39],GPIO[39] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990A0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[40],GPIO[40] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990A4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[41],GPIO[41] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990A8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[42],GPIO[42] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990AC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[43],GPIO[43] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990B0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[44],GPIO[44] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990B4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[45],GPIO[45] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990B8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[46],GPIO[46] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990BC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[47],GPIO[47] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990C0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[48],GPIO[48] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990C4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[49],GPIO[49] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990C8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[50],GPIO[50] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990CC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[51],GPIO[51] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990D0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[52],GPIO[52] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990D4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[53],GPIO[53] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990D8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[54],GPIO[54] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990DC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[55],GPIO[55] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990E0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[56],GPIO[56] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990E4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[57],GPIO[57] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990E8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[58],GPIO[58] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990EC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[59],GPIO[59] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990F0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[60],GPIO[60] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990F4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[61],GPIO[61] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990F8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[62],GPIO[62] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F990FC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[63],GPIO[63] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99100++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[64],GPIO[64] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99104++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[65],GPIO[65] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99108++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[66],GPIO[66] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9910C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[67],GPIO[67] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99110++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[68],GPIO[68] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99114++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[69],GPIO[69] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99118++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[70],GPIO[70] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9911C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[71],GPIO[71] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99120++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[72],GPIO[72] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99124++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[73],GPIO[73] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99128++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[74],GPIO[74] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9912C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[75],GPIO[75] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99130++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[76],GPIO[76] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99134++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[77],GPIO[77] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99138++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[78],GPIO[78] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9913C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[79],GPIO[79] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99140++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[80],GPIO[80] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99144++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[81],GPIO[81] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99148++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[82],GPIO[82] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9914C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[83],GPIO[83] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99150++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[84],GPIO[84] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99154++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[85],GPIO[85] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99158++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[86],GPIO[86] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9915C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[87],GPIO[87] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99160++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[88],GPIO[88] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99164++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[89],GPIO[89] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99168++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[90],GPIO[90] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9916C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[91],GPIO[91] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99170++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[92],GPIO[92] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99174++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[93],GPIO[93] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99178++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[94],GPIO[94] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9917C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[95],GPIO[95] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99180++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[96],GPIO[96] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99184++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[97],GPIO[97] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99188++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[98],GPIO[98] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9918C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[99],GPIO[99] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99190++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[100],GPIO[100] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99194++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[101],GPIO[101] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99198++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[102],GPIO[102] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9919C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[103],GPIO[103] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991A0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[104],GPIO[104] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991A4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[105],GPIO[105] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991A8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[106],GPIO[106] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991AC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[107],GPIO[107] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991B0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[108],GPIO[108] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991B4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[109],GPIO[109] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991B8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[110],GPIO[110] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991BC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[111],GPIO[111] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991C0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[112],GPIO[112] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991C4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[113],GPIO[113] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991C8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[114],GPIO[114] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991CC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[115],GPIO[115] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991D0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[116],GPIO[116] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991D4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[117],GPIO[117] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991D8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[118],GPIO[118] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991DC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[119],GPIO[119] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991E0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[120],GPIO[120] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991E4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[121],GPIO[121] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991E8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[122],GPIO[122] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991EC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[123],GPIO[123] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991F0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[124],GPIO[124] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991F4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[125],GPIO[125] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991F8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[126],GPIO[126] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F991FC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[127],GPIO[127] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99200++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[128],GPIO[128] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99204++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[129],GPIO[129] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99208++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[130],GPIO[130] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9920C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[131],GPIO[131] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99210++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[132],GPIO[132] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99214++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[133],GPIO[133] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99218++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[134],GPIO[134] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9921C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[135],GPIO[135] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99220++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[136],GPIO[136] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99224++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[137],GPIO[137] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99228++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[138],GPIO[138] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9922C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[139],GPIO[139] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99230++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[140],GPIO[140] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99234++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[141],GPIO[141] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99238++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[142],GPIO[142] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9923C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[143],GPIO[143] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99240++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[144],GPIO[144] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99244++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[145],GPIO[145] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99248++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[146],GPIO[146] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9924C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[147],GPIO[147] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99250++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[148],GPIO[148] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99254++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[149],GPIO[149] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99258++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[150],GPIO[150] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9925C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[151],GPIO[151] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99260++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[152],GPIO[152] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99264++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[153],GPIO[153] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99268++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[154],GPIO[154] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9926C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[155],GPIO[155] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99270++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[156],GPIO[156] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99274++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[157],GPIO[157] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99278++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[158],GPIO[158] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9927C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[159],GPIO[159] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99280++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[160],GPIO[160] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99284++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[161],GPIO[161] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99288++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[162],GPIO[162] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9928C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[163],GPIO[163] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99290++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[164],GPIO[164] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99294++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[165],GPIO[165] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F99298++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[166],GPIO[166] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F9929C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[167],GPIO[167] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F992A0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[168],GPIO[168] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." group.long 0x10F992A4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[169],GPIO[169] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." else rgroup.long 0x10F99000++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[0],GPIO[0] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99004++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[1],GPIO[1] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99008++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[2],GPIO[2] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9900C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[3],GPIO[3] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99010++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[4],GPIO[4] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99014++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[5],GPIO[5] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99018++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[6],GPIO[6] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9901C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[7],GPIO[7] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99020++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[8],GPIO[8] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99024++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[9],GPIO[9] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99028++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[10],GPIO[10] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9902C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[11],GPIO[11] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99030++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[12],GPIO[12] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99034++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[13],GPIO[13] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99038++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[14],GPIO[14] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9903C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[15],GPIO[15] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99040++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[16],GPIO[16] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99044++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[17],GPIO[17] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99048++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[18],GPIO[18] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9904C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[19],GPIO[19] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99050++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[20],GPIO[20] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99054++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[21],GPIO[21] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99058++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[22],GPIO[22] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9905C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[23],GPIO[23] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99060++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[24],GPIO[24] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99064++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[25],GPIO[25] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99068++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[26],GPIO[26] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9906C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[27],GPIO[27] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99070++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[28],GPIO[28] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99074++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[29],GPIO[29] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99078++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[30],GPIO[30] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9907C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[31],GPIO[31] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99080++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[32],GPIO[32] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99084++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[33],GPIO[33] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99088++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[34],GPIO[34] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9908C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[35],GPIO[35] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99090++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[36],GPIO[36] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99094++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[37],GPIO[37] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99098++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[38],GPIO[38] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9909C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[39],GPIO[39] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990A0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[40],GPIO[40] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990A4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[41],GPIO[41] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990A8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[42],GPIO[42] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990AC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[43],GPIO[43] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990B0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[44],GPIO[44] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990B4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[45],GPIO[45] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990B8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[46],GPIO[46] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990BC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[47],GPIO[47] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990C0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[48],GPIO[48] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990C4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[49],GPIO[49] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990C8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[50],GPIO[50] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990CC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[51],GPIO[51] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990D0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[52],GPIO[52] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990D4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[53],GPIO[53] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990D8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[54],GPIO[54] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990DC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[55],GPIO[55] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990E0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[56],GPIO[56] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990E4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[57],GPIO[57] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990E8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[58],GPIO[58] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990EC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[59],GPIO[59] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990F0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[60],GPIO[60] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990F4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[61],GPIO[61] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990F8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[62],GPIO[62] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F990FC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[63],GPIO[63] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99100++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[64],GPIO[64] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99104++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[65],GPIO[65] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99108++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[66],GPIO[66] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9910C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[67],GPIO[67] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99110++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[68],GPIO[68] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99114++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[69],GPIO[69] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99118++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[70],GPIO[70] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9911C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[71],GPIO[71] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99120++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[72],GPIO[72] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99124++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[73],GPIO[73] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99128++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[74],GPIO[74] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9912C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[75],GPIO[75] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99130++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[76],GPIO[76] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99134++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[77],GPIO[77] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99138++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[78],GPIO[78] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9913C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[79],GPIO[79] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99140++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[80],GPIO[80] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99144++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[81],GPIO[81] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99148++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[82],GPIO[82] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9914C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[83],GPIO[83] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99150++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[84],GPIO[84] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99154++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[85],GPIO[85] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99158++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[86],GPIO[86] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9915C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[87],GPIO[87] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99160++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[88],GPIO[88] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99164++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[89],GPIO[89] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99168++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[90],GPIO[90] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9916C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[91],GPIO[91] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99170++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[92],GPIO[92] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99174++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[93],GPIO[93] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99178++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[94],GPIO[94] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9917C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[95],GPIO[95] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99180++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[96],GPIO[96] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99184++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[97],GPIO[97] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99188++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[98],GPIO[98] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9918C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[99],GPIO[99] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99190++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[100],GPIO[100] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99194++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[101],GPIO[101] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99198++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[102],GPIO[102] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9919C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[103],GPIO[103] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991A0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[104],GPIO[104] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991A4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[105],GPIO[105] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991A8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[106],GPIO[106] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991AC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[107],GPIO[107] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991B0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[108],GPIO[108] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991B4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[109],GPIO[109] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991B8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[110],GPIO[110] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991BC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[111],GPIO[111] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991C0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[112],GPIO[112] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991C4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[113],GPIO[113] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991C8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[114],GPIO[114] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991CC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[115],GPIO[115] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991D0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[116],GPIO[116] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991D4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[117],GPIO[117] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991D8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[118],GPIO[118] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991DC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[119],GPIO[119] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991E0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[120],GPIO[120] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991E4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[121],GPIO[121] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991E8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[122],GPIO[122] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991EC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[123],GPIO[123] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991F0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[124],GPIO[124] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991F4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[125],GPIO[125] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991F8++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[126],GPIO[126] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F991FC++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[127],GPIO[127] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99200++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[128],GPIO[128] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99204++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[129],GPIO[129] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99208++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[130],GPIO[130] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9920C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[131],GPIO[131] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99210++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[132],GPIO[132] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99214++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[133],GPIO[133] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99218++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[134],GPIO[134] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9921C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[135],GPIO[135] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99220++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[136],GPIO[136] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99224++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[137],GPIO[137] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99228++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[138],GPIO[138] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9922C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[139],GPIO[139] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99230++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[140],GPIO[140] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99234++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[141],GPIO[141] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99238++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[142],GPIO[142] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9923C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[143],GPIO[143] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99240++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[144],GPIO[144] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99244++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[145],GPIO[145] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99248++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[146],GPIO[146] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9924C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[147],GPIO[147] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99250++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[148],GPIO[148] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99254++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[149],GPIO[149] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99258++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[150],GPIO[150] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9925C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[151],GPIO[151] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99260++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[152],GPIO[152] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99264++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[153],GPIO[153] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99268++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[154],GPIO[154] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9926C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[155],GPIO[155] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99270++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[156],GPIO[156] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99274++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[157],GPIO[157] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99278++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[158],GPIO[158] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9927C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[159],GPIO[159] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99280++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[160],GPIO[160] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99284++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[161],GPIO[161] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99288++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[162],GPIO[162] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9928C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[163],GPIO[163] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99290++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[164],GPIO[164] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99294++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[165],GPIO[165] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F99298++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[166],GPIO[166] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F9929C++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[167],GPIO[167] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F992A0++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[168],GPIO[168] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." rgroup.long 0x10F992A4++0x03 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_[169],GPIO[169] Multiplexing Level2 Configuration Register" bitfld.long 0x00 0.--5. " BGPIOS_LEVEL2_IOFUNCTION ,GPIO level 2 function" "Floating,ETHERCAT,SERCOSIII,Extended SDIO,MDIO,,Extended USB,Extended MSEBIM,Extended MSEBIS,,,,UART1 Inverted,Extended UART1 Inverted,UART2 Inverted,Extended UART2 Inverted,UART3 Inverted,Extended UART3 Inverted,UART1,Extended UART1,UART2,Extended UART2,UART3,Extended UART3,UART4,Extended UART4,UART5,Extended UART5,UART6,Extended UART6,UART7,Extended UART7,UART8,Extended UART8,SPI1 (Master),,SPI2 (Master),,SPI3 (Master),,SPI4 (Master),,SPI5 (Slave),,SPI6 (Slave),,,,BGPIO,CAN,I2C,Safety,,,,,,,,,,Extended A5PSW & GMAC,?..." endif tree.end textline " " group.long 0x10F99400++0x03 line.long 0x00 "RGPIOS_LEVEL2_STATUSPROTECT,GPIO Multiplexing Level2 Status And Protect Register" bitfld.long 0x00 4. " BGPIOS_LEVEL2_BADSEQUENCE ,Bad sequence detection" "Not detected,Detected" bitfld.long 0x00 0. " BGPIOS_LEVEL2_CONFIG_STATUSPROTECT ,Protection registers status" "Protected,Not protected" if (((per.l((ad:0x40067000)+0x10F99400))&0x00000001)==0x00000001) group.long 0x10F99404++0x07 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_MDIO1,MDIO1 Interface Configuration Register" bitfld.long 0x00 0.--2. " BGPIOS_LEVEL2_CONFIG_MDIO1 ,MDIO1 interface configuration" "Floating,GMAC1,GMAC2,ETHERCAT,SERCOSIII MDIO1,SERCOSIII MDIO2,HW-RTOS GMAC,5port Switch" line.long 0x04 "RGPIOS_LEVEL2_CONFIG_MDIO2,MDIO2 Interface Configuration Register" bitfld.long 0x04 0.--2. " BGPIOS_LEVEL2_CONFIG_MDIO2 ,MDIO2 interface configuration" "Floating,GMAC1,GMAC2,ETHERCAT,SERCOSIII MDIO1,SERCOSIII MDIO2,HW-RTOS GMAC,5port Switch" else rgroup.long 0x10F99404++0x07 line.long 0x00 "RGPIOS_LEVEL2_CONFIG_MDIO1,MDIO1 Interface Configuration Register" bitfld.long 0x00 0.--2. " BGPIOS_LEVEL2_CONFIG_MDIO1 ,MDIO1 interface configuration" "Floating,GMAC1,GMAC2,ETHERCAT,SERCOSIII MDIO1,SERCOSIII MDIO2,HW-RTOS GMAC,5port Switch" line.long 0x04 "RGPIOS_LEVEL2_CONFIG_MDIO2,MDIO2 Interface Configuration Register" bitfld.long 0x04 0.--2. " BGPIOS_LEVEL2_CONFIG_MDIO2 ,MDIO2 interface configuration" "Floating,GMAC1,GMAC2,ETHERCAT,SERCOSIII MDIO1,SERCOSIII MDIO2,HW-RTOS GMAC,5port Switch" endif group.long 0x10F99480++0x03 line.long 0x00 "RGPIOS_LEVEL2_GPIO_INT_[0],GPIO_Int[0] Interrupt Configuration Register" hexmask.long.byte 0x00 0.--6. 1. " BGPIOS_LEVEL2_GPIO_INT ,Selects an interrupt source" group.long 0x10F99484++0x03 line.long 0x00 "RGPIOS_LEVEL2_GPIO_INT_[1],GPIO_Int[1] Interrupt Configuration Register" hexmask.long.byte 0x00 0.--6. 1. " BGPIOS_LEVEL2_GPIO_INT ,Selects an interrupt source" group.long 0x10F99488++0x03 line.long 0x00 "RGPIOS_LEVEL2_GPIO_INT_[2],GPIO_Int[2] Interrupt Configuration Register" hexmask.long.byte 0x00 0.--6. 1. " BGPIOS_LEVEL2_GPIO_INT ,Selects an interrupt source" group.long 0x10F9948C++0x03 line.long 0x00 "RGPIOS_LEVEL2_GPIO_INT_[3],GPIO_Int[3] Interrupt Configuration Register" hexmask.long.byte 0x00 0.--6. 1. " BGPIOS_LEVEL2_GPIO_INT ,Selects an interrupt source" group.long 0x10F99490++0x03 line.long 0x00 "RGPIOS_LEVEL2_GPIO_INT_[4],GPIO_Int[4] Interrupt Configuration Register" hexmask.long.byte 0x00 0.--6. 1. " BGPIOS_LEVEL2_GPIO_INT ,Selects an interrupt source" group.long 0x10F99494++0x03 line.long 0x00 "RGPIOS_LEVEL2_GPIO_INT_[5],GPIO_Int[5] Interrupt Configuration Register" hexmask.long.byte 0x00 0.--6. 1. " BGPIOS_LEVEL2_GPIO_INT ,Selects an interrupt source" group.long 0x10F99498++0x03 line.long 0x00 "RGPIOS_LEVEL2_GPIO_INT_[6],GPIO_Int[6] Interrupt Configuration Register" hexmask.long.byte 0x00 0.--6. 1. " BGPIOS_LEVEL2_GPIO_INT ,Selects an interrupt source" group.long 0x10F9949C++0x03 line.long 0x00 "RGPIOS_LEVEL2_GPIO_INT_[7],GPIO_Int[7] Interrupt Configuration Register" hexmask.long.byte 0x00 0.--6. 1. " BGPIOS_LEVEL2_GPIO_INT ,Selects an interrupt source" width 0x0B tree.end tree "System Control" base ad:0x4000C000 width 23. group.long 0x94++0x03 line.long 0x00 "PWRCTRL_SWITCHDIV,Clock Divider Control For A5PSW" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x00 0.--6. 1. " DIV ,Clock divider for A5PSW" if (((per.l((ad:0x4000C000)+0xE0))&0x80000000)==0x80000000) group.long 0xE0++0x03 line.long 0x00 "PWRCTRL_OPPDIV,Clock Divider Control For OPP Modes" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" rbitfld.long 0x00 0.--4. " DIV ,Clock divider for the NoC clock" ",,2,,4,,,,8,,,,,,,,16,?..." else group.long 0xE0++0x03 line.long 0x00 "PWRCTRL_OPPDIV,Clock Divider Control For OPP Modes" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" bitfld.long 0x00 0.--4. " DIV ,Clock divider for the NoC clock" ",,2,,4,,,,8,,,,,,,,16,?..." endif if (((per.l((ad:0x4000C000)+0xE4))&0x80000000)==0x80000000) group.long 0xE4++0x03 line.long 0x00 "PWRCTRL_CA7DIV,Clock Divider Control For CA7 CLKIN Clock" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" rbitfld.long 0x00 0.--2. " DIV ,Clock divider for the Cortex-A7" ",1,2,,4,,," else group.long 0xE4++0x03 line.long 0x00 "PWRCTRL_CA7DIV,Clock Divider Control For CA7 CLKIN Clock" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" bitfld.long 0x00 0.--2. " DIV ,Clock divider for the Cortex-A7" ",1,2,,4,,," endif group.long 0xF8++0x03 line.long 0x00 "PWRCTRL_PG1_PR2DIV,Clock Divider Control For PG1 Program2" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x00 0.--7. 1. " DIV ,Clock divider for UART[4..8]_SCLK" group.long 0x100++0x03 line.long 0x00 "PWRCTRL_PG1_PR3DIV,Clock Divider Control For PG1 Program3" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x00 0.--7. 1. " DIV ,Clock divider for SPI[1..4]_SCLK" group.long 0x108++0x03 line.long 0x00 "PWRCTRL_PG1_PR4DIV,Clock Divider Control for PG1 Program4" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x00 0.--7. 1. " DIV ,Clock divider for SPI[5/6]_SCLK" group.long 0x110++0x03 line.long 0x00 "PWRCTRL_PG4_PR1DIV,Clock Divider Control for PG4 Program1" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x00 0.--7. 1. " DIV ,Clock divider for LCD_ECLK_SCLK" group.long 0x124++0x0B line.long 0x00 "PWRCTRL_QSPI1DIV,Clock Divider Control For QSPI1" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x00 0.--6. 1. " DIV ,Clock divider for QSPI1_REFCLK" line.long 0x04 "PWRCTRL_SDIO1DIV,Clock Divider Control For SDIO1" bitfld.long 0x04 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x04 0.--7. 1. " DIV ,Clock divider for SDIO1_ECLK" Line.Long 0x08 "PWRCTRL_SDIO2DIV,Clock Divider Control For SDIO2" bitfld.long 0x08 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x08 0.--7. 1. " DIV ,Clock divider for SDIO2_ECLK" group.long 0x134++0x0B line.long 0x00 "PWRCTRL_PG0_ADCDIV,Clock Divider Control For PG0 ADC" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.word 0x00 0.--9. 1. " DIV ,Clock divider for ADC_CLK" line.long 0x04 "PWRCTRL_PG0_I2CDIV,Clock Divider Control For PG0 I2C" bitfld.long 0x04 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x04 0.--6. 1. " DIV ,clock divider for I2C[1/2]_SCLK" line.long 0x08 "PWRCTRL_PG0_UARTDIV,Clock Divider Control For PG0 UART" bitfld.long 0x08 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x08 0.--7. 1. " DIV ,Clock divider for UART[1..3]_SCLK" group.long 0x148++0x03 line.long 0x00 "PWRCTRL_NFLASHDIV,Clock Divider Control For NAND FLASH Controller" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x00 0.--6. 1. " DIV ,Clock divider for NAND_ECLK" group.long 0x190++0x03 line.long 0x00 "PWRCTRL_HWRTOS_MDCDIV,Clock Divider Control For HW-RtoS GMAC MDC Clock" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.word 0x00 0.--9. 1. " DIV ,Clock divider for HWRtoS_MDCCLK" sif cpu()=="R9A06G033-CM3" group.long 0x64++0x03 line.long 0x00 "PWRCTRL_QSPI2DIV,Clock Divider Control For QSPI2" bitfld.long 0x00 31. " BUSY ,Status of the programmable divider" "Idle,Busy" hexmask.long.byte 0x00 0.--6. 1. " DIV ,Clock divider for QSPI2_REFCLK" endif group.long 0x0C++0x03 line.long 0x00 "PWRCTRL_SDIO1,Power Management Control For SDIO1" bitfld.long 0x00 4. " CLKEN_B ,Clock enable for SDIO1_ECLK" "Disabled,Enabled" bitfld.long 0x00 3. " MIREQ_A ,Master idle request to the interconnect" "Active,Idle" bitfld.long 0x00 2. " SLVRDY_A ,Slave ready for access" "Not ready,Ready" textline " " bitfld.long 0x00 1. " RSTN_A ,Active low reset" "Reset,No reset" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for SDIO1_HCLK" "Disabled,Enabled" rgroup.long 0x10++0x03 line.long 0x00 "PWRSTAT_SDIO1,Power Management Status For SDIO1" bitfld.long 0x00 2. " MISTAT_A ,Master idle status of the interconnect for SDIO1" "Active,Idle" bitfld.long 0x00 1. " MIRACK_A ,AHBM idle request acknowledge for SDIO1" "Not requested,Requested" bitfld.long 0x00 0. " SCON_A ,Interconnection status for SDIO1" "Disconnected,Connected" sif cpu()=="R9A06G032-CA7" rgroup.long 0x18++0x07 line.long 0x00 "SYSSTAT,System Status Flags Register" bitfld.long 0x00 6. " PKGMODE ,Package type" "400 pin,324 pin" bitfld.long 0x00 4. " CA7_STANDBYWFIL2 ,L2 cache WFI state." "Idle,Active" bitfld.long 0x00 3. " CA7_STANDBYWFI1 ,WFI low-power state for 324 pin package" "Idle,Active" textline " " bitfld.long 0x00 2. " CA7_STANDBYWFI0 ,WFI low-power state for 400 pin package" "Idle,Active" bitfld.long 0x00 1. " CA7_STANDBYWFE1 ,WFE low-power state for 324 pin package" "Idle,Active" bitfld.long 0x00 0. " CA7_STANDBYWFE0 ,WFE low-power state for 400 pin package" "Idle,Active" elif cpu()=="R9A06G033-CM3" rgroup.long 0x18++0x07 line.long 0x00 "SYSSTAT,System Status Flags Register" bitfld.long 0x00 6. " PKGMODE ,Package type" "324 pin,196 pin" elif cpu()=="R9A06G032-CM3" rgroup.long 0x18++0x07 line.long 0x00 "SYSSTAT,System Status Flags Register" bitfld.long 0x00 6. " PKGMODE ,Package type" "400 pin,324 pin" elif cpu()=="R9A06G034-CM3" rgroup.long 0x18++0x07 line.long 0x00 "SYSSTAT,System Status Flags Register" bitfld.long 0x00 6. " PKGMODE ,Package type" ",196 pin" endif group.long 0x1C++0x03 line.long 0x00 "PWRCTRL_USB,Power Management Control For USB2.0" bitfld.long 0x00 7. " RSTN_F ,Active low reset" "Reset,No reset" bitfld.long 0x00 6. " CLKEN_E ,Clock enable for USB_PCICLK." "Disabled,Enabled" bitfld.long 0x00 5. " CLKEN_C ,Clock enable for USB_HCLKPM" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MIREQ_B ,Idle request to the NoC interconnect for USB function" "Active,Idle" bitfld.long 0x00 3. " CLKEN_B ,Clock enable for USB_HCLKF" "Disabled,Enabled" bitfld.long 0x00 2. " MIREQ_A ,Idle request to the NoC interconnect for USB host" "Active,Idle" textline " " bitfld.long 0x00 1. " RSTN_A ,Active low reset to the interconnect for USB." "Reset,No reset" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for USB_HCLKH" "Disabled,Enabled" rgroup.long 0x20++0x03 line.long 0x00 "PWRSTAT_USB,Power Management Status For USB2.0" bitfld.long 0x00 3. " MISTAT_B ,Idle status of the NoC interconnect for USB function" "Not requested,Requested" bitfld.long 0x00 2. " MIRACK_B ,Idle request acknowledge for USB function" "Not requested,Requested" bitfld.long 0x00 1. " MISTAT_A ,Idle request acknowledge for USB host" "Not requested,Requested" textline " " bitfld.long 0x00 0. " MIRACK_A ,Master idle request acknowledge for USB host" "Not requested,Requested" group.long 0x2C++0x03 line.long 0x00 "PWRCTRL_MSEBI,Power Management Control For MSEBI" bitfld.long 0x00 6. " SLVRDY_B ,Slave ready for MSEBI master access" "Not ready,Ready" bitfld.long 0x00 5. " RSTN_B ,Active low reset to the interconnect for MSEBI master" "Reset,No reset" bitfld.long 0x00 4. " CLKEN_B ,Clock enable for MSEBI master" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MIREQ_A ,Master idle request to the interconnect for MSEBI slave" "Not requested,Requested" bitfld.long 0x00 2. " SLVRDY_A ,Slave ready for MSEBI slave access" "Not ready,Ready" bitfld.long 0x00 1. " RSTN_A ,Active low reset to the interconnect for MSEBI slave" "Reset,No reset" textline " " bitfld.long 0x00 0. " CLKEN_A ,Clock enable for MSEBI slave" "Disabled,Enabled" rgroup.long 0x30++0x3 line.long 0x00 "PWRSTAT_MSEBI,Power Management Status For MSEBI" bitfld.long 0x00 3. " SCON_B ,Interconnection status for MSEBI master" "Disconnected,Connected" bitfld.long 0x00 2. " MISTAT_A ,Master idle status of the interconnect for MSEBI slave" "Not requested,Requested" bitfld.long 0x00 1. " MIRACK_A ,Master idle request acknowledge for MSEBI slave" "Not requested,Requested" textline " " bitfld.long 0x00 0. " SCON_A ,Interconnection status for MSEBI slave" "Disconnected,Connected" group.long 0x34++0x03 line.long 0x00 "PWRCTRL_PG0_0,Power Management Control #0 For PG0" bitfld.long 0x00 30. " UARTCLKSEL ,Source of All PG0 UART clocks" "MAIN PLL,USBPLL" bitfld.long 0x00 29. " RSTN_J2 ,Active low reset to USBPLL clock used on UART3" "Reset,No reset" bitfld.long 0x00 28. " CLKEN_J2 ,Clock enable for USBPLL clock used on UART3" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " RSTN_J1 ,Active low reset to MAIN PLL clock used on UART3" "Reset,No reset" bitfld.long 0x00 26. " CLKEN_J1 ,Clock enable for MAIN PLL clock used on UART3" "Disabled,Enabled" bitfld.long 0x00 25. " RSTN_I2 ,Active low reset to USBPLL clock used on UART2" "Reset,No reset" textline " " bitfld.long 0x00 24. " CLKEN_I2 ,Clock enable to USBPLL clock used on UART2" "Disabled,Enabled" bitfld.long 0x00 23. " RSTN_I1 ,Active low reset to MAIN PLL clock used on UART2" "Reset,No reset" bitfld.long 0x00 22. " CLKEN_I1 ,Clock enable for MAIN PLL clock used on UART2" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " RSTN_H2 ,Active low reset to USBPLL clock used on UART1" "Reset,No reset" bitfld.long 0x00 20. " CLKEN_H2 ,Clock enable for USBPLL clock used on UART1" "Disabled,Enabled" bitfld.long 0x00 19. " RSTN_H1 ,Active low reset to MAIN PLL clock used on UART1" "Reset,No reset" textline " " bitfld.long 0x00 18. " CLKEN_H1 ,Clock enable for MAIN PLL clock used on UART1" "Disabled,Enabled" bitfld.long 0x00 17. " SLVRDY_F ,Slave ready for ADC access" "Not ready,Ready" bitfld.long 0x00 16. " RSTN_F ,Active low reset to the interconnect for ADC" "Reset,No reset" textline " " bitfld.long 0x00 15. " CLKEN_F ,Clock enable for ADC_PCLK" "Disabled,Enabled" bitfld.long 0x00 14. " SLVRDY_E ,Slave ready for I2C2 access" "Not ready,Ready" bitfld.long 0x00 13. " RSTN_E ,Active low reset to the interconnect for I2C2" "Reset,No reset" textline " " bitfld.long 0x00 12. " CLKEN_E ,Clock enable for I2C2_PCLK" "Disabled,Enabled" bitfld.long 0x00 11. " SLVRDY_D ,Slave ready for I2C1 access" "Not ready,Ready" bitfld.long 0x00 10. " RSTN_D ,Active low reset to the interconnect for I2C1" "Reset,No reset" textline " " bitfld.long 0x00 9. " CLKEN_D ,Clock enable for I2C1_PCLK" "Disabled,Enabled" bitfld.long 0x00 8. " SLVRDY_C ,Slave ready for UART3 access" "Not ready,Ready" bitfld.long 0x00 7. " RSTN_C ,Active low reset to the interconnect for UART3" "Reset,No reset" textline " " bitfld.long 0x00 6. " CLKEN_C ,Clock enable for UART3_PCLK" "Disabled,Enabled" bitfld.long 0x00 5. " SLVRDY_B ,Slave ready for UART2 access" "Not ready,Ready" bitfld.long 0x00 4. " RSTN_B ,Active low reset to the interconnect for UART2" "Reset,No reset" textline " " bitfld.long 0x00 3. " CLKEN_B ,Clock enable for UART2_PCLK" "Disabled,enabled" bitfld.long 0x00 2. " SLVRDY_A ,Slave ready for UART1 access" "Not ready,Ready" bitfld.long 0x00 1. " RSTN_A ,Active low reset to the interconnect for UART1" "Reset,No reset" textline " " bitfld.long 0x00 0. " CLKEN_A ,Clock enable for UART1_PCLK" "Disabled,Enabled" rgroup.long 0x38++0x03 line.long 0x00 "PWRSTAT_PG0,Power Management Status For PG0" bitfld.long 0x00 5. " SCON_F ,Interconnection status for ADC" "Disconnected,Connected" bitfld.long 0x00 4. " SCON_E ,Interconnection status for I2C2" "Disconnected,Connected" bitfld.long 0x00 3. " SCON_D ,Interconnection status for I2C1" "Disconnected,Connected" textline " " bitfld.long 0x00 2. " SCON_C ,Interconnection status for UART3" "Disconnected,Connected" bitfld.long 0x00 1. " SCON_B ,Interconnection status for UART2" "Disconnected,Connected" bitfld.long 0x00 0. " SCON_A ,Interconnection status for UART1" "Disconnected,Connected" group.long 0x3C++0x0B line.long 0x00 "PWRCTRL_PG0_1,Power Management Control #1 For PG0" bitfld.long 0x00 11. " RSTN_M ,Active low reset to ADC" "Reset,No reset" bitfld.long 0x00 10. " CLKEN_M ,Clock enable for ADC_CLK" "Disabled,Enabled" bitfld.long 0x00 9. " RSTN_L ,Active low reset to I2C2" "Reset,No reset" textline " " bitfld.long 0x00 8. " CLKEN_L ,Clock enable for I2C2_SCLK" "Disabled,Enabled" bitfld.long 0x00 7. " RSTN_K ,Active low reset to I2C1" "Reset,No reset" bitfld.long 0x00 6. " CLKEN_K ,Clock enable for I2C1_SCLK" "Disabled,Enabled" line.long 0x04 "PWRCTRL_PG1_1,Power Management Control #1 For PG1" bitfld.long 0x04 29. " SLVRDY_J ,Slave ready for UART5 access" "Not ready,Ready" bitfld.long 0x04 28. " RSTN_J ,Active low reset to the interconnect for UART5" "Reset,No reset" bitfld.long 0x04 27. " CLKEN_J ,Clock enable for UART5_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x04 26. " SLVRDY_I ,Slave ready for UART4 access" "Not ready,Ready" bitfld.long 0x04 25. " RSTN_I ,Active low reset to the interconnect for UART4" "Reset,No reset" bitfld.long 0x04 24. " CLKEN_I ,Clock enable for UART5_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x04 23. " SLVRDY_H ,Slave ready for BGPIO2 access" "Not ready,ready" bitfld.long 0x04 22. " RSTN_H ,Active low reset to BGPIO2" "Reset,No reset" bitfld.long 0x04 21. " CLKEN_H ,Clock enable for BGPIO2_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " SLVRDY_G ,Slave ready for BGPIO1 access" "Not ready,Ready" bitfld.long 0x04 19. " RSTN_G ,Active low reset to the interconnect for BGPIO1" "Reset,No reset" bitfld.long 0x04 18. " CLKEN_G ,Clock enable for BGPIO1_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " SLVRDY_F ,Slave ready for SPI6 access" "Not ready,Ready" bitfld.long 0x04 16. " RSTN_F ,Active low reset to the interconnect for SPI6" "Reset,No reset" bitfld.long 0x04 15. " CLKEN_F ,Clock enable for SPI6_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " SLVRDY_E ,slave ready for SPI5 access" "Not ready,Ready" bitfld.long 0x04 13. " RSTN_E ,Active low reset to the interconnect for SPI5" "Reset,No reset" bitfld.long 0x04 12. " CLKEN_E ,Clock enable for SPI5_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " SLVRDY_D ,Slave ready for SPI4 access" "Not ready,Ready" bitfld.long 0x04 10. " RSTN_D ,Active low reset to the interconnect for SPI4" "Reset,No reset" bitfld.long 0x04 9. " CLKEN_D ,Clock enable for SPI4_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " SLVRDY_C ,Slave ready for SPI3 access" "Not ready,Ready" bitfld.long 0x04 7. " RSTN_C ,Active low reset to the interconnect for SPI3" "Reset,No reset" bitfld.long 0x04 6. " CLKEN_C ,Clock enable for SPI3_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " SLVRDY_B ,Slave ready for SPI2 access" "Not ready,Ready" bitfld.long 0x04 4. " RSTN_B ,Active low reset to the interconnect for SPI2" "Reset,No reset" bitfld.long 0x04 3. " CLKEN_B ,Clock enable for SPI2_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " SLVRDY_A ,Slave ready for SPI1 access" "Not ready,Ready" bitfld.long 0x04 1. " RSTN_A ,Active low reset to the interconnect for SPI1" "Reset,No reset" bitfld.long 0x04 0. " CLKEN_A ,Clock enable for SPI1_PCLK" "Disabled,Enabled" line.long 0x08 "PWRCTRL_PG1_2,Power Management Control #2 for PG1" bitfld.long 0x08 11. " SLVRDY_N ,Slave ready for BGPIO3 access" "Not ready,Ready" bitfld.long 0x08 10. " RSTN_N ,Active low reset to the interconnect for BGPIO3" "Reset,No reset" bitfld.long 0x08 9. " CLKEN_N ,Clock enable for BGPIO3_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " SLVRDY_M ,Slave ready for UART8 access" "Not ready,Ready" bitfld.long 0x08 7. " RSTN_M ,Active low reset to the interconnect for UART8" "Reset,No reset" bitfld.long 0x08 6. " CLKEN_M ,Clock enable for UART8_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " SLVRDY_L ,Slave ready for UART7 access" "Not ready,Ready" bitfld.long 0x08 4. " RSTN_L ,Active low reset to the interconnect for UART7" "Reset,No reset" bitfld.long 0x08 3. " CLKEN_L ,Clock enable for UART7_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " SLVRDY_K ,Slave ready for UART6 access" "Not ready,Ready" bitfld.long 0x08 1. " RSTN_K ,Active low reset to the interconnect for UART6" "Reset,No reset" bitfld.long 0x08 0. " CLKEN_K ,Clock enable For UART6_PCLK" "Disabled,Enabled" group.long 0x4C++0x0B line.long 0x00 "PWRCTRL_DMA,Power Management Control For DMAC1 & DMAC2" bitfld.long 0x00 7. " MIREQ_B ,Master idle request to the interconnect for DMAC2" "Not requested,Requested" bitfld.long 0x00 6. " SLVRDY_B ,Slave ready for DMAC2 access" "Not ready,Ready" bitfld.long 0x00 5. " RSTN_B ,Active low reset to DMAC2" "Reset,No reset" textline " " bitfld.long 0x00 4. " CLKEN_B ,Clock enable for DMA2_HCLK" "Disabled,Enabled" bitfld.long 0x00 3. " MIREQ_A ,Master idle request to the interconnect for DMAC1" "Not requested,Requested" bitfld.long 0x00 2. " SLVRDY_A ,Slave ready for DMAC1 access" "Not ready,Ready" textline " " bitfld.long 0x00 1. " RSTN_A ,Active low Reset to DMAC1" "Reset,No reset" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for DMA1_HCLK" "Disabled,Enabled" line.long 0x04 "PWRCTRL_NFLASH,Power Management Control For NAND FLASH controller" bitfld.long 0x04 5. " RSTN_B ,Active low reset to NAND Flash controller" "Reset,No reset" bitfld.long 0x04 4. " CLKEN_B ,Clock enable for NAND_ECLK" "Disabled,Enabled" bitfld.long 0x04 3. " MIREQ_A ,AHBM idle request to the interconnect for NAND Flash controller" "Not requested,Requested" textline " " bitfld.long 0x04 2. " SLVRDY_A ,Slave ready for NAND Flash controller access" "Not ready,Ready" bitfld.long 0x04 1. " RSTN_A ,Active low reset to the interconnect NAND Flash controller" "Reset,No reset" bitfld.long 0x04 0. " CLKEN_A ,Clock enable for NAND_HCLK" "Disabled,Enabled" line.long 0x08 "PWRCTRL_QSPI1,Power Management Control For QSPI1" bitfld.long 0x08 5. " RSTN_B ,Active low reset to QuadSPI1" "Reset,No reset" bitfld.long 0x08 4. " CLKEN_B ,Clock enable for QSPI1_REFCLK" "Disabled,Enabled" bitfld.long 0x08 3. " MIREQ_A ,AHBS idle request to the NoC interconnect for QuadSPI1" "Not requested,Requested" textline " " bitfld.long 0x08 2. " SLVRDY_A ,Slave ready for QuadSPI1 access" "Not ready,Ready" bitfld.long 0x08 1. " RSTN_A ,Active low reset to the NoC interconnect for QuadSPI1" "Reset,No reset" bitfld.long 0x08 0. " CLKEN_A ,Clock enable for QSPI1_HCLK and QSPI1_PCLK" "Disabled,Enabled" rgroup.long 0x58++0x0B line.long 0x00 "PWRSTAT_DMA,Power Management Status For DMAC1 & DMAC2" bitfld.long 0x00 5. " MISTAT_B ,AHBM idle status of the NoC interconnect for DMAC2" "Active,Idle" bitfld.long 0x00 4. " MIRACK_B ,AHBM idle request acknowledge for DMAC2" "Not requested,Requested" bitfld.long 0x00 3. " SCON_B ,AHBS NoC interconnection status for DMAC2" "Disconnected,Connected" textline " " bitfld.long 0x00 2. " MISTAT_A ,AHBM idle status of the NoC interconnect for DMAC1" "Active,Idle" bitfld.long 0x00 1. " MIRACK_A ,AHBM idle request acknowledge for DMAC1" "Not requested,Requested" bitfld.long 0x00 0. " SCON_A ,AHBS NoC interconnection status for DMAC1" "Disconnected,Connected" line.long 0x04 "PWRSTAT_NFLASH,Power Management Status For NAND FLASH Controller" bitfld.long 0x04 2. " MISTAT_A ,AHBM idle status of the NoC interconnect for NAND Flash controller" "Active,Idle" bitfld.long 0x04 1. " MIRACK_A ,AHBM idle request acknowledge for NAND Flash controller" "Not requested,Requested" bitfld.long 0x04 0. " SCON_A ,AHBS NoC interconnection status for NAND Flash controller" "Disconnected,Connected" line.long 0x08 "PWRSTAT_QSPI1,Power Management status For QSPI1" bitfld.long 0x08 2. " MISTAT_A ,AHBS idle status of the NoC interconnect for QSPI1" "Active,Idle" bitfld.long 0x08 1. " MIRACK_A ,AHBS idle request acknowledge for QSPI1" "Not Requested,Requested" bitfld.long 0x08 0. " SCON_A ,APBS NoC interconnection status for QSPI1" "Disconnected,Connected" sif CPUIS("R9A06G032-*") group.long 0x64++0x03 line.long 0x00 "PWRCTRL_DDRC,Power Management Control For DDR Memory controller" bitfld.long 0x00 4. " RSTN_B ,Active low reset to DDR Memory controller" "Reset,No reset" bitfld.long 0x00 3. " CLKEN_B ,Clock enable for DDR_DFICLK" "Disabled,Enabled" bitfld.long 0x00 2. " RSTN_A ,Active low reset to the interconnect for DDR Memory controller" "Reset,No reset" textline " " bitfld.long 0x00 1. " MIREQ_A ,Master idle request to the interconnect for DDR Memory controller" "Not requested,Requested" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for DDR_XCLK" "Disabled,Enabled" endif group.long 0x68++0x0B line.long 0x00 "PWRCTRL_EETH,Power Management Control For External Ethernet Clock" bitfld.long 0x00 3. " CLKEN_C ,Clock enable for MII REFCLK" "Disabled,Enabled" bitfld.long 0x00 2. " CLKEN_B ,Clock enable for RMII REFCLK" "Disabled,Enabled" bitfld.long 0x00 1. " CLKEN_A ,Clock enable for RGMII REFCLK" "Disabled,Enabled" line.long 0x04 "PWRCTRL_MAC1,Power Management Control For GMAC1" bitfld.long 0x04 3. " MIREQ_A ,AXIM Idle Request to the NoC interconnect for GMAC1" "Not requested,Requested" bitfld.long 0x04 2. " SLVRDY_A ,Slave ready for GMAC1 access" "Not ready,Ready" bitfld.long 0x04 1. " RSTN_A ,Active low reset to the NoC interconnect for GMAC1" "Reset,No reset" textline " " bitfld.long 0x04 0. " CLKEN_A ,Clock Enable for GMAC1_XCLK and GMAC1_HCLK" "Disabled,Enabled" line.long 0x08 "PWRCTRL_MAC2,Power Management Control For GMAC2" bitfld.long 0x08 3. " MIREQ_A ,Master idle request to the interconnect for GMAC2" "Not requested,Requested" bitfld.long 0x08 2. " SLVRDY_A ,Slave ready for GMAC2 access" "Not ready,Ready" bitfld.long 0x08 1. " RSTN_A ,Active low reset to the interconnect for GMAC2" "Reset,No reset" textline " " bitfld.long 0x08 0. " CLKEN_A ,Clock enable for GMAC2_XCLK and GMAC2_HCLK" "Not requested,Requested" sif CPUIS("R9A06G032-*") rgroup.long 0x74++0x0B line.long 0x00 "PWRSTAT_DDRC,Power Management Status For DDR Memory Controller" bitfld.long 0x00 1. " MISTAT_A ,Idle status of the NoC interconnect for DDR memory controller" "Active,idle" bitfld.long 0x00 0. " MIRACK_A ,Idle request acknowledge for DDR memory controller" "Not requested,Requested" endif rgroup.long 0x78++0x0B line.long 0x00 "PWRSTAT_MAC1,Power Management Status For GMAC1" bitfld.long 0x00 2. " MISTAT_A ,AXIM idle status of the NoC interconnect for GMAC1" "Active,idle" bitfld.long 0x00 1. " MIRACK_A ,AXIM idle request acknowledge for GMAC1" "Not requested,Requested" bitfld.long 0x00 0. " SCON_A ,interconnection status for GMAC1" "Disconnected,Connected" line.long 0x04 "PWRSTAT_MAC2,Power Management Status For GMAC2" bitfld.long 0x04 2. " MISTAT_A ,AXIM idle status of the NoC interconnect for GMAC2" "Active,idle" bitfld.long 0x04 1. " MIRACK_A ,AXIM idle request acknowledge for GMAC2" "Not requested,Requested" bitfld.long 0x04 0. " SCON_A ,AHBS NoC interconnection status for GMAC2" "Disconnected,Connected" group.long 0x80++0x07 line.long 0x00 "PWRCTRL_ECAT,Power Management Control For EtheRCAT" bitfld.long 0x00 5. " CLKEN_C ,Clock enable for ECAT_CLK100" "Disabled,Enabled" bitfld.long 0x00 4. " RSTN_B ,Active low reset to EtheRCAT" "Reset,No reset" bitfld.long 0x00 3. " CLKEN_B ,Clock enable for ECAT_CLK25" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MIREQ_A ,Master idle request to the interconnect for EtheRCAT" "Not requested,Requested" bitfld.long 0x00 1. " RSTN_A ,Active low reset to the interconnect for EtheRCAT" "Reset,No reset" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for ECAT_HCLK" "Disabled,Enabled" line.long 0x04 "PWRCTRL_SERCOS,Power Management Control For SERCOSIII" bitfld.long 0x04 5. " CLKEN_C ,Clock enable for SERCOS_CLK100" "Disabled,Enabled" bitfld.long 0x04 4. " CLKEN_B ,Clock enable for SERCOS_CLK50" "Disabled,Enabled" bitfld.long 0x04 3. " RSTN_B ,Active low Reset to SERCOSIII" "Reset,No reset" textline " " bitfld.long 0x04 2. " RSTN_A ,Active low Reset to the NoC interconnect for SERCOSIII" "Reset,No reset" bitfld.long 0x04 1. " MIREQ_A ,Idle request to the NoC interconnect for SERCOSIII" "Not requested,Requested" bitfld.long 0x04 0. " CLKEN_A ,Clock enable for SERCOS_HCLK " "Disabled,Enabled" rgroup.long 0x88++0x07 line.long 0x00 "PWRSTAT_ECAT,Power Management Status For EtheRCAT" bitfld.long 0x00 1. " MISTAT_A ,Idle status of the NoC interconnect for ETHERCAT" "Active,idle" bitfld.long 0x00 0. " MIRACK_A ,Idle request acknowledge for ETHERCAT" "Not requested,Requested" line.long 0x04 "PWRSTAT_SERCOS,Power Management Status For SERCOSIII" bitfld.long 0x04 1. " MISTAT_A ,Idle status of the NoC interconnect for SERCOSIII" "Active,idle" bitfld.long 0x04 0. " MIRACK_A ,Idle request acknowledge for SERCOSIII" "Not requested,Requested" sif CPUIS("R9A06G032-*") group.long 0x90++0x03 line.long 0x00 "PWRCTRL_HSR,Power Management Control For HSR" bitfld.long 0x00 5. " RSTN_C ,Active low reset to HSR" "Reset,No reset" bitfld.long 0x00 4. " CLKEN_C ,Clock enable for HSR_CLK50" "Disabled,Enabled" bitfld.long 0x00 3. " CLKEN_B ,Clock enable for HSR_CLK100" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RSTN_A ,Active low reset to the NoC interconnect for HSR" "Reset,No reset" bitfld.long 0x00 1. " MIREQ_A ,Idle request to the NoC interconnect for HSR" "Not requested,Requested" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for HSR_HCLK" "Disabled,Enabled" elif cpu()=="R9A06G033-CM3" group.long 0x90++0x03 line.long 0x00 "PWRCTRL_QSPI2,Power Management Control For QSPI2" bitfld.long 0x00 5. " RSTN_B ,Active low reset to QuadSPI2" "Reset,No reset" bitfld.long 0x00 4. " CLKEN_B ,Clock enable for QSPI2_REFCLK" "Disabled,Enabled" bitfld.long 0x00 3. " MIREQ_A ,AHBS idle request to the NoC interconnect for QuadSPI2" "Not requested,Requested" textline " " bitfld.long 0x00 2. " SLVRDY_A ,Slave ready for QuadSPI2 access" "Not ready,Ready" bitfld.long 0x00 1. " RSTN_A ,Active low Reset to the NoC interconnect for QuadSPI2" "Reset,No reset" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for QSPI2_HCLK, QSPI2_PCLK" "Disabled,Enabled" endif sif CPUIS("R9A06G032-*") rgroup.long 0x98++0x03 line.long 0x00 "PWRSTAT_HSR,Power Management Control For HSR" bitfld.long 0x00 1. " MISTAT_A ,Idle status of the NoC interconnect for HSR" "Active,idle" bitfld.long 0x00 0. " MIRACK_A ,Idle request acknowledge for HSR" "Not requested,Requested" elif cpu()=="R9A06G033-CM3" rgroup.long 0x98++0x03 line.long 0x00 "PWRSTAT_QSPI2,Power Management Control For QSPI2" bitfld.long 0x00 2. " MISTAT_A ,AHBS Idle status of the NoC interconnect for QSPI2" "Active,idle" bitfld.long 0x00 1. " MIRACK_A ,AHBS Idle request acknowledge for QSPI2" "Not requested,Requested" bitfld.long 0x00 0. " SCON_A ,APBS NoC interconnection status for QSPI2" "Disconnected,Connected" endif rgroup.long 0x9C++0x03 line.long 0x00 "PWRSTAT_SWITCH,Power Management Status For A5PSW" bitfld.long 0x00 0. " SCON_A ,NoC interconnection status for A5PSW" "Disconnected,Connected" group.long 0xA8++0x03 line.long 0x00 "RSTSTAT,Reset Status Register" eventfld.long 0x00 31. " PORRST_ST ,External power-on reset" "Not performed,Performed" eventfld.long 0x00 6. " SWRST_ST ,Software reset state" "Not performed,Performed" eventfld.long 0x00 5. " CM3SYSRESET_ST ,Cortex-M3 system reset" "Not performed,Performed" textline " " eventfld.long 0x00 4. " CM3LOCKUPRST_ST ,Cortex-M3 Core LockUp system reset" "Not performed,Performed" eventfld.long 0x00 3. " WDM3RST_ST ,Cortex-M3 watchdog reset" "Not performed,Performed" sif cpu()=="R9A06G032-CA7" eventfld.long 0x00 2. " WDA7RST_ST1 ,Cortex-A7 processor1 watchdog reset" "Not performed,Performed" textline " " eventfld.long 0x00 1. " WDA7RST_ST0 ,Cortex-A0 processor1 Watchdog reset" "Not performed,Performed" endif group.long 0xC0++0x03 line.long 0x00 "USBSTAT,Status Information For USBPLL" bitfld.long 0x00 0. " PLL_LOCK ,Status of USBPLL" "Unlocked,Locked" group.long 0xC8++0x03 line.long 0x00 "PWRCTRL_SDIO2,Power Management Control For SDIO2" bitfld.long 0x00 4. " CLKEN_B ,Clock enable for SDIO2_ECLK" "Disabled,Enabled" bitfld.long 0x00 3. " MIREQ_A ,AHBM idle request to the NoC interconnect for SDIO2" "Not requested,Requested" bitfld.long 0x00 2. " SLVRDY_A ,Slave ready for SDIO2 access" "Not ready,Ready" textline " " bitfld.long 0x00 1. " RSTN_A ,Active low reset to the NoC interconnect for SDIO2" "Reset,No reset" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for SDIO2_HCLK" "Disabled,Enabled" rgroup.long 0xCC++0x03 line.long 0x00 "PWRSTAT_SDIO2,Power Management Status for SDIO2" bitfld.long 0x00 2. " MISTAT_A ,AHBM Idle status of the NoC interconnect for SDIO2" "Active,idle" bitfld.long 0x00 1. " MIRACK_A ,AHBM idle request acknowledge for SDIO2" "Not requested,Requested" bitfld.long 0x00 0. " SCON_A ,AHBS NoC interconnection status for SDIO2" "Disconnected,Connected" group.long 0xE8++0x0F line.long 0x00 "PWRCTRL_PG2_25MHZ,Power Management Control For PG2 25MHz" bitfld.long 0x00 8. " SLVRDY_S ,Slave ready for TIMER2 access" "Not ready,Ready" bitfld.long 0x00 7. " RSTN_S ,Active low reset to TIMER2" "Reset,No reset" bitfld.long 0x00 6. " CLKEN_S ,Clock enable for TIMER2_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SLVRDY_R ,Slave ready for TIMER1 access" "Not ready,Ready" bitfld.long 0x00 4. " RSTN_R ,Active low reset to TIMER1" "Reset,No reset" bitfld.long 0x00 3. " CLKEN_R ,Clock enable for TIMER1_PCLK" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SLVRDY_Q ,Slave ready for clock Monitoring/WatchdogSafe[1/2]/ConfigSys2 access" "Not ready,Ready" bitfld.long 0x00 1. " RSTN_Q ,Active low reset to clock Monitoring/Watchdog Safe[1/2]/ConfigSys2" "Reset,No reset" textline " " bitfld.long 0x00 0. " CLKEN_Q ,Clock enable for PG2_PCLK" "Disabled,Enabled" line.long 0x04 "PWRCTRL_PG1_PR2,Power Management Control For PG1 Program2" bitfld.long 0x04 24. " UARTCLKSEL ,Select source of all PG1 UART clocks" "MAIN PLL,USBPLL 48 MHz clock" bitfld.long 0x04 19. " RSTN_AK2 ,Active low reset to USBPLL clock used on UART8" "Reset,No reset" bitfld.long 0x04 18. " CLKEN_AK2 ,Clock enable to USBPLL clock used on UART8" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " RSTN_AK1 ,Active low reset to MAIN PLL clock used on UART8" "Reset,No reset" bitfld.long 0x04 16. " CLKEN_AK1 ,Clock enable to MAIN PLL clock used on UART8" "Disabled,Enabled" bitfld.long 0x04 15. " RSTN_AJ2 ,Active low reset to USBPLL clock used on UART7" "Reset,No reset" textline " " bitfld.long 0x04 14. " CLKEN_AJ2 ,Clock enable to USBPLL clock used on UART7" "Disabled,Enabled" bitfld.long 0x04 13. " RSTN_AJ1 ,Active low reset to MAIN PLL clock used on UART7" "Reset,No reset" bitfld.long 0x04 12. " CLKEN_AJ1 ,Clock enable to MAIN PLL clock used on UART7" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " RSTN_AI2 ,Active low reset to USBPLL clock used on UART6" "Reset,No reset" bitfld.long 0x04 10. " CLKEN_AI2 ,Clock enable to USBPLL clock used on UART6" "Disabled,Enabled" bitfld.long 0x04 9. " RSTN_AI1 ,Active low reset to MAIN PLL clock used on UART6" "Reset,No reset" textline " " bitfld.long 0x04 8. " CLKEN_AI1 ,Clock enable to MAIN PLL clock used on UART6" "Disabled,Enabled" bitfld.long 0x04 7. " RSTN_AH2 ,Active low reset to USBPLL clock used on UART5" "Reset,No reset" bitfld.long 0x04 6. " CLKEN_AH2 ,Clock enable to USBPLL clock used on UART5" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " RSTN_AH1 ,Active low reset to MAIN PLL clock used on UART5" "Reset,No reset" bitfld.long 0x04 4. " CLKEN_AH1 ,Clock enable to MAIN PLL clock used on UART5" "Disabled,Enabled" bitfld.long 0x04 3. " RSTN_AG2 ,Active low reset to USBPLL clock used UART4" "Reset,No reset" textline " " bitfld.long 0x04 2. " CLKEN_AG2 ,Clock enable to USBPLL clock used on UART4" "Disabled,Enabled" bitfld.long 0x04 1. " RSTN_AG1 ,Active low reset to MAIN PLL clock used on uart4" "Reset,No reset" bitfld.long 0x04 0. " CLKEN_AG1 ,Clock enable to MAIN PLL clock used on UART4" "Disabled,Enabled" line.long 0x08 "PWRCTRL_PG3_48MHZ,Power Management Control For PG3 48MHz" bitfld.long 0x08 14. " MIREQ_UF ,Idle request to the NoC interconnect for peripheral group 3" "Not requested,Requested" bitfld.long 0x08 13. " RSTN_UF ,Active low reset to peripheral group 3" "Reset,No reset" bitfld.long 0x08 12. " CLKEN_UF ,Clock enable for peripheral group 3" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " SLVRDY_AA ,Slave ready for CAN2 access" "Not ready,Ready" bitfld.long 0x08 7. " RSTN_AA ,Active low Reset to CAN2" "Reset,No reset" bitfld.long 0x08 6. " CLKEN_AA ,Clock enable for CAN2_HCLK" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " SLVRDY_Z ,Slave ready for CAN1 access" "Not ready,Ready" bitfld.long 0x08 4. " RSTN_Z ,Active low reset to CAN1" "Reset,No reset" bitfld.long 0x08 3. " CLKEN_Z ,Clock enable for CAN1_HCLK" "Disabled,Enabled" line.long 0x0C "PWRCTRL_PG4,Power Management Control For PG4" bitfld.long 0x0C 14. " MIREQ_UI ,Idle Request to the NoC interconnect for peripheral group 4" "Not requested,Requested" bitfld.long 0x0C 13. " RSTN_UI ,Active low reset to peripheral group 4" "Reset,No reset" bitfld.long 0x0C 12. " CLKEN_UI ,Clock enable to peripheral group 4" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " SLVRDY_AD ,Slave ready for Semaphore access" "Not ready,Ready" bitfld.long 0x0C 4. " RSTN_AD ,Active low reset to Semaphore" "Reset,No reset" bitfld.long 0x0C 3. " CLKEN_AD ,Clock enable for SEMAP_HCLK" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " SLVRDY_AC ,Slave ready for LCDC access" "Not ready,Ready" bitfld.long 0x0C 1. " RSTN_AC ,Active low reset to the interconnect for LCDC" "Reset,No reset" bitfld.long 0x0C 0. " CLKEN_AC ,Clock enable for LCD_HCLK" "Disabled,Enabled" group.long 0xFC++0x03 line.long 0x00 "PWRCTRL_PG1_PR3,Power Management Control For PG1 Program3" bitfld.long 0x00 7. " RSTN_AP ,Active low reset to SPI4" "Reset,No reset" bitfld.long 0x00 6. " CLKEN_AP ,Clock enable for SPI4_SCLK" "Disabled,Enabled" bitfld.long 0x00 5. " RSTN_AO ,Active low reset to SPI3" "Reset,No reset" textline " " bitfld.long 0x00 4. " CLKEN_AO ,Clock enable for SPI3_SCLK" "Disabled,Enabled" bitfld.long 0x00 3. " RSTN_AN ,Active low reset to SPI2" "Reset,No reset" bitfld.long 0x00 2. " CLKEN_AN ,Clock enable for SPI2_SCLK" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RSTN_AM ,Active low reset to SPI1" "Reset,No reset" bitfld.long 0x00 0. " CLKEN_AM ,Clock enable for SPI1_SCLK" "Disabled,Enabled" group.long 0x104++0x03 line.long 0x00 "PWRCTRL_PG1_PR4,Power Management Control For PG1 Program4" bitfld.long 0x00 3. " RSTN_AR ,Active low reset to SPI6" "Reset,No reset" bitfld.long 0x00 2. " CLKEN_AR ,Clock enable for SPI6_SCLK" "Disabled,Enabled" bitfld.long 0x00 1. " RSTN_AQ ,Active low reset to SPI5" "Reset,No reset" textline " " bitfld.long 0x00 0. " CLKEN_AQ ,Clock enable for SPI5_SCLK" "Disabled,Enabled" group.long 0x10C++0x03 line.long 0x00 "PWRCTRL_PG4_PR1,Power Management Control For PG4 Program1" bitfld.long 0x00 1. " RSTN_AU ,Active low reset to LCDC" "Reset,No reset" bitfld.long 0x00 0. " CLKEN_AU ,Clock enable for LCD_ECLK" "Disabled,Enabled" group.long 0x120++0x03 line.long 0x00 "RSTEN,Reset Enable Register" bitfld.long 0x00 6. " SWRST_EN ,Enable bit of software reset request" "Disabled,Enabled" bitfld.long 0x00 5. " CM3SYSRESET_EN ,Enable Cortex-M3 SYSRESETREQ initiated reset" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CM3LOCKUPRST_EN ,Enable bit of Cortex-M3 Core LockUp reset" "Disabled,Enabled" bitfld.long 0x00 3. " WDM3RST_EN ,Enable bit of Cortex-M3 Core watchdog reset" "Disabled,Enabled" textline " " sif cpu()=="R9A06G032-CA7" bitfld.long 0x00 2. " WDA7RST_EN1 ,Enable bit of Cortex-A7 watchdog reset processor1" "Disabled,Enabled" bitfld.long 0x00 1. " WDA7RST_EN0 ,Enable bit of Cortex-A7 watchdog reset processor0" "Disabled,Enabled" textline " " elif cpu()=="R9A06G033-CM3" bitfld.long 0x00 1. " WDA7RST_EN0 ,Enable bit of Cortex-A7 watchdog reset processor0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 0. " MRESET_EN ,Enable bit of system reset" "Disabled,Enabled" group.long 0x130++0x03 line.long 0x00 "PWRCTRL_SWITCH,Power Management Control For A5PSW" bitfld.long 0x00 3. " RSTN_B ,Active low reset to A5PSW" "Reset,No reset" bitfld.long 0x00 2. " CLKEN_B ,Clock enable for A5PSW_SXCLK" "Disabled,Enabled" bitfld.long 0x00 1. " SLVRDY_A ,Slave ready for A5PSW access" "Not ready,Ready" textline " " bitfld.long 0x00 0. " CLKEN_A ,Clock enable for A5PSW_HCLK" "Disabled,Enabled" group.long 0x140++0x03 line.long 0x00 "PWRCTRL_RTC,Power Management Control For RTC" bitfld.long 0x00 3. " RSTN_FW_RTC ,Software reset to the interconnect for RTC" "Reset,Reset release" bitfld.long 0x00 2. " IDLE_REQ ,Request idle-status to the interconnect for RTC " "Active,Idle" bitfld.long 0x00 1. " RST_RTC ,Active high reset to RTC-subsystem" "Not reset,Reset" textline " " bitfld.long 0x00 0. " CLKEN_RTC ,Clock enable for RTC_PCLK" "Disabled,Enabled" rgroup.long 0x144++0x03 line.long 0x00 "PWRSTAT_RTC,Power Management Status For RTC" bitfld.long 0x00 2. " PWR_GOOD ,Indicate status of RTC_PWRGOOD signal" "Low,High" bitfld.long 0x00 1. " RTC_IDLE ,Idle status of the interconnect for RTC" "Active,Idle" bitfld.long 0x00 0. " RTC_IACK ,RTC idle request acknowledge for RTC" "Not requested,Requested" group.long 0x154++0x03 line.long 0x00 "PWRCTRL_ROM,Power Management Control For ROM" bitfld.long 0x00 2. " SLVRDY_A ,Slave ready for access" "Not ready,Ready" bitfld.long 0x00 1. " RSTN_A ,Active low reset to ROM" "Reset,No reset" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for ROM_HCLK" "Disabled,Enabled" rgroup.long 0x0158++0x0F line.long 0x00 "PWRSTAT_PG1,Power Management Status For PG1" bitfld.long 0x00 13. " SCON_N ,NoC interconnection status for BGPIO3" "Disconnected,Connected" bitfld.long 0x00 12. " SCON_M ,NoC interconnection status for UART8" "Disconnected,Connected" bitfld.long 0x00 11. " SCON_L ,NoC interconnection status for UART7" "Disconnected,Connected" textline " " bitfld.long 0x00 10. " SCON_K ,NoC interconnection status for UART6" "Disconnected,Connected" bitfld.long 0x00 9. " SCON_J ,NoC interconnection status for UART5" "Disconnected,Connected" bitfld.long 0x00 8. " SCON_I ,NoC interconnection status for UART4" "Disconnected,Connected" textline " " bitfld.long 0x00 7. " SCON_H ,NoC interconnection status for BGPIO2" "Disconnected,Connected" bitfld.long 0x00 6. " SCON_G ,NoC interconnection status for BGPIO1" "Disconnected,Connected" bitfld.long 0x00 5. " SCON_F ,NoC interconnection status for SPI6" "Disconnected,Connected" textline " " bitfld.long 0x00 4. " SCON_E ,NoC interconnection status for SPI5" "Disconnected,Connected" bitfld.long 0x00 3. " SCON_D ,NoC interconnection status for SPI4" "Disconnected,Connected" bitfld.long 0x00 2. " SCON_C ,NoC interconnection status for SPI3" "Disconnected,Connected" textline " " bitfld.long 0x00 1. " SCON_B ,NoC interconnection status for SPI2" "Disconnected,Connected" bitfld.long 0x00 0. " SCON_A ,NoC interconnection status for SPI1" "Disconnected,Connected" line.long 0x04 "PWRSTAT_PG2_25MHZ,Power Management Status For PG2 25MHz" bitfld.long 0x04 2. " SCON_S ,Interconnection status for TIMER2" "Disconnected,Connected" bitfld.long 0x04 1. " SCON_R ,Interconnection status for TIMER1" "Disconnected,Connected" bitfld.long 0x04 0. " SCON_Q ,Interconnection status for clock Monitoring/Watchdog Safe[1/2]/ConfigSys2" "Disconnected,Connected" line.long 0x08 "PWRSTAT_PG3_48MHZ,Power Management Status for PG3 48MHz" bitfld.long 0x08 5. " MISTAT_UF ,Idle status of the NoC interconnect for peripheral group 3" "Not requested,Requested" bitfld.long 0x08 4. " MIRACK_UF ,Idle request acknowledge for peripheral group 3" "Not requested,Requested" bitfld.long 0x08 2. " SCON_AA ,NoC interconnection status for CAN2" "Disconnected,Connected" textline " " bitfld.long 0x08 1. " SCON_Z ,NoC interconnection status for CAN1" "Disconnected,Connected" line.long 0x0C "PWRSTAT_PG4,Power Management Status For PG4" bitfld.long 0x0C 5. " MISTAT_UI ,Idle status of the NoC interconnect for peripheral group 4" "Active,Idle" bitfld.long 0x0C 4. " MIRACK_UI ,Idle request acknowledge for peripheral group 4" "Not requested,Requested" bitfld.long 0x0C 1. " SCON_AD ,NoC interconnection status for semaphore" "Disconnected,Connected" textline " " bitfld.long 0x0C 0. " SCON_AC ,NoC interconnection status for LCDC" "Disconnected,Connected" rgroup.long 0x170++0x03 line.long 0x00 "PWRSTAT_ROM,Power Management Status For ROM" bitfld.long 0x00 0. " SCON_A ,NoC interconnection status for ROM" "Disconnected,Connected" group.long 0x174++0x03 line.long 0x00 "PWRCTRL_CM3,Power Management Control For CM3" bitfld.long 0x00 2. " MIREQ_A ,Idle request to the NoC interconnect for Cortex-M3" "Not requested,Requested" bitfld.long 0x00 1. " RSTN_A ,Active low reset to Cortex-M3" "Reset,No reset" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for CM3_HCLK/CM3_FCLK" "Disabled,Enabled" rgroup.long 0x178++0x0B line.long 0x00 "PWRSTAT_CM3,Power Management Status For CM3" bitfld.long 0x00 1. " MISTAT_A ,Idle status of the NoC interconnect for Cortex-M3" "Active,Idle" bitfld.long 0x00 0. " MIRACK_A ,Idle request acknowledge for Cortex-M3" "Not requested,Requested" line.long 0x04 "PWRSTAT_RINCTRL,Power Management Status For R-IN Engine Accessory Register" bitfld.long 0x04 0. " SCON_A ,Interconnection status for R-IN Engine accessory register" "Disconnected,Connected" line.long 0x08 "PWRSTAT_SWITCHCTRL,Power Management Status For Ethernet Accessory Register" bitfld.long 0x08 0. " SCON_A ,Interconnection status for Ethernet accessory register" "Disconnected,Connected" group.long 0x184++0xB line.long 0x00 "PWRCTRL_RINCTRL,Power Management Control For R-In Engine Accessory Register" bitfld.long 0x00 2. " SLVRDY_A ,Slave ready for R-IN Engine accessory Register access" "Not ready,Ready" bitfld.long 0x00 1. " RSTN_A ,Active low reset to RIN BUS SubSystem" "Reset,No reset" bitfld.long 0x00 0. " CLKEN_A ,Clock enable for RINBUS_HCLK" "Disabled,Enabled" line.long 0x04 "PWRCTRL_SWITCHCTRL,Power Management Control For Ethernet Accessory Register" bitfld.long 0x04 4. " RSTN_ETH ,Active low reset to RGMII/RMII converter (50MHz)" "Reset,No reset" bitfld.long 0x04 3. " RSTN_CLK25 ,Active low reset to RGMII/RMII converter (25MHz)" "Reset,No reset" bitfld.long 0x04 2. " SLVRDY_A ,Slave ready for Ethernet accessory register access" "Not ready,Ready" textline " " bitfld.long 0x04 1. " RSTN_A ,Active low reset to Ethernet accessory register" "Reset,No reset" bitfld.long 0x04 0. " CLKEN_A ,Clock enable to RINEG_HCLK" "Disabled,Enabled" line.long 0x08 "PWRCTRL_HWRTOS,Power Management Control For HW-RTOS" bitfld.long 0x08 2. " CLKEN_B ,Clock enable for HWRtoS_MDCCLK" "Disabled,enabled" bitfld.long 0x08 1. " RSTN_A ,Active low reset to HW-RtoS" "Reset,No reset" bitfld.long 0x08 0. " CLKEN_A ,Clock enable for HWRtoS_CLK" "Disabled,Enabled" group.long 0x198++0x03 line.long 0x00 "RSTCTRL,Reset Control Register" bitfld.long 0x00 6. " SWRST_REQ ,Software reset request" "Not reset,reset" eventfld.long 0x00 5. " CM3SYSRESET_REQ ,Cortex-M3 initiated system reset" "Not reset,Reset" eventfld.long 0x00 4. " CM3LOCKUPRST_REQ ,Cortex-M3 Core LockUp reset request" "Not reset,Reset" textline " " eventfld.long 0x00 3. " WDM3RST_REQ ,Cortex-M3 Core watchdog reset request" "Not reset,Reset" sif cpu()=="R9A06G032-CA7" eventfld.long 0x00 2. " WDA7RST_REQ1 ,Cortex-A7 watchdog reset request processor1" "Not reset,Reset" eventfld.long 0x00 1. " WDA7RST_REQ0 ,Cortex-A7 watchdog reset request processor0" "Not reset,Reset" endif tree "Register Map of System Configuration" group.long 0x00++0x03 line.long 0x00 "CFG_USB,USB Mode Configuration Register" bitfld.long 0x00 2. " FRCLK48MOD ,PLL of USBPHY" "Stops during USB suspend,Operates regardless of USB state" bitfld.long 0x00 1. " H2MODE ,USB interface port setting signal" "Port1 function/Port2 Host,Port1 Host/Port2 Host" bitfld.long 0x00 0. " DIRPD ,Direct power down control" "Powered,Powered down" rgroup.long 0x04++0x03 line.long 0x00 "OPMODE,System And Boot Configuration Register" sif CPUIS("R9A06G032-*") bitfld.long 0x00 6. " LCD1PU ,GPIO pins LCD interface default pull configuration" "Pull-down GPIO[73:62]/[145:127],Pull-up GPIO[73:62]/[145:127]" bitfld.long 0x00 4. " CM3BOOTSEL ,Cortex-M3 Boot mode configuration" "CA7(CA7BOOTSRC),..." textline " " bitfld.long 0x00 2.--3. " CA7BOOTSRC ,Boot mode configuration" "QuadSPI1,NAND Flash,USB function," bitfld.long 0x00 0. " DDRMOD ,DDR controller Configuration" "DDR3,DDR2" textline " " elif cpu()=="R9A06G033-CM3" bitfld.long 0x00 6. " LCD1PU ,GPIO pins LCD interface default pull configuration" "Pull-down GPIO[73:62]/[145:127],Pull-up GPIO[73:62]/[145:127]" bitfld.long 0x00 4. " CM3BOOTSEL ,Cortex-M3 Boot mode configuration" "CA7(CA7BOOTSRC),..." textline " " bitfld.long 0x00 2.--3. " CA7BOOTSRC ,Boot mode configuration" "QuadSPI1,NAND Flash,USB function," else bitfld.long 0x00 4. " CM3BOOTSEL ,Cortex-M3 Boot mode configuration" "CA7(CA7BOOTSRC),CM3(QSPI)" bitfld.long 0x00 2.--3. " CA7BOOTSRC ,Boot mode configuration" "QuadSPI1,NAND Flash,USB function," endif group.long 0x08++0x03 line.long 0x00 "CFG_SDIO[1],SDIO[1] Configuration Register" bitfld.long 0x00 8.--9. " SLOTTYPE ,Slot type" "Removable card slot,Embedded slot for one Device,?..." hexmask.long.byte 0x00 0.--7. 1. " BASECLKFREQ ,Base clock Frequency (MHz)" group.long 0xC4++0x03 line.long 0x00 "CFG_SDIO[2],SDIO[2] Configuration Register" bitfld.long 0x00 8.--9. " SLOTTYPE ,Slot type" "Removable card slot,Embedded slot for one device,?..." hexmask.long.byte 0x00 0.--7. 1. " BASECLKFREQ ,Base clock Frequency (MHz)" group.long 0x14++0x03 line.long 0x00 "DBGCON,Debug Control Register" sif cpu()=="R9A06G032-CA7" bitfld.long 0x00 3. " CA7WD1_DBG_EN ,Control WD1 function while Cortex-A7 is halted" "Enabled,Stopped" bitfld.long 0x00 2. " CA7WD0_DBG_EN ,Control WD0 function while Cortex-A7 is halted" "Enabled,Stopped" textline " " elif cpu()=="R9A06G033-CM3" bitfld.long 0x00 2. " CA7WD0_DBG_EN ,Control WD0 function while Cortex-A7 is halted" "Enabled,Stopped" textline " " endif bitfld.long 0x00 1. " CM3WD_DBG_EN ,Control WD function while Cortex-M3 is halted" "Enabled,Stopped" bitfld.long 0x00 0. " PR_DBG_EN ,Control Emulation function" "Disabled,Enabled" group.long 0xA4++0x03 line.long 0x00 "CFG_GPIOT_PTEN_1A,GPIO Trigger Enable Register" bitfld.long 0x00 31. " PORTEN[31] ,GPIO port trigger 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,GPIO port trigger 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,GPIO port trigger 29 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " [28] ,GPIO port trigger 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,GPIO port trigger 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,GPIO port trigger 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [25] ,GPIO port trigger 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,GPIO port trigger 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,GPIO port trigger 23 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " [22] ,GPIO port trigger 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,GPIO port trigger 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,GPIO port trigger 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,GPIO port trigger 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,GPIO port trigger 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,GPIO port trigger 17 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " [16] ,GPIO port trigger 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,GPIO port trigger 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,GPIO port trigger 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [13] ,GPIO port trigger 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,GPIO port trigger 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,GPIO port trigger 11 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,GPIO port trigger 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,GPIO port trigger 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,GPIO port trigger 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,GPIO port trigger 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,GPIO port trigger 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,GPIO port trigger 5 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " [4] ,GPIO port trigger 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,GPIO port trigger 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,GPIO port trigger 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [1] ,GPIO port trigger 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,GPIO port trigger 0 enable" "Disabled,Enabled" group.long 0xB0++0x03 line.long 0x00 "CFG_GPIOT_PTEN_1B,GPIO Trigger Enable Register" bitfld.long 0x00 31. " PORTEN[31] ,GPIO port trigger 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,GPIO port trigger 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,GPIO port trigger 29 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " [28] ,GPIO port trigger 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,GPIO port trigger 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,GPIO port trigger 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [25] ,GPIO port trigger 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,GPIO port trigger 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,GPIO port trigger 23 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " [22] ,GPIO port trigger 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,GPIO port trigger 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,GPIO port trigger 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,GPIO port trigger 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,GPIO port trigger 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,GPIO port trigger 17 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " [16] ,GPIO port trigger 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,GPIO port trigger 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,GPIO port trigger 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [13] ,GPIO port trigger 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,GPIO port trigger 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,GPIO port trigger 11 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,GPIO port trigger 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,GPIO port trigger 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,GPIO port trigger 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,GPIO port trigger 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,GPIO port trigger 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,GPIO port trigger 5 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " [4] ,GPIO port trigger 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,GPIO port trigger 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,GPIO port trigger 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [1] ,GPIO port trigger 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,GPIO port trigger 0 enable" "Disabled,Enabled" group.long 0xB4++0x03 line.long 0x00 "CFG_GPIOT_PTEN_2A,GPIO Trigger Enable Register" bitfld.long 0x00 31. " PORTEN[31] ,GPIO port trigger 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,GPIO port trigger 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,GPIO port trigger 29 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " [28] ,GPIO port trigger 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,GPIO port trigger 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,GPIO port trigger 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [25] ,GPIO port trigger 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,GPIO port trigger 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,GPIO port trigger 23 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " [22] ,GPIO port trigger 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,GPIO port trigger 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,GPIO port trigger 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,GPIO port trigger 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,GPIO port trigger 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,GPIO port trigger 17 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " [16] ,GPIO port trigger 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,GPIO port trigger 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,GPIO port trigger 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [13] ,GPIO port trigger 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,GPIO port trigger 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,GPIO port trigger 11 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,GPIO port trigger 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,GPIO port trigger 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,GPIO port trigger 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,GPIO port trigger 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,GPIO port trigger 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,GPIO port trigger 5 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " [4] ,GPIO port trigger 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,GPIO port trigger 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,GPIO port trigger 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [1] ,GPIO port trigger 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,GPIO port trigger 0 enable" "Disabled,Enabled" group.long 0xB8++0x03 line.long 0x00 "CFG_GPIOT_PTEN_2B,GPIO Trigger Enable Register" bitfld.long 0x00 31. " PORTEN[31] ,GPIO port trigger 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,GPIO port trigger 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,GPIO port trigger 29 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " [28] ,GPIO port trigger 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,GPIO port trigger 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,GPIO port trigger 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [25] ,GPIO port trigger 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,GPIO port trigger 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,GPIO port trigger 23 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " [22] ,GPIO port trigger 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,GPIO port trigger 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,GPIO port trigger 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,GPIO port trigger 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,GPIO port trigger 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,GPIO port trigger 17 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " [16] ,GPIO port trigger 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,GPIO port trigger 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,GPIO port trigger 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [13] ,GPIO port trigger 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,GPIO port trigger 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,GPIO port trigger 11 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,GPIO port trigger 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,GPIO port trigger 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,GPIO port trigger 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,GPIO port trigger 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,GPIO port trigger 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,GPIO port trigger 5 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " [4] ,GPIO port trigger 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,GPIO port trigger 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,GPIO port trigger 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [1] ,GPIO port trigger 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,GPIO port trigger 0 enable" "Disabled,Enabled" group.long 0xD8++0x07 line.long 0x00 "CFG_GPIOT_PTEN_3A,GPIO Trigger Enable Register" bitfld.long 0x00 31. " PORTEN[31] ,GPIO port trigger 31 enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,GPIO port trigger 30 enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,GPIO port trigger 29 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " [28] ,GPIO port trigger 28 enable" "Disabled,Enabled" bitfld.long 0x00 27. " [27] ,GPIO port trigger 27 enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,GPIO port trigger 26 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " [25] ,GPIO port trigger 25 enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,GPIO port trigger 24 enable" "Disabled,Enabled" bitfld.long 0x00 23. " [23] ,GPIO port trigger 23 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " [22] ,GPIO port trigger 22 enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,GPIO port trigger 21 enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,GPIO port trigger 20 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,GPIO port trigger 19 enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,GPIO port trigger 18 enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,GPIO port trigger 17 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " [16] ,GPIO port trigger 16 enable" "Disabled,Enabled" bitfld.long 0x00 15. " [15] ,GPIO port trigger 15 enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,GPIO port trigger 14 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " [13] ,GPIO port trigger 13 enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,GPIO port trigger 12 enable" "Disabled,Enabled" bitfld.long 0x00 11. " [11] ,GPIO port trigger 11 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " [10] ,GPIO port trigger 10 enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,GPIO port trigger 9 enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,GPIO port trigger 8 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,GPIO port trigger 7 enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,GPIO port trigger 6 enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,GPIO port trigger 5 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " [4] ,GPIO port trigger 4 enable" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,GPIO port trigger 3 enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,GPIO port trigger 2 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " [1] ,GPIO port trigger 1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,GPIO port trigger 0 enable" "Disabled,Enabled" line.long 0x04 "CFG_GPIOT_PTEN_3B,GPIO Trigger Enable Register" bitfld.long 0x04 9. " PORTEN[9] ,GPIO port trigger 9 enable" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,GPIO port trigger 8 enable" "Disabled,Enabled" bitfld.long 0x04 7. " [7] ,GPIO port trigger 7 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " [6] ,GPIO port trigger 6 enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,GPIO port trigger 5 enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,GPIO port trigger 4 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " [3] ,GPIO port trigger 3 enable" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,GPIO port trigger 2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,GPIO port trigger 1 enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " [0] ,GPIO port trigger 0 enable" "Disabled,Enabled" group.long 0xBC++0x03 line.long 0x00 "CFG_GPIOT_TSRC,GPIO Trigger Source Select Register" bitfld.long 0x00 24.--28. " TRIG3 ,GPIO trigger source select for TRIGGER[3]" "GPIO_TRIGGER[0],GPIO_TRIGGER[1],GPIO_TRIGGER[2],GPIO_TRIGGER[3],?..." bitfld.long 0x00 16.--20. " TRIG2 ,GPIO trigger source select for TRIGGER[2]" "GPIO_TRIGGER[0],GPIO_TRIGGER[1],GPIO_TRIGGER[2],GPIO_TRIGGER[3],?..." bitfld.long 0x00 8.--12. " TRIG1 ,GPIO trigger source select for TRIGGER[1]" "GPIO_TRIGGER[0],GPIO_TRIGGER[1],GPIO_TRIGGER[2],GPIO_TRIGGER[3],?..." textline " " bitfld.long 0x00 0.--4. " TRIG0 ,GPIO trigger source select for TRIGGER[0]" "GPIO_TRIGGER[0],GPIO_TRIGGER[1],GPIO_TRIGGER[2],GPIO_TRIGGER[3],?..." group.long 0xA0++0x03 line.long 0x00 "CFG_DMAMUX,DMA1 & DMA2 Multiplexer Register" bitfld.long 0x00 31. " D2MX[15] ,DMA2 request15 multiplexer" "TIMER2_SubTimer7,ADC_DMA_request[1]" bitfld.long 0x00 30. " [14] ,DMA2 request14 multiplexer" "S3_DIVCLK,ADC_DMA_request[0]" bitfld.long 0x00 29. " [13] ,DMA2 request13 Multiplexer" " S3_CONCLK,MSEBI_DMA_request[3]" textline " " bitfld.long 0x00 28. " [12] ,DMA2 request12 multiplexer" "MAC_TRIG[1],MSEBI_DMA_request[2]" bitfld.long 0x00 27. " [11] ,DMA2 request11 multiplexer" "MAC_PPS[1],MSEBI_DMA_request[1]" bitfld.long 0x00 26. " [10] ,DMA2 request10 multiplexer" "MAC_PPS[0],MSEBI_DMA_request[0]" textline " " bitfld.long 0x00 25. " [9] ,DMA2 request9 multiplexer" "CAT_SYNC1\SERCOS3_Int[1]," bitfld.long 0x00 24. " [8] ,DMA2 request8 multiplexer" "CAT_SYNC0\SERCOS3_Int[0]," bitfld.long 0x00 23. " [7] ,DMA2 request7 multiplexer" "TIMER2_SubTimer6," textline " " bitfld.long 0x00 22. " [6] ,DMA2 request6 multiplexer" "S3_DIVCLK," bitfld.long 0x00 21. " [5] ,DMA2 request5 multiplexer" "S3_CONCLK,UART8_TX" bitfld.long 0x00 20. " [4] ,DMA2 request4 multiplexer" "MAC_TRIG[1],UART8_RX" textline " " bitfld.long 0x00 19. " [3] ,DMA2 request3 multiplexer" "MAC_PPS[1],SPI6_TX" bitfld.long 0x00 18. " [2] ,DMA2 request2 multiplexer" "MAC_PPS[0],SPI6_RX" bitfld.long 0x00 17. " [1] ,DMA2 request1 multiplexer" "CAT_SYNC1\SERCOS3_Int[1],SPI5_TX" textline " " bitfld.long 0x00 16. " [0] ,DMA2 request0 multiplexer" "CAT_SYNC0\SERCOS3_Int[0],SPI5_RX" textline " " bitfld.long 0x00 15. " D1MX[15] ,DMA1 request15 multiplexer" "TIMER1_SubTimer7,SPI4_TX" bitfld.long 0x00 14. " [14] ,DMA1 request14 multiplexer" "S3_DIVCLK,SPI4_RX" textline " " bitfld.long 0x00 13. " [13] ,DMA1 request13 multiplexer" "S3_CONCLK,SPI3_TX" bitfld.long 0x00 12. " [12] ,DMA1 request12 multiplexer" "MAC_TRIG[1],SPI3_RX" bitfld.long 0x00 11. " [11] ,DMA1 request11 multiplexer" "MAC_PPS[1],SPI2_TX" textline " " bitfld.long 0x00 10. " [10] ,DMA1 request10 multiplexer" "MAC_PPS[0],SPI2_RX" bitfld.long 0x00 9. " [9] ,DMA1 request9 multiplexer" "CAT_SYNC1\SERCOS3_Int[1],SPI1_TX" textline " " bitfld.long 0x00 8. " [8] ,DMA1 request8 multiplexer" "CAT_SYNC0\SERCOS3_Int[0],SPI1_RX" bitfld.long 0x00 7. " [7] ,DMA1 request7 multiplexer" "TIMER1_SubTimer6,UART7_TX" bitfld.long 0x00 6. " [6] ,DMA1 request6 multiplexer" "S3_DIVCLK,UART7_RX" textline " " bitfld.long 0x00 5. " [5] ,DMA1 request5 multiplexer" "S3_CONCLK,UART6_TX" bitfld.long 0x00 4. " [4] ,DMA1 request4 multiplexer" "MAC_TRIG[1],UART6_RX" bitfld.long 0x00 3. " [3] ,DMA1 request3 multiplexer" "MAC_PPS[1],UART5_TX" textline " " bitfld.long 0x00 2. " [2] ,DMA1 request2 multiplexer" "MAC_PPS[0],UART5_RX" bitfld.long 0x00 1. " [1] ,DMA1 request1 multiplexer" "CAT_SYNC1\SERCOS3_Int[1],UART4_TX" textline " " bitfld.long 0x00 0. " [0] ,DMA1 request0 multiplexer" "CAT_SYNC0\SERCOS3_Int[0],UART4_RX" rgroup.long 0x19C++0x03 line.long 0x00 "VERSION,Product Version Register" bitfld.long 0x00 8. " PROD ,Product" "RZN1D,RZN1S/RZN1L" sif cpu()=="R9A06G032-CA7" group.long 0x204++0x03 line.long 0x00 "BOOTADDR, Cortex-A7 processor1 Boot Address Configuration Register" endif tree.end width 0x0B tree.end tree "2MB SRAM" base ad:0x400F3000 width 12. sif cpuis("R9A06G0*") if (((per.l(ad:0x4000C184))&0x03)==0x03) group.long 0x00++0x03 line.long 0x00 "RAMPCMD,RAM_SYS Protect Command Register" bitfld.long 0x00 0. " PROTREL ,Write access to protection registers" "Not permitted,Permitted" if (((per.l(ad:0x400F3000))&0x00000001)==0x00000001) group.long 0x100++0x07 line.long 0x00 "RAMEDC,RAM_SYS ECC Decoder Config Register" bitfld.long 0x00 0. " ECC_ENABLE ,ECC decoder enable" "Disabled,Enabled" line.long 0x04 "RAMEEC, RAM_SYS ECC Encoder Config Register" bitfld.long 0x04 15. " DBE_DIST[15] ,ECC error injection enable of data RAM BANK1 WAY3" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,ECC error injection enable of data RAM BANK1 WAY2" "Disabled,Enabled" bitfld.long 0x04 13. " [13] ,ECC error injection enable of data RAM BANK1 WAY1" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,ECC error injection enable of data RAM BANK1 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " [11] ,ECC error injection enable of data RAM BANK0 WAY3" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,ECC error injection enable of data RAM BANK0 WAY2" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,ECC error injection enable of data RAM BANK0 WAY1" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,ECC error injection enable of data RAM BANK0 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,ECC error injection enable of instruction RAM BANK1 WAY3" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,ECC error injection enable of instruction RAM BANK1 WAY2" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,ECC error injection enable of instruction RAM BANK1 WAY1" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,ECC error injection enable of instruction RAM BANK1 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " [3] ,ECC error injection enable of instruction RAM BANK0 WAY3" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,ECC error injection enable of instruction RAM BANK0 WAY2" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,ECC error injection enable of instruction RAM BANK0 WAY1" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,ECC error injection enable of instruction RAM BANK0 WAY0" "Disabled,Enabled" textline " " else rgroup.long 0x100++0x07 line.long 0x00 "RAMEDC,RAM_SYS ECC Decoder Config Register" bitfld.long 0x00 0. " ECC_ENABLE ,ECC decoder enable" "Disabled,Enabled" line.long 0x04 "RAMEEC, RAM_SYS ECC Encoder Config Register" bitfld.long 0x04 15. " DBE_DIST[15] ,ECC error injection enable of data RAM BANK1 WAY3" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,ECC error injection enable of data RAM BANK1 WAY2" "Disabled,Enabled" bitfld.long 0x04 13. " [13] ,ECC error injection enable of data RAM BANK1 WAY1" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,ECC error injection enable of data RAM BANK1 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " [11] ,ECC error injection enable of data RAM BANK0 WAY3" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,ECC error injection enable of data RAM BANK0 WAY2" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,ECC error injection enable of data RAM BANK0 WAY1" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,ECC error injection enable of data RAM BANK0 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,ECC error injection enable of instruction RAM BANK1 WAY3" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,ECC error injection enable of instruction RAM BANK1 WAY2" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,ECC error injection enable of instruction RAM BANK1 WAY1" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,ECC error injection enable of instruction RAM BANK1 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " [3] ,ECC error injection enable of instruction RAM BANK0 WAY3" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,ECC error injection enable of instruction RAM BANK0 WAY2" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,ECC error injection enable of instruction RAM BANK0 WAY1" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,ECC error injection enable of instruction RAM BANK0 WAY0" "Disabled,Enabled" textline " " endif rgroup.long 0x108++0x0B line.long 0x00 "RAMDBEST,RAM_SYS Double Bit ECC Error Status Register" bitfld.long 0x00 15. " DBE_RAM[15] ,ECC double bit error detection flag of data RAM BANK1 WAY3" "Not occurred,Occurred" bitfld.long 0x00 14. " [14] ,ECC double bit error detection flag of data RAM BANK1 WAY2" "Not occurred,Occurred" bitfld.long 0x00 13. " [13] ,ECC double bit error detection flag of data RAM BANK1 WAY1" "Not occurred,Occurred" bitfld.long 0x00 12. " [12] ,ECC double bit error detection flag of data RAM BANK1 WAY0" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " [11] ,ECC double bit error detection flag of data RAM BANK0 WAY3" "Not occurred,Occurred" bitfld.long 0x00 10. " [10] ,ECC double bit error detection flag of data RAM BANK0 WAY2" "Not occurred,Occurred" bitfld.long 0x00 9. " [9] ,ECC double bit error detection flag of data RAM BANK0 WAY1" "Not occurred,Occurred" bitfld.long 0x00 8. " [8] ,ECC double bit error detection flag of data RAM BANK0 WAY0" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " [7] ,ECC double bit error detection flag of instruction RAM BANK1 WAY3" "Not occurred,Occurred" bitfld.long 0x00 6. " [6] ,ECC double bit error detection flag of instruction RAM BANK1 WAY2" "Not occurred,Occurred" bitfld.long 0x00 5. " [5] ,ECC double bit error detection flag of instruction RAM BANK1 WAY1" "Not occurred,Occurred" bitfld.long 0x00 4. " [4] ,ECC double bit error detection flag of instruction RAM BANK1 WAY0" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " [3] ,ECC double bit error detection flag of instruction RAM BANK0 WAY3" "Not occurred,Occurred" bitfld.long 0x00 2. " [2] ,ECC double bit error detection flag of instruction RAM BANK0 WAY2" "Not occurred,Occurred" bitfld.long 0x00 1. " [1] ,ECC double bit error detection flag of instruction RAM BANK0 WAY1" "Not occurred,Occurred" bitfld.long 0x00 0. " [0] ,ECC double bit error detection flag of instruction RAM BANK0 WAY0" "Not occurred,Occurred" line.long 0x04 "RAMDBEAD,RAM_SYS Double Bit ECC Error Address Register" bitfld.long 0x04 19.--20. " BANK ,ECC 2-bit error BANK" "Instruction RAM BANK0,Instruction RAM BANK1,Data RAM BANK0,Data RAM BANK1" hexmask.long.tbyte 0x04 2.--18. 1. " ADDRESS ,ECC 2-bit error address" bitfld.long 0x04 0. " LOCK ,Lock Enable" "Unlocked,Locked" line.long 0x08 "RAMDBECNT,RAM_SYS Double Bit ECC Error Counter Register" bitfld.long 0x08 0.--3. " ERRCOUNT ,Double bit ECC error counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hgroup.long 0x00++0x03 hide.long 0x00 "RAMPCMD,RAM_SYS Protect Command Register" hgroup.long 0x100++0x03 hide.long 0x00 "RAMEDC,RAM_SYS ECC Decoder Config Register" hgroup.long 0x104++0x03 hide.long 0x00 "RAMEEC, RAM_SYS ECC Encoder Config Register" hgroup.long 0x108++0x03 hide.long 0x00 "RAMDBEST,RAM_SYS Double Bit ECC Error Status Register" hgroup.long 0x10C++0x03 hide.long 0x00 "RAMDBEAD,RAM_SYS Double Bit ECC Error Address Register" hgroup.long 0x110++0x03 hide.long 0x00 "RAMDBECNT,RAM_SYS Double Bit ECC Error Counter Register" endif else group.long 0x00++0x03 line.long 0x00 "RAMPCMD,RAM_SYS Protect Command Register" bitfld.long 0x00 0. " PROTREL ,Write access to protection registers" "Not permitted,Permitted" if (((per.l(ad:0x400F3000))&0x00000001)==0x00000001) group.long 0x100++0x07 line.long 0x00 "RAMEDC,RAM_SYS ECC Decoder Config Register" bitfld.long 0x00 0. " ECC_ENABLE ,ECC decoder enable" "Disabled,Enabled" line.long 0x04 "RAMEEC, RAM_SYS ECC Encoder Config Register" bitfld.long 0x04 15. " DBE_DIST[15] ,ECC error injection enable of data RAM BANK1 WAY3" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,ECC error injection enable of data RAM BANK1 WAY2" "Disabled,Enabled" bitfld.long 0x04 13. " [13] ,ECC error injection enable of data RAM BANK1 WAY1" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,ECC error injection enable of data RAM BANK1 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " [11] ,ECC error injection enable of data RAM BANK0 WAY3" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,ECC error injection enable of data RAM BANK0 WAY2" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,ECC error injection enable of data RAM BANK0 WAY1" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,ECC error injection enable of data RAM BANK0 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,ECC error injection enable of instruction RAM BANK1 WAY3" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,ECC error injection enable of instruction RAM BANK1 WAY2" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,ECC error injection enable of instruction RAM BANK1 WAY1" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,ECC error injection enable of instruction RAM BANK1 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " [3] ,ECC error injection enable of instruction RAM BANK0 WAY3" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,ECC error injection enable of instruction RAM BANK0 WAY2" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,ECC error injection enable of instruction RAM BANK0 WAY1" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,ECC error injection enable of instruction RAM BANK0 WAY0" "Disabled,Enabled" textline " " else rgroup.long 0x100++0x07 line.long 0x00 "RAMEDC,RAM_SYS ECC Decoder Config Register" bitfld.long 0x00 0. " ECC_ENABLE ,ECC decoder enable" "Disabled,Enabled" line.long 0x04 "RAMEEC, RAM_SYS ECC Encoder Config Register" bitfld.long 0x04 15. " DBE_DIST[15] ,ECC error injection enable of data RAM BANK1 WAY3" "Disabled,Enabled" bitfld.long 0x04 14. " [14] ,ECC error injection enable of data RAM BANK1 WAY2" "Disabled,Enabled" bitfld.long 0x04 13. " [13] ,ECC error injection enable of data RAM BANK1 WAY1" "Disabled,Enabled" bitfld.long 0x04 12. " [12] ,ECC error injection enable of data RAM BANK1 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " [11] ,ECC error injection enable of data RAM BANK0 WAY3" "Disabled,Enabled" bitfld.long 0x04 10. " [10] ,ECC error injection enable of data RAM BANK0 WAY2" "Disabled,Enabled" bitfld.long 0x04 9. " [9] ,ECC error injection enable of data RAM BANK0 WAY1" "Disabled,Enabled" bitfld.long 0x04 8. " [8] ,ECC error injection enable of data RAM BANK0 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " [7] ,ECC error injection enable of instruction RAM BANK1 WAY3" "Disabled,Enabled" bitfld.long 0x04 6. " [6] ,ECC error injection enable of instruction RAM BANK1 WAY2" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,ECC error injection enable of instruction RAM BANK1 WAY1" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,ECC error injection enable of instruction RAM BANK1 WAY0" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " [3] ,ECC error injection enable of instruction RAM BANK0 WAY3" "Disabled,Enabled" bitfld.long 0x04 2. " [2] ,ECC error injection enable of instruction RAM BANK0 WAY2" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,ECC error injection enable of instruction RAM BANK0 WAY1" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,ECC error injection enable of instruction RAM BANK0 WAY0" "Disabled,Enabled" textline " " endif rgroup.long 0x108++0x0B line.long 0x00 "RAMDBEST,RAM_SYS Double Bit ECC Error Status Register" bitfld.long 0x00 15. " DBE_RAM[15] ,ECC double bit error detection flag of data RAM BANK1 WAY3" "Not occurred,Occurred" bitfld.long 0x00 14. " [14] ,ECC double bit error detection flag of data RAM BANK1 WAY2" "Not occurred,Occurred" bitfld.long 0x00 13. " [13] ,ECC double bit error detection flag of data RAM BANK1 WAY1" "Not occurred,Occurred" bitfld.long 0x00 12. " [12] ,ECC double bit error detection flag of data RAM BANK1 WAY0" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " [11] ,ECC double bit error detection flag of data RAM BANK0 WAY3" "Not occurred,Occurred" bitfld.long 0x00 10. " [10] ,ECC double bit error detection flag of data RAM BANK0 WAY2" "Not occurred,Occurred" bitfld.long 0x00 9. " [9] ,ECC double bit error detection flag of data RAM BANK0 WAY1" "Not occurred,Occurred" bitfld.long 0x00 8. " [8] ,ECC double bit error detection flag of data RAM BANK0 WAY0" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " [7] ,ECC double bit error detection flag of instruction RAM BANK1 WAY3" "Not occurred,Occurred" bitfld.long 0x00 6. " [6] ,ECC double bit error detection flag of instruction RAM BANK1 WAY2" "Not occurred,Occurred" bitfld.long 0x00 5. " [5] ,ECC double bit error detection flag of instruction RAM BANK1 WAY1" "Not occurred,Occurred" bitfld.long 0x00 4. " [4] ,ECC double bit error detection flag of instruction RAM BANK1 WAY0" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " [3] ,ECC double bit error detection flag of instruction RAM BANK0 WAY3" "Not occurred,Occurred" bitfld.long 0x00 2. " [2] ,ECC double bit error detection flag of instruction RAM BANK0 WAY2" "Not occurred,Occurred" bitfld.long 0x00 1. " [1] ,ECC double bit error detection flag of instruction RAM BANK0 WAY1" "Not occurred,Occurred" bitfld.long 0x00 0. " [0] ,ECC double bit error detection flag of instruction RAM BANK0 WAY0" "Not occurred,Occurred" line.long 0x04 "RAMDBEAD,RAM_SYS Double Bit ECC Error Address Register" sif cpuis("R7S910*") bitfld.long 0x04 18.--19. " BANK ,ECC 2-bit error BANK" "Instruction RAM BANK0,Instruction RAM BANK1,Data RAM BANK0,Data RAM BANK1" hexmask.long.word 0x04 2.--17. 1. " ADDRESS ,ECC 2-bit error address" else bitfld.long 0x04 19.--20. " BANK ,ECC 2-bit error BANK" "Instruction RAM BANK0,Instruction RAM BANK1,Data RAM BANK0,Data RAM BANK1" hexmask.long.tbyte 0x04 2.--18. 1. " ADDRESS ,ECC 2-bit error address" endif bitfld.long 0x04 0. " LOCK ,Lock Enable" "Unlocked,Locked" line.long 0x08 "RAMDBECNT,RAM_SYS Double Bit ECC Error Counter Register" bitfld.long 0x08 0.--3. " ERRCOUNT ,Double bit ECC error counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0B tree.end sif cpu()!="R9A06G032-CA7" tree "4MB SRAM" base ad:0x80400000 width 11. group.long 0x00++0x03 line.long 0x00 "SR4PCMD,SRAM 4MB Protect Command Register" bitfld.long 0x00 0. " PROTREL ,Write access to protection registers" "Not permitted,Permitted" if (((per.l(ad:0x80400000))&0x00000001)==0x00000001) group.long 0x100++0x07 line.long 0x00 "SR4EDC,SRAM 4MB ECC Decoder Config Register" bitfld.long 0x00 0. " ECC_ENABLE ,ECC decoder enable" "Disabled,Enabled" line.long 0x04 "SR4EEC,SRAM 4MB ECC Encoder Config Register" bitfld.long 0x04 3. " DBE_DIST3 ,ECC error injection enable of 4MB SRAM Area3" "Disabled,Enabled" bitfld.long 0x04 2. " DBE_DIST2 ,ECC error injection enable of 4MB SRAM Area2" "Disabled,Enabled" bitfld.long 0x04 1. " DBE_DIST1 ,ECC error injection enable of 4MB SRAM Area1" "Disabled,Enabled" bitfld.long 0x04 0. " DBE_DIST0 ,ECC error injection enable of 4MB SRAM Area0" "Disabled,Enabled" else rgroup.long 0x100++0x07 line.long 0x00 "SR4EDC,SRAM 4MB ECC Decoder Config Register" bitfld.long 0x00 0. " ECC_ENABLE ,ECC decoder enable" "Disabled,Enabled" line.long 0x04 "SR4EEC,SRAM 4MB ECC Encoder Config Register" bitfld.long 0x04 3. " DBE_DIST3 ,ECC error injection enable of 4MB SRAM Area3" "Disabled,Enabled" bitfld.long 0x04 2. " DBE_DIST2 ,ECC error injection enable of 4MB SRAM Area2" "Disabled,Enabled" bitfld.long 0x04 1. " DBE_DIST1 ,ECC error injection enable of 4MB SRAM Area1" "Disabled,Enabled" bitfld.long 0x04 0. " DBE_DIST0 ,ECC error injection enable of 4MB SRAM Area0" "Disabled,Enabled" endif rgroup.long 0x108++0x0B line.long 0x00 "SR4DBEST,SRAM 4MB Double Bit ECC Error Status Register" bitfld.long 0x00 3. " DBE_RAM3 ,ECC double bit error detection flag of 4MB SRAM Area3" "Not occurred,Occurred" bitfld.long 0x00 2. " DBE_RAM2 ,ECC double bit error detection flag of 4MB SRAM Area2" "Not occurred,Occurred" bitfld.long 0x00 1. " DBE_RAM1 ,ECC double bit error detection flag of 4MB SRAM Area1" "Not occurred,Occurred" bitfld.long 0x00 0. " DBE_RAM0 ,ECC double bit error detection flag of 4MB SRAM Area0" "Not occurred,Occurred" line.long 0x04 "SR4DBEAD,SRAM 4MB Double Bit ECC Error Address Register" hexmask.long.tbyte 0x04 4.--21. 1. " ADDRESS ,ECC 2-bit Error Address" bitfld.long 0x04 0. " LOCK ,Lock Enable" "Disabled,Enabled" line.long 0x08 "SR4DBECNT,SRAM 4MB Double Bit ECC Error Counter Register" bitfld.long 0x08 0.--3. " ERRCOUNT ,Double bit ECC error counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end endif sif cpuis("R9A06G032-*") tree "DDR2/3 (DDR2/3 Controller)" base ad:0x4000D000 width 14. tree "DDR Controller Register" group.long 0x00++0x03 line.long 0x00 "DDR_CTL_00,DDR-Controller Status & Control 00" hexmask.long.word 0x00 16.--31. 1. " VERSION ,Holds the controller version number" bitfld.long 0x00 8.--11. " DRAM_CLASS ,Defines the mode of operation of the controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " START ,Initiate command processing in the controller" "Stopped,Started" rgroup.long 0x04++0x07 line.long 0x00 "DDR_CTL_01,DDR-Controller Status & Control 01" hexmask.long.byte 0x00 24.--31. 1. " READ_DATA_FIFO_DEPTH ,Reports the depth of the controller core read data queue" bitfld.long 0x00 16.--17. " MAX_CS_REG ,Holds the maximum number of chip selects available" "0,1,2,3" textline " " bitfld.long 0x00 8.--11. " MAX_COL_REG ,Holds the maximum width of column address in DRAMs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. " MAX_ROW_REG ,Holds the maximum width of memory address bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DDR_CTL_02,DDR-Controller Status & Control 02" hexmask.long.byte 0x04 24.--31. 1. " ASYNC_CDC_STAGES ,Number of stages used for synchronizer" hexmask.long.byte 0x04 16.--23. 1. " WRITE_DATA_FIFO_PTR_WIDTH ,Width of the controller core write data latency queue pointer" textline " " hexmask.long.byte 0x04 8.--15. 1. " WRITE_DATA_FIFO_DEPTH ,Depth of the controller core write data latency queue." hexmask.long.byte 0x04 0.--7. 1. " READ_DATA_FIFO_PTR_WIDTH ,Width of the controller core read data queue pointer" group.long 0xC++0x03 line.long 0x00 "DDR_CTL_03,DDR-Controller Status & Control 03" hexmask.long.byte 0x00 24.--31. 1. " AXI0_WRCMD_PROC_FIFO_LOG2_DEPTH ,Depth of the AXI port 0 Write Command Processing FIFO" hexmask.long.byte 0x00 16.--23. 1. " AXI0_WRFIFO_LOG2_DEPTH ,Depth of the AXI port 0 Write Data FIFO" textline " " hexmask.long.byte 0x00 8.--15. 1. " AXI0_RDFIFO_LOG2_DEPTH ,Depth of the AXI port 0 Read Data FIFO" hexmask.long.byte 0x00 0.--7. 1. " AXI0_CMDFIFO_LOG2_DEPTH ,Depth of the AXI port 0 Command FIFO" group.long 0x10++0x03 line.long 0x00 "DDR_CTL_04,DDR-Controller Status & Control 04" hexmask.long.byte 0x00 24.--31. 1. " AXI1_WRCMD_PROC_FIFO_LOG2_DEPTH ,Depth of the AXI port 1 Write Command Processing FIFO" hexmask.long.byte 0x00 16.--23. 1. " AXI1_WRFIFO_LOG2_DEPTH ,Depth of the AXI port 1 Write Data FIFO" textline " " hexmask.long.byte 0x00 8.--15. 1. " AXI1_RDFIFO_LOG2_DEPTH ,Depth of the AXI port 1 Read Data FIFO" hexmask.long.byte 0x00 0.--7. 1. " AXI1_CMDFIFO_LOG2_DEPTH ,Depth of the AXI port 1 Command FIFO" group.long 0x14++0x03 line.long 0x00 "DDR_CTL_05,DDR-Controller Status & Control 05" hexmask.long.byte 0x00 24.--31. 1. " AXI2_WRCMD_PROC_FIFO_LOG2_DEPTH ,Depth of the AXI port 2 Write Command Processing FIFO" hexmask.long.byte 0x00 16.--23. 1. " AXI2_WRFIFO_LOG2_DEPTH ,Depth of the AXI port 2 Write Data FIFO" textline " " hexmask.long.byte 0x00 8.--15. 1. " AXI2_RDFIFO_LOG2_DEPTH ,Depth of the AXI port 2 Read Data FIFO" hexmask.long.byte 0x00 0.--7. 1. " AXI2_CMDFIFO_LOG2_DEPTH ,Depth of the AXI port 2 Command FIFO" group.long 0x18++0x03 line.long 0x00 "DDR_CTL_06,DDR-Controller Status & Control 06" hexmask.long.byte 0x00 24.--31. 1. " AXI3_WRCMD_PROC_FIFO_LOG2_DEPTH ,Depth of the AXI port 3 Write Command Processing FIFO" hexmask.long.byte 0x00 16.--23. 1. " AXI3_WRFIFO_LOG2_DEPTH ,Depth of the AXI port 3 Write Data FIFO" textline " " hexmask.long.byte 0x00 8.--15. 1. " AXI3_RDFIFO_LOG2_DEPTH ,Depth of the AXI port 3 Read Data FIFO" hexmask.long.byte 0x00 0.--7. 1. " AXI3_CMDFIFO_LOG2_DEPTH ,Depth of the AXI port 3 Command FIFO" group.long 0x1C++0x7B line.long 0x00 "DDR_CTL_07,DDR-Controller Status & Control 07" hexmask.long.tbyte 0x00 0.--23. 1. " TINIT ,DRAM TINIT value in cycles" line.long 0x04 "DDR_CTL_08,DDR-Controller Status & Control 08" line.long 0x08 "DDR_CTL_09,DDR-Controller Status & Control 09" line.long 0x0C "DDR_CTL_10,DDR-Controller Status & Control 10" hexmask.long.word 0x0C 8.--23. 1. " TCPD ,DRAM TCPD value in cycles" bitfld.long 0x0C 0.--3. " INITAREF ,Number of auto-refresh commands to execute during DRAM initialization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "DDR_CTL_11,DDR-Controller Status & Control 11" bitfld.long 0x10 24.--29. " CASLAT_LIN ,Sets latency from read command send to data receive from/to controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 16. " NO_CMD_INIT ,Disable DRAM commands until the TDLL parameter has expired during initialization" "No,Yes" textline " " hexmask.long.word 0x10 0.--15. 1. " TDLL ,DRAM TDLL value in cycles" line.long 0x14 "DDR_CTL_12,DDR-Controller Status & Control 12" bitfld.long 0x14 24.--28. " TCCD ,DRAM CAS-to-CAS value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 16.--18. " TBST_INT_INTERVAL ,DRAM burst interrupt interval value in cycles" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 8.--12. " ADDITIVE_LAT ,DRAM additive latency value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 0.--4. " WRLAT ,DRAM WRLAT value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "DDR_CTL_13,DDR-Controller Status & Control 13" bitfld.long 0x18 24.--29. " TWTR ,DRAM TWTR value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x18 16.--23. 1. " TRAS_MIN ,DRAM TRAS_MIN value in cycles" textline " " hexmask.long.byte 0x18 8.--15. 1. " TRC ,DRAM TRC value in cycles" hexmask.long.byte 0x18 0.--7. 1. " TRRD ,DRAM TRRD value in cycles" line.long 0x1C "DDR_CTL_14,DDR-Controller Status & Control 14" bitfld.long 0x1C 24.--28. " TMRD ,DRAM TMRD value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 16.--19. " TRTP ,DRAM TRTP value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--13. " TFAW ,DRAM TFAW value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x1C 0.--4. " TRP ,DRAM TRP value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "DDR_CTL_15,DDR-Controller Status & Control 15" hexmask.long.tbyte 0x20 8.--24. 1. " TRAS_MAX ,DRAM TRAS_MAX value in cycles" hexmask.long.byte 0x20 0.--7. 1. " TMOD ,Number of cycles after MRS command and before any other command" line.long 0x24 "DDR_CTL_16,DDR-Controller Status & Control 16" hexmask.long.byte 0x24 24.--31. 1. " TRCD ,DRAM TRCD value in cycles" bitfld.long 0x24 16. " WRITEINTERP ,Allow controller to interrupt a write burst to the DRAMs with a read command" "Prohibited,Allowed" textline " " hexmask.long.byte 0x24 8.--15. 1. " TCKESR ,Minimum CKE low pulse width during a self-refresh" bitfld.long 0x24 0.--2. " TCKE ,Minimum CKE pulse width" "0,1,2,3,4,5,6,7" line.long 0x28 "DDR_CTL_17,DDR-Controller Status & Control 17" bitfld.long 0x28 24. " TRAS_LOCKOUT ,Allow the controller to execute auto pre-charge commands before the TRAS_MIN parameter expires" "Disabled,Enabled" bitfld.long 0x28 16. " CONCURRENTAP ,Allow controller to issue commands to other banks while a bank is in auto pre-charge" "Disabled,Enabled" textline " " bitfld.long 0x28 8. " AP ,Enable auto pre-charge mode of controller" "Disabled,Enabled" bitfld.long 0x28 0.--5. " TWR , DRAM TWR value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x2C "DDR_CTL_18,DDR-Controller Status & Control 18" bitfld.long 0x2C 24. " REG_DIMM_ENABLE ,Enable registered DIMM operation of the controller" "Disabled,Enabled" bitfld.long 0x2C 16.--20. " TRP_AB ,DRAM TRP all bank value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x2C 8.--10. " BSTLEN ,Encoded burst length sent to DRAMs during initialization" ",BL2,BL4,BL8,?..." bitfld.long 0x2C 0.--5. " TDAL ,DRAM TDAL value in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x30 "DDR_CTL_19,DDR-Controller Status & Control 19" bitfld.long 0x30 24. " TREF_ENABLE ,Issue auto-refresh commands to the DRAMs at the interval defined in the TREF parameter" "Disabled,Enabled" bitfld.long 0x30 8. " AREFRESH ,Initiate auto-refresh at the end of the current burst boundary" "Inactive,Active" textline " " bitfld.long 0x30 1. " ADDRESS_MIRRORING_CS1 ,Indicates which chip selects support address mirroring cs1" "Disabled,Enabled" bitfld.long 0x30 0. " ADDRESS_MIRRORING_CS0 ,Indicates which chip selects support address mirroring cs0" "Disabled,Enabled" line.long 0x34 "DDR_CTL_20,DDR-Controller Status & Control 20" hexmask.long.word 0x34 16.--29. 1. " TREF ,DRAM TREF value in cycles" hexmask.long.word 0x34 0.--9. 1. " TRFC ,DRAM TRFC value in cycles" line.long 0x38 "DDR_CTL_21,DDR-Controller Status & Control 21" hexmask.long.word 0x38 0.--13. 1. " TREF_INTERVAL ,Defines the cycles between refreshes to different chip selects" line.long 0x3C "DDR_CTL_22,DDR-Controller Status & Control 22" hexmask.long.word 0x3C 16.--31. 1. " TXPDLL ,DRAM TXPDLL value in cycles" hexmask.long.word 0x3C 0.--15. 1. " TPDEX ,DRAM TPDEX value in cycles" line.long 0x40 "DDR_CTL_23,DDR-Controller Status & Control 23" hexmask.long.word 0x40 16.--31. 1. " TXARDS ,DRAM TXARDS value in cycles" hexmask.long.word 0x40 0.--15. 1. " TXARD ,DRAM TXARD value in cycles" line.long 0x44 "DDR_CTL_24,DDR-Controller Status & Control 24" hexmask.long.word 0x44 16.--31. 1. " TXSNR ,DRAM TXSNR value in cycles" hexmask.long.word 0x44 0.--15. 1. " TXSR ,DRAM TXSR value in cycles" line.long 0x48 "DDR_CTL_25,DDR-Controller Status & Control 25" bitfld.long 0x48 24.--26. " CKE_DELAY ,Additional cycles to delay CKE for status reporting" "0,1,2,3,4,5,6,7" bitfld.long 0x48 16. " ENABLE_QUICK_SREFRESH ,Allow user to interrupt memory initialization to enter self-refresh mode""Prohibited,Allowed" textline " " bitfld.long 0x48 8. " SREFRESH_EXIT_NO_REFRESH ,Disables the automatic refresh request associated with self-refresh exit" "No,Yes" bitfld.long 0x48 0. " PWRUP_SREFRESH_EXIT ,Allow powerup via self-refresh instead of full memory initialization" "Disabled,Enabled" line.long 0x4C "DDR_CTL_26,DDR-Controller Status & Control 26" bitfld.long 0x4C 31. " LP_CMD[7] ,Lock command" "Not locked,Locked" bitfld.long 0x4C 30. " [6] ,Controller clock gating" "No action,Gated" textline " " bitfld.long 0x4C 29. " [5] ,Memory clock gating" "No action,Gated" bitfld.long 0x4C 26.--28. " [2:4] ,Low power down state" "Activated,Pre-charged,Self-refreshed,?..." textline " " bitfld.long 0x4C 25. " [1] ,Entry command" "No action,Entered" bitfld.long 0x4C 24. " [0] ,Exit command" "No action,Exited" textline " " hexmask.long.byte 0x4C 16.--23. 1. " CKSRX ,Clock stable delay on self-refresh exit" textline " " hexmask.long.byte 0x4C 8.--15. 1. " CKSRE ,Clock hold delay on self-refresh entry" bitfld.long 0x4C 1. " LOWPOWER_REFRESH_ENABLE_CS1 ,Enable refreshes while in low power mode cs1" "Disabled,Enabled" textline " " bitfld.long 0x4C 0. " LOWPOWER_REFRESH_ENABLE_CS0 ,Enable refreshes while in low power mode cs0" "Disabled,Enabled" line.long 0x50 "DDR_CTL_27,DDR-Controller Status & Control 27" bitfld.long 0x50 26. " LP_AUTO_EXIT_EN_0 ,Enable auto exit from each of the low power states/controls power-down" "Disabled,Enabled" bitfld.long 0x50 25. " LP_AUTO_EXIT_EN_1 ,Enable auto exit from each of the low power states/controls self-refresh" "Disabled,Enabled" textline " " bitfld.long 0x50 24. " LP_AUTO_EXIT_EN_2 ,Enable auto exit from each of the low power states/controls self-refresh with memory and controller clock gating" "Disabled,Enabled" bitfld.long 0x50 18. " LP_AUTO_ENTRY_EN_0 ,Enable auto entry into each of the low power states/controls power-down" "Disabled,Enabled" textline " " bitfld.long 0x50 17. " LP_AUTO_ENTRY_EN_1 ,Enable auto entry into each of the low power states/controls self-refresh" "Disabled,Enabled" bitfld.long 0x50 16. " LP_AUTO_ENTRY_EN_2 ,Enable auto entry into each of the low power states/controls self-refresh with memory and controller clock gating" "Disabled,Enabled" textline " " rbitfld.long 0x50 11. " LP_ARB_STATE[1] ,Active lock on the arbiter" "No active,Active" rbitfld.long 0x50 8.--10. " LP_ARB_STATE[0] ,Indicate which interface has control of the low power control module" "Idle,Software programmable interface,Automatic interface,Dynamic power,In control,?..." textline " " rbitfld.long 0x50 5. " LP_STATE_[1] ,Valid bit" "Invalid,Valid" textline " " rbitfld.long 0x50 0.--4. " LP_STATE_[0] ,Holds the state of the DRAM memories" "Invalid/Idle,Active Power-Down,,Pre-Charge Power-Down,,Self-Refresh,Self-Refresh with Memory Clock Gating,Self-Refresh with Memory and Controller Clock Gating,?..." line.long 0x54 "DDR_CTL_28,DDR-Controller Status & Control 28" hexmask.long.byte 0x54 24.--31. 1. " LP_AUTO_SR_IDLE ,Number of long count sequences until the controller will place memory in self-refresh" hexmask.long.word 0x54 8.--19. 1. " LP_AUTO_PD_IDLE ,Defines the idle time until the controller will place memory in active power-down" textline " " bitfld.long 0x54 1. " LP_AUTO_MEM_GATE_EN_1 ,Enable memory clock gating when entering a low power state via the auto low power counters/controls power-down" "Disabled,Enabled" bitfld.long 0x54 0. " LP_AUTO_MEM_GATE_EN_0 ,Enable memory clock gating when entering a low power state via the auto low power counters/controls self-refresh" "Disabled,Enabled" line.long 0x58 "DDR_CTL_29,DDR-Controller Status & Control 29" hexmask.long.byte 0x58 0.--7. 1. " LP_AUTO_SR_MC_GATE_IDLE ,Number of long count sequences until the controller will place memory in self-refresh with controller and memory clock gating" line.long 0x5C "DDR_CTL_30,DDR-Controller Status & Control 30" bitfld.long 0x5C 25. " WRITE_MODEREG[4] ,Triggers the write" "0,1" bitfld.long 0x5C 24. " WRITE_MODEREG[3] ,Defines whether all chip selects will be written" "0,1" textline " " hexmask.long.byte 0x5C 16.--23. 1. " WRITE_MODEREG[2] ,Define which memory mode register/s to write" hexmask.long.byte 0x5C 8.--15. 1. " WRITE_MODEREG[1] ,Define the chip select" textline " " hexmask.long.byte 0x5C 0.--7. 1. " WRITE_MODEREG[0] ,Define the memory mode register" line.long 0x60 "DDR_CTL_31,DDR-Controller Status & Control 31" hexmask.long.word 0x60 8.--23. 1. " MR0_DATA_0 ,Data to program into memory mode register 0 for chip select 0" hexmask.long.byte 0x60 0.--7. 1. " MRW_STATUS ,Write memory mode register status" line.long 0x64 "DDR_CTL_32,DDR-Controller Status & Control 32" hexmask.long.word 0x64 16.--31. 1. " MR2_DATA_0 ,Data to program into memory mode register 2 for chip select 0" hexmask.long.word 0x64 0.--15. 1. " MR1_DATA_0 ,Data to program into memory mode register 1 for chip select 0" line.long 0x68 "DDR_CTL_33,DDR-Controller Status & Control 33" hexmask.long.word 0x68 16.--31. 1. " MR3_DATA_0 ,Data to program into memory mode register 3 for chip select 0" hexmask.long.word 0x68 0.--15. 1. " MRSINGLE_DATA_0 ,Data to program into memory mode register single write to chip select 0" line.long 0x6C "DDR_CTL_34,DDR-Controller Status & Control 34" hexmask.long.word 0x6C 16.--31. 1. " MR1_DATA_1 ,Data to program into memory mode register 1 for chip select 1" hexmask.long.word 0x6C 0.--15. 1. " MR0_DATA_1 ,Data to program into memory mode register 0 for chip select 1" line.long 0x70 "DDR_CTL_35,DDR-Controller Status & Control 35" hexmask.long.word 0x70 16.--31. 1. " MRSINGLE_DATA_1 ,Data to program into memory mode register single write to chip select 1" hexmask.long.word 0x70 0.--15. 1. " MR2_DATA_1 ,Data to program into memory mode register 2 for chip select 1" line.long 0x74 "DDR_CTL_36,DDR-Controller Status & Control 36" bitfld.long 0x74 24. " FWC ,Force a write check" "Inactive,Active" bitfld.long 0x74 16. " ECC_EN ,ECC error checking and correcting control" "Disabled,Enabled" textline " " hexmask.long.word 0x74 0.--15. 1. " MR3_DATA_1 ,Data to program into memory mode register 3 for chip select 1" line.long 0x78 "DDR_CTL_37,DDR-Controller Status & Control 37" bitfld.long 0x78 16. " ECC_DISABLE_W_UC_ERR ,Controls auto-corruption of ECC when un-correctable errors occur in R/M/W operations" "No,Yes" hexmask.long.word 0x78 0.--13. 1. " XOR_CHECK_BITS ,Value to xor with generated ECC codes for forced write check" rgroup.long 0x98++0x1B line.long 0x00 "DDR_CTL_38,DDR-Controller Status & Control 38" line.long 0x04 "DDR_CTL_39,DDR-Controller Status & Control 39" hexmask.long.byte 0x04 0.--6. 1. " ECC_U_SYND ,Syndrome for uncorrectable ECC event" line.long 0x08 "DDR_CTL_40,DDR-Controller Status & Control 40" line.long 0x0C "DDR_CTL_41,DDR-Controller Status & Control 41" line.long 0x10 "DDR_CTL_42,DDR-Controller Status & Control 42" hexmask.long.byte 0x10 0.--6. 1. " ECC_C_SYND ,Syndrome for correctable ECC event" line.long 0x14 "DDR_CTL_43,DDR-Controller Status & Control 43" group.long 0xB0++0x1B line.long 0x00 "DDR_CTL_44,DDR-Controller Status & Control 44" bitfld.long 0x00 16.--20. " LONG_COUNT_MASK ,Reduces the length of the long counter from 1024 cycles" "1024,,,,,,,,,,,,,,,,512,,,,,,,,256,,,,128,,64,32" line.long 0x04 "DDR_CTL_45,DDR-Controller Status & Control 45" hexmask.long.word 0x04 16.--27. 1. " ZQCL ,Number of cycles needed for a ZQCL command" hexmask.long.word 0x04 0.--11. 1. " ZQINIT ,Number of cycles needed for a ZQINIT command" line.long 0x08 "DDR_CTL_46,DDR-Controller Status & Control 46" bitfld.long 0x08 25. " ZQ_ON_SREF_EXIT_CL ,ZQCL calibration performed at self-refresh exit enable" "Disabled,Enabled" bitfld.long 0x08 24. " ZQ_ON_SREF_EXIT_CS ,ZQCS calibration performed at self-refresh exit enable" "Disabled,Enabled" textline " " bitfld.long 0x08 17. " ZQ_REQ_CL ,User request to initiate a ZQCL calibration." "Inactive,Active" bitfld.long 0x08 16. " ZQ_REQ_CS ,User request to initiate a ZQCS calibration." "Inactive,Active" textline " " hexmask.long.word 0x08 0.--11. 1. " ZQCS ,Number of cycles needed for a ZQCS command" line.long 0x0C "DDR_CTL_47,DDR-Controller Status & Control 47" line.long 0x10 "DDR_CTL_48,DDR-Controller Status & Control 48" bitfld.long 0x10 24.--26. " ROW_DIFF ,Difference between number of address pins available and number being used" "0,1,2,3,4,5,6,7" bitfld.long 0x10 16.--17. " BANK_DIFF ,Encoded number of banks on the DRAM(s)" "0,1,2,3" textline " " bitfld.long 0x10 8. " ZQCS_ROTATE ,Selects whether a ZQCS command will calibrate just one chip select or all chip selects" "Not rotated,Rotated" rbitfld.long 0x10 0. " ZQ_IN_PROGRESS ,Indicates that a ZQ command is currently in progress" "Stopped,In progress" line.long 0x14 "DDR_CTL_49,DDR-Controller Status & Control 49" hexmask.long.byte 0x14 24.--31. 1. " COMMAND_AGE_COUNT ,Initial value of individual command aging counters for command aging" hexmask.long.byte 0x14 16.--23. 1. " AGE_COUNT ,Initial value of master aging-rate counter for command aging" textline " " bitfld.long 0x14 8.--11. " APREBIT ,Location of the auto pre-charge bit in the DRAM address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--3. " COL_DIFF ,Difference between number of column pins available and number being used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "DDR_CTL_50,DDR-Controller Status & Control 50" bitfld.long 0x18 24. " PLACEMENT_EN ,Placement logic for command queue enable" "Disabled,Enabled" bitfld.long 0x18 16. " BANK_SPLIT_EN ,Enable bank splitting as a rule for command queue placement" "Disabled,Enabled" textline " " bitfld.long 0x18 0. " ADDR_CMP_EN ,Enable address collision detection as a rule for command queue placement" "Disabled,Enabled" if (((per.l((ad:0x4000D000)+0xCC))&0x00000100)==0x00000100) group.long 0xCC++0x03 line.long 0x00 "DDR_CTL_51,DDR-Controller Status & Control 51" bitfld.long 0x00 24. " CS_SAME_EN ,Enable chip select grouping when read/write grouping as a rule for command queue placement" "Disabled,Enabled" bitfld.long 0x00 16. " RW_SAME_PAGE_EN ,Enable page grouping when read/write grouping as a rule for command queue placement" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " RW_SAME_EN ,Enable read/write grouping as a rule for command queue placement" "Disabled,Enabled" bitfld.long 0x00 0. " PRIORITY_EN ,Enable priority as a rule for command queue placement" "Disabled,Enabled" else group.long 0xCC++0x03 line.long 0x00 "DDR_CTL_51,DDR-Controller Status & Control 51" textline " " bitfld.long 0x00 8. " RW_SAME_EN ,Enable read/write grouping as a rule for command queue placement" "Disabled,Enabled" bitfld.long 0x00 0. " PRIORITY_EN ,Enable priority as a rule for command queue placement" "Disabled,Enabled" endif group.long 0xD0++0x0F line.long 0x00 "DDR_CTL_52,DDR-Controller Status & Control 52" bitfld.long 0x00 23. " SWAP_EN ,Enable command swapping logic in execution unit" "Disabled,Enabled" bitfld.long 0x00 16.--18. " NUM_Q_ENTRIES_ACT_DISABLE ,Number of queue entries in which ACT requests will be disabled" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " DISABLE_RW_GROUP_W_BNK_CONFLICT_1 ,Disables placement away from bank conflict command to read/write group" "No,Yes" bitfld.long 0x00 8. " DISABLE_RW_GROUP_W_BNK_CONFLICT_0 ,Disables placement next to bank conflict command to read/write group" "No,Yes" textline " " bitfld.long 0x00 0. " W2R_SPLIT_EN ,Enable splitting of commands to the same chip select from a write to a read command as a rule for command queue placement" "Disabled,Enabled" line.long 0x04 "DDR_CTL_53,DDR-Controller Status & Control 53" bitfld.long 0x04 24.--27. " BURST_ON_FLY_BIT ,Identifies the burst-on-fly bit in the memory mode registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--17. " CS_MAP ,Defines which chip selects are active" "0,1,2,3" textline " " bitfld.long 0x04 8. " INHIBIT_DRAM_CMD ,Inhibit read/write command traffic and associated bank commands" "Allowed,Inhibited" bitfld.long 0x04 0. " DISABLE_RD_INTERLEAVE ,Disable read data interleaving for commands from the same port" "No,Yes" line.long 0x08 "DDR_CTL_54,DDR-Controller Status & Control 54" rbitfld.long 0x08 24. " CONTROLLER_BUSY ,Indicates that the controller is processing a command" "Idle,Busy" bitfld.long 0x08 16. " IN_ORDER_ACCEPT ,Forces the controller to accept commands in the order in which they are placed in the command queue" "Disabled,Enabled" textline " " bitfld.long 0x08 8.--10. " Q_FULLNESS ,Quantity that determines command queue full" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0. " REDUC ,Enable the half datapath feature of the controller" "Disabled,Enabled" line.long 0x0C "DDR_CTL_55,DDR-Controller Status & Control 55" bitfld.long 0x0C 8. " CTRLUPD_REQ_PER_AREF_EN ,Enable an automatic controller-initiated update (dfi_ctrlupd_req) after every refresh" "Disabled,Enabled" bitfld.long 0x0C 0. " CTRLUPD_REQ ,Assert the DFI controller-initiated update request signal dfi_ctrlupd_req" "Inactive,Active" rgroup.long 0xE0++0x03 line.long 0x00 "DDR_CTL_56,DDR-Controller Status & Control 56" bitfld.long 0x00 22. " INT_STATUS[22] ,Logical OR of all lower bits" "0,1" textline " " bitfld.long 0x00 21. " [21] ,The user-initiated DLL resync has completed" "Not completed,Completed" bitfld.long 0x00 20. " [20] ,A state change has been detected on the dfi_init_complete signal after initialization" "Not detected,Detected" textline " " bitfld.long 0x00 19. " [19] ,The assertion of the INHIBIT_DRAM_CMD parameter has successfully inhibited the command queue" "Not inhibited,Inhibited" bitfld.long 0x00 18. " [18] ,The register interface-initiated mode register write has completed and another mode register write may be issued" "0,1" textline " " bitfld.long 0x00 17. " [17] ,The leveling operation has completed" "Not completed,Completed" bitfld.long 0x00 16. " [16] ,A leveling operation has been requested" "Not requested,Requested" textline " " bitfld.long 0x00 15. " [15] ,A DFI update error has occurred" "Not occurred,Occurred" bitfld.long 0x00 14. " [14] ,A write leveling error has occurred" "Not occurred,Occurred" textline " " bitfld.long 0x00 13. " [13] ,A read leveling gate training error has occurred" "Not occurred,Occurred" bitfld.long 0x00 12. " [12] ,A read leveling error has occurred" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " [11] ,The user has programmed an invalid setting associated with 64-bit defined-word per burst" "Not programmed,Programmed" textline " " bitfld.long 0x00 9. " [9] ,The low power operation has been completed" "Not completed,Completed" bitfld.long 0x00 8. " [8] ,The MC initialization has been completed" "Not completed,Completed" textline " " bitfld.long 0x00 7. " [7] ,An error occurred on the port command channel" "Not occurred,Occurred" bitfld.long 0x00 6. " [6] ,Multiple uncorrectable ECC events have been detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " [5] ,An uncorrectable ECC event has been detected" "Not detected,Detected" bitfld.long 0x00 4. " [4] ,Multiple correctable ECC events have been detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " [3] ,A correctable ECC event has been detected" "Not detected,Detected" bitfld.long 0x00 2. " [2] ,Multiple accesses outside the defined PHYSICAL memory space have occurred" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " [1] ,A memory access outside the defined PHYSICAL memory space has occurred" "Not occurred,Occurred" bitfld.long 0x00 0. " [0] ,The memory reset is valid on the DFI bus" "Not valid,Valid" wgroup.long 0xE4++0x03 line.long 0x00 "DDR_CTL_57,DDR-Controller Status & Control 57" bitfld.long 0x00 22. " INT_ACK[22] ,Clear mask of the INT_STATUS[22] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 21. " [21] ,Clear mask of the INT_STATUS[21] parameter" "Not clear,Clear" bitfld.long 0x00 20. " [20] ,Clear mask of the INT_STATUS[20] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 19. " [19] ,Clear mask of the INT_STATUS[19] parameter" "Not clear,Clear" bitfld.long 0x00 18. " [18] ,Clear mask of the INT_STATUS[18] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 17. " [17] ,Clear mask of the INT_STATUS[17] parameter" "Not clear,Clear" bitfld.long 0x00 16. " [16] ,Clear mask of the INT_STATUS[16] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 15. " [15] ,Clear mask of the INT_STATUS[15] parameter" "Not clear,Clear" bitfld.long 0x00 14. " [14] ,Clear mask of the INT_STATUS[14] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 13. " [13] ,Clear mask of the INT_STATUS[13] parameter" "Not clear,Clear" bitfld.long 0x00 12. " [12] ,Clear mask of the INT_STATUS[12] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 11. " [11] ,Clear mask of the INT_STATUS[11] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 9. " [9] ,Clear mask of the INT_STATUS[9] parameter" "Not clear,Clear" bitfld.long 0x00 8. " [8] ,Clear mask of the INT_STATUS[8] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 7. " [7] ,Clear mask of the INT_STATUS[7] parameter" "Not clear,Clear" bitfld.long 0x00 6. " [6] ,Clear mask of the INT_STATUS[6] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 5. " [5] ,Clear mask of the INT_STATUS[5] parameter" "Not clear,Clear" bitfld.long 0x00 4. " [4] ,Clear mask of the INT_STATUS[4] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 3. " [3] ,Clear mask of the INT_STATUS[3] parameter" "Not clear,Clear" bitfld.long 0x00 2. " [2] ,Clear mask of the INT_STATUS[2] parameter" "Not clear,Clear" textline " " bitfld.long 0x00 1. " [1] ,Clear mask of the INT_STATUS[1] parameter" "Not clear,Clear" bitfld.long 0x00 0. " [0] ,Clear mask of the INT_STATUS[0] parameter" "Not clear,Clear" group.long 0xE8++0x03 line.long 0x00 "DDR_CTL_58,DDR-Controller Status & Control 58" bitfld.long 0x00 22. " INT_MASK[22] ,Mask for DDRC_Int signals from the INT_STATUS[22] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 21. " [21] ,Mask for DDRC_Int signals from the INT_STATUS[21] parameter" "Not masked,Masked" bitfld.long 0x00 20. " [20] ,Mask for DDRC_Int signals from the INT_STATUS[20] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 19. " [19] ,Mask for DDRC_Int signals from the INT_STATUS[19] parameter" "Not masked,Masked" bitfld.long 0x00 18. " [18] ,Mask for DDRC_Int signals from the INT_STATUS[18] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 17. " [17] ,Mask for DDRC_Int signals from the INT_STATUS[17] parameter" "Not masked,Masked" bitfld.long 0x00 16. " [16] ,Mask for DDRC_Int signals from the INT_STATUS[16] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 15. " [15] ,Mask for DDRC_Int signals from the INT_STATUS[15] parameter" "Not masked,Masked" bitfld.long 0x00 14. " [14] ,Mask for DDRC_Int signals from the INT_STATUS[14] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 13. " [13] ,Mask for DDRC_Int signals from the INT_STATUS[13] parameter" "Not masked,Masked" bitfld.long 0x00 12. " [12] ,Mask for DDRC_Int signals from the INT_STATUS[12] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 11. " [11] ,Mask for DDRC_Int signals from the INT_STATUS[11] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 9. " [9] ,Mask for DDRC_Int signals from the INT_STATUS[9] parameter" "Not masked,Masked" bitfld.long 0x00 8. " [8] ,Mask for DDRC_Int signals from the INT_STATUS[8] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 7. " [7] ,Mask for DDRC_Int signals from the INT_STATUS[7] parameter" "Not masked,Masked" bitfld.long 0x00 6. " [6] ,Mask for DDRC_Int signals from the INT_STATUS[6] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 5. " [5] ,Mask for DDRC_Int signals from the INT_STATUS[5] parameter" "Not masked,Masked" bitfld.long 0x00 4. " [4] ,Mask for DDRC_Int signals from the INT_STATUS[4] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 3. " [3] ,Mask for DDRC_Int signals from the INT_STATUS[3] parameter" "Not masked,Masked" bitfld.long 0x00 2. " [2] ,Mask for DDRC_Int signals from the INT_STATUS[2] parameter" "Not masked,Masked" textline " " bitfld.long 0x00 1. " [1] ,Mask for DDRC_Int signals from the INT_STATUS[1] parameter" "Not masked,Masked" bitfld.long 0x00 0. " [0] ,Mask for DDRC_Int signals from the INT_STATUS[0] parameter" "Not masked,Masked" rgroup.long 0xEC++0x0B line.long 0x00 "DDR_CTL_59,DDR-Controller Status & Control 59" line.long 0x04 "DDR_CTL_60,DDR-Controller Status & Control 60" bitfld.long 0x04 8.--13. " OUT_OF_RANGE_TYPE ,Type of command that caused an out-of-range interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x04 0.--6. 1. " OUT_OF_RANGE_LENGTH ,Length of command that caused an out-of-range interrupt" line.long 0x08 "DDR_CTL_61,DDR-Controller Status & Control 61" group.long 0xF8++0x0B line.long 0x00 "DDR_CTL_62,DDR-Controller Status & Control 62" bitfld.long 0x00 24.--25. " ODT_WR_MAP_CS0 ,Determines which chip(s) will have termination when a write occurs on chip select 0" "0,1,2,3" bitfld.long 0x00 16.--17. " ODT_RD_MAP_CS0 ,Determines which chip(s) will have termination when a read occurs on chip select 0" "0,1,2,3" textline " " rbitfld.long 0x00 8.--10. " PORT_CMD_ERROR_TYPE ,Type of error and access type that caused the PORT command error" "0,1,2,3,4,5,6,7" line.long 0x04 "DDR_CTL_63,DDR-Controller Status & Control 63" bitfld.long 0x04 24.--27. " TODTH_WR ,Defines the DRAM minimum ODT high time after an ODT assertion for a write command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 16.--23. 1. " TODTL_2CMD ,Defines the DRAM delay from an ODT de-assertion to the next non-write, non-read command" textline " " bitfld.long 0x04 8.--9. " ODT_WR_MAP_CS1 ,Determines which chip(s) will have termination when a write occurs on chip select 1" "0,1,2,3" bitfld.long 0x04 0.--1. " ODT_RD_MAP_CS1 ,Determines which chip(s) will have termination when a read occurs on chip select 1." "0,1,2,3" line.long 0x08 "DDR_CTL_64,DDR-Controller Status & Control 64" hexmask.long.byte 0x08 24.--30. 1. " RD_TO_ODTH ,Defines the delay from a read command to ODT assertion" hexmask.long.byte 0x08 16.--22. 1. " WR_TO_ODTH ,Defines the delay from a write command to ODT assertion" textline " " bitfld.long 0x08 8. " ODT_EN ,Enable support of DRAM ODT" "Disabled,Enabled" bitfld.long 0x08 0.--3. " TODTH_RD ,DRAM minimum ODT high time after an ODT assertion for a read command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x104++0x03 line.long 0x00 "DDR_CTL_65,DDR-Controller Status & Control 65" group.long 0x108++0x2B line.long 0x00 "DDR_CTL_66,DDR-Controller Status & Control 66" bitfld.long 0x00 24.--27. " W2W_DIFFCS_DLY ,Additional delay to insert between writes to different chip selects" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--18. " W2R_DIFFCS_DLY ,Additional delay to insert between writes and reads to different chip selects" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--10. " R2W_DIFFCS_DLY ,Additional delay to insert between reads and writes to different chip selects" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " R2R_DIFFCS_DLY ,Additional delay to insert between reads to different chip selects" "0,1,2,3,4,5,6,7" line.long 0x04 "DDR_CTL_67,DDR-Controller Status & Control 67" bitfld.long 0x04 24.--26. " W2W_SAMECS_DLY ,Additional delay to insert between two writes to the same chip select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--18. " W2R_SAMECS_DLY ,Additional delay to insert between writes and reads to the same chip select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 8.--10. " R2W_SAMECS_DLY ,Additional delay to insert between reads and writes to the same chip select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " R2R_SAMECS_DLY ,Additional delay to insert between two reads to the same chip select" "0,1,2,3,4,5,6,7" line.long 0x08 "DDR_CTL_68,DDR-Controller Status & Control 68" bitfld.long 0x08 24. " SWLVL_LOAD ,User request to load delays and execute software leveling" "Inactive,Active" bitfld.long 0x08 16.--17. " SW_LEVELING_MODE ,leveling operation for software leveling" "None,Write,Data eye training,Gate training" textline " " bitfld.long 0x08 8.--12. " OCD_ADJUST_PUP_CS_0 ,OCD pull-up adjust setting for DRAMs for chip select 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0.--4. " OCD_ADJUST_PDN_CS_0 ,OCD pull-down adjust setting for DRAMs for chip select 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "DDR_CTL_69,DDR-Controller Status & Control 69" bitfld.long 0x0C 26. " LVL_STATUS_2 ,Status of write level gate training request" "Not requested,Requested" bitfld.long 0x0C 25. " LVL_STATUS_1 ,Status of write level data eye training request" "Not requested,Requested" textline " " bitfld.long 0x0C 24. " LVL_STATUS_0 ,Status of write level write leveling request" "Not requested,Requested" bitfld.long 0x0C 16. " SWLVL_OP_DONE ,Signals that software leveling is currently in progress" "In progress,Completed" textline " " bitfld.long 0x0C 8. " SWLVL_EXIT ,User request to exit software leveling" "No,Yes" bitfld.long 0x0C 0. " SWLVL_START ,User request to initiate software leveling of type in the SW_LEVELING_MODE parameter" "Inactive,Active" line.long 0x10 "DDR_CTL_70,DDR-Controller Status & Control 70" bitfld.long 0x10 24. " WRLVL_REQ ,User request to initiate write leveling" "Inactive,Active" hexmask.long.byte 0x10 16.--23. 1. " SWLVL_RESP_2 ,Leveling response for data slice 2" textline " " hexmask.long.byte 0x10 8.--15. 1. " SWLVL_RESP_1 ,Leveling response for data slice 1" hexmask.long.byte 0x10 0.--7. 1. " SWLVL_RESP_0 ,Leveling response for data slice 0." line.long 0x14 "DDR_CTL_71,DDR-Controller Status & Control 71" bitfld.long 0x14 24. " WRLVL_EN ,Enable the MC write leveling module" "Disabled,Enabled" bitfld.long 0x14 16.--21. " WLMRD ,Delay from issuing MRS to first write leveling strobe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x14 8.--13. " WLDQSEN ,Delay from issuing MRS to first DQS strobe for write leveling" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 0. " WRLVL_CS ,Specifies the target chip select for the write leveling operation initiated through the WRLVL_REQ parameter" "0,1" line.long 0x18 "DDR_CTL_72,DDR-Controller Status & Control 72" bitfld.long 0x18 31. " WRLVL_ERROR_STATUS[1] ,TDFI_WRLVL_RESP parameter violation" "Not set,Set" bitfld.long 0x18 30. " WRLVL_ERROR_STATUS[0] ,TDFI_WRLVL_MAX parameter violation" "Not set,Set" textline " " hexmask.long.word 0x18 0.--15. 1. " WRLVL_INTERVAL ,Number of long count sequences counted between automatic write leveling commands" line.long 0x1C "DDR_CTL_73,DDR-Controller Status & Control 73" hexmask.long.word 0x1C 8.--23. 1. " WRLVL_DELAY_0 ,Number of delay elements for write data slice 0" bitfld.long 0x1C 0. " WRLVL_REG_EN ,Enable the dfi_wrlvl_delay_X signals" "Disabled,Enabled" line.long 0x20 "DDR_CTL_74,DDR-Controller Status & Control 74" hexmask.long.word 0x20 16.--31. 1. " WRLVL_DELAY_2 ,Number of delay elements for write data slice 2" hexmask.long.word 0x20 0.--15. 1. " WRLVL_DELAY_1 ,Number of delay elements for write data slice 1" line.long 0x24 "DDR_CTL_75,DDR-Controller Status & Control 75" bitfld.long 0x24 24. " RDLVL_EDGE ,Specifies the read DQS edge positive or negative to be used for the data eye training operation" "Positive,Negative" bitfld.long 0x24 16. " RDLVL_CS ,Specifies the target chip select for the data eye training operation" "0,1" textline " " bitfld.long 0x24 8. " RDLVL_GATE_REQ ,User request to initiate gate training" "Inactive,Active" bitfld.long 0x24 0. " RDLVL_REQ ,User request to initiate data eye training" "Inactive,Active" line.long 0x28 "DDR_CTL_76,DDR-Controller Status & Control 76" bitfld.long 0x28 16. " RDLVL_GATE_REG_EN ,Enable the dfi_rdlvl_gate_delay_X signals" "Disabled,Enabled" bitfld.long 0x28 8. " RDLVL_REG_EN ,Enable the dfi_rdlvl_delay_X signals" "Disabled,Enabled" textline " " bitfld.long 0x28 0. " RDLVL_BEGIN_DELAY_EN ,Enable the data eye training logic to find the DQ data eye" "Disabled,Enabled" rgroup.long 0x134++0x03 line.long 0x00 "DDR_CTL_77,DDR-Controller Status & Control 77" hexmask.long.word 0x00 16.--31. 1. " RDLVL_END_DELAY_0 ,Number of delay elements for first 0 to 1 DQ transition for data slice 0" hexmask.long.word 0x00 0.--15. 1. " RDLVL_BEGIN_DELAY_0 ,Number of delay elements for first 1 to 0 DQ transition for data slice 0" group.long 0x138++0x0B line.long 0x00 "DDR_CTL_78,DDR-Controller Status & Control 78" hexmask.long.word 0x00 16.--31. 1. " RDLVL_OFFSET_DELAY_0 ,Offset the data eye midpoint delay for data slice 0" hexmask.long.word 0x00 0.--15. 1. " RDLVL_MIDPOINT_DELAY_0 ,Calculated midpoint of DQ delay for data slice 0" line.long 0x04 "DDR_CTL_79,DDR-Controller Status & Control 79" hexmask.long.word 0x04 8.--23. 1. " RDLVL_DELAY_0 ,Number of delay elements where read DQS is placed within the DQ data eye for data slice 0" bitfld.long 0x04 0. " RDLVL_OFFSET_DIR_0 ,Direction of the data eye midpoint delay offset for data slice" "No delay,Delay" line.long 0x08 "DDR_CTL_80,DDR-Controller Status & Control 80" hexmask.long.word 0x08 16.--31. 1. " RDLVL_BEGIN_DELAY_1 ,Number of delay elements for first 1 to 0 DQ transition for data slice 1" hexmask.long.word 0x08 0.--15. 1. " RDLVL_GATE_DELAY_0 ,Number of delay elements where gate is aligned to rising edge of DQS for data slice 0" rgroup.long 0x144++0x03 line.long 0x00 "DDR_CTL_81,DDR-Controller Status & Control 81" hexmask.long.word 0x00 16.--31. 1. " RDLVL_MIDPOINT_DELAY_1 ,Calculated midpoint of DQ delay for data slice 1" hexmask.long.word 0x00 0.--15. 1. " RDLVL_END_DELAY_1 ,Number of delay elements for first 0 to 1 DQ transition for data slice 1" group.long 0x148++0x07 line.long 0x00 "DDR_CTL_82,DDR-Controller Status & Control 82" bitfld.long 0x00 16. " RDLVL_OFFSET_DIR_1 ,Direction of the data eye midpoint delay offset for data slice 1" "No delay,Delay" hexmask.long.word 0x00 0.--15. 1. " RDLVL_OFFSET_DELAY_1 ,Offset the data eye midpoint delay for data slice 1" line.long 0x04 "DDR_CTL_83,DDR-Controller Status & Control 83" hexmask.long.word 0x04 16.--31. 1. " RDLVL_GATE_DELAY_1 ,Number of delay elements where gate is aligned to rising edge of DQS for data slice 1" hexmask.long.word 0x04 0.--15. 1. " RDLVL_DELAY_1 ,Number of delay elements where read DQS is placed within the DQ data eye for data slice 1" rgroup.long 0x150++0x03 line.long 0x00 "DDR_CTL_84,DDR-Controller Status & Control 84" hexmask.long.word 0x00 16.--31. 1. " RDLVL_END_DELAY_2 ,Number of delay elements for first 0 to 1 DQ transition for data slice 2" hexmask.long.word 0x00 0.--15. 1. " RDLVL_BEGIN_DELAY_2 ,Number of delay elements for first 1 to 0 DQ transition for data slice 2" group.long 0x154++0x17 line.long 0x00 "DDR_CTL_85,DDR-Controller Status & Control 85" hexmask.long.word 0x00 16.--31. 1. " RDLVL_OFFSET_DELAY_2 ,Offset the data eye midpoint delay for data slice 2" hexmask.long.word 0x00 0.--15. 1. " RDLVL_MIDPOINT_DELAY_2 ,Calculated midpoint of DQ delay for data slice 2" line.long 0x04 "DDR_CTL_86,DDR-Controller Status & Control 86" hexmask.long.word 0x04 8.--23. 1. " RDLVL_DELAY_2 ,Number of delay elements where read DQS is placed within the DQ data eye for data slice 2" bitfld.long 0x04 0. " RDLVL_OFFSET_DIR_2 ,Direction of the data eye midpoint delay offset for data slice 2" "No delay,Delay" line.long 0x08 "DDR_CTL_87,DDR-Controller Status & Control 87" bitfld.long 0x08 24.--25. " AXI0_W_PRIORITY ,Priority of write commands from AXI port 0" "0,1,2,3" bitfld.long 0x08 16.--17. " AXI0_R_PRIORITY ,Priority of read commands from AXI port 0" "0,1,2,3" textline " " hexmask.long.word 0x08 0.--15. 1. " RDLVL_GATE_DELAY_2 ,Number of delay elements where gate is aligned to rising edge of DQS for data slice 2" line.long 0x0C "DDR_CTL_88,DDR-Controller Status & Control 88" bitfld.long 0x0C 24.--25. " AXI1_FIFO_TYPE_REG ,Clock domain relativity between AXI port 1 and the controller core" "Asynchronous,2:1 port,1:2 port,Synchronous" bitfld.long 0x0C 16.--17. " AXI1_W_PRIORITY ,Priority of write commands from AXI port 1" "0,1,2,3" textline " " bitfld.long 0x0C 8.--9. " AXI1_R_PRIORITY ,Priority of read commands from AXI port 1" "0,1,2,3" bitfld.long 0x0C 0.--1. " AXI0_FIFO_TYPE_REG ,Clock domain relativity between AXI port 0 and the controller core" "Asynchronous,2:1 port,1:2 port,Synchronous" line.long 0x10 "DDR_CTL_89,DDR-Controller Status & Control 89" bitfld.long 0x10 24.--25. " AXI3_R_PRIORITY ,Priority of read commands from AXI port 3" "0,1,2,3" bitfld.long 0x10 16.--17. " AXI2_FIFO_TYPE_REG ,Clock domain relativity between AXI port 2 and the controller core" "Asynchronous,2:1 port,1:2 port,Synchronous" textline " " bitfld.long 0x10 8.--9. " AXI2_W_PRIORITY ,Priority of write commands from AXI port 2" "0,1,2,3" bitfld.long 0x10 0.--1. " AXI2_R_PRIORITY ,Priority of read commands from AXI port 2" "0,1,2,3" line.long 0x14 "DDR_CTL_90,DDR-Controller Status & Control 90" bitfld.long 0x14 24. " PORT_ADDR_PROTECTION_EN ,Enable port address range protection logic and interrupt generation" "Disabled,Enabled" bitfld.long 0x14 8.--9. " AXI3_FIFO_TYPE_REG ,Clock domain relativity between AXI port 3 and the controller core" "Asynchronous,2:1 port,1:2 port,Synchronous" textline " " bitfld.long 0x14 0.--1. " AXI3_W_PRIORITY ,Priority of write commands from AXI port 3" "Asynchronous,2:1 port,1:2 port,Synchronous" tree "Port0 Setting Register" group.long 0x16C++0x07 line.long 0x00 "DDR_CTL_91,Port0 Range[0 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_0 ,Start address of port 0 address range [0 ]" line.long 0x04 "DDR_CTL_92,Port0 Range[0 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_0 ,End address of port 0 address range [0 ]" group.long 0x174++0x07 line.long 0x00 "DDR_CTL_93,Port0 Range[1 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_1 ,Start address of port 0 address range [1 ]" line.long 0x04 "DDR_CTL_94,Port0 Range[1 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_1 ,End address of port 0 address range [1 ]" group.long 0x17C++0x07 line.long 0x00 "DDR_CTL_95,Port0 Range[2 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_2 ,Start address of port 0 address range [2 ]" line.long 0x04 "DDR_CTL_96,Port0 Range[2 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_2 ,End address of port 0 address range [2 ]" group.long 0x184++0x07 line.long 0x00 "DDR_CTL_97,Port0 Range[3 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_3 ,Start address of port 0 address range [3 ]" line.long 0x04 "DDR_CTL_98,Port0 Range[3 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_3 ,End address of port 0 address range [3 ]" group.long 0x18C++0x07 line.long 0x00 "DDR_CTL_99,Port0 Range[4 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_4 ,Start address of port 0 address range [4 ]" line.long 0x04 "DDR_CTL_100,Port0 Range[4 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_4 ,End address of port 0 address range [4 ]" group.long 0x194++0x07 line.long 0x00 "DDR_CTL_101,Port0 Range[5 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_5 ,Start address of port 0 address range [5 ]" line.long 0x04 "DDR_CTL_102,Port0 Range[5 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_5 ,End address of port 0 address range [5 ]" group.long 0x19C++0x07 line.long 0x00 "DDR_CTL_103,Port0 Range[6 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_6 ,Start address of port 0 address range [6 ]" line.long 0x04 "DDR_CTL_104,Port0 Range[6 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_6 ,End address of port 0 address range [6 ]" group.long 0x1A4++0x07 line.long 0x00 "DDR_CTL_105,Port0 Range[7 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_7 ,Start address of port 0 address range [7 ]" line.long 0x04 "DDR_CTL_106,Port0 Range[7 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_7 ,End address of port 0 address range [7 ]" group.long 0x1AC++0x07 line.long 0x00 "DDR_CTL_107,Port0 Range[8 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_8 ,Start address of port 0 address range [8 ]" line.long 0x04 "DDR_CTL_108,Port0 Range[8 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_8 ,End address of port 0 address range [8 ]" group.long 0x1B4++0x07 line.long 0x00 "DDR_CTL_109,Port0 Range[9 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_9 ,Start address of port 0 address range [9 ]" line.long 0x04 "DDR_CTL_110,Port0 Range[9 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_9 ,End address of port 0 address range [9 ]" group.long 0x1BC++0x07 line.long 0x00 "DDR_CTL_111,Port0 Range[10] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_10 ,Start address of port 0 address range [10]" line.long 0x04 "DDR_CTL_112,Port0 Range[10] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_10 ,End address of port 0 address range [10]" group.long 0x1C4++0x07 line.long 0x00 "DDR_CTL_113,Port0 Range[11] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_11 ,Start address of port 0 address range [11]" line.long 0x04 "DDR_CTL_114,Port0 Range[11] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_11 ,End address of port 0 address range [11]" group.long 0x1CC++0x07 line.long 0x00 "DDR_CTL_115,Port0 Range[12] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_12 ,Start address of port 0 address range [12]" line.long 0x04 "DDR_CTL_116,Port0 Range[12] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_12 ,End address of port 0 address range [12]" group.long 0x1D4++0x07 line.long 0x00 "DDR_CTL_117,Port0 Range[13] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_13 ,Start address of port 0 address range [13]" line.long 0x04 "DDR_CTL_118,Port0 Range[13] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_13 ,End address of port 0 address range [13]" group.long 0x1DC++0x07 line.long 0x00 "DDR_CTL_119,Port0 Range[14] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_14 ,Start address of port 0 address range [14]" line.long 0x04 "DDR_CTL_120,Port0 Range[14] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_14 ,End address of port 0 address range [14]" group.long 0x1E4++0x07 line.long 0x00 "DDR_CTL_121,Port0 Range[15] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI0_START_ADDR_15 ,Start address of port 0 address range [15]" line.long 0x04 "DDR_CTL_122,Port0 Range[15] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI0_END_ADDR_15 ,End address of port 0 address range [15]" tree.end tree "Port1 Setting Register" group.long 0x1EC++0x07 line.long 0x00 "DDR_CTL_123,Port1 Range[0 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR0 ,Start address of port 1 address range [0 ]" line.long 0x04 "DDR_CTL_124,Port1 Range[0 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_0 ,End address of port 1 address range [0 ]" group.long 0x1F4++0x07 line.long 0x00 "DDR_CTL_125,Port1 Range[1 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR1 ,Start address of port 1 address range [1 ]" line.long 0x04 "DDR_CTL_126,Port1 Range[1 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_1 ,End address of port 1 address range [1 ]" group.long 0x1FC++0x07 line.long 0x00 "DDR_CTL_127,Port1 Range[2 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR2 ,Start address of port 1 address range [2 ]" line.long 0x04 "DDR_CTL_128,Port1 Range[2 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_2 ,End address of port 1 address range [2 ]" group.long 0x204++0x07 line.long 0x00 "DDR_CTL_129,Port1 Range[3 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR3 ,Start address of port 1 address range [3 ]" line.long 0x04 "DDR_CTL_130,Port1 Range[3 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_3 ,End address of port 1 address range [3 ]" group.long 0x20C++0x07 line.long 0x00 "DDR_CTL_131,Port1 Range[4 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR4 ,Start address of port 1 address range [4 ]" line.long 0x04 "DDR_CTL_132,Port1 Range[4 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_4 ,End address of port 1 address range [4 ]" group.long 0x214++0x07 line.long 0x00 "DDR_CTL_133,Port1 Range[5 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR5 ,Start address of port 1 address range [5 ]" line.long 0x04 "DDR_CTL_134,Port1 Range[5 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_5 ,End address of port 1 address range [5 ]" group.long 0x21C++0x07 line.long 0x00 "DDR_CTL_135,Port1 Range[6 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR6 ,Start address of port 1 address range [6 ]" line.long 0x04 "DDR_CTL_136,Port1 Range[6 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_6 ,End address of port 1 address range [6 ]" group.long 0x224++0x07 line.long 0x00 "DDR_CTL_137,Port1 Range[7 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR7 ,Start address of port 1 address range [7 ]" line.long 0x04 "DDR_CTL_138,Port1 Range[7 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_7 ,End address of port 1 address range [7 ]" group.long 0x22C++0x07 line.long 0x00 "DDR_CTL_139,Port1 Range[8 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR8 ,Start address of port 1 address range [8 ]" line.long 0x04 "DDR_CTL_140,Port1 Range[8 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_8 ,End address of port 1 address range [8 ]" group.long 0x234++0x07 line.long 0x00 "DDR_CTL_141,Port1 Range[9 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR9 ,Start address of port 1 address range [9 ]" line.long 0x04 "DDR_CTL_142,Port1 Range[9 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_9 ,End address of port 1 address range [9 ]" group.long 0x23C++0x07 line.long 0x00 "DDR_CTL_143,Port1 Range[10] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR10 ,Start address of port 1 address range [10]" line.long 0x04 "DDR_CTL_144,Port1 Range[10] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_10 ,End address of port 1 address range [10]" group.long 0x244++0x07 line.long 0x00 "DDR_CTL_145,Port1 Range[11] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR11 ,Start address of port 1 address range [11]" line.long 0x04 "DDR_CTL_146,Port1 Range[11] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_11 ,End address of port 1 address range [11]" group.long 0x24C++0x07 line.long 0x00 "DDR_CTL_147,Port1 Range[12] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR12 ,Start address of port 1 address range [12]" line.long 0x04 "DDR_CTL_148,Port1 Range[12] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_12 ,End address of port 1 address range [12]" group.long 0x254++0x07 line.long 0x00 "DDR_CTL_149,Port1 Range[13] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR13 ,Start address of port 1 address range [13]" line.long 0x04 "DDR_CTL_150,Port1 Range[13] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_13 ,End address of port 1 address range [13]" group.long 0x25C++0x07 line.long 0x00 "DDR_CTL_151,Port1 Range[14] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR14 ,Start address of port 1 address range [14]" line.long 0x04 "DDR_CTL_152,Port1 Range[14] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_14 ,End address of port 1 address range [14]" group.long 0x264++0x07 line.long 0x00 "DDR_CTL_153,Port1 Range[15] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI1_START_ADDR15 ,Start address of port 1 address range [15]" line.long 0x04 "DDR_CTL_154,Port1 Range[15] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI1_END_ADDR_15 ,End address of port 1 address range [15]" tree.end tree "Port2 Setting Register" group.long 0x26C++0x07 line.long 0x00 "DDR_CTL_155,Port2 Range[0 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_0 ,Start address of port 2 address range [0 ]" line.long 0x04 "DDR_CTL_156,Port2 Range[0 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_0 ,End address of port 2 address range [0 ]" group.long 0x274++0x07 line.long 0x00 "DDR_CTL_157,Port2 Range[1 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_1 ,Start address of port 2 address range [1 ]" line.long 0x04 "DDR_CTL_158,Port2 Range[1 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_1 ,End address of port 2 address range [1 ]" group.long 0x27C++0x07 line.long 0x00 "DDR_CTL_159,Port2 Range[2 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_2 ,Start address of port 2 address range [2 ]" line.long 0x04 "DDR_CTL_160,Port2 Range[2 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_2 ,End address of port 2 address range [2 ]" group.long 0x284++0x07 line.long 0x00 "DDR_CTL_161,Port2 Range[3 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_3 ,Start address of port 2 address range [3 ]" line.long 0x04 "DDR_CTL_162,Port2 Range[3 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_3 ,End address of port 2 address range [3 ]" group.long 0x28C++0x07 line.long 0x00 "DDR_CTL_163,Port2 Range[4 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_4 ,Start address of port 2 address range [4 ]" line.long 0x04 "DDR_CTL_164,Port2 Range[4 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_4 ,End address of port 2 address range [4 ]" group.long 0x294++0x07 line.long 0x00 "DDR_CTL_165,Port2 Range[5 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_5 ,Start address of port 2 address range [5 ]" line.long 0x04 "DDR_CTL_166,Port2 Range[5 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_5 ,End address of port 2 address range [5 ]" group.long 0x29C++0x07 line.long 0x00 "DDR_CTL_167,Port2 Range[6 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_6 ,Start address of port 2 address range [6 ]" line.long 0x04 "DDR_CTL_168,Port2 Range[6 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_6 ,End address of port 2 address range [6 ]" group.long 0x2A4++0x07 line.long 0x00 "DDR_CTL_169,Port2 Range[7 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_7 ,Start address of port 2 address range [7 ]" line.long 0x04 "DDR_CTL_170,Port2 Range[7 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_7 ,End address of port 2 address range [7 ]" group.long 0x2AC++0x07 line.long 0x00 "DDR_CTL_171,Port2 Range[8 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_8 ,Start address of port 2 address range [8 ]" line.long 0x04 "DDR_CTL_172,Port2 Range[8 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_8 ,End address of port 2 address range [8 ]" group.long 0x2B4++0x07 line.long 0x00 "DDR_CTL_173,Port2 Range[9 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_9 ,Start address of port 2 address range [9 ]" line.long 0x04 "DDR_CTL_174,Port2 Range[9 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_9 ,End address of port 2 address range [9 ]" group.long 0x2BC++0x07 line.long 0x00 "DDR_CTL_175,Port2 Range[10] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_10 ,Start address of port 2 address range [10]" line.long 0x04 "DDR_CTL_176,Port2 Range[10] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_10 ,End address of port 2 address range [10]" group.long 0x2C4++0x07 line.long 0x00 "DDR_CTL_177,Port2 Range[11] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_11 ,Start address of port 2 address range [11]" line.long 0x04 "DDR_CTL_178,Port2 Range[11] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_11 ,End address of port 2 address range [11]" group.long 0x2CC++0x07 line.long 0x00 "DDR_CTL_179,Port2 Range[12] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_12 ,Start address of port 2 address range [12]" line.long 0x04 "DDR_CTL_180,Port2 Range[12] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_12 ,End address of port 2 address range [12]" group.long 0x2D4++0x07 line.long 0x00 "DDR_CTL_181,Port2 Range[13] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_13 ,Start address of port 2 address range [13]" line.long 0x04 "DDR_CTL_182,Port2 Range[13] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_13 ,End address of port 2 address range [13]" group.long 0x2DC++0x07 line.long 0x00 "DDR_CTL_183,Port2 Range[14] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_14 ,Start address of port 2 address range [14]" line.long 0x04 "DDR_CTL_184,Port2 Range[14] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_14 ,End address of port 2 address range [14]" group.long 0x2E4++0x07 line.long 0x00 "DDR_CTL_185,Port2 Range[15] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI2_START_ADDR_15 ,Start address of port 2 address range [15]" line.long 0x04 "DDR_CTL_186,Port2 Range[15] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI2_END_ADDR_15 ,End address of port 2 address range [15]" tree.end tree "Port3 Setting Register" group.long 0x2EC++0x07 line.long 0x00 "DDR_CTL_187,Port3 Range[0 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_0 ,Start address of port 3 address range [0 ]" line.long 0x04 "DDR_CTL_188,Port3 Range[0 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_0 ,End address of port 3 address range [0 ]" group.long 0x2F4++0x07 line.long 0x00 "DDR_CTL_189,Port3 Range[1 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_1 ,Start address of port 3 address range [1 ]" line.long 0x04 "DDR_CTL_190,Port3 Range[1 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_1 ,End address of port 3 address range [1 ]" group.long 0x2FC++0x07 line.long 0x00 "DDR_CTL_191,Port3 Range[2 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_2 ,Start address of port 3 address range [2 ]" line.long 0x04 "DDR_CTL_192,Port3 Range[2 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_2 ,End address of port 3 address range [2 ]" group.long 0x304++0x07 line.long 0x00 "DDR_CTL_193,Port3 Range[3 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_3 ,Start address of port 3 address range [3 ]" line.long 0x04 "DDR_CTL_194,Port3 Range[3 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_3 ,End address of port 3 address range [3 ]" group.long 0x30C++0x07 line.long 0x00 "DDR_CTL_195,Port3 Range[4 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_4 ,Start address of port 3 address range [4 ]" line.long 0x04 "DDR_CTL_196,Port3 Range[4 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_4 ,End address of port 3 address range [4 ]" group.long 0x314++0x07 line.long 0x00 "DDR_CTL_197,Port3 Range[5 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_5 ,Start address of port 3 address range [5 ]" line.long 0x04 "DDR_CTL_198,Port3 Range[5 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_5 ,End address of port 3 address range [5 ]" group.long 0x31C++0x07 line.long 0x00 "DDR_CTL_199,Port3 Range[6 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_6 ,Start address of port 3 address range [6 ]" line.long 0x04 "DDR_CTL_200,Port3 Range[6 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_6 ,End address of port 3 address range [6 ]" group.long 0x324++0x07 line.long 0x00 "DDR_CTL_201,Port3 Range[7 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_7 ,Start address of port 3 address range [7 ]" line.long 0x04 "DDR_CTL_202,Port3 Range[7 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_7 ,End address of port 3 address range [7 ]" group.long 0x32C++0x07 line.long 0x00 "DDR_CTL_203,Port3 Range[8 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_8 ,Start address of port 3 address range [8 ]" line.long 0x04 "DDR_CTL_204,Port3 Range[8 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_8 ,End address of port 3 address range [8 ]" group.long 0x334++0x07 line.long 0x00 "DDR_CTL_205,Port3 Range[9 ] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_9 ,Start address of port 3 address range [9 ]" line.long 0x04 "DDR_CTL_206,Port3 Range[9 ] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_9 ,End address of port 3 address range [9 ]" group.long 0x33C++0x07 line.long 0x00 "DDR_CTL_207,Port3 Range[10] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_10 ,Start address of port 3 address range [10]" line.long 0x04 "DDR_CTL_208,Port3 Range[10] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_10 ,End address of port 3 address range [10]" group.long 0x344++0x07 line.long 0x00 "DDR_CTL_209,Port3 Range[11] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_11 ,Start address of port 3 address range [11]" line.long 0x04 "DDR_CTL_210,Port3 Range[11] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_11 ,End address of port 3 address range [11]" group.long 0x34C++0x07 line.long 0x00 "DDR_CTL_211,Port3 Range[12] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_12 ,Start address of port 3 address range [12]" line.long 0x04 "DDR_CTL_212,Port3 Range[12] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_12 ,End address of port 3 address range [12]" group.long 0x354++0x07 line.long 0x00 "DDR_CTL_213,Port3 Range[13] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_13 ,Start address of port 3 address range [13]" line.long 0x04 "DDR_CTL_214,Port3 Range[13] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_13 ,End address of port 3 address range [13]" group.long 0x35C++0x07 line.long 0x00 "DDR_CTL_215,Port3 Range[14] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_14 ,Start address of port 3 address range [14]" line.long 0x04 "DDR_CTL_216,Port3 Range[14] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_14 ,End address of port 3 address range [14]" group.long 0x364++0x07 line.long 0x00 "DDR_CTL_217,Port3 Range[15] Start Address Setting Register" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_START_ADDR_15 ,Start address of port 3 address range [15]" line.long 0x04 "DDR_CTL_218,Port3 Range[15] End Address Setting Register" hexmask.long.tbyte 0x04 0.--17. 1. " AXI3_END_ADDR_15 ,End address of port 3 address range [15]" group.long 0x368++0x03 line.long 0x00 "DDR_CTL_218,Port3 Range15 End Address Setting Register" bitfld.long 0x00 24.--25. " AXI0_RANGE_PROT_BITS_0 ,Allowed transaction types for port 0 address range 0" "Privileged and secure,Secure,Privileged,Full access" hexmask.long.tbyte 0x00 0.--17. 1. " AXI3_END_ADDR_15 ,End address of port 3 address range 15" tree.end tree "Port0 Protect Setting Register" group.long 0x36C++0x07 line.long 0x00 "DDR_CTL_219,Port0 Range[0 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_0 ,Axi0 range wid check bits 0 " hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_0 ,Axi0 range rid check bits 0 " line.long 0x04 "DDR_CTL_220,Port0 Range[0 ] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_1 ,Allowed transaction types for port 0 address range [1 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_0 ,Axi0 range wid check bits id lookup 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_0 ,Axi0 range rid check bits id lookup 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x374++0x07 line.long 0x00 "DDR_CTL_221,Port0 Range[1 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_1 ,Axi0 range wid check bits 1 " hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_1 ,Axi0 range rid check bits 1 " line.long 0x04 "DDR_CTL_222,Port0 Range[1 ] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_2 ,Allowed transaction types for port 0 address range [2 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_1 ,Axi0 range wid check bits id lookup 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_1 ,Axi0 range rid check bits id lookup 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x37C++0x07 line.long 0x00 "DDR_CTL_223,Port0 Range[2 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_2 ,Axi0 range wid check bits 2 " hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_2 ,Axi0 range rid check bits 2 " line.long 0x04 "DDR_CTL_224,Port0 Range[2 ] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_3 ,Allowed transaction types for port 0 address range [3 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_2 ,Axi0 range wid check bits id lookup 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_2 ,Axi0 range rid check bits id lookup 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x384++0x07 line.long 0x00 "DDR_CTL_225,Port0 Range[3 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_3 ,Axi0 range wid check bits 3 " hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_3 ,Axi0 range rid check bits 3 " line.long 0x04 "DDR_CTL_226,Port0 Range[3 ] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_4 ,Allowed transaction types for port 0 address range [4 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_3 ,Axi0 range wid check bits id lookup 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_3 ,Axi0 range rid check bits id lookup 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x38C++0x07 line.long 0x00 "DDR_CTL_227,Port0 Range[4 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_4 ,Axi0 range wid check bits 4 " hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_4 ,Axi0 range rid check bits 4 " line.long 0x04 "DDR_CTL_228,Port0 Range[4 ] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_5 ,Allowed transaction types for port 0 address range [5 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_4 ,Axi0 range wid check bits id lookup 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_4 ,Axi0 range rid check bits id lookup 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x394++0x07 line.long 0x00 "DDR_CTL_229,Port0 Range[5 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_5 ,Axi0 range wid check bits 5 " hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_5 ,Axi0 range rid check bits 5 " line.long 0x04 "DDR_CTL_230,Port0 Range[5 ] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_6 ,Allowed transaction types for port 0 address range [6 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_5 ,Axi0 range wid check bits id lookup 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_5 ,Axi0 range rid check bits id lookup 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x39C++0x07 line.long 0x00 "DDR_CTL_231,Port0 Range[6 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_6 ,Axi0 range wid check bits 6 " hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_6 ,Axi0 range rid check bits 6 " line.long 0x04 "DDR_CTL_232,Port0 Range[6 ] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_7 ,Allowed transaction types for port 0 address range [7 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_6 ,Axi0 range wid check bits id lookup 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_6 ,Axi0 range rid check bits id lookup 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3A4++0x07 line.long 0x00 "DDR_CTL_233,Port0 Range[7 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_7 ,Axi0 range wid check bits 7 " hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_7 ,Axi0 range rid check bits 7 " line.long 0x04 "DDR_CTL_234,Port0 Range[7 ] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_8 ,Allowed transaction types for port 0 address range [8 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_7 ,Axi0 range wid check bits id lookup 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_7 ,Axi0 range rid check bits id lookup 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3AC++0x07 line.long 0x00 "DDR_CTL_235,Port0 Range[8 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_8 ,Axi0 range wid check bits 8 " hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_8 ,Axi0 range rid check bits 8 " line.long 0x04 "DDR_CTL_236,Port0 Range[8 ] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_9 ,Allowed transaction types for port 0 address range [9 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_8 ,Axi0 range wid check bits id lookup 8 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_8 ,Axi0 range rid check bits id lookup 8 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3B4++0x07 line.long 0x00 "DDR_CTL_237,Port0 Range[9 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_9 ,Axi0 range wid check bits 9 " hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_9 ,Axi0 range rid check bits 9 " line.long 0x04 "DDR_CTL_238,Port0 Range[9 ] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_10 ,Allowed transaction types for port 0 address range [10]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_9 ,Axi0 range wid check bits id lookup 9 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_9 ,Axi0 range rid check bits id lookup 9 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3BC++0x07 line.long 0x00 "DDR_CTL_239,Port0 Range[10] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_10 ,Axi0 range wid check bits 10" hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_10 ,Axi0 range rid check bits 10" line.long 0x04 "DDR_CTL_240,Port0 Range[10] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_11 ,Allowed transaction types for port 0 address range [11]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_10 ,Axi0 range wid check bits id lookup 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_10 ,Axi0 range rid check bits id lookup 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3C4++0x07 line.long 0x00 "DDR_CTL_241,Port0 Range[11] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_11 ,Axi0 range wid check bits 11" hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_11 ,Axi0 range rid check bits 11" line.long 0x04 "DDR_CTL_242,Port0 Range[11] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_12 ,Allowed transaction types for port 0 address range [12]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_11 ,Axi0 range wid check bits id lookup 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_11 ,Axi0 range rid check bits id lookup 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3CC++0x07 line.long 0x00 "DDR_CTL_243,Port0 Range[12] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_12 ,Axi0 range wid check bits 12" hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_12 ,Axi0 range rid check bits 12" line.long 0x04 "DDR_CTL_244,Port0 Range[12] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_13 ,Allowed transaction types for port 0 address range [13]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_12 ,Axi0 range wid check bits id lookup 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_12 ,Axi0 range rid check bits id lookup 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3D4++0x07 line.long 0x00 "DDR_CTL_245,Port0 Range[13] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_13 ,Axi0 range wid check bits 13" hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_13 ,Axi0 range rid check bits 13" line.long 0x04 "DDR_CTL_246,Port0 Range[13] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_14 ,Allowed transaction types for port 0 address range [14]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_13 ,Axi0 range wid check bits id lookup 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_13 ,Axi0 range rid check bits id lookup 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3DC++0x07 line.long 0x00 "DDR_CTL_247,Port0 Range[14] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_14 ,Axi0 range wid check bits 14" hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_14 ,Axi0 range rid check bits 14" line.long 0x04 "DDR_CTL_248,Port0 Range[14] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_15 ,Allowed transaction types for port 0 address range [15]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_14 ,Axi0 range wid check bits id lookup 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_14 ,Axi0 range rid check bits id lookup 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3E4++0x07 line.long 0x00 "DDR_CTL_249,Port0 Range[15] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI0_RANGE_WID_CHECK_BITS_15 ,Axi0 range wid check bits 15" hexmask.long.word 0x00 0.--15. 1. " AXI0_RANGE_RID_CHECK_BITS_15 ,Axi0 range rid check bits 15" line.long 0x04 "DDR_CTL_250,Port0 Range[15] Protect Setting Register1" bitfld.long 0x04 16.--17. " AXI0_RANGE_PROT_BITS_16 ,Allowed transaction types for port 0 address range [16]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_15 ,Axi0 range wid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_15 ,Axi0 range rid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3E8++0x03 line.long 0x00 "DDR_CTL_250,Port0 Range15 Protect Setting Register2" bitfld.long 0x00 16.--17. " AXI1_RANGE_PROT_BITS_0 ,Allowed transaction types for port 1 address range 0" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x00 8.--11. " AXI0_RANGE_WID_CHECK_BITS_ID_LOOKUP_15 ,Axi0 range wid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " AXI0_RANGE_RID_CHECK_BITS_ID_LOOKUP_15 ,Axi0 range rid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "Port1 Protect Setting Register" group.long 0x3EC++0x07 line.long 0x00 "DDR_CTL_251,Port1 Range[0 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_0 ,Axi1 range rid check bits 0 " hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_0 ,Axi1 range rid check bits 0 " line.long 0x04 "DDR_CTL_252,Port1 Range[0 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_1 ,Allowed transaction types for port 0 address range [1 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_0 ,Axi1 range wid check bits id lookup 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_0 ,Axi1 range rid check bits id lookup 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3F4++0x07 line.long 0x00 "DDR_CTL_253,Port1 Range[1 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_1 ,Axi1 range rid check bits 1 " hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_1 ,Axi1 range rid check bits 1 " line.long 0x04 "DDR_CTL_254,Port1 Range[1 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_2 ,Allowed transaction types for port 0 address range [2 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_1 ,Axi1 range wid check bits id lookup 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_1 ,Axi1 range rid check bits id lookup 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x3FC++0x07 line.long 0x00 "DDR_CTL_255,Port1 Range[2 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_2 ,Axi1 range rid check bits 2 " hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_2 ,Axi1 range rid check bits 2 " line.long 0x04 "DDR_CTL_256,Port1 Range[2 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_3 ,Allowed transaction types for port 0 address range [3 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_2 ,Axi1 range wid check bits id lookup 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_2 ,Axi1 range rid check bits id lookup 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x404++0x07 line.long 0x00 "DDR_CTL_257,Port1 Range[3 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_3 ,Axi1 range rid check bits 3 " hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_3 ,Axi1 range rid check bits 3 " line.long 0x04 "DDR_CTL_258,Port1 Range[3 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_4 ,Allowed transaction types for port 0 address range [4 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_3 ,Axi1 range wid check bits id lookup 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_3 ,Axi1 range rid check bits id lookup 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x40C++0x07 line.long 0x00 "DDR_CTL_259,Port1 Range[4 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_4 ,Axi1 range rid check bits 4 " hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_4 ,Axi1 range rid check bits 4 " line.long 0x04 "DDR_CTL_260,Port1 Range[4 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_5 ,Allowed transaction types for port 0 address range [5 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_4 ,Axi1 range wid check bits id lookup 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_4 ,Axi1 range rid check bits id lookup 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x414++0x07 line.long 0x00 "DDR_CTL_261,Port1 Range[5 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_5 ,Axi1 range rid check bits 5 " hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_5 ,Axi1 range rid check bits 5 " line.long 0x04 "DDR_CTL_262,Port1 Range[5 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_6 ,Allowed transaction types for port 0 address range [6 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_5 ,Axi1 range wid check bits id lookup 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_5 ,Axi1 range rid check bits id lookup 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x41C++0x07 line.long 0x00 "DDR_CTL_263,Port1 Range[6 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_6 ,Axi1 range rid check bits 6 " hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_6 ,Axi1 range rid check bits 6 " line.long 0x04 "DDR_CTL_264,Port1 Range[6 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_7 ,Allowed transaction types for port 0 address range [7 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_6 ,Axi1 range wid check bits id lookup 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_6 ,Axi1 range rid check bits id lookup 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x424++0x07 line.long 0x00 "DDR_CTL_265,Port1 Range[7 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_7 ,Axi1 range rid check bits 7 " hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_7 ,Axi1 range rid check bits 7 " line.long 0x04 "DDR_CTL_266,Port1 Range[7 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_8 ,Allowed transaction types for port 0 address range [8 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_7 ,Axi1 range wid check bits id lookup 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_7 ,Axi1 range rid check bits id lookup 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x42C++0x07 line.long 0x00 "DDR_CTL_267,Port1 Range[8 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_8 ,Axi1 range rid check bits 8 " hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_8 ,Axi1 range rid check bits 8 " line.long 0x04 "DDR_CTL_268,Port1 Range[8 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_9 ,Allowed transaction types for port 0 address range [9 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_8 ,Axi1 range wid check bits id lookup 8 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_8 ,Axi1 range rid check bits id lookup 8 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x434++0x07 line.long 0x00 "DDR_CTL_269,Port1 Range[9 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_9 ,Axi1 range rid check bits 9 " hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_9 ,Axi1 range rid check bits 9 " line.long 0x04 "DDR_CTL_270,Port1 Range[9 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_10 ,Allowed transaction types for port 0 address range [10]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_9 ,Axi1 range wid check bits id lookup 9 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_9 ,Axi1 range rid check bits id lookup 9 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x43C++0x07 line.long 0x00 "DDR_CTL_271,Port1 Range[10] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_10 ,Axi1 range rid check bits 10" hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_10 ,Axi1 range rid check bits 10" line.long 0x04 "DDR_CTL_272,Port1 Range[10] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_11 ,Allowed transaction types for port 0 address range [11]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_10 ,Axi1 range wid check bits id lookup 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_10 ,Axi1 range rid check bits id lookup 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x444++0x07 line.long 0x00 "DDR_CTL_273,Port1 Range[11] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_11 ,Axi1 range rid check bits 11" hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_11 ,Axi1 range rid check bits 11" line.long 0x04 "DDR_CTL_274,Port1 Range[11] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_12 ,Allowed transaction types for port 0 address range [12]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_11 ,Axi1 range wid check bits id lookup 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_11 ,Axi1 range rid check bits id lookup 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x44C++0x07 line.long 0x00 "DDR_CTL_275,Port1 Range[12] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_12 ,Axi1 range rid check bits 12" hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_12 ,Axi1 range rid check bits 12" line.long 0x04 "DDR_CTL_276,Port1 Range[12] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_13 ,Allowed transaction types for port 0 address range [13]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_12 ,Axi1 range wid check bits id lookup 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_12 ,Axi1 range rid check bits id lookup 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x454++0x07 line.long 0x00 "DDR_CTL_277,Port1 Range[13] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_13 ,Axi1 range rid check bits 13" hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_13 ,Axi1 range rid check bits 13" line.long 0x04 "DDR_CTL_278,Port1 Range[13] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_14 ,Allowed transaction types for port 0 address range [14]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_13 ,Axi1 range wid check bits id lookup 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_13 ,Axi1 range rid check bits id lookup 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x45C++0x07 line.long 0x00 "DDR_CTL_279,Port1 Range[14] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_14 ,Axi1 range rid check bits 14" hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_14 ,Axi1 range rid check bits 14" line.long 0x04 "DDR_CTL_280,Port1 Range[14] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_15 ,Allowed transaction types for port 0 address range [15]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_14 ,Axi1 range wid check bits id lookup 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_14 ,Axi1 range rid check bits id lookup 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x464++0x07 line.long 0x00 "DDR_CTL_281,Port1 Range[15] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI1_RANGE_WID_CHECK_BITS_15 ,Axi1 range rid check bits 15" hexmask.long.word 0x00 0.--15. 1. " AXI1_RANGE_RID_CHECK_BITS_15 ,Axi1 range rid check bits 15" line.long 0x04 "DDR_CTL_282,Port1 Range[15] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI1_RANGE_PROT_BITS_16 ,Allowed transaction types for port 0 address range [16]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_15 ,Axi1 range wid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_15 ,Axi1 range rid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x468++0x03 line.long 0x00 "DDR_CTL_282,Port1 Range15 Protect Setting Register2" bitfld.long 0x00 16.--17. " AXI2_RANGE_PROT_BITS_0 ,Allowed transaction types for port 1 address range 0" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x00 8.--11. " AXI1_RANGE_WID_CHECK_BITS_ID_LOOKUP_15 ,Axi1 range wid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " AXI1_RANGE_RID_CHECK_BITS_ID_LOOKUP_15 ,Axi1 range rid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "Port2 Protect Setting Register" group.long 0x46C++0x07 line.long 0x00 "DDR_CTL_283,Port2 Range[0 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_0 ,Axi2 range wid check bits_0 " hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_0 ,Axi2 range rid check bits 0 " line.long 0x04 "DDR_CTL_284,Port2 Range[0 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_1 ,Allowed transaction types for port 0 address range [1 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_0 ,Axi2 range wid check bits id lookup 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_0 ,Axi2 range rid check bits id lookup 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x474++0x07 line.long 0x00 "DDR_CTL_285,Port2 Range[1 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_1 ,Axi2 range wid check bits_1 " hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_1 ,Axi2 range rid check bits 1 " line.long 0x04 "DDR_CTL_286,Port2 Range[1 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_2 ,Allowed transaction types for port 0 address range [2 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_1 ,Axi2 range wid check bits id lookup 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_1 ,Axi2 range rid check bits id lookup 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x47C++0x07 line.long 0x00 "DDR_CTL_287,Port2 Range[2 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_2 ,Axi2 range wid check bits_2 " hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_2 ,Axi2 range rid check bits 2 " line.long 0x04 "DDR_CTL_288,Port2 Range[2 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_3 ,Allowed transaction types for port 0 address range [3 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_2 ,Axi2 range wid check bits id lookup 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_2 ,Axi2 range rid check bits id lookup 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x484++0x07 line.long 0x00 "DDR_CTL_289,Port2 Range[3 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_3 ,Axi2 range wid check bits_3 " hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_3 ,Axi2 range rid check bits 3 " line.long 0x04 "DDR_CTL_290,Port2 Range[3 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_4 ,Allowed transaction types for port 0 address range [4 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_3 ,Axi2 range wid check bits id lookup 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_3 ,Axi2 range rid check bits id lookup 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x48C++0x07 line.long 0x00 "DDR_CTL_291,Port2 Range[4 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_4 ,Axi2 range wid check bits_4 " hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_4 ,Axi2 range rid check bits 4 " line.long 0x04 "DDR_CTL_292,Port2 Range[4 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_5 ,Allowed transaction types for port 0 address range [5 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_4 ,Axi2 range wid check bits id lookup 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_4 ,Axi2 range rid check bits id lookup 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x494++0x07 line.long 0x00 "DDR_CTL_293,Port2 Range[5 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_5 ,Axi2 range wid check bits_5 " hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_5 ,Axi2 range rid check bits 5 " line.long 0x04 "DDR_CTL_294,Port2 Range[5 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_6 ,Allowed transaction types for port 0 address range [6 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_5 ,Axi2 range wid check bits id lookup 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_5 ,Axi2 range rid check bits id lookup 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x49C++0x07 line.long 0x00 "DDR_CTL_295,Port2 Range[6 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_6 ,Axi2 range wid check bits_6 " hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_6 ,Axi2 range rid check bits 6 " line.long 0x04 "DDR_CTL_296,Port2 Range[6 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_7 ,Allowed transaction types for port 0 address range [7 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_6 ,Axi2 range wid check bits id lookup 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_6 ,Axi2 range rid check bits id lookup 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4A4++0x07 line.long 0x00 "DDR_CTL_297,Port2 Range[7 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_7 ,Axi2 range wid check bits_7 " hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_7 ,Axi2 range rid check bits 7 " line.long 0x04 "DDR_CTL_298,Port2 Range[7 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_8 ,Allowed transaction types for port 0 address range [8 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_7 ,Axi2 range wid check bits id lookup 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_7 ,Axi2 range rid check bits id lookup 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4AC++0x07 line.long 0x00 "DDR_CTL_299,Port2 Range[8 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_8 ,Axi2 range wid check bits_8 " hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_8 ,Axi2 range rid check bits 8 " line.long 0x04 "DDR_CTL_300,Port2 Range[8 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_9 ,Allowed transaction types for port 0 address range [9 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_8 ,Axi2 range wid check bits id lookup 8 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_8 ,Axi2 range rid check bits id lookup 8 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4B4++0x07 line.long 0x00 "DDR_CTL_301,Port2 Range[9 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_9 ,Axi2 range wid check bits_9 " hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_9 ,Axi2 range rid check bits 9 " line.long 0x04 "DDR_CTL_302,Port2 Range[9 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_10 ,Allowed transaction types for port 0 address range [10]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_9 ,Axi2 range wid check bits id lookup 9 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_9 ,Axi2 range rid check bits id lookup 9 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4BC++0x07 line.long 0x00 "DDR_CTL_303,Port2 Range[10] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_10 ,Axi2 range wid check bits_10" hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_10 ,Axi2 range rid check bits 10" line.long 0x04 "DDR_CTL_304,Port2 Range[10] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_11 ,Allowed transaction types for port 0 address range [11]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_10 ,Axi2 range wid check bits id lookup 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_10 ,Axi2 range rid check bits id lookup 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4C4++0x07 line.long 0x00 "DDR_CTL_305,Port2 Range[11] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_11 ,Axi2 range wid check bits_11" hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_11 ,Axi2 range rid check bits 11" line.long 0x04 "DDR_CTL_306,Port2 Range[11] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_12 ,Allowed transaction types for port 0 address range [12]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_11 ,Axi2 range wid check bits id lookup 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_11 ,Axi2 range rid check bits id lookup 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4CC++0x07 line.long 0x00 "DDR_CTL_307,Port2 Range[12] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_12 ,Axi2 range wid check bits_12" hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_12 ,Axi2 range rid check bits 12" line.long 0x04 "DDR_CTL_308,Port2 Range[12] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_13 ,Allowed transaction types for port 0 address range [13]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_12 ,Axi2 range wid check bits id lookup 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_12 ,Axi2 range rid check bits id lookup 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4D4++0x07 line.long 0x00 "DDR_CTL_309,Port2 Range[13] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_13 ,Axi2 range wid check bits_13" hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_13 ,Axi2 range rid check bits 13" line.long 0x04 "DDR_CTL_310,Port2 Range[13] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_14 ,Allowed transaction types for port 0 address range [14]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_13 ,Axi2 range wid check bits id lookup 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_13 ,Axi2 range rid check bits id lookup 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4DC++0x07 line.long 0x00 "DDR_CTL_311,Port2 Range[14] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_14 ,Axi2 range wid check bits_14" hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_14 ,Axi2 range rid check bits 14" line.long 0x04 "DDR_CTL_312,Port2 Range[14] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_15 ,Allowed transaction types for port 0 address range [15]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_14 ,Axi2 range wid check bits id lookup 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_14 ,Axi2 range rid check bits id lookup 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4E4++0x07 line.long 0x00 "DDR_CTL_313,Port2 Range[15] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI2_RANGE_WID_CHECK_BITS_15 ,Axi2 range wid check bits_15" hexmask.long.word 0x00 0.--15. 1. " AXI2_RANGE_RID_CHECK_BITS_15 ,Axi2 range rid check bits 15" line.long 0x04 "DDR_CTL_314,Port2 Range[15] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI2_RANGE_PROT_BITS_16 ,Allowed transaction types for port 0 address range [16]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_15 ,Axi2 range wid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_15 ,Axi2 range rid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4E8++0x03 line.long 0x00 "DDR_CTL_314,Port2 Range15 Protect Setting Register2" bitfld.long 0x00 16.--17. " AXI3_RANGE_PROT_BITS_0 ,Allowed transaction types for port 1 address range 0" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x00 8.--11. " AXI2_RANGE_WID_CHECK_BITS_ID_LOOKUP_15 ,Axi2 range wid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " AXI2_RANGE_RID_CHECK_BITS_ID_LOOKUP_15 ,Axi2 range rid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "Port3 Protect Setting Register" group.long 0x4EC++0x07 line.long 0x00 "DDR_CTL_315,Port3 Range[0 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_0 ,Axi3 range wid check bits 0 " hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_0 ,Axi3 range rid check bits 0 " line.long 0x04 "DDR_CTL_316,Port3 Range[0 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_1 ,Allowed transaction types for port 0 address range [1 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_0 ,Axi3 range wid check bits id lookup 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_0 ,Axi3 range rid check bits id lookup 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4F4++0x07 line.long 0x00 "DDR_CTL_317,Port3 Range[1 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_1 ,Axi3 range wid check bits 1 " hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_1 ,Axi3 range rid check bits 1 " line.long 0x04 "DDR_CTL_318,Port3 Range[1 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_2 ,Allowed transaction types for port 0 address range [2 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_1 ,Axi3 range wid check bits id lookup 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_1 ,Axi3 range rid check bits id lookup 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x4FC++0x07 line.long 0x00 "DDR_CTL_319,Port3 Range[2 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_2 ,Axi3 range wid check bits 2 " hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_2 ,Axi3 range rid check bits 2 " line.long 0x04 "DDR_CTL_320,Port3 Range[2 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_3 ,Allowed transaction types for port 0 address range [3 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_2 ,Axi3 range wid check bits id lookup 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_2 ,Axi3 range rid check bits id lookup 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x504++0x07 line.long 0x00 "DDR_CTL_321,Port3 Range[3 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_3 ,Axi3 range wid check bits 3 " hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_3 ,Axi3 range rid check bits 3 " line.long 0x04 "DDR_CTL_322,Port3 Range[3 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_4 ,Allowed transaction types for port 0 address range [4 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_3 ,Axi3 range wid check bits id lookup 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_3 ,Axi3 range rid check bits id lookup 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x50C++0x07 line.long 0x00 "DDR_CTL_323,Port3 Range[4 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_4 ,Axi3 range wid check bits 4 " hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_4 ,Axi3 range rid check bits 4 " line.long 0x04 "DDR_CTL_324,Port3 Range[4 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_5 ,Allowed transaction types for port 0 address range [5 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_4 ,Axi3 range wid check bits id lookup 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_4 ,Axi3 range rid check bits id lookup 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x514++0x07 line.long 0x00 "DDR_CTL_325,Port3 Range[5 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_5 ,Axi3 range wid check bits 5 " hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_5 ,Axi3 range rid check bits 5 " line.long 0x04 "DDR_CTL_326,Port3 Range[5 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_6 ,Allowed transaction types for port 0 address range [6 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_5 ,Axi3 range wid check bits id lookup 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_5 ,Axi3 range rid check bits id lookup 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x51C++0x07 line.long 0x00 "DDR_CTL_327,Port3 Range[6 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_6 ,Axi3 range wid check bits 6 " hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_6 ,Axi3 range rid check bits 6 " line.long 0x04 "DDR_CTL_328,Port3 Range[6 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_7 ,Allowed transaction types for port 0 address range [7 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_6 ,Axi3 range wid check bits id lookup 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_6 ,Axi3 range rid check bits id lookup 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x524++0x07 line.long 0x00 "DDR_CTL_329,Port3 Range[7 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_7 ,Axi3 range wid check bits 7 " hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_7 ,Axi3 range rid check bits 7 " line.long 0x04 "DDR_CTL_330,Port3 Range[7 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_8 ,Allowed transaction types for port 0 address range [8 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_7 ,Axi3 range wid check bits id lookup 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_7 ,Axi3 range rid check bits id lookup 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x52C++0x07 line.long 0x00 "DDR_CTL_331,Port3 Range[8 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_8 ,Axi3 range wid check bits 8 " hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_8 ,Axi3 range rid check bits 8 " line.long 0x04 "DDR_CTL_332,Port3 Range[8 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_9 ,Allowed transaction types for port 0 address range [9 ]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_8 ,Axi3 range wid check bits id lookup 8 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_8 ,Axi3 range rid check bits id lookup 8 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x534++0x07 line.long 0x00 "DDR_CTL_333,Port3 Range[9 ] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_9 ,Axi3 range wid check bits 9 " hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_9 ,Axi3 range rid check bits 9 " line.long 0x04 "DDR_CTL_334,Port3 Range[9 ] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_10 ,Allowed transaction types for port 0 address range [10]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_9 ,Axi3 range wid check bits id lookup 9 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_9 ,Axi3 range rid check bits id lookup 9 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x53C++0x07 line.long 0x00 "DDR_CTL_335,Port3 Range[10] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_10 ,Axi3 range wid check bits 10" hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_10 ,Axi3 range rid check bits 10" line.long 0x04 "DDR_CTL_336,Port3 Range[10] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_11 ,Allowed transaction types for port 0 address range [11]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_10 ,Axi3 range wid check bits id lookup 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_10 ,Axi3 range rid check bits id lookup 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x544++0x07 line.long 0x00 "DDR_CTL_337,Port3 Range[11] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_11 ,Axi3 range wid check bits 11" hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_11 ,Axi3 range rid check bits 11" line.long 0x04 "DDR_CTL_338,Port3 Range[11] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_12 ,Allowed transaction types for port 0 address range [12]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_11 ,Axi3 range wid check bits id lookup 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_11 ,Axi3 range rid check bits id lookup 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x54C++0x07 line.long 0x00 "DDR_CTL_339,Port3 Range[12] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_12 ,Axi3 range wid check bits 12" hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_12 ,Axi3 range rid check bits 12" line.long 0x04 "DDR_CTL_340,Port3 Range[12] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_13 ,Allowed transaction types for port 0 address range [13]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_12 ,Axi3 range wid check bits id lookup 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_12 ,Axi3 range rid check bits id lookup 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x554++0x07 line.long 0x00 "DDR_CTL_341,Port3 Range[13] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_13 ,Axi3 range wid check bits 13" hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_13 ,Axi3 range rid check bits 13" line.long 0x04 "DDR_CTL_342,Port3 Range[13] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_14 ,Allowed transaction types for port 0 address range [14]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_13 ,Axi3 range wid check bits id lookup 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_13 ,Axi3 range rid check bits id lookup 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x55C++0x07 line.long 0x00 "DDR_CTL_343,Port3 Range[14] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_14 ,Axi3 range wid check bits 14" hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_14 ,Axi3 range rid check bits 14" line.long 0x04 "DDR_CTL_344,Port3 Range[14] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_15 ,Allowed transaction types for port 0 address range [15]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_14 ,Axi3 range wid check bits id lookup 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_14 ,Axi3 range rid check bits id lookup 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x564++0x07 line.long 0x00 "DDR_CTL_345,Port3 Range[15] Protect Setting Register1" hexmask.long.word 0x00 16.--31. 1. " AXI3_RANGE_WID_CHECK_BITS_15 ,Axi3 range wid check bits 15" hexmask.long.word 0x00 0.--15. 1. " AXI3_RANGE_RID_CHECK_BITS_15 ,Axi3 range rid check bits 15" line.long 0x04 "DDR_CTL_346,Port3 Range[15] Protect Setting Register2" bitfld.long 0x04 16.--17. " AXI3_RANGE_PROT_BITS_16 ,Allowed transaction types for port 0 address range [16]" "Privileged and secure,Secure,Privileged,Full access" bitfld.long 0x04 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_15 ,Axi3 range wid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_15 ,Axi3 range rid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end textline " " group.long 0x568++0x6B line.long 0x00 "DDR_CTL_346,Port3 Range15 Protect Setting Register2" hexmask.long.byte 0x00 24.--30. 1. " AXI0_BDW ,Maximum bandwidth percentage for port 0" bitfld.long 0x00 16.--18. " ARB_CMD_Q_THRESHOLD ,Threshold for command queue fullness related to overflow" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--11. " AXI3_RANGE_WID_CHECK_BITS_ID_LOOKUP_15 ,Axi3 range wid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AXI3_RANGE_RID_CHECK_BITS_ID_LOOKUP_15 ,Axi3 range rid check bits id lookup 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "DDR_CTL_347,DDR-Controller Status & Control 347" bitfld.long 0x04 24. " AXI1_BDW_OVFLOW ,Port 1 behavior when bandwidth maximized" "Not allowed,Allowed" hexmask.long.byte 0x04 16.--22. 1. " AXI1_BDW ,Maximum bandwidth percentage for port 1" textline " " hexmask.long.byte 0x04 8.--14. 1. " AXI0_CURRENT_BDW ,Current bandwidth usage percentage for port 0" bitfld.long 0x04 0. " AXI0_BDW_OVFLOW ,Port 0 behavior when bandwidth maximized" "Not allowed,Allowed" line.long 0x08 "DDR_CTL_348,DDR-Controller Status & Control 348" hexmask.long.byte 0x08 24.--30. 1. " AXI2_CURRENT_BDW ,Current bandwidth usage percentage for port 2" bitfld.long 0x08 16. " AXI2_BDW_OVFLOW ,Port 2 behavior when bandwidth maximized" "Not allowed,Allowed" textline " " hexmask.long.byte 0x08 8.--14. 1. " AXI2_BDW ,Maximum bandwidth percentage for port 2" hexmask.long.byte 0x08 0.--6. 1. " AXI1_CURRENT_BDW ,Current bandwidth usage percentage for port 1" line.long 0x0C "DDR_CTL_349,DDR-Controller Status & Control 349" rbitfld.long 0x0C 24.--25. " CKE_STATUS ,Register access to cke_status signal" "0,1,2,3" hexmask.long.byte 0x0C 16.--22. 1. " AXI3_CURRENT_BDW ,Current bandwidth usage percentage for port 3" textline " " bitfld.long 0x0C 8. " AXI3_BDW_OVFLOW ,Port 3 behavior when bandwidth maximized" "Not allowed,Allowed" hexmask.long.byte 0x0C 0.--6. 1. " AXI3_BDW ,Maximum bandwidth percentage for port 3" line.long 0x10 "DDR_CTL_350,DDR-Controller Status & Control 350" hexmask.long.byte 0x10 24.--31. 1. " DLL_RST_ADJ_DLY ,Minimum cycles after setting master delay in DLL until the DLL reset signal dll_rst_n may be asserted" hexmask.long.word 0x10 8.--23. 1. " DLL_RST_DELAY ,Minimum cycles required for DLL reset signal dll_rst_n to be held" textline " " rbitfld.long 0x10 0. " MEM_RST_VALID ,Register access to mem_rst_valid signal" "No access,Access" line.long 0x14 "DDR_CTL_351,DDR-Controller Status & Control 351" rbitfld.long 0x14 24.--29. " TDFI_RDDATA_EN ,Holds the calculated DFI tRDDATA_EN timing parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x14 16.--21. " TDFI_PHY_RDLAT ,DFI tPHY_RDLAT timing parameter,the maximum cycles between a dfi_rddata_en assertion and a dfi_rddata_valid assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " hexmask.long.byte 0x14 8.--14. 1. " UPDATE_ERROR_STATUS ,Identifies the source of any DFI MC-initiated or PHY-initiated update errors" rbitfld.long 0x14 0.--5. " TDFI_PHY_WRLAT ,Holds the calculated DFI tPHY_WRLAT timing parameter (in DFI PHY clocks)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "DDR_CTL_352,DDR-Controller Status & Control 352" hexmask.long.word 0x18 16.--29. 1. " TDFI_CTRLUPD_MAX ,DFI tCTRLUPD_MAX timing parameter (in DFI clocks)" rbitfld.long 0x18 8.--11. " TDFI_CTRLUPD_MIN ,Reports the DFI tCTRLUPD_MIN timing parameter (in DFI clocks), the minimum cycles that dfi_ctrlupd_req must be asserted" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 1. " DRAM_CLK_DISABLE_cs1 ,Set value for the dfi_dram_clk_disable signal(controls cs1)" "No,Yes" bitfld.long 0x18 0. " DRAM_CLK_DISABLE_cs0 ,Set value for the dfi_dram_clk_disable signal(controls cs0)" "No,Yes" line.long 0x1C "DDR_CTL_353,DDR-Controller Status & Control 353" hexmask.long.word 0x1C 16.--31. 1. " TDFI_PHYUPD_TYPE1 ,DFI tPHYUPD_TYPE1 timing parameter (in DFI clocks)" hexmask.long.word 0x1C 0.--15. 1. " TDFI_PHYUPD_TYPE0 ,DFI tPHYUPD_TYPE0 timing parameter (in DFI clocks)" line.long 0x20 "DDR_CTL_354,DDR-Controller Status & Control 354" hexmask.long.word 0x20 16.--31. 1. " TDFI_PHYUPD_TYPE3 ,DFI tPHYUPD_TYPE3 timing parameter (in DFI clocks)" hexmask.long.word 0x20 0.--15. 1. " TDFI_PHYUPD_TYPE2 ,DFI tPHYUPD_TYPE2 timing parameter (in DFI clocks)" line.long 0x24 "DDR_CTL_355,DDR-Controller Status & Control 355" hexmask.long.word 0x24 0.--13. 1. " TDFI_PHYUPD_RESP ,DFI tPHYUPD_RESP timing parameter (in DFI clocks)" line.long 0x28 "DDR_CTL_356,DDR-Controller Status & Control 356" line.long 0x2C "DDR_CTL_357,DDR-Controller Status & Control 357" bitfld.long 0x2C 24.--27. " TDFI_DRAM_CLK_DISABLE ,DFI tDRAM_CLK_DISABLE timing parameter (in DFI clocks)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 16.--19. " TDFI_CTRL_DELAY ,DFI tCTRL_DELAY timing parameter (in DFI clocks)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x2C 8.--13. " WRLAT_ADJ ,Adjustment value for PHY write timing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x2C 0.--5. " RDLAT_ADJ ,Adjustment value for PHY read timing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x30 "DDR_CTL_358,DDR-Controller Status & Control 358" hexmask.long.word 0x30 16.--25. 1. " TDFI_WRLVL_WW ,DFI tWRLVL_WW timing parameter (in DFI clocks)" hexmask.long.byte 0x30 8.--15. 1. " TDFI_WRLVL_EN ,DFI tWRLVL_EN timing parameter (in DFI clocks)" textline " " bitfld.long 0x30 0.--3. " TDFI_DRAM_CLK_ENABLE ,DFI tDRAM_CLK_ENABLE timing parameter (in DFI clocks)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "DDR_CTL_359,DDR-Controller Status & Control 359" line.long 0x38 "DDR_CTL_360,DDR-Controller Status & Control 360" line.long 0x3C "DDR_CTL_361,DDR-Controller Status & Control 361" hexmask.long.byte 0x3C 24.--31. 1. " TDFI_WRLVL_RESPLAT ,DFI tWRLVL_RESPLAT timing parameter (in DFI clocks)" hexmask.long.byte 0x3C 16.--23. 1. " TDFI_WRLVL_DLL ,DFI tWRLVL_DLL timing parameter (in DFI clocks)" textline " " hexmask.long.word 0x3C 0.--15. 1. " DFI_WRLVL_MAX_DELAY ,Maximum number of elements for the write level delay line" line.long 0x40 "DDR_CTL_362,DDR-Controller Status & Control 362" hexmask.long.byte 0x40 24.--31. 1. " TDFI_RDLVL_LOAD ,DFI tRDLVL_LOAD timing parameter (in DFI clocks)" hexmask.long.byte 0x40 16.--23. 1. " TDFI_RDLVL_DLL ,DFI tRDLVL_DLL timing parameter (in DFI clocks)" textline " " hexmask.long.byte 0x40 8.--15. 1. " TDFI_RDLVL_EN ,DFI tRDLVL_EN timing parameter (in DFI clocks)" hexmask.long.byte 0x40 0.--7. 1. " TDFI_WRLVL_LOAD ,DFI tWRLVL_LOAD timing parameter (in DFI clocks)" line.long 0x44 "DDR_CTL_363,DDR-Controller Status & Control 363" hexmask.long.word 0x44 8.--23. 1. " RDLVL_MAX_DELAY ,Maximum number of elements for the data eye training delay line" hexmask.long.byte 0x44 0.--7. 1. " TDFI_RDLVL_RESPLAT ,DFI tRDLVL_RESPLAT timing parameter (in DFI clocks)" line.long 0x48 "DDR_CTL_364,DDR-Controller Status & Control 364" hexmask.long.word 0x48 16.--25. 1. " TDFI_RDLVL_RR ,DFI tRDLVL_RR timing parameter (in DFI clocks)" hexmask.long.word 0x48 0.--15. 1. " RDLVL_GATE_MAX_DELAY ,Maximum number of elements for the gate delay" line.long 0x4C "DDR_CTL_365,DDR-Controller Status & Control 365" line.long 0x50 "DDR_CTL_366,DDR-Controller Status & Control 366" hexmask.long.tbyte 0x50 0.--19. 1. " RDLVL_RESP_MASK ,Mask for the dfi_rdlvl_resp signal during data eye training" line.long 0x54 "DDR_CTL_367,DDR-Controller Status & Control 367" bitfld.long 0x54 24. " RDLVL_EN ,Enable the MC data eye training module" "Disabled,Enabled" hexmask.long.tbyte 0x54 0.--19. 1. " RDLVL_GATE_RESP_MASK ,Mask for the dfi_rdlvl_resp signal during gate training" line.long 0x58 "DDR_CTL_368,DDR-Controller Status & Control 368" bitfld.long 0x58 8. " RDLVL_GATE_PREAMBLE_CHECK_EN ,Enable the preamble check sequence during gate training" "Disabled,Enabled" bitfld.long 0x58 0. " RDLVL_GATE_EN ,Enable the MC gate training module" "Disabled,Enabled" line.long 0x5C "DDR_CTL_369,DDR-Controller Status & Control 369" line.long 0x60 "DDR_CTL_370,DDR-Controller Status & Control 370" bitfld.long 0x60 29. " RDLVL_ERROR_STATUS[1] ,TDFI_RDLVL_RESP parameter violation" "Not set,Set" bitfld.long 0x60 28. " RDLVL_ERROR_STATUS[0] ,TDFI_RDLVL_MAX parameter violation" "Not set,Set" textline " " bitfld.long 0x60 8.--11. " RDLVL_GATE_DQ_0_COUNT ,Number of consecutive 0s that defines a 1 to 0 transition for gate training" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 0.--3. " RDLVL_DQ_0_COUNT ,Number of consecutive 0s that defines a 1 to 0 transition for data eye training" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x64 "DDR_CTL_371,DDR-Controller Status & Control 371" hexmask.long.word 0x64 16.--31. 1. " RDLVL_GATE_INTERVAL ,Number of long count sequences counted between automatic gate training commands" hexmask.long.word 0x64 0.--15. 1. " RDLVL_INTERVAL ,Number of long count sequences counted between automatic data eye training commands" line.long 0x68 "DDR_CTL_372,DDR-Controller Status & Control 372" bitfld.long 0x68 24. " OPTIMAL_RMODW_EN ,Enables optimized RMODW logic in the controller" "Disabled,Enabled" hexmask.long.byte 0x68 16.--23. 0x01 " MEMCD_RMODW_FIFO_PTR_WIDTH ,Reports the width of the controller core read/modify/write FIFO pointer" textline " " hexmask.long.byte 0x68 8.--15. 0x01 " MEMCD_RMODW_FIFO_DEPTH ,Reports the depth of the controller core read/modify/write FIFO" bitfld.long 0x68 0.--2. " TDFI_PHY_WRDATA ,DFI tPHY_WRDATA timing parameter (in DFI PHY clocks)" "0,1,2,3,4,5,6,7" group.long 0x5D8++0x03 line.long 0x00 "DDR_CTL_374,DDR-Controller Status & Control 374" bitfld.long 0x00 24. " AXI3_ALL_STROBES_USED_ENABLE ,Enables use of the AWALLSTRB signal for AXI port 3" "Disabled,Enabled" bitfld.long 0x00 16. " AXI2_ALL_STROBES_USED_ENABLE ,Enables use of the AWALLSTRB signal for AXI port 2" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " AXI1_ALL_STROBES_USED_ENABLE ,Enables use of the AWALLSTRB signal for AXI port 1" "Disabled,Enabled" bitfld.long 0x00 0. " AXI0_ALL_STROBES_USED_ENABLE ,Enables use of the AWALLSTRB signal for AXI port 0" "Disabled,Enabled" tree.end tree "DDR PHY Register" group.long 0x1000++0x0B line.long 0x00 "FUNCCTRL,Function Control Register" hexmask.long.byte 0x00 16.--22. 1. " MASKSDLOFS ,Hi-Z mask circuit setting register" bitfld.long 0x00 8.--9. " IFSEL ,Voltage setting of interface" "DVDDQ 1.8V,DVDDQ 1.5V,," textline " " bitfld.long 0x00 0. " FUNCRSTB ,Reset setting in functional block" "Reset,No reset" line.long 0x04 "DLLCTRL,MDLL Control Register" rbitfld.long 0x04 26. " ASDLLOCK ,Lock signal of Mater DLL final" "Unlock,Lock" rbitfld.long 0x04 25. " MDLLOCK ,Lock signal of Mater DLL evaluation" "Unlock,Lock" textline " " rbitfld.long 0x04 24. " MSATFG ,Master DLL Saturation Flag" "Not occurred,Occurred" bitfld.long 0x04 22. " MDACNTM ,Write of control code of Master DLL" "Not memorized,Memorized" textline " " bitfld.long 0x04 21. " SDLYCTRL ,Control selection of Slave DLL" "Master DLL,MDACNT" bitfld.long 0x04 20. " DACNTUPD ,Update of control code of Slave Delay" "Not reflected,Reflected" textline " " hexmask.long.word 0x04 8.--17. 1. " MDACNT ,Master DLL code monitor signal" bitfld.long 0x04 4. " MSATMODE ,Saturate mode setting" "Off,On" textline " " bitfld.long 0x04 3. " DDMODE ,Double Delay mode setting" "DDR3,DDR2" bitfld.long 0x04 1.--2. " MFSL ,SRCLK/HRCLK frequency band setting" "0,1,2,3" textline " " bitfld.long 0x04 0. " MDLLSTBY ,Master DLLSTBY setting" "No Reset,Reset" line.long 0x08 "ZQCALCTRL,ZQ Calibration Control Register" rbitfld.long 0x08 31. " ZQCALRUN ,State of ZQ calibration" "Stopped,Started" rbitfld.long 0x08 30. " ZQCALEND ,State of ZQ calibration end" "Not ended,Ended" textline " " rbitfld.long 0x08 29. " ZQCALGAP ,Signal that indicates there is difference between ZQ calibration result and control code" "No difference,Difference" rbitfld.long 0x08 26.--28. " ZQCALPC ,Pch calibration rough adjustment code output" "0,1,2,3,4,5,6,7" textline " " rbitfld.long 0x08 23.--25. " ZQCALPF ,Pch calibration fine-tuning code output" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 19.--21. " ZQCALNC ,Nch calibration rough adjustment code output" "0,1,2,3,4,5,6,7" textline " " rbitfld.long 0x08 15.--18. " ZQCALNF ,Nch calibration fine-tuning code output" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x08 14. " ZQCALINIT ,ZQ calibration initialization end output" "Not ended,Ended" textline " " bitfld.long 0x08 8.--9. " ZQCALFREQ ,Setting sampling intervals of ZQ calibration" "0,1,2,3" bitfld.long 0x08 4.--7. " ZQCALITVL ,Setting ZQ calibration execution intervals" "Finished at one time,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,?..." textline " " bitfld.long 0x08 2. " ZQCALMODE ,ZQ calibration initial code setting" "No termination,MCKE Termination" bitfld.long 0x08 1. " ZQCALSTRV ,ZQ calibration initial value setting" "Center value,Last result" textline " " bitfld.long 0x08 0. " ZQCALRSTB ,ZQ calibration circuit reset setting" "Reset,Reset release" if (((per.l((ad:0x4000D000)+0x100C))&0x00000003)==0x00000001) group.long 0x100C++0x03 line.long 0x00 "ZQODTCTRL,ZQODT Control Register" bitfld.long 0x00 30.--31. " CAPHASE ,Command/Address Output Phase setting" ",,2/4 tCK,?..." bitfld.long 0x00 29. " WRFIFOEN ,I/F FIFO mode setting" ",Active" textline " " bitfld.long 0x00 27.--28. " FIFORPINIT ,I/F FIFO read pointer initializing" ",+-1 DFICLK cycle,?..." bitfld.long 0x00 23.--26. " ZQDATA ,PHY Driver Impedance setting for Data (DQ,DM,DQS)" ",,,3,4,5,6,?..." textline " " bitfld.long 0x00 19.--22. " ZQCK ,PHY Driver Impedance setting for CK" ",,,3,4,5,6,7,8,?..." bitfld.long 0x00 15.--18. " ZQCMDAD ,PHY Driver Impedance setting for Command/Address" ",,,3,4,5,6,7,8,?..." textline " " bitfld.long 0x00 12.--13. " SRDQ ,Slew Rate setting for Data and DQS" "High,DQS signal mask circuit stop,DQS signal mask circuit stop,Low" bitfld.long 0x00 10.--11. " SRCK ,Slew Rate setting for CK" "High,DQS signal mask circuit stop,DQS signal mask circuit stop,Low" textline " " bitfld.long 0x00 8.--9. " SRCMDAD ,Slew Rate setting for Command/Address" "High,DQS signal mask circuit stop,DQS signal mask circuit stop,Low" bitfld.long 0x00 5.--6. " PHYODT ,PHY ODT resistance setting" ",Rtt_RD/1,Rtt_RD/2,Rtt_RD/3" textline " " bitfld.long 0x00 4. " PHYODTEN ,PHY ODT use setting" ",Used" bitfld.long 0x00 0.--1. " DRAMIF ,DRAM I/F setting" "DDR2,DDR3,?..." elif (((per.l((ad:0x4000D000)+0x100C))&0x00000003)==0x00000000) group.long 0x100C++0x03 line.long 0x00 "ZQODTCTRL,ZQODT Control Register" bitfld.long 0x00 30.--31. " CAPHASE ,Command/Address Output Phase setting" ",,2/4 tCK," bitfld.long 0x00 29. " WRFIFOEN ,I/F FIFO mode setting" ",Active" textline " " bitfld.long 0x00 27.--28. " FIFORPINIT ,I/F FIFO read pointer initializing" ",+-1 DFICLK cycle,," bitfld.long 0x00 23.--26. " ZQDATA ,PHY Driver Impedance setting for Data (DQ,DM,DQS)" ",,,3,4,5,6,7,?..." textline " " bitfld.long 0x00 19.--22. " ZQCK ,PHY Driver Impedance setting for CK" ",,,3,4,5,6,7,8,9,10,?..." bitfld.long 0x00 15.--18. " ZQCMDAD ,PHY Driver Impedance setting for Command/Address" ",,,3,4,5,6,7,8,9,10,?..." textline " " bitfld.long 0x00 12.--13. " SRDQ ,Slew Rate setting for Data and DQS" "High,DQS signal mask circuit stop,DQS signal mask circuit stop,Low" bitfld.long 0x00 10.--11. " SRCK ,Slew Rate setting for CK" "High,DQS signal mask circuit stop,DQS signal mask circuit stop,Low" textline " " bitfld.long 0x00 8.--9. " SRCMDAD ,Slew Rate setting for Command/Address" "High,DQS signal mask circuit stop,DQS signal mask circuit stop,Low" bitfld.long 0x00 5.--6. " PHYODT ,PHY ODT resistance setting" ",Rtt_RD/1,Rtt_RD/2,Rtt_RD/3" textline " " bitfld.long 0x00 4. " PHYODTEN ,PHY ODT use setting" ",Used" bitfld.long 0x00 0.--1. " DRAMIF ,DRAM I/F setting" "DDR2,DDR3,?..." else group.long 0x100C++0x03 line.long 0x00 "ZQODTCTRL,ZQODT Control Register" bitfld.long 0x00 30.--31. " CAPHASE ,Command/Address Output Phase setting" ",,2/4 tCK," bitfld.long 0x00 29. " WRFIFOEN ,I/F FIFO mode setting" ",Active" textline " " bitfld.long 0x00 27.--28. " FIFORPINIT ,I/F FIFO read pointer initializing" ",+-1 DFICLK cycle,," bitfld.long 0x00 12.--13. " SRDQ ,Slew Rate setting for Data and DQS" "High,DQS signal mask circuit stop,DQS signal mask circuit stop,Low" textline " " bitfld.long 0x00 10.--11. " SRCK ,Slew Rate setting for CK" "High,DQS signal mask circuit stop,DQS signal mask circuit stop,Low" bitfld.long 0x00 8.--9. " SRCMDAD ,Slew Rate setting for Command/Address" "High,DQS signal mask circuit stop,DQS signal mask circuit stop,Low" textline " " bitfld.long 0x00 5.--6. " PHYODT ,PHY ODT resistance setting" ",Rtt_RD/1,Rtt_RD/2,Rtt_RD/3" bitfld.long 0x00 4. " PHYODTEN ,PHY ODT use setting" ",Used" textline " " bitfld.long 0x00 0.--1. " DRAMIF ,DRAM I/F setting" "DDR2,DDR3,?..." endif if (((per.l((ad:0x4000D000)+0x100C))&0x00000010)==0x00000010) group.long 0x1010++0x03 line.long 0x00 "RDCTRL,Read Control Register" bitfld.long 0x00 28.--31. " PHYODTONT ,PHY DQS ODT ON Timing setting" ",,,,0,0.5,1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5" bitfld.long 0x00 24.--27. " PHYODTOFT ,PHY DQS ODT OFF Timing setting" "1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5,7.0,?..." textline " " bitfld.long 0x00 20.--23. " PDQODTONT ,PHY DQ ODT ON Timing setting" ",,,,0,0.5,1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5" bitfld.long 0x00 16.--19. " PDQODTOFT ,PHY DQ ODT OFF Timing setting." "1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5,7.0,?..." textline " " bitfld.long 0x00 12.--15. " PHYBENONT ,PHY DQS and DQ BEN ON Timing setting" ",,,,0,0.5,1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5" bitfld.long 0x00 8.--11. " PHYBENOFT ,PHY DQS and DQ BEN OFF Timing setting" "1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5,7.0,?..." textline " " bitfld.long 0x00 4.--7. " PHYIENONT ,PHY DQS and DQ IEN ON Timing setting." ",,,,0,0.5,1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5" bitfld.long 0x00 0.--3. " PHYIENOFT ,PHY DQS and DQ IEN OFF Timing setting." "1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5,7.0,?..." else group.long 0x1010++0x03 line.long 0x00 "RDCTRL,Read Control Register" bitfld.long 0x00 12.--15. " PHYBENONT ,PHY DQS and DQ BEN ON Timing setting" ",,,,0,0.5,1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5" bitfld.long 0x00 8.--11. " PHYBENOFT ,PHY DQS and DQ BEN OFF Timing setting" "1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5,7.0,?..." textline " " bitfld.long 0x00 4.--7. " PHYIENONT ,PHY DQS and DQ IEN ON Timing setting." ",,,,Simultaneous with preamble,0.5,1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5" bitfld.long 0x00 0.--3. " PHYIENOFT ,PHY DQS and DQ IEN OFF Timing setting." "1.0,1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5,7.0,?..." endif group.long 0x1014++0x03 line.long 0x00 "RDTMG,READ Timing Control Register" bitfld.long 0x00 4.--7. " RDENVALID ,Read Data transfer setting" ",5,6,7,8,9,10,11,12,13,14,15,16,17,18,19" bitfld.long 0x00 0.--1. " WDOMODE ,Command DQ output mode setting" "Normal mode,?..." wgroup.long 0x1018++0x03 line.long 0x00 "FIFOINIT,FIFO Initialization Register" bitfld.long 0x00 8. " RDPTINITEXE ,Read FIFO pointer initialization" "Not executed,Executed" bitfld.long 0x00 0. " WRPTINITEXE ,Write FIFO pointer initialization." "Not executed,Executed" group.long 0x101C++0x03 line.long 0x00 "OUTCTRL,Output Control Register" bitfld.long 0x00 24.--25. " MBL ,MBL" "0,1,2,3" bitfld.long 0x00 16.--20. " MRL ,MRL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 8.--12. " MWL ,MWL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--5. " DISOUT ,Output mode setting at DFIDATABYTEDISABLE" "Floating,L Output,?..." textline " " bitfld.long 0x00 2. " RESETBOE ,Outputting enable setting of DDR_RESET_N" "Floating,Output" bitfld.long 0x00 1. " CKEODTOE ,Outputting enable setting of DDR_CLKEN and DDR_ODT" "Floating,Output" textline " " bitfld.long 0x00 0. " ADCMDOE ,Address and Command output enable setting." "Floating,Output" group.long 0x1040++0x03 line.long 0x00 "WLCTRL1,Write Leveling Control Register 1" bitfld.long 0x00 31. " WLEN ,Write Leveling function use setting" "Unused,Used" rbitfld.long 0x00 28. " WLVEND ,Write Leveling End Flag" "Not ended,Ended" textline " " bitfld.long 0x00 24. " WLSTR ,Write Leveling timing adjustment" "Not readjusted,Readjusted" hexmask.long.byte 0x00 8.--14. 1. " WL2OFS ,The second Byte Write Leveling manual operation offset setting" textline " " hexmask.long.byte 0x00 0.--6. 1. " WL1OFS ,The first Byte Write Leveling manual operation offset setting" group.long 0x10E8++0x03 line.long 0x00 "DQCALOFS1,DQS Offset Setting" rbitfld.long 0x00 31. " B2RSSAT ,SDLY Saturation Flag output for 2nd byte Read" "Not occurred,Occurred" rbitfld.long 0x00 30. " B1RSSAT ,SDLY saturation flag output for 1st byte read" "Not occurred,Occurred" textline " " hexmask.long.byte 0x00 8.--14. 1. " DQCAL2OFS ,2nd byte DQS offset setting" hexmask.long.byte 0x00 0.--6. 1. " DQCAL1OFS ,1st byte DQS offset setting" tree.end width 0x0B tree.end endif tree "NAND (NAND Flash Controller)" base ad:0x40102000 width 16. if (((per.l(ad:0x40102000+0xB8))&0x0F)==0x00) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x01) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 8.--15. 1. " CMD_0 ,Code of the first command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x02) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 16.--23. 1. " CMD_1 ,Code of the second command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x03) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 16.--23. 1. " CMD_1 ,Code of the second command in a sequence" hexmask.long.byte 0x00 8.--15. 1. " CMD_0 ,Code of the first command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x04) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_2 ,Code of the third command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x05) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_2 ,Code of the third command in a sequence" hexmask.long.byte 0x00 8.--15. 1. " CMD_0 ,Code of the first command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x06) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_2 ,Code of the third command in a sequence" hexmask.long.byte 0x00 16.--23. 1. " CMD_1 ,Code of the second command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x07) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_2 ,Code of the third command in a sequence" hexmask.long.byte 0x00 16.--23. 1. " CMD_1 ,Code of the second command in a sequence" hexmask.long.byte 0x00 8.--15. 1. " CMD_0 ,Code of the first command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x08) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 16.--23. 1. " CMD_3 ,Code of the second command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x09) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 16.--23. 1. " CMD_3 ,Code of the second command in a sequence" hexmask.long.byte 0x00 8.--15. 1. " CMD_0 ,Code of the first command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x0A) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 16.--23. 1. " CMD_1/CMD_3 ,Code of the second command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x0B) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 16.--23. 1. " CMD_1/CMD_3 ,Code of the second command in a sequence" hexmask.long.byte 0x00 8.--15. 1. " CMD_0 ,Code of the first command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x0C) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_2 ,Code of the third command in a sequence" hexmask.long.byte 0x00 16.--23. 1. " CMD_3 ,Code of the second command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x0D) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_2 ,Code of the third command in a sequence" hexmask.long.byte 0x00 16.--23. 1. " CMD_3 ,Code of the second command in a sequence" hexmask.long.byte 0x00 8.--15. 1. " CMD_0 ,Code of the first command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x0E) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_2 ,Code of the third command in a sequence" hexmask.long.byte 0x00 16.--23. 1. " CMD_1/CMD_3 ,Code of the second command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" elif (((per.l(ad:0x40102000+0xB8))&0x0F)==0x0F) group.long 0x00++0x03 line.long 0x00 "COMMAND,Controller Commands Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_2 ,Code of the third command in a sequence" hexmask.long.byte 0x00 16.--23. 1. " CMD_1/CMD_3 ,Code of the second command in a sequence" hexmask.long.byte 0x00 8.--15. 1. " CMD_0 ,Code of the first command in a sequence" textline " " bitfld.long 0x00 7. " DATA_SEL ,Data / FIFO selection flag" "FIFO module,DATA register" bitfld.long 0x00 6. " INPUT_SEL ,Input module selection flag" "AHBS,DMA" bitfld.long 0x00 0.--5. " CMD_SEQ ,Command code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif group.long 0x04++0x03 line.long 0x00 "CONTROL,Control Register" bitfld.long 0x00 23. " AUTO_READ_STAT_EN ,Auto read status mode enable" "Disabled,Enabled" bitfld.long 0x00 22. " MLUN_EN ,Multi LUN mode enables" "Disabled,Enabled" bitfld.long 0x00 21. " SMALL_BLOCK_EN ,Enable small block mode" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " ADDR1_AUTO_INCR ,Address auto increment for row address register 1" "Disabled,Enabled" bitfld.long 0x00 16. " ADDR0_AUTO_INCR ,Address auto increment for row address register 0" "Disabled,Enabled" bitfld.long 0x00 14. " PROT_EN ,Protect mechanism enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " BBM_EN ,Bad block management enable flag" "Disabled,Enabled" bitfld.long 0x00 12. " IO_WIDTH ,NAND flash I/O width" "8 bits,?..." bitfld.long 0x00 6.--7. " BLOCK_SIZE ,The block size" "32 pages,64 pages,128 pages,256 pages" textline " " bitfld.long 0x00 5. " ECC_EN ,Hardware ECC support enable" "Disabled,Enabled" bitfld.long 0x00 4. " INT_EN ,Global interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1.--2. " ECC_BLOCK_SIZE ,The ECC block size" "256 bytes,512 bytes,1024 bytes,?..." textline " " bitfld.long 0x00 0. " READ_STATUS_EN ,Automatically read status / check RnB lines" "RnB lines checked,Read status" rgroup.long 0x08++0x03 line.long 0x00 "STATUS, Status Register" hexmask.long.byte 0x00 16.--23. 1. " CMD_ID ,Command ID" bitfld.long 0x00 10. " DATA_REG_ST ,The DATA_REG" "Not available,Available" bitfld.long 0x00 9. " DATASIZE_ERROR_ST ,The data size value error" "Correct,Incorrect" textline " " bitfld.long 0x00 8. " CTRL_STAT ,The main controller status bit" "Ready,Busy" bitfld.long 0x00 3. " MEM3_ST ,Device 3 status flag" "Busy,Ready" bitfld.long 0x00 2. " MEM2_ST ,Device 2 status flag" "Busy,Ready" textline " " bitfld.long 0x00 1. " MEM1_ST ,Device 1 status flag" "Busy,Ready" bitfld.long 0x00 0. " MEM0_ST ,Device 0 status flag" "Busy,Ready" group.long 0x0C++0x2F line.long 0x00 "STATUS_MASK,Status_Mask Register" hexmask.long.byte 0x00 8.--15. 1. " ERROR_MASK ,Error mask" hexmask.long.byte 0x00 0.--7. 1. " STATE_MASK ,State mask" line.long 0x04 "INT_MASK,Int_Mask Register" bitfld.long 0x04 27. " ECC_INT3_EN ,Enables the interrupt from the ECC module status for memory device 3" "Disabled,Enabled" bitfld.long 0x04 26. " ECC_INT2_EN ,Enables the interrupt from the ECC module status for memory device 2" "Disabled,Enabled" bitfld.long 0x04 25. " ECC_INT1_EN ,Enables the interrupt from the ECC module status for memory device 1" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " ECC_INT0_EN ,Enables the interrupt from the ECC module status for memory device 0" "Disabled,Enabled" bitfld.long 0x04 19. " STAT_ERR_INT3_EN ,Enables the interrupt when the most recently finished operation on the memory device 3 failed" "Disabled,Enabled" bitfld.long 0x04 18. " STAT_ERR_INT2_EN ,Enables the interrupt when the most recently finished operation on the memory device 2 failed" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " STAT_ERR_INT1_EN ,Enables the interrupt when the most recently finished operation on the memory device 1 failed" "Disabled,Enabled" bitfld.long 0x04 16. " STAT_ERR_INT0_EN ,Enables the interrupt when the most recently finished operation on the memory device 0 failed" "Disabled,Enabled" bitfld.long 0x04 11. " MEM3_RDY_INT_EN ,The memory device 3 is ready for the new command" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " MEM2_RDY_INT_EN ,The memory device 2 is ready for the new command" "Disabled,Enabled" bitfld.long 0x04 9. " MEM1_RDY_INT_EN ,The memory device 1 is ready for the new command" "Disabled,Enabled" bitfld.long 0x04 8. " MEM0_RDY_INT_EN ,The memory device 0 is ready for the new command" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " PG_SZ_ERR_INT_EN ,Data size error occur" "Disabled,Enabled" bitfld.long 0x04 3. " DMA_INT_EN ,DMA transfer ended" "Disabled,Enabled" bitfld.long 0x04 2. " DATA_REG_INT_EN ,Data in DATA_REG is available" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CMD_END_INT_EN ,Command sequence ended" "Disabled,Enabled" bitfld.long 0x04 0. " PROT_INT_EN ,Erase/Write protected area interrupt enable" "Disabled,Enabled" line.long 0x08 "INT_STATUS,Interrupts Status Register" bitfld.long 0x08 27. " ECC_INT3_FL ,Selected flag in the ECC module is set for device 3" "Not occurred,Occurred" bitfld.long 0x08 26. " ECC_INT2_FL ,Selected flag in the ECC module is set for device 2" "Not occurred,Occurred" bitfld.long 0x08 25. " ECC_INT1_FL ,Selected flag in the ECC module is set for device 1" "Not occurred,Occurred" textline " " bitfld.long 0x08 24. " ECC_INT0_FL ,Selected flag in the ECC module is set for device 0" "Not occurred,Occurred" bitfld.long 0x08 19. " STAT_ERR_INT3_FL ,Most recently finished operation on the memory device 3 failed" "Not occurred,Occurred" bitfld.long 0x08 18. " STAT_ERR_INT2_FL ,Most recently finished operation on the memory device 2 failed" "Not occurred,Occurred" textline " " bitfld.long 0x08 17. " STAT_ERR_INT1_FL ,Most recently finished operation on the memory device 1 failed" "Not occurred,Occurred" bitfld.long 0x08 16. " STAT_ERR_INT0_FL ,Most recently finished operation on the memory device 0 failed" "Not occurred,Occurred" bitfld.long 0x08 11. " MEM3_RDY_INT_FL ,The memory device 3 is ready for the new command" "Not occurred,Occurred" textline " " bitfld.long 0x08 10. " MEM2_RDY_INT_FL ,The memory device 2 is ready for the new command" "Not occurred,Occurred" bitfld.long 0x08 9. " MEM1_RDY_INT_FL ,The memory device 1 is ready for the new command" "Not occurred,Occurred" bitfld.long 0x08 8. " MEM0_RDY_INT_FL ,The memory device 0 is ready for the new command" "Not occurred,Occurred" textline " " bitfld.long 0x08 6. " PG_SZ_ERR_INT_FL ,Data size error flag" "Not occurred,Occurred" bitfld.long 0x08 3. " DMA_INT_FL ,DMA transfer ended flag" "Not occurred,Occurred" bitfld.long 0x08 2. " DATA_REG_INT_FL ,Data in DATA_REG is available" "Not occurred,Occurred" textline " " bitfld.long 0x08 1. " CMD_FLD_INT_FL ,Command sequence ended" "Not occurred,Occurred" bitfld.long 0x08 0. " PROT_INT_FL ,Erase/Write protected area interrupt enable" "Not occurred,Occurred" line.long 0x0C "ECC_CTRL,ECC Control Register" bitfld.long 0x0C 16.--17. " ECC_SEL ,The ECC interrupt source select" "ECC_ERROR,ECC_UNC,ECC_OVER,ECC_OVER" bitfld.long 0x0C 8.--13. " ERR_THRESHOLD ,The acceptable errors level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 0.--2. " ECC_CAP ,The ECC module correction ability" "2,4,8,16,24,32,32,32" line.long 0x10 "ECC_OFFSET,ECC Offset Register" hexmask.long.word 0x10 0.--15. 1. " ECC_OFFSET ,Correction words block offset" line.long 0x14 "ECC_STAT,ECC Module Status Register" bitfld.long 0x14 19. " ECC_OVER_3 ,The memory device 3 acceptable errors level overflow" "No overflow,Overflow" bitfld.long 0x14 18. " ECC_OVER_2 ,The memory device 2 acceptable errors level overflow" "No overflow,Overflow" bitfld.long 0x14 17. " ECC_OVER_1 ,The memory device 1 acceptable errors level overflow" "No overflow,Overflow" textline " " bitfld.long 0x14 16. " ECC_OVER_0 ,The memory device 0 acceptable errors level overflow" "No overflow,Overflow" bitfld.long 0x14 11. " ECC_UNC_3 ,The memory device 3 uncorrectable error flag" "Not occurred,Occurred" bitfld.long 0x14 10. " ECC_UNC_2 ,The memory device 2 uncorrectable error flag" "Not occurred,Occurred" textline " " bitfld.long 0x14 9. " ECC_UNC_1 ,The memory device 1 uncorrectable error flag" "Not occurred,Occurred" bitfld.long 0x14 8. " ECC_UNC_0 ,The memory device 0 uncorrectable error flag" "Not occurred,Occurred" bitfld.long 0x14 3. " ECC_ERROR_3 ,The memory device 3 correctable error flag" "Not occurred,Occurred" textline " " bitfld.long 0x14 2. " ECC_ERROR_2 ,The memory device 2 correctable error flag" "Not occurred,Occurred" bitfld.long 0x14 1. " ECC_ERROR_1 ,The memory device 1 correctable error flag" "Not occurred,Occurred" bitfld.long 0x14 0. " ECC_ERROR_0 ,The memory device 0 correctable error flag" "Not occurred,Occurred" line.long 0x18 "ADDR0_COL,Column Address 0 Registers" hexmask.long.word 0x18 0.--15. 0x01 " ADDR0_COL ,Column address" line.long 0x1C "ADDR0_ROW,ROW Address Registers" hexmask.long.tbyte 0x1C 0.--23. 0x01 " ADDR0_ROW ,Row address" line.long 0x20 "ADDR1_COL,Column Address Registers" hexmask.long.word 0x20 0.--15. 0x01 " ADDR1_COL ,Column address" line.long 0x24 "ADDR1_ROW,Row Address Registers" hexmask.long.tbyte 0x24 0.--23. 0x01 " ADDR1_ROW ,Row address" line.long 0x28 "PROTECT,Protect Register" hexmask.long.word 0x28 16.--31. 1. " PROT_UP ,Protect area upper limit" hexmask.long.word 0x28 0.--15. 1. " PROT_DOWN ,Protect area lower limit" line.long 0x2C "FIFO_DATA,FIFO Data Register" rgroup.long 0x3C++0x03 line.long 0x00 "DATA_REG,Data Register" group.long 0x40++0x13 line.long 0x00 "DATA_REG_SIZE,Data_reg_size Register" bitfld.long 0x00 0.--1. " DATA_REG_SIZE ,Number of valid bytes in the DATA register" "Single byte,Two bytes,Three bytes,All bytes" line.long 0x04 "DEV0_PTR,Device0 Remap Pointer Register" line.long 0x08 "DEV1_PTR,Device1 Remap Pointer Register" line.long 0x0C "DEV2_PTR,Device2 Remap Pointer Register" line.long 0x10 "DEV3_PTR,Device3 Remap Pointer Register" group.long 0x64++0x03 line.long 0x00 "DMA_ADDR,DMA Address Register" group.long 0x6C++0x0B line.long 0x00 "DMA_CNT,DMA Counter Register" line.long 0x04 "DMA_CTRL,DMA Control Register" bitfld.long 0x04 7. " DMA_START ,Start DMA when the command sequence is sent to the NAND flash memory" "Stopped,Started" bitfld.long 0x04 5. " DMA_MODE ,DMA work mode" "Registers managed,Scatter-gather" bitfld.long 0x04 2.--4. " DMA_BURST ,Burst type" "Incrementing four transfers,Stream sixteen transfers,Single transfer,Unspecified length,Incrementing eight transfers,Incrementing sixteen transfers,?..." textline " " bitfld.long 0x04 1. " ERR_FLAG ,The DMA error flag" "Not occurred,Occurred" bitfld.long 0x04 0. " DMA_READY ,DMA ready flag" "Not occurred,Occurred" line.long 0x08 "BBM_CTRL,BBM Control Register" bitfld.long 0x08 0. " RMP_INIT ,Remap initial flag" "Not occurred,Occurred" group.long 0x80++0x0B line.long 0x00 "MEM_CTRL,Memory Devices Control Register" bitfld.long 0x00 11. " MEM3_WP ,The memory device 3 WP line state" "Disabled,Enabled" bitfld.long 0x00 10. " MEM2_WP ,The memory device 2 WP line state" "Disabled,Enabled" bitfld.long 0x00 9. " MEM1_WP ,The memory device 1 WP line state" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MEM0_WP ,The memory device 0 WP line state" "Disabled,Enabled" bitfld.long 0x00 0.--1. " MEM_CE ,The memory device select field" "Device 0,Device 1,Device 2,Device 3" line.long 0x04 "DATA_SIZE,Data Size Register" hexmask.long.word 0x04 0.--14. 1. " DATA_SIZE ,Data size" line.long 0x08 "TIMINGS_ASYN,Asynchronous Mode Timings Register" bitfld.long 0x08 4.--7. " TRWH ,RE_N or WE_N high hold time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " TRWP ,RE_N or WE_N pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x90++0x13 line.long 0x00 "TIME_SEQ_0,Command Sequence Timing Register 0" bitfld.long 0x00 24.--29. " TWHR ,WE_N high to RE_N low time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " TRHW ,RE_N high to WE_N low time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " TADL ,ALE to data start time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 0.--5. " TCCS ,Change column setup" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "TIME_SEQ_1,Command Sequence Timing Register 1" bitfld.long 0x04 16.--21. " TWW ,Delay time between WP_N change and command drive" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " TRR ,Read high to read low" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 0.--5. " TWB ,Busy time for interface change" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x08 "TIME_GEN_SEQ_0,Generic Command Sequence Register 0" bitfld.long 0x08 24.--29. " T0_D3 ,Command to data time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 16.--21. " T0_D2 ,Command to delay time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x08 8.--13. " T0_D1 ,Command to command time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x08 0.--5. " T0_D0 ,Command to address time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x0C "TIME_GEN_SEQ_1,Generic Command Sequence Register 1" bitfld.long 0x0C 24.--29. " T0_D7 ,Address to data time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 16.--21. " T0_D6 ,Address to delay time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0C 8.--13. " T0_D5 ,Address to address time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x0C 0.--5. " T0_D4 ,Address to command time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "TIME_GEN_SEQ_2,Generic Command Sequence Register 2" bitfld.long 0x10 24.--29. " T0_D11 ,Data to delay time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 16.--21. " T0_D10 ,Data to command time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x10 8.--13. " T0_D9 ,Delay to command time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x10 0.--5. " T0_D8 ,Delay to data time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" wgroup.long 0xB0++0x03 line.long 0x00 "FIFO_INIT,FIFO Control Register" bitfld.long 0x00 0. " FIFO_INIT ,FIFO init bit" "No effect,Init" rgroup.long 0xB4++0x03 line.long 0x00 "FIFO_STATE,FIFO Status Register" bitfld.long 0x00 7. " DF_W_EMPTY ,FIFO empty state bit" "Not occurred,Occurred" bitfld.long 0x00 6. " DF_R_FULL ,FIFO full state bit" "Not occurred,Occurred" bitfld.long 0x00 5. " CF_ACCEPT_W ,Command FIFO accept flag write direction" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " CF_ACCEPT_R ,Command FIFO accept flag read direction" "Not occurred,Occurred" bitfld.long 0x00 3. " CF_FULL ,Command FIFO full flag" "Not occurred,Occurred" bitfld.long 0x00 2. " CF_EMPTY ,Command FIFO empty flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " DF_W_FULL ,FIFO full state bit" "Not occurred,Occurred" bitfld.long 0x00 0. " DF_R_EMPTY ,FIFO empty state bit" "Not occurred,Occurred" group.long 0xB8++0x03 line.long 0x00 "GEN_SEQ_CTRL,Generic Sequence Register" hexmask.long.byte 0x00 16.--23. 1. " CMD_3 ,Command 3 code value" bitfld.long 0x00 15. " IMD_SEQ ,Enable immediate command execution" "Disabled,Enabled" bitfld.long 0x00 13.--14. " DELAY_EN ,Enable the busy 0 or 1 phase" "Disabled both delays,Enabled delay 0,Enabled delay 1,Disabled both delays" textline " " bitfld.long 0x00 12. " DATA_EN ,Enable data part sequence" "Disabled,Enabled" bitfld.long 0x00 10.--11. " ROW_A1 ,Row address cycles" "0 address cycles,1 address cycles,2 address cycles,3 address cycles" bitfld.long 0x00 8.--9. " ROW_A0 ,Row address cycles" "0 address cycles,1 address cycles,2 address cycles,3 address cycles" textline " " bitfld.long 0x00 6.--7. " COL_A1 ,Column address cycles" "0 address cycles,1 address cycles,2 address cycles,?..." bitfld.long 0x00 4.--5. " COL_A0 ,Column address cycles" "0 address cycles,1 address cycles,2 address cycles,?..." bitfld.long 0x00 3. " CMD3_EN ,Enable command 3 phase" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " CMD2_EN ,Enable command 2 phase" "Disabled,Enabled" bitfld.long 0x00 1. " CMD1_EN ,Enable command 1 phase" "Disabled,Enabled" bitfld.long 0x00 0. " CMD0_EN ,Enable command 0 phase" "Disabled,Enabled" if (((per.l(ad:0x40102000+0x04))&0x00400000)==0x00400000) group.long 0xBC++0x03 line.long 0x00 "MLUN,LUN Configuration Register" bitfld.long 0x00 8.--9. " LUN_SEL ,LUN number" "Two,Four,?..." bitfld.long 0x00 0.--2. " MLUN_IDX ,LUN address offset" "0,1,2,3,4,5,6,7" else group.long 0xBC++0x03 line.long 0x00 "MLUN,LUN Configuration Register" bitfld.long 0x00 0.--2. " MLUN_IDX ,LUN address offset" "0,1,2,3,4,5,6,7" endif group.long 0xC0++0x03 line.long 0x00 "DEV0_SIZE,Device 0 BBM Record Counter Register" hexmask.long.word 0x00 0.--11. 1. " DEV_SIZE ,Number of record for device 0" group.long 0xC4++0x03 line.long 0x00 "DEV1_SIZE,Device 1 BBM Record Counter Register" hexmask.long.word 0x00 0.--11. 1. " DEV_SIZE ,Number of record for device 1" group.long 0xC8++0x03 line.long 0x00 "DEV2_SIZE,Device 2 BBM Record Counter Register" hexmask.long.word 0x00 0.--11. 1. " DEV_SIZE ,Number of record for device 2" group.long 0xCC++0x03 line.long 0x00 "DEV3_SIZE,Device 3 BBM Record Counter Register" hexmask.long.word 0x00 0.--11. 1. " DEV_SIZE ,Number of record for device 3" group.long 0x114++0x03 line.long 0x00 "DMA_TLVL,DMA Trigger Level Register" hexmask.long.byte 0x00 0.--7. 1. " DMA_TLVL ,The DMA trigger level" wgroup.long 0x124++0x03 line.long 0x00 "CMD_MARK,CMD ID Initial Value" hexmask.long.byte 0x00 0.--7. 1. " CMD_ID ,CMD ID initial value" rgroup.long 0x128++0x03 line.long 0x00 "LUN_STATUS_0,LUN Status Register" hexmask.long.byte 0x00 24.--31. 1. " MEM3_LUN ,Memory 3 LUN-s status field" hexmask.long.byte 0x00 16.--23. 1. " MEM2_LUN ,Memory 2 LUN-s status field" hexmask.long.byte 0x00 8.--15. 1. " MEM1_LUN ,Memory 1 LUN-s status field" textline " " hexmask.long.byte 0x00 0.--7. 1. " MEM0_LUN ,Memory 0 LUN-s status field" group.long 0x134++0x03 line.long 0x00 "TIME_GEN_SEQ_3,Generic Command Sequence Register 3" bitfld.long 0x00 0.--5. " T0_D12 ,Data to sequence end time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x148++0x07 line.long 0x00 "INT_STAT,Internal Status Register" bitfld.long 0x00 8.--9. " SEQ_ID ,The status operation identification field" "No pending,Read operation,?..." hexmask.long.byte 0x00 0.--7. 1. " STAT_VALUE ,The status operation value" line.long 0x04 "ECC_CNT,ECC Error Counter" bitfld.long 0x04 24.--29. " ERR_LVL3 ,The Memory device 3 error level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " ERR_LVL2 ,The Memory device 2 error level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " ERR_LVL1 ,The Memory device 1 error level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x04 0.--5. " ERR_LVL0 ,The Memory device 0 error level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long 0x150++0x03 line.long 0x00 "PARAM_REG,PARAMETER Register" bitfld.long 0x00 29. " ASYN_RESET_IMPLEMENT ,Type of reset implemented in the controller" "Synchronous,Asynchronous" bitfld.long 0x00 24. " DMA_IMPLEMENT ,DMA master module" "Not implemented,Implemented" bitfld.long 0x00 23. " SMALL_BLOCK_IMPLEMENT ,Small block support" "Not implemented,Implemented" textline " " bitfld.long 0x00 22. " GEN_SEQ_IMPLEMENT ,Generic sequence feature" "Not implemented,Implemented" bitfld.long 0x00 20. " SS_IMPLEMENT , Super sequence feature" "Not implemented,Implemented" bitfld.long 0x00 19. " NOECC_IMPLEMENT ,Correction module" "Implemented,Not implemented" textline " " bitfld.long 0x00 12. " BCH32_CONF_IMPLEMENT ,BCH32 conf correction module" "Not implemented,Implemented" bitfld.long 0x00 11. " BIG_ENDIAN_IMPLEMENT ,Flag that mark selected endianess type" "Little endian,Big endian" bitfld.long 0x00 10. " CLEARNAND_IMPLEMENT ,ClearNAND support" "Not implemented,Implemented" textline " " bitfld.long 0x00 9. " TOGGLE_MODE_IMPLEMENT ,Toggle Mode support" "Not implemented,Implemented" bitfld.long 0x00 8. " SYN_MODE_IMPLEMENT , Synchronous work mode" "Not implemented,Implemented" bitfld.long 0x00 7. " PROTECT_IMPLEMENT ,Write protection feature" "Not implemented,Implemented" textline " " bitfld.long 0x00 6. " BBM_INT_IMPLEMENT ,Memory location of the bad block management feature" "External,Internal" bitfld.long 0x00 5. " BBM_IMPLEMENT , BBM feature" "Not implemented,Implemented" bitfld.long 0x00 4. " BOOT_IMPLEMENT , Boot feature " "Not implemented,Implemented" textline " " bitfld.long 0x00 2.--3. " DEVICE_PER_BANK ,Number of devices per bank" "1,2,4,8" bitfld.long 0x00 0.--1. " BANK_NUM ,Number of banks" "1,2,4,8" width 0x0B tree.end tree.open "Quad IO SPI" tree "QSPI1" base ad:0x40005000 width 27. if (((per.l(ad:0x40005000))&0x101)==0x001) group.long 0x00++0x03 line.long 0x00 "CONFIG_REG,QSPI Configuration Register" rbitfld.long 0x00 31. " QSPI_IDLE_FLD ,Serial interface and QSPI pipeline is IDLE" "Not idle,Idle" bitfld.long 0x00 23. " ENABLE_AHB_DECODER_FLD ,Enable AHB decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ENTER_XIP_MODE_IMM_FLD ,Enter XIP mode immediately" "Disabled,Enabled" bitfld.long 0x00 17. " ENTER_XIP_MODE_FLD ,Enter XIP mode on next READ" "Disabled,Enabled" bitfld.long 0x00 16. " ENB_AHB_ADDR_REMAP_FLD ,Enable AHB Address Re-mapping" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " WR_PROT_FLASH_FLD ,Write Protect pin of the FLASH device" "Disabled,Enabled" bitfld.long 0x00 10.--13. " PERIPH_CS_LINES_FLD ,Peripheral Chip Select Lines" "14,12,14,11,14,13,14,7,14,13,14,11,14,13,14," bitfld.long 0x00 9. " PERIPH_SEL_DEC_FLD ,Peripheral select decode" "Only 1 of 4,4-to-16" textline " " bitfld.long 0x00 8. " ENB_LEGACY_IP_MODE_FLD ,Legacy IP mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " ENB_DIR_ACC_CTLR_FLD ,Enable Direct Access Controller" "Disabled,Enabled" bitfld.long 0x00 2. " SEL_CLK_PHASE_FLD ,Select clock phase" "Active,Inactive" textline " " bitfld.long 0x00 1. " SEL_CLK_POL_FLD ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " ENB_QSPI_FLD ,QSPI enable" "Disabled,Enabled" elif (((per.l(ad:0x40005000))&0x101)==0x000) group.long 0x00++0x03 line.long 0x00 "CONFIG_REG,QSPI Configuration Register" rbitfld.long 0x00 31. " QSPI_IDLE_FLD ,Serial interface and QSPI pipeline is IDLE" "Not idle,Idle" bitfld.long 0x00 23. " ENABLE_AHB_DECODER_FLD ,Enable AHB decoder" "Disabled,Enabled" bitfld.long 0x00 19.--22. " MSTR_BAUD_DIV_FLD ,Master mode baud rate divisor" ",4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" textline " " bitfld.long 0x00 18. " ENTER_XIP_MODE_IMM_FLD ,Enter XIP Mode immediately" "Disabled,Enabled" bitfld.long 0x00 17. " ENTER_XIP_MODE_FLD ,Enter XIP Mode on next read" "Disabled,Enabled" bitfld.long 0x00 16. " ENB_AHB_ADDR_REMAP_FLD ,Enable AHB Address Re-mapping" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " WR_PROT_FLASH_FLD ,Write Protect pin of the FLASH device" "Disabled,Enabled" bitfld.long 0x00 10.--13. " PERIPH_CS_LINES_FLD ,Peripheral chip select lines" "14,12,14,11,14,13,14,7,14,13,14,11,14,13,14," bitfld.long 0x00 9. " PERIPH_SEL_DEC_FLD ,Peripheral select decode" "Only 1 of 4,4-to-16" textline " " bitfld.long 0x00 8. " ENB_LEGACY_IP_MODE_FLD ,Legacy IP mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " ENB_DIR_ACC_CTLR_FLD ,Enable direct access Controller" "Disabled,Enabled" bitfld.long 0x00 2. " SEL_CLK_PHASE_FLD ,Select clock phase" "Active,Inactive" textline " " bitfld.long 0x00 1. " SEL_CLK_POL_FLD ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " ENB_QSPI_FLD ,QSPI enable" "Disabled,Enabled" elif (((per.l(ad:0x40005000))&0x101)==0x101) group.long 0x00++0x03 line.long 0x00 "CONFIG_REG,QSPI Configuration Register" rbitfld.long 0x00 31. " QSPI_IDLE_FLD ,Serial interface and QSPI pipeline is IDLE" "Not idle,Idle" bitfld.long 0x00 23. " ENABLE_AHB_DECODER_FLD ,Enable AHB decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ENTER_XIP_MODE_IMM_FLD ,Enter XIP Mode immediately" "Disabled,Enabled" bitfld.long 0x00 17. " ENTER_XIP_MODE_FLD ,Enter XIP mode on next read" "Disabled,Enabled" bitfld.long 0x00 16. " ENB_AHB_ADDR_REMAP_FLD ,Enable AHB address re-mapping" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " WR_PROT_FLASH_FLD ,Write protect pin of the FLASH device" "Disabled,Enabled" bitfld.long 0x00 10.--13. " PERIPH_CS_LINES_FLD ,Peripheral chip select Lines" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 9. " PERIPH_SEL_DEC_FLD ,Peripheral select decode" "Only 1 of 4,4-to-16" textline " " bitfld.long 0x00 8. " ENB_LEGACY_IP_MODE_FLD ,Legacy IP mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " ENB_DIR_ACC_CTLR_FLD ,Enable direct access controller" "Disabled,Enabled" bitfld.long 0x00 2. " SEL_CLK_PHASE_FLD ,Select Clock phase" "Active,Inactive" textline " " bitfld.long 0x00 1. " SEL_CLK_POL_FLD ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " ENB_QSPI_FLD ,QSPI enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "CONFIG_REG,QSPI Configuration Register" rbitfld.long 0x00 31. " QSPI_IDLE_FLD ,Serial interface and QSPI pipeline is IDLE" "Not idle,Idle" bitfld.long 0x00 23. " ENABLE_AHB_DECODER_FLD ,Enable AHB decoder" "Disabled,Enabled" bitfld.long 0x00 19.--22. " MSTR_BAUD_DIV_FLD ,Master mode baud rate divisor" ",4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" textline " " bitfld.long 0x00 18. " ENTER_XIP_MODE_IMM_FLD ,Enter XIP mode immediately" "Disabled,Enabled" bitfld.long 0x00 17. " ENTER_XIP_MODE_FLD ,Enter XIP mode on next read" "Disabled,Enabled" bitfld.long 0x00 16. " ENB_AHB_ADDR_REMAP_FLD ,Enable AHB address re-mapping" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " WR_PROT_FLASH_FLD ,Write protect pin of the FLASH device" "Disabled,Enabled" bitfld.long 0x00 10.--13. " PERIPH_CS_LINES_FLD ,Peripheral chip select lines" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 9. " PERIPH_SEL_DEC_FLD ,Peripheral select decode" "Only 1 of 4,4-to-16" textline " " bitfld.long 0x00 8. " ENB_LEGACY_IP_MODE_FLD ,Legacy IP Mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " ENB_DIR_ACC_CTLR_FLD ,Enable direct access controller" "Disabled,Enabled" bitfld.long 0x00 2. " SEL_CLK_PHASE_FLD ,Select clock phase" "Active,Inactive" textline " " bitfld.long 0x00 1. " SEL_CLK_POL_FLD ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " ENB_QSPI_FLD ,QSPI enable" "Disabled,Enabled" endif group.long 0x04++0x13 line.long 0x00 "DEV_INSTR_RD_CONFIG_REG,Device Read Instruction Configuration Register" bitfld.long 0x00 24.--28. " DUMMY_RD_CLK_CYCLES_FLD ,Number of dummy clock cycles required for read instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. " MODE_BIT_ENABLE_FLD ,Mode Bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--17. " DATA_XFER_TYPE_EXT_MODE_FLD ,Data transfer type for standard SPI modes" "SIO mode,Dual Input/Output,Quad Input/Output,?..." bitfld.long 0x00 12.--13. " ADDR_XFER_TYPE_STD_MODE_FLD ,Address transfer type for standard SPI modes" "QUAD_IO0 only,QUAD_IO[1:0] only,QUAD_IO[3:0],?..." textline " " bitfld.long 0x00 8.--9. " INSTR_TYPE_FLD ,Instruction type" "Standard SPI,DIO-SP,QIO-SPI,?..." hexmask.long.byte 0x00 0.--7. 1. " RD_OPCODE_NON_XIP_FLD ,Read opcode in non-XIP mode" line.long 0x04 "DEV_INSTR_WR_CONFIG_REG,Device Write Instruction Configuration Register" bitfld.long 0x04 24.--28. " DUMMY_WR_CLK_CYCLES_FLD , Number of dummy clock cycles required for write instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--17. " DATA_XFER_TYPE_EXT_MODE_FLD ,Data transfer type for standard SPI modes" "SIO mode,Dual Input/Output,Quad Input/Output,?..." bitfld.long 0x04 12.--13. " ADDR_XFER_TYPE_STD_MODE_FLD ,Address transfer type for standard SPI modes" "QUAD_IO0,QUAD_IO[1:0],QUAD_IO[3:0],?..." textline " " bitfld.long 0x04 8. " WEL_DIS_FLD ,WEL disable" "No,Yes" hexmask.long.byte 0x04 0.--7. 1. " WR_OPCODE_FLD ,Write Opcode" line.long 0x08 "DEV_DELAY_REG,QSPI Device Delay Register" hexmask.long.byte 0x08 24.--31. 1. " D_NSS_FLD ,Chip Select De-Assert" hexmask.long.byte 0x08 16.--23. 1. " D_BTWN_FLD ,Chip Select De-Assert Different Slaves" hexmask.long.byte 0x08 8.--15. 1. " D_AFTER_FLD ,Chip Select End Of Transfer" textline " " hexmask.long.byte 0x08 0.--7. 1. " D_INIT_FLD ,Chip Select Start Of Transfer" line.long 0x0C "RD_DATA_CAPTURE_REG,Read Data Capture Register" bitfld.long 0x0C 5. " SAMPLE_EDGE_SEL_FLD ,Sample edge selection" "Falling,Rising" bitfld.long 0x0C 1.--4. " DELAY_FLD ,Read Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "DEV_SIZE_CONFIG_REG,Device Size Configuration Register" rbitfld.long 0x10 29.--31. " DEV_SIZE_RESV_FLD ,Dev_size_resv" "0,1,2,3,4,5,6,7" bitfld.long 0x10 27.--28. " MEM_SIZE_ON_CS3_FLD ,Size of Flash Device connected to QUAD_CS_N[3] pin" "512 Mb,1 Gb,2 Gb,4 Gb" bitfld.long 0x10 25.--26. " MEM_SIZE_ON_CS2_FLD ,Size of Flash Device connected to QUAD_CS_N[2] pin" "512 Mb,1 Gb,2 Gb,4 Gb" textline " " bitfld.long 0x10 23.--24. " MEM_SIZE_ON_CS1_FLD ,Size of Flash Device connected to QUAD_CS_N[1] pin" "512 Mb,1 Gb,2 Gb,4 Gb" bitfld.long 0x10 21.--22. " MEM_SIZE_ON_CS0_FLD ,Size of Flash Device connected to QUAD_CS_N[0] pin" "512 Mb,1 Gb,2 Gb,4 Gb" bitfld.long 0x10 16.--20. " BYTES_PER_SUBSECTOR_FLD ,Number of bytes per Block" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,?..." textline " " hexmask.long.word 0x10 4.--15. 1. " BYTES_PER_DEVICE_PAGE_FLD ,Number of bytes per device page" bitfld.long 0x10 0.--3. " NUM_ADDR_BYTES_FLD ,Number of address bytes" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" group.long 0x24++0x7 line.long 0x00 "REMAP_ADDR_REG,Remap Address Register" line.long 0x04 "MODE_BIT_CONFIG_REG,Mode Bit Configuration Register" hexmask.long.byte 0x04 0.--7. 1. " MODE_FLD ,Mode bits" if (((per.l(ad:0x40005000))&0x100)==0x100) group.long 0x30++0x07 line.long 0x00 "TX_THRESH_REG,TX Threshold Register" bitfld.long 0x00 0.--3. " LEVEL_FLD ,Level at which the TX FIFO not full interrupt is generated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RX_THRESH_REG,RX Threshold Register" bitfld.long 0x04 0.--3. " LEVEL_FLD ,Level at which the RX FIFO not empty interrupt is generated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hgroup.long 0x30++0x03 hide.long 0x00 "TX_THRESH_REG,TX Threshold Register" hgroup.long 0x34++0x03 hide.long 0x00 "RX_THRESH_REG,RX Threshold Register" endif group.long 0x38++0x07 line.long 0x00 "WRITE_COMPLETION_CTRL_REG,Write Completion Control Register" hexmask.long.byte 0x00 24.--31. 1. " POLL_REP_DELAY_FLD ,Polling repetition delay" hexmask.long.byte 0x00 16.--23. 1. " POLL_COUNT_FLD ,Poll count" bitfld.long 0x00 14. " DISABLE_POLLING_FLD ,Disable polling" "No,Yes" textline " " bitfld.long 0x00 13. " POLLING_POLARITY_FLD ,Polling polarity" "equal to 0,equal to 1" bitfld.long 0x00 8.--10. " POLLING_BIT_INDEX_FLD ,Polling bit index" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 0.--7. 1. " OPCODE_FLD ,Opcode" line.long 0x04 "NO_OF_POLLS_BEF_EXP_REG,Polling Expiration Register" if (((per.l(ad:0x40005000))&0x100)==0x100) rgroup.long 0x40++0x03 line.long 0x00 "IRQ_STATUS_REG,Interrupt Status Register" bitfld.long 0x00 13. " POLL_EXP_INT_FLD ,The maximum number of programmed polls cycles is expired" "No expired,Expired" bitfld.long 0x00 11. " RX_FIFO_FULL_FLD ,RX FIFO full" "Not full,Full" bitfld.long 0x00 10. " RX_FIFO_NOT_EMPTY_FLD ,RX FIFO not empty" "< RX THRESHOLD,>=RX THRESHOLD" textline " " bitfld.long 0x00 9. " TX_FIFO_FULL_FLD ,TX FIFO full" "Not full,Full" bitfld.long 0x00 8. " TX_FIFO_NOT_FULL_FLD ,TX FIFO not full" "> RX THRESHOLD,<=RX THRESHOLD" bitfld.long 0x00 7. " RECV_OVERFLOW_FLD ,Receive overflow" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " ILLEGAL_ACCESS_DET_FLD ,Illegal AHB access has been detected" "Not occurred,Occurred" bitfld.long 0x00 4. " PROT_WR_ATTEMPT_FLD ,Write to protected area was attempted and rejected" "Not occurred,Occurred" bitfld.long 0x00 1. " UNDERFLOW_DET_FLD ,Underflow detected" "Not occurred,Occurred" else rgroup.long 0x40++0x03 line.long 0x00 "IRQ_STATUS_REG,Interrupt Status Register" bitfld.long 0x00 13. " POLL_EXP_INT_FLD ,The maximum number of programmed polls cycles is expired" "No expired,Expired" bitfld.long 0x00 5. " ILLEGAL_ACCESS_DET_FLD ,Illegal AHB access has been detected" "Not occurred,Occurred" bitfld.long 0x00 4. " PROT_WR_ATTEMPT_FLD ,Write to protected area was attempted and rejected" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " UNDERFLOW_DET_FLD ,Underflow detected" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "IRQ_MASK_REG,Interrupt Mask Register" bitfld.long 0x00 13. " POLL_EXP_INT_MASK_FLD ,Polling expiration detected" "Disabled,Enabled" bitfld.long 0x00 11. " RX_FIFO_FULL_MASK_FLD ,RX FIFO full" "Disabled,Enabled" bitfld.long 0x00 10. " RX_FIFO_NOT_EMPTY_MASK_FLD ,RX FIFO not empty" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TX_FIFO_FULL_MASK_FLD ,TX FIFO full" "Disabled,Enabled" bitfld.long 0x00 8. " TX_FIFO_NOT_FULL_MASK_FLD ,TX FIFO not full" "Disabled,Enabled" bitfld.long 0x00 7. " RECV_OVERFLOW_MASK_FLD ,Receive overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ILLEGAL_ACCESS_DET_MASK_FLD ,Illegal access detected" "Disabled,Enabled" bitfld.long 0x00 4. " PROT_WR_ATTEMPT_MASK_FLD ,Protected area write attempt" "Disabled,Enabled" bitfld.long 0x00 1. " UNDERFLOW_DET_MASK_FLD ,Underflow Detected" "Disabled,Enabled" if (((per.l(ad:0x40005000+0x58))&0x02)==0x00) group.long 0x50++0x07 line.long 0x00 "LOWER_WR_PROT_REG,Lower Write Protection Register" line.long 0x04 "UPPER_WR_PROT_REG,Upper Write Protection Register" group.long 0x58++0x03 line.long 0x00 "WR_PROT_CTRL_REG,Write Protection Control Register" bitfld.long 0x00 1. " ENB_FLD ,Write protection enable Bit" "Disabled,Enabled" bitfld.long 0x00 0. " INV_FLD ,Write protection Inversion Bit" "Disabled,Enabled" else rgroup.long 0x50++0x07 line.long 0x00 "LOWER_WR_PROT_REG,Lower Write Protection Register" line.long 0x04 "UPPER_WR_PROT_REG,Upper Write Protection Register" group.long 0x58++0x03 line.long 0x00 "WR_PROT_CTRL_REG,Write Protection Control Register" bitfld.long 0x00 1. " ENB_FLD ,Write protection Enable Bit" "Disabled,Enabled" rbitfld.long 0x00 0. " INV_FLD ,Write protection Inversion Bit" "Disabled,Enabled" endif group.long 0x90++0x07 line.long 0x00 "FLASH_CMD_CTRL_REG,Flash Command Control Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_OPCODE_FLD ,Command opcode" bitfld.long 0x00 23. " ENB_READ_DATA_FLD ,Read data enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " NUM_RD_DATA_BYTES_FLD ,Number of read data Bytes" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 19. " ENB_COMD_ADDR_FLD ,Command address enable" "Disabled,Enabled" bitfld.long 0x00 18. " ENB_MODE_BIT_FLD ,Mode Bit enable" "Disabled,Enabled" bitfld.long 0x00 16.--17. " NUM_ADDR_BYTES_FLD ,Number of address bytes" "1,2,3,4" textline " " bitfld.long 0x00 15. " ENB_WRITE_DATA_FLD ,Write Data Enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " NUM_WR_DATA_BYTES_FLD ,Number of Write Data Byte" "1,2,3,4,5,6,7,8" bitfld.long 0x00 7.--11. " NUM_DUMMY_BYTES_FLD ,Number of dummy bytes" "0,1,2,3,?..." textline " " rbitfld.long 0x00 1. " CMD_EXEC_STATUS_FLD ,Command execution in progress" "Ended,In progress" bitfld.long 0x00 0. " CMD_EXEC_FLD ,Execute the command" "Disabled,Enabled" line.long 0x04 "FLASH_CMD_ADDR_REG,Flash Command Address Register" group.long 0xA0++0x0F line.long 0x00 "FLASH_RD_DATA_LOWER_REG,Flash Command Read Data Register (Lower)" line.long 0x04 "FLASH_RD_DATA_UPPER_REG,Flash Command Read Data Register (Upper)" line.long 0x08 "FLASH_WR_DATA_LOWER_REG,Flash Command Write Data Register (Lower)" line.long 0x0C "FLASH_WR_DATA_UPPER_REG,Flash Command Write Data Register (Upper)" rgroup.long 0xB0++0x03 line.long 0x00 "POLLING_FLASH_STATUS_REG,Polling Flash Status Register" bitfld.long 0x00 8. " DEVICE_STATUS_VALID_FLD ,Polling status valid" "Invalid,Valid" hexmask.long.byte 0x00 0.--7. 1. " DEVICE_STATUS_FLD ,Flash Status" rgroup.long 0xFC++0x03 line.long 0x00 "MODULE_ID_REG,Module ID Register" hexmask.long.tbyte 0x00 0.--23. 1. " VALUE_FLD ,Module/Revision ID number" width 0x0B tree.end sif cpu()=="R9A06G033-CM3" tree "QSPI2" base ad:0x4000E000 width 27. if (((per.l(ad:0x4000E000))&0x101)==0x001) group.long 0x00++0x03 line.long 0x00 "CONFIG_REG,QSPI Configuration Register" rbitfld.long 0x00 31. " QSPI_IDLE_FLD ,Serial interface and QSPI pipeline is IDLE" "Not idle,Idle" bitfld.long 0x00 23. " ENABLE_AHB_DECODER_FLD ,Enable AHB decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ENTER_XIP_MODE_IMM_FLD ,Enter XIP mode immediately" "Disabled,Enabled" bitfld.long 0x00 17. " ENTER_XIP_MODE_FLD ,Enter XIP mode on next READ" "Disabled,Enabled" bitfld.long 0x00 16. " ENB_AHB_ADDR_REMAP_FLD ,Enable AHB Address Re-mapping" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " WR_PROT_FLASH_FLD ,Write Protect pin of the FLASH device" "Disabled,Enabled" bitfld.long 0x00 10.--13. " PERIPH_CS_LINES_FLD ,Peripheral Chip Select Lines" "14,12,14,11,14,13,14,7,14,13,14,11,14,13,14," bitfld.long 0x00 9. " PERIPH_SEL_DEC_FLD ,Peripheral select decode" "Only 1 of 4,4-to-16" textline " " bitfld.long 0x00 8. " ENB_LEGACY_IP_MODE_FLD ,Legacy IP mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " ENB_DIR_ACC_CTLR_FLD ,Enable Direct Access Controller" "Disabled,Enabled" bitfld.long 0x00 2. " SEL_CLK_PHASE_FLD ,Select clock phase" "Active,Inactive" textline " " bitfld.long 0x00 1. " SEL_CLK_POL_FLD ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " ENB_QSPI_FLD ,QSPI enable" "Disabled,Enabled" elif (((per.l(ad:0x4000E000))&0x101)==0x000) group.long 0x00++0x03 line.long 0x00 "CONFIG_REG,QSPI Configuration Register" rbitfld.long 0x00 31. " QSPI_IDLE_FLD ,Serial interface and QSPI pipeline is IDLE" "Not idle,Idle" bitfld.long 0x00 23. " ENABLE_AHB_DECODER_FLD ,Enable AHB decoder" "Disabled,Enabled" bitfld.long 0x00 19.--22. " MSTR_BAUD_DIV_FLD ,Master mode baud rate divisor" ",4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" textline " " bitfld.long 0x00 18. " ENTER_XIP_MODE_IMM_FLD ,Enter XIP Mode immediately" "Disabled,Enabled" bitfld.long 0x00 17. " ENTER_XIP_MODE_FLD ,Enter XIP Mode on next read" "Disabled,Enabled" bitfld.long 0x00 16. " ENB_AHB_ADDR_REMAP_FLD ,Enable AHB Address Re-mapping" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " WR_PROT_FLASH_FLD ,Write Protect pin of the FLASH device" "Disabled,Enabled" bitfld.long 0x00 10.--13. " PERIPH_CS_LINES_FLD ,Peripheral chip select lines" "14,12,14,11,14,13,14,7,14,13,14,11,14,13,14," bitfld.long 0x00 9. " PERIPH_SEL_DEC_FLD ,Peripheral select decode" "Only 1 of 4,4-to-16" textline " " bitfld.long 0x00 8. " ENB_LEGACY_IP_MODE_FLD ,Legacy IP mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " ENB_DIR_ACC_CTLR_FLD ,Enable direct access Controller" "Disabled,Enabled" bitfld.long 0x00 2. " SEL_CLK_PHASE_FLD ,Select clock phase" "Active,Inactive" textline " " bitfld.long 0x00 1. " SEL_CLK_POL_FLD ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " ENB_QSPI_FLD ,QSPI enable" "Disabled,Enabled" elif (((per.l(ad:0x4000E000))&0x101)==0x101) group.long 0x00++0x03 line.long 0x00 "CONFIG_REG,QSPI Configuration Register" rbitfld.long 0x00 31. " QSPI_IDLE_FLD ,Serial interface and QSPI pipeline is IDLE" "Not idle,Idle" bitfld.long 0x00 23. " ENABLE_AHB_DECODER_FLD ,Enable AHB decoder" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ENTER_XIP_MODE_IMM_FLD ,Enter XIP Mode immediately" "Disabled,Enabled" bitfld.long 0x00 17. " ENTER_XIP_MODE_FLD ,Enter XIP mode on next read" "Disabled,Enabled" bitfld.long 0x00 16. " ENB_AHB_ADDR_REMAP_FLD ,Enable AHB address re-mapping" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " WR_PROT_FLASH_FLD ,Write protect pin of the FLASH device" "Disabled,Enabled" bitfld.long 0x00 10.--13. " PERIPH_CS_LINES_FLD ,Peripheral chip select Lines" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 9. " PERIPH_SEL_DEC_FLD ,Peripheral select decode" "Only 1 of 4,4-to-16" textline " " bitfld.long 0x00 8. " ENB_LEGACY_IP_MODE_FLD ,Legacy IP mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " ENB_DIR_ACC_CTLR_FLD ,Enable direct access controller" "Disabled,Enabled" bitfld.long 0x00 2. " SEL_CLK_PHASE_FLD ,Select Clock phase" "Active,Inactive" textline " " bitfld.long 0x00 1. " SEL_CLK_POL_FLD ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " ENB_QSPI_FLD ,QSPI enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "CONFIG_REG,QSPI Configuration Register" rbitfld.long 0x00 31. " QSPI_IDLE_FLD ,Serial interface and QSPI pipeline is IDLE" "Not idle,Idle" bitfld.long 0x00 23. " ENABLE_AHB_DECODER_FLD ,Enable AHB decoder" "Disabled,Enabled" bitfld.long 0x00 19.--22. " MSTR_BAUD_DIV_FLD ,Master mode baud rate divisor" ",4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" textline " " bitfld.long 0x00 18. " ENTER_XIP_MODE_IMM_FLD ,Enter XIP mode immediately" "Disabled,Enabled" bitfld.long 0x00 17. " ENTER_XIP_MODE_FLD ,Enter XIP mode on next read" "Disabled,Enabled" bitfld.long 0x00 16. " ENB_AHB_ADDR_REMAP_FLD ,Enable AHB address re-mapping" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " WR_PROT_FLASH_FLD ,Write protect pin of the FLASH device" "Disabled,Enabled" bitfld.long 0x00 10.--13. " PERIPH_CS_LINES_FLD ,Peripheral chip select lines" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 9. " PERIPH_SEL_DEC_FLD ,Peripheral select decode" "Only 1 of 4,4-to-16" textline " " bitfld.long 0x00 8. " ENB_LEGACY_IP_MODE_FLD ,Legacy IP Mode enable" "Disabled,Enabled" bitfld.long 0x00 7. " ENB_DIR_ACC_CTLR_FLD ,Enable direct access controller" "Disabled,Enabled" bitfld.long 0x00 2. " SEL_CLK_PHASE_FLD ,Select clock phase" "Active,Inactive" textline " " bitfld.long 0x00 1. " SEL_CLK_POL_FLD ,Clock polarity outside SPI word" "Low,High" bitfld.long 0x00 0. " ENB_QSPI_FLD ,QSPI enable" "Disabled,Enabled" endif group.long 0x04++0x13 line.long 0x00 "DEV_INSTR_RD_CONFIG_REG,Device Read Instruction Configuration Register" bitfld.long 0x00 24.--28. " DUMMY_RD_CLK_CYCLES_FLD ,Number of dummy clock cycles required for read instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. " MODE_BIT_ENABLE_FLD ,Mode Bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--17. " DATA_XFER_TYPE_EXT_MODE_FLD ,Data transfer type for standard SPI modes" "SIO mode,Dual Input/Output,Quad Input/Output,?..." bitfld.long 0x00 12.--13. " ADDR_XFER_TYPE_STD_MODE_FLD ,Address transfer type for standard SPI modes" "QUAD_IO0 only,QUAD_IO[1:0] only,QUAD_IO[3:0],?..." textline " " bitfld.long 0x00 8.--9. " INSTR_TYPE_FLD ,Instruction type" "Standard SPI,DIO-SP,QIO-SPI,?..." hexmask.long.byte 0x00 0.--7. 1. " RD_OPCODE_NON_XIP_FLD ,Read opcode in non-XIP mode" line.long 0x04 "DEV_INSTR_WR_CONFIG_REG,Device Write Instruction Configuration Register" bitfld.long 0x04 24.--28. " DUMMY_WR_CLK_CYCLES_FLD , Number of dummy clock cycles required for write instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--17. " DATA_XFER_TYPE_EXT_MODE_FLD ,Data transfer type for standard SPI modes" "SIO mode,Dual Input/Output,Quad Input/Output,?..." bitfld.long 0x04 12.--13. " ADDR_XFER_TYPE_STD_MODE_FLD ,Address transfer type for standard SPI modes" "QUAD_IO0,QUAD_IO[1:0],QUAD_IO[3:0],?..." textline " " bitfld.long 0x04 8. " WEL_DIS_FLD ,WEL disable" "No,Yes" hexmask.long.byte 0x04 0.--7. 1. " WR_OPCODE_FLD ,Write Opcode" line.long 0x08 "DEV_DELAY_REG,QSPI Device Delay Register" hexmask.long.byte 0x08 24.--31. 1. " D_NSS_FLD ,Chip Select De-Assert" hexmask.long.byte 0x08 16.--23. 1. " D_BTWN_FLD ,Chip Select De-Assert Different Slaves" hexmask.long.byte 0x08 8.--15. 1. " D_AFTER_FLD ,Chip Select End Of Transfer" textline " " hexmask.long.byte 0x08 0.--7. 1. " D_INIT_FLD ,Chip Select Start Of Transfer" line.long 0x0C "RD_DATA_CAPTURE_REG,Read Data Capture Register" bitfld.long 0x0C 5. " SAMPLE_EDGE_SEL_FLD ,Sample edge selection" "Falling,Rising" bitfld.long 0x0C 1.--4. " DELAY_FLD ,Read Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "DEV_SIZE_CONFIG_REG,Device Size Configuration Register" rbitfld.long 0x10 29.--31. " DEV_SIZE_RESV_FLD ,Dev_size_resv" "0,1,2,3,4,5,6,7" bitfld.long 0x10 27.--28. " MEM_SIZE_ON_CS3_FLD ,Size of Flash Device connected to QUAD_CS_N[3] pin" "512 Mb,1 Gb,2 Gb,4 Gb" bitfld.long 0x10 25.--26. " MEM_SIZE_ON_CS2_FLD ,Size of Flash Device connected to QUAD_CS_N[2] pin" "512 Mb,1 Gb,2 Gb,4 Gb" textline " " bitfld.long 0x10 23.--24. " MEM_SIZE_ON_CS1_FLD ,Size of Flash Device connected to QUAD_CS_N[1] pin" "512 Mb,1 Gb,2 Gb,4 Gb" bitfld.long 0x10 21.--22. " MEM_SIZE_ON_CS0_FLD ,Size of Flash Device connected to QUAD_CS_N[0] pin" "512 Mb,1 Gb,2 Gb,4 Gb" bitfld.long 0x10 16.--20. " BYTES_PER_SUBSECTOR_FLD ,Number of bytes per Block" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,?..." textline " " hexmask.long.word 0x10 4.--15. 1. " BYTES_PER_DEVICE_PAGE_FLD ,Number of bytes per device page" bitfld.long 0x10 0.--3. " NUM_ADDR_BYTES_FLD ,Number of address bytes" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" group.long 0x24++0x7 line.long 0x00 "REMAP_ADDR_REG,Remap Address Register" line.long 0x04 "MODE_BIT_CONFIG_REG,Mode Bit Configuration Register" hexmask.long.byte 0x04 0.--7. 1. " MODE_FLD ,Mode bits" if (((per.l(ad:0x4000E000))&0x100)==0x100) group.long 0x30++0x07 line.long 0x00 "TX_THRESH_REG,TX Threshold Register" bitfld.long 0x00 0.--3. " LEVEL_FLD ,Level at which the TX FIFO not full interrupt is generated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RX_THRESH_REG,RX Threshold Register" bitfld.long 0x04 0.--3. " LEVEL_FLD ,Level at which the RX FIFO not empty interrupt is generated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hgroup.long 0x30++0x03 hide.long 0x00 "TX_THRESH_REG,TX Threshold Register" hgroup.long 0x34++0x03 hide.long 0x00 "RX_THRESH_REG,RX Threshold Register" endif group.long 0x38++0x07 line.long 0x00 "WRITE_COMPLETION_CTRL_REG,Write Completion Control Register" hexmask.long.byte 0x00 24.--31. 1. " POLL_REP_DELAY_FLD ,Polling repetition delay" hexmask.long.byte 0x00 16.--23. 1. " POLL_COUNT_FLD ,Poll count" bitfld.long 0x00 14. " DISABLE_POLLING_FLD ,Disable polling" "No,Yes" textline " " bitfld.long 0x00 13. " POLLING_POLARITY_FLD ,Polling polarity" "equal to 0,equal to 1" bitfld.long 0x00 8.--10. " POLLING_BIT_INDEX_FLD ,Polling bit index" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 0.--7. 1. " OPCODE_FLD ,Opcode" line.long 0x04 "NO_OF_POLLS_BEF_EXP_REG,Polling Expiration Register" if (((per.l(ad:0x4000E000))&0x100)==0x100) rgroup.long 0x40++0x03 line.long 0x00 "IRQ_STATUS_REG,Interrupt Status Register" bitfld.long 0x00 13. " POLL_EXP_INT_FLD ,The maximum number of programmed polls cycles is expired" "No expired,Expired" bitfld.long 0x00 11. " RX_FIFO_FULL_FLD ,RX FIFO full" "Not full,Full" bitfld.long 0x00 10. " RX_FIFO_NOT_EMPTY_FLD ,RX FIFO not empty" "< RX THRESHOLD,>=RX THRESHOLD" textline " " bitfld.long 0x00 9. " TX_FIFO_FULL_FLD ,TX FIFO full" "Not full,Full" bitfld.long 0x00 8. " TX_FIFO_NOT_FULL_FLD ,TX FIFO not full" "> RX THRESHOLD,<=RX THRESHOLD" bitfld.long 0x00 7. " RECV_OVERFLOW_FLD ,Receive overflow" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " ILLEGAL_ACCESS_DET_FLD ,Illegal AHB access has been detected" "Not occurred,Occurred" bitfld.long 0x00 4. " PROT_WR_ATTEMPT_FLD ,Write to protected area was attempted and rejected" "Not occurred,Occurred" bitfld.long 0x00 1. " UNDERFLOW_DET_FLD ,Underflow detected" "Not occurred,Occurred" else rgroup.long 0x40++0x03 line.long 0x00 "IRQ_STATUS_REG,Interrupt Status Register" bitfld.long 0x00 13. " POLL_EXP_INT_FLD ,The maximum number of programmed polls cycles is expired" "No expired,Expired" bitfld.long 0x00 5. " ILLEGAL_ACCESS_DET_FLD ,Illegal AHB access has been detected" "Not occurred,Occurred" bitfld.long 0x00 4. " PROT_WR_ATTEMPT_FLD ,Write to protected area was attempted and rejected" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " UNDERFLOW_DET_FLD ,Underflow detected" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "IRQ_MASK_REG,Interrupt Mask Register" bitfld.long 0x00 13. " POLL_EXP_INT_MASK_FLD ,Polling expiration detected" "Disabled,Enabled" bitfld.long 0x00 11. " RX_FIFO_FULL_MASK_FLD ,RX FIFO full" "Disabled,Enabled" bitfld.long 0x00 10. " RX_FIFO_NOT_EMPTY_MASK_FLD ,RX FIFO not empty" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TX_FIFO_FULL_MASK_FLD ,TX FIFO full" "Disabled,Enabled" bitfld.long 0x00 8. " TX_FIFO_NOT_FULL_MASK_FLD ,TX FIFO not full" "Disabled,Enabled" bitfld.long 0x00 7. " RECV_OVERFLOW_MASK_FLD ,Receive overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ILLEGAL_ACCESS_DET_MASK_FLD ,Illegal access detected" "Disabled,Enabled" bitfld.long 0x00 4. " PROT_WR_ATTEMPT_MASK_FLD ,Protected area write attempt" "Disabled,Enabled" bitfld.long 0x00 1. " UNDERFLOW_DET_MASK_FLD ,Underflow Detected" "Disabled,Enabled" if (((per.l(ad:0x4000E000+0x58))&0x02)==0x00) group.long 0x50++0x07 line.long 0x00 "LOWER_WR_PROT_REG,Lower Write Protection Register" line.long 0x04 "UPPER_WR_PROT_REG,Upper Write Protection Register" group.long 0x58++0x03 line.long 0x00 "WR_PROT_CTRL_REG,Write Protection Control Register" bitfld.long 0x00 1. " ENB_FLD ,Write protection enable Bit" "Disabled,Enabled" bitfld.long 0x00 0. " INV_FLD ,Write protection Inversion Bit" "Disabled,Enabled" else rgroup.long 0x50++0x07 line.long 0x00 "LOWER_WR_PROT_REG,Lower Write Protection Register" line.long 0x04 "UPPER_WR_PROT_REG,Upper Write Protection Register" group.long 0x58++0x03 line.long 0x00 "WR_PROT_CTRL_REG,Write Protection Control Register" bitfld.long 0x00 1. " ENB_FLD ,Write protection Enable Bit" "Disabled,Enabled" rbitfld.long 0x00 0. " INV_FLD ,Write protection Inversion Bit" "Disabled,Enabled" endif group.long 0x90++0x07 line.long 0x00 "FLASH_CMD_CTRL_REG,Flash Command Control Register" hexmask.long.byte 0x00 24.--31. 1. " CMD_OPCODE_FLD ,Command opcode" bitfld.long 0x00 23. " ENB_READ_DATA_FLD ,Read data enable" "Disabled,Enabled" bitfld.long 0x00 20.--22. " NUM_RD_DATA_BYTES_FLD ,Number of read data Bytes" "1,2,3,4,5,6,7,8" textline " " bitfld.long 0x00 19. " ENB_COMD_ADDR_FLD ,Command address enable" "Disabled,Enabled" bitfld.long 0x00 18. " ENB_MODE_BIT_FLD ,Mode Bit enable" "Disabled,Enabled" bitfld.long 0x00 16.--17. " NUM_ADDR_BYTES_FLD ,Number of address bytes" "1,2,3,4" textline " " bitfld.long 0x00 15. " ENB_WRITE_DATA_FLD ,Write Data Enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " NUM_WR_DATA_BYTES_FLD ,Number of Write Data Byte" "1,2,3,4,5,6,7,8" bitfld.long 0x00 7.--11. " NUM_DUMMY_BYTES_FLD ,Number of dummy bytes" "0,1,2,3,?..." textline " " rbitfld.long 0x00 1. " CMD_EXEC_STATUS_FLD ,Command execution in progress" "Ended,In progress" bitfld.long 0x00 0. " CMD_EXEC_FLD ,Execute the command" "Disabled,Enabled" line.long 0x04 "FLASH_CMD_ADDR_REG,Flash Command Address Register" group.long 0xA0++0x0F line.long 0x00 "FLASH_RD_DATA_LOWER_REG,Flash Command Read Data Register (Lower)" line.long 0x04 "FLASH_RD_DATA_UPPER_REG,Flash Command Read Data Register (Upper)" line.long 0x08 "FLASH_WR_DATA_LOWER_REG,Flash Command Write Data Register (Lower)" line.long 0x0C "FLASH_WR_DATA_UPPER_REG,Flash Command Write Data Register (Upper)" rgroup.long 0xB0++0x03 line.long 0x00 "POLLING_FLASH_STATUS_REG,Polling Flash Status Register" bitfld.long 0x00 8. " DEVICE_STATUS_VALID_FLD ,Polling status valid" "Invalid,Valid" hexmask.long.byte 0x00 0.--7. 1. " DEVICE_STATUS_FLD ,Flash Status" rgroup.long 0xFC++0x03 line.long 0x00 "MODULE_ID_REG,Module ID Register" hexmask.long.tbyte 0x00 0.--23. 1. " VALUE_FLD ,Module/Revision ID number" width 0x0B tree.end endif tree.end tree.open "SDIO (SD/SDIO/eMMC Controller)" tree "SDIO1" base ad:0x40100000 width 37. group.word 0x00++0x03 line.word 0x00 "REG_SDMASYSADDRLO,SDMA System Address Register Low" line.word 0x02 "REG_SDMASYSADDRHI,SDMA System Address Register High" if (((per.w(ad:0x40100000+0x0C))&0x0001)==0x0001) group.word 0x04++0x01 line.word 0x00 "REG_BLOCKSIZE,Block Size Register" bitfld.word 0x00 12.--14. " SDMA_BUFBOUNDARY ,Host SDMA buffer boundary" "4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB" hexmask.word 0x00 0.--11. 1. " XFER_BLOCKSIZE ,Transfer block size" else group.word 0x04++0x01 line.word 0x00 "REG_BLOCKSIZE,Block Size Register" hexmask.word 0x00 0.--11. 1. " XFER_BLOCKSIZE ,Transfer block size" endif if (((per.w(ad:0x40100000+0x0C))&0x0022)==0x0022) group.word 0x06++0x01 line.word 0x00 "REG_BLOCKCOUNT,Block Count Register" else hgroup.word 0x06++0x01 hide.word 0x00 "REG_BLOCKCOUNT,Block Count Register" endif group.word 0x08++0x03 line.word 0x00 "REG_ARGUMENT1LO,Argument1 Register Low" line.word 0x02 "REG_ARGUMENT1HI,Argument1 Register High" if (((per.l(ad:0x40100000+0x40))&0x00400000)==0x00400000) group.word 0x0C++0x01 line.word 0x00 "REG_TRANSFERMODE,Transfer Mode Register" bitfld.word 0x00 5. " XFERMODE_MULTIBLKSEL ,Multi / Single block select" "Single,Multiple" bitfld.word 0x00 4. " XFERMODE_DATAXFERDIR ,Data transfer direction select" "Write,Read" textline " " bitfld.word 0x00 2.--3. " XFERMODE_AUTOCMDENA ,Auto CMD enable" "Disabled,CMD12,CMD23,?..." bitfld.word 0x00 1. " XFERMODE_BLKCNTENA ,Block count enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " XFERMODE_DMAENABLE ,DMA enable" "Disabled,Enabled" else group.word 0x0C++0x01 line.word 0x00 "REG_TRANSFERMODE,Transfer Mode Register" bitfld.word 0x00 5. " XFERMODE_MULTIBLKSEL ,Multi / Single block select" "Single,Multiple" bitfld.word 0x00 4. " XFERMODE_DATAXFERDIR ,Data Transfer direction select" "Write,Read" textline " " bitfld.word 0x00 2.--3. " XFERMODE_AUTOCMDENA ,Auto CMD enable" "Disabled,CMD12,CMD23,?..." bitfld.word 0x00 1. " XFERMODE_BLKCNTENA ,Block count enable" "Disabled,Enabled" endif group.word 0x0E++0x01 line.word 0x00 "REG_COMMAND,Command Register" bitfld.word 0x00 8.--13. " COMMAND_CMDINDEX ,command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 6.--7. " COMMAND_CMDTYPE ,Command type" "Normal,Suspend,Resume,Abort" textline " " bitfld.word 0x00 5. " COMMAND_DATAPRESENT ,Data present select" "Not Present,Present" bitfld.word 0x00 4. " COMMAND_INDEXCHKENA ,Command Index check enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " COMMAND_CRCCHKENA ,Command CRC check enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " COMMAND_RESPONSETYPE ,Response type select" "No Response,Length 136,Length 48,Length 48 checked" rgroup.word 0x10++0x01 line.word 0x00 "REG_RESPONSE0,Response Register 0" rgroup.word 0x12++0x01 line.word 0x00 "REG_RESPONSE1,Response Register 1" rgroup.word 0x14++0x01 line.word 0x00 "REG_RESPONSE2,Response Register 2" rgroup.word 0x16++0x01 line.word 0x00 "REG_RESPONSE3,Response Register 3" rgroup.word 0x18++0x01 line.word 0x00 "REG_RESPONSE4,Response Register 4" rgroup.word 0x1A++0x01 line.word 0x00 "REG_RESPONSE5,Response Register 5" rgroup.word 0x1C++0x01 line.word 0x00 "REG_RESPONSE6,Response Register 6" rgroup.word 0x1E++0x01 line.word 0x00 "REG_RESPONSE7,Response Register 7" hgroup.long 0x20++0x03 hide.long 0x00 "REG_DATAPORT,Buffer Data Port Register" in rgroup.long 0x24++0x03 line.long 0x00 "REG_PRESENTSTATE,Present State Register" bitfld.long 0x00 28. " SDIF_DAT7IN_DSYNC ,DAT[7] errors and debugging status" "Not occurred,Occurred" bitfld.long 0x00 27. " SDIF_DAT6IN_DSYNC ,DAT[6] errors and debugging status" "Not occurred,Occurred" textline " " bitfld.long 0x00 26. " SDIF_DAT5IN_DSYNC ,DAT[5] errors and debugging status" "Not occurred,Occurred" bitfld.long 0x00 25. " SDIF_DAT4IN_DSYNC ,DAT[4] errors and debugging status" "Not occurred,Occurred" textline " " bitfld.long 0x00 24. " SDIF_CMDIN_DSYNC ,CMD errors and debugging status" "Not occurred,Occurred" bitfld.long 0x00 23. " SDIF_DAT3IN_DSYNC ,DAT[3] errors and debugging status" "Not occurred,Occurred" textline " " bitfld.long 0x00 22. " SDIF_DAT2IN_DSYNC ,DAT[2] errors and debugging status" "Not occurred,Occurred" bitfld.long 0x00 21. " SDIF_DAT1IN_DSYNC ,DAT[1] errors and debugging status" "Not occurred,Occurred" textline " " bitfld.long 0x00 20. " SDIF_DAT0IN_DSYNC ,DAT[0] errors and debugging status" "Not occurred,Occurred" bitfld.long 0x00 19. " SDIF_WP_DSYNC ,The Write protect switch supported for memory and combo cards" "Protected,Enabled" textline " " bitfld.long 0x00 18. " SDIF_CD_N_DSYNC ,Inverse value of the SDIO_CD_N pin" "No Card,Card" bitfld.long 0x00 17. " SDHCCARDDET_STATESTABLE_DSYNC ,Testing bit" "Reset of Debouncing,No Card or Inserted" textline " " bitfld.long 0x00 16. " SDHCCARDDET_INSERTED_DSYNC ,Card status flag" "Reset/Debouncing/No Card,Card Inserted" bitfld.long 0x00 11. " SDHCDMACTRL_PIOBUFRDENA ,Non-DMA read transfers status flag" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SDHCDMACTRL_PIOBUFWRENA ,Non-DMA write transfers status flag" "Disabled,Enabled" bitfld.long 0x00 9. " SDHCDMACTRL_RDXFERACTIVE ,Read transfer status" "No valid data,Transferring data" textline " " bitfld.long 0x00 8. " SDHCDMACTRL_WRXFERACTIV ,Write transfer status" "No valid data,Transferring data" bitfld.long 0x00 2. " SDHCDMACTRL_DATALINEACTIVE ,DAT line on SD status" "Inactive,Active" textline " " bitfld.long 0x00 1. " PRESENTSTATE_INHIBITDAT ,Permission issue command which uses the DAT line" "Allowed,Not allowed" bitfld.long 0x00 0. " PRESENTSTATE_INHIBITCMD ,Permission issue command which uses the CMD line" "Allowed,Not allowed" if (((per.b(ad:0x40100000+0x28))&0x80)==0x80) group.byte 0x28++0x00 line.byte 0x00 "REG_HOSTCONTROL1,Host Control 1 Register" bitfld.byte 0x00 7. " HOSTCTRL1_CDSIGSELECT ,Card detect signal detection" "SDIO_CD_N,Test level" bitfld.byte 0x00 6. " HOSTCTRL1_CDTESTLEVEL ,Card detect Test level" "Not inserted,Inserted" textline " " bitfld.byte 0x00 5. " HOSTCTRL1_EXTDATAWIDTH ,Extended data transfer width" "Data transfer width,8-bit" bitfld.byte 0x00 3.--4. " HOSTCTRL1_DMASELECT ,DMA Select" "SDMA,ADMA1(32-bit),ADMA2(32-bit),ADMA2(64-bit)" textline " " bitfld.byte 0x00 2. " HOSTCTRL1_HIGHSPEEDENA ,High speed enable" "Disabled,Enabled" bitfld.byte 0x00 1. " HOSTCTRL1_DATAWIDTH ,Data transfer width" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " HOSTCTRL1_LEDCONTROL ,LED control" "Off,On" else group.byte 0x28++0x00 line.byte 0x00 "REG_HOSTCONTROL1,Host Control 1 Register" bitfld.byte 0x00 7. " HOSTCTRL1_CDSIGSELECT ,Card detect signal detection" "SDIO_CD_N,Test level" textline " " bitfld.byte 0x00 5. " HOSTCTRL1_EXTDATAWIDTH ,Extended data transfer width" "Data transfer width,8-bit" bitfld.byte 0x00 3.--4. " HOSTCTRL1_DMASELECT ,DMA Select" "SDMA,ADMA1(32-bit),ADMA2(32-bit),ADMA2(64-bit)" textline " " bitfld.byte 0x00 2. " HOSTCTRL1_HIGHSPEEDENA ,High speed enable" "Disabled,Enabled" bitfld.byte 0x00 1. " HOSTCTRL1_DATAWIDTH ,Data transfer width" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " HOSTCTRL1_LEDCONTROL ,LED control" "Off,On" endif group.byte 0x29++0x00 line.byte 0x00 "REG_POWERCONTROL,Power Control Register" bitfld.byte 0x00 4. " EMMC_HWRESET ,Hardware reset" "Not Occurred,Occurred" bitfld.byte 0x00 1.--3. " PWRCTRL_SDBUSVOLTAGE ,SD Bus voltage select" ",,,,,,,3.3V" textline " " bitfld.byte 0x00 0. " PWRCTRL_SDBUSPOWER ,SD Bus power" "Off,On" if ((((per.b(ad:0x40100000+0x2A))&0x10)==0x00)&&(((per.b(ad:0x40100000+0x28))&0x02)==0x02)) group.byte 0x2A++0x00 line.byte 0x00 "REG_BLOCKGAPCONTROL,Block Gap Control Register" bitfld.byte 0x00 4. " BLKGAPCTRL_SPIMODE ,SPI mode enable bit" "Disabled,Enabled" bitfld.byte 0x00 3. " BLKGAPCTRL_INTERRUPT ,Interrupt at block gap" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " BLKGAPCTRL_RDWAITCTRL ,Read wait control" "Disabled,Enabled" bitfld.byte 0x00 1. " BLKGAPCTRL_CONTINUE ,Continue Request" "Ignored,Restarted" textline " " bitfld.byte 0x00 0. " BLKGAPCTRL_STOPATBLKGAP ,Stop at block gap request" "Transferred,Stopped" else group.byte 0x2A++0x00 line.byte 0x00 "REG_BLOCKGAPCONTROL,Block Gap Control Register" bitfld.byte 0x00 4. " BLKGAPCTRL_SPIMODE ,SPI mode enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " BLKGAPCTRL_RDWAITCTRL ,Read wait control" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " BLKGAPCTRL_CONTINUE ,Continue request" "Ignored,Restarted" bitfld.byte 0x00 0. " BLKGAPCTRL_STOPATBLKGAP ,Stop at block gap request" "Transferred,Stopped" endif group.byte 0x2B++0x00 line.byte 0x00 "REG_WAKEUPCONTROL,Wake-Up Control Register" bitfld.byte 0x00 2. " WKUPCTRL_CARDREMOVAL ,Wakeup event enable On SD card removal" "Disabled,Enabled" bitfld.byte 0x00 1. " WKUPCTRL_CARDINSERTION ,Wakeup event enable on SD card insertion" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " WKUPCTRL_CARDINTERRUPT ,Wakeup event enable on card interrupt" "Disabled,Enabled" group.word 0x2C++0x01 line.word 0x00 "REG_CLOCKCONTROL,Clock Control Register" hexmask.word.byte 0x00 8.--15. 1. " CLKCTRL_SDCLKFREQSEL ,SDIO_CLK frequency select" bitfld.word 0x00 6.--7. " CLKCTRL_SDCLKFREQSEL_UPPERBITS ,This field is assigned to highest 2-bit of clock divider in SDIO_CLK frequency select" "0,1,2,3" textline " " rbitfld.word 0x00 5. " CLKCTRL_CLKGENSEL ,Clock generator select" "Divided Clock Mode,?..." bitfld.word 0x00 2. " CLKCTRL_SDCLKENA ,SD Clock Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " SDHCCLKGEN_INTCLKSTABLE_DSYNC ,Internal clock stable" "Not Ready,Ready" bitfld.word 0x00 0. " CLKCTRL_INTCLKENA ,Internal clock enable" "Stop,Oscillate" group.byte 0x2E++0x01 line.byte 0x00 "REG_TIMEOUTCONTROL,Timeout Control Register" bitfld.byte 0x00 0.--3. " TIMEOUT_CTRVALUE ,Data timeout counter value" "2^13,2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,?..." line.byte 0x01 "REG_SOFTWARERESET,Software Reset Register" bitfld.byte 0x01 2. " SWRESET_FOR_DAT ,Software reset for DAT line" "No reset,Reset" bitfld.byte 0x01 1. " SWRESET_FOR_CMD ,Software reset for CMD line" "No reset,Reset" textline " " bitfld.byte 0x01 0. " SWRESET_FOR_ALL ,Software reset for all" "No reset,Reset" group.word 0x30++0x0F line.word 0x00 "REG_NORMALINTRSTS,Normal Interrupt Status Register" bitfld.word 0x00 15. " REG_ERRORINTRSTS ,Error interrupt" "Not occurred,Occurred" bitfld.word 0x00 8. " NORMALINTRSTS_CARDINTSTS ,Card interrupt" "Not occurred,Occurred" textline " " bitfld.word 0x00 7. " NORMALINTRSTS_CARDREMSTS ,Card status interrupt" "Stable or Debouncing,Removed" bitfld.word 0x00 6. " NORMALINTRSTS_CARDINSSTS ,Card insertion" "Stable or Debouncing,Inserted" textline " " eventfld.word 0x00 5. " NORMALINTRSTS_BUFRDREADY ,Buffer read ready" "Not ready,Ready" eventfld.word 0x00 4. " NORMALINTRSTS_BUFWRREADY ,Buffer write ready" "Not ready,Ready" textline " " eventfld.word 0x00 3. " NORMALINTRSTS_DMAINTERRUPT ,DMA interrupt" "Not occurred,Occurred" bitfld.word 0x00 2. " NORMALINTRSTS_BLKGAPEVENT ,Block gap event" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " NORMALINTRSTS_XFERCOMPLETE ,Transfer complete" "Not completed,Completed" eventfld.word 0x00 0. " NORMALINTRSTS_CMDCOMPLETE ,Command complete" "Not completed,Completed" line.word 0x02 "REG_ERRORINTRSTS,Error Interrupt Status Register" eventfld.word 0x02 12. " ERRORINTRSTS_HOSTERROR ,Host error detecting" "No error,Error" eventfld.word 0x02 9. " ERRORINTRSTS_ADMAERROR ,ADMA based data transfer errors detecting" "No error,Error" textline " " eventfld.word 0x02 8. " ERRORINTRSTS_AUTOCMDERROR ,Auto CMD error status register changed detecting" "No error,Error" eventfld.word 0x02 7. " ERRORINTRSTS_CURRLIMITERROR ,Power error detecting" "No error,Error" textline " " eventfld.word 0x02 6. " ERRORINTRSTS_DATAENDBITERROR ,End bit position of read data error detecting" "No error,Error" eventfld.word 0x02 5. " ERRORINTRSTS_DATACRCERRO ,CRC error detecting" "No error,Error" textline " " eventfld.word 0x02 4. " ERRORINTRSTS_DATATIMEOUTERROR ,Error timeout conditions: read data/write CRC/busy after CRC/busy for R1b/R5b type" "No error,Error" eventfld.word 0x02 3. " ERRORINTRSTS_CMDINDEXERROR ,Command index error" "No error,Error" textline " " eventfld.word 0x02 2. " ERRORINTRSTS_CMDENDBITERROR ,End bit of a command response error detecting" "No error,Error" eventfld.word 0x02 1. " ERRORINTRSTS_CMDCRCERRO ,Command CRC error" "No error,Error" textline " " eventfld.word 0x02 0. " ERRORINTRSTS_CMDTIMEOUTERROR ,Timeout request error" "No error,Error" line.word 0x04 "REG_NORMALINTRSTSENA,Normal Interrupt Status Enable Register" rbitfld.word 0x04 15. " NORMALINTRSTS_ENABLEREGBIT15 ,Normal interrupt status enable" "Disabled,Enabled" bitfld.word 0x04 8. " SDHCREGSET_CARDINTSTSENA ,Card interrupt status" "Masked,Enabled" textline " " bitfld.word 0x04 7. " SDHCREGSET_CARDREMSTSENA ,Card removal status" "Masked,Enabled" bitfld.word 0x04 6. " SDHCREGSET_CARDINSSTSENA ,Card insertion status" "Masked,Enabled" textline " " bitfld.word 0x04 5. " NORMALINTRSTS_ENABLEREGBIT5 ,Buffer read ready status" "Masked,Enabled" bitfld.word 0x04 4. " NORMALINTRSTS_ENABLEREGBIT4 ,Buffer write ready status" "Masked,Enabled" textline " " bitfld.word 0x04 3. " NORMALINTRSTS_ENABLEREGBIT3 ,DMA interrupt status" "Masked,Enabled" bitfld.word 0x04 2. " NORMALINTRSTS_ENABLEREGBIT2 ,Block gap event status" "Masked,Enabled" textline " " bitfld.word 0x04 1. " NORMALINTRSTS_ENABLEREGBIT1 ,Transfer complete status" "Masked,Enabled" bitfld.word 0x04 0. " NORMALINTRSTS_ENABLEREGBIT0 ,Command complete status" "Masked,Enabled" line.word 0x06 "REG_ERRORINTRSTSENA,Error Interrupt Status Enable Register" rbitfld.word 0x06 12. " ERRORINTRSTS_ENABLEREGBIT12 ,Target response error status" "Masked,Enabled" bitfld.word 0x06 9. " ERRORINTRSTS_ENABLEREGBIT9 ,ADMA error status" "Masked,Enabled" textline " " bitfld.word 0x06 8. " ERRORINTRSTS_ENABLEREGBIT8 ,Auto CMD12 error status" "Masked,Enabled" bitfld.word 0x06 7. " ERRORINTRSTS_ENABLEREGBIT7 ,Current limit error status" "Masked,Enabled" textline " " bitfld.word 0x06 6. " ERRORINTRSTS_ENABLEREGBIT6 ,Data bit end error status" "Masked,Enabled" bitfld.word 0x06 5. " ERRORINTRSTS_ENABLEREGBIT5 ,Data CRC error status" "Masked,Enabled" textline " " bitfld.word 0x06 4. " ERRORINTRSTS_ENABLEREGBIT4 ,Data timeout error status" "Masked,Enabled" bitfld.word 0x06 3. " ERRORINTRSTS_ENABLEREGBIT3 ,Command index error status" "Masked,Enabled" textline " " bitfld.word 0x06 2. " ERRORINTRSTS_ENABLEREGBIT2 ,Command end bit error status" "Masked,Enabled" bitfld.word 0x06 1. " ERRORINTRSTS_ENABLEREGBIT1 ,Command CRC error status" "Masked,Enabled" textline " " bitfld.word 0x06 0. " ERRORINTRSTS_ENABLEREGBIT0 ,Command timeout error status" "Masked,Enabled" line.word 0x08 "REG_NORMALINTRSIGENA,Normal Interrupt Signal Enable Register" rbitfld.word 0x08 15. " NORMALINTRSIG_ENABLEREGBIT15 ,Normal interrupt status enable" "Disabled,Enabled" bitfld.word 0x08 8. " NORMALINTRSIG_ENABLEREGBIT8 ,Card interrupt signal" "Masked,Enabled" textline " " bitfld.word 0x08 7. " NORMALINTRSIG_ENABLEREGBIT7 ,Card removal signal" "Masked,Enabled" bitfld.word 0x08 6. " NORMALINTRSIG_ENABLEREGBIT6 ,Card insertion signal" "Masked,Enabled" textline " " bitfld.word 0x08 5. " NORMALINTRSIG_ENABLEREGBIT5 ,Buffer read ready signal" "Masked,Enabled" bitfld.word 0x08 4. " NORMALINTRSIG_ENABLEREGBIT4 ,Buffer write ready signal" "Masked,Enabled" textline " " bitfld.word 0x08 3. " NORMALINTRSIG_ENABLEREGBIT3 ,DMA interrupt signal" "Masked,Enabled" bitfld.word 0x08 2. " NORMALINTRSIG_ENABLEREGBIT2 ,Block gap event signal" "Masked,Enabled" textline " " bitfld.word 0x08 1. " NORMALINTRSIG_ENABLEREGBIT1 ,Transfer complete signal" "Masked,Enabled" bitfld.word 0x08 0. " NORMALINTRSIG_ENABLEREGBIT0 ,Command complete signal" "Masked,Enabled" line.word 0x0A "REG_ERRORINTRSIGENA,Error Interrupt Signal Enable Register" bitfld.word 0x0A 12. " ERRORINTRSIG_ENABLEREGBIT12 ,Target response error signal" "Masked,Enabled" bitfld.word 0x0A 9. " ERRORINTRSIG_ENABLEREGBIT9 ,ADMA error signal" "Masked,Enabled" textline " " bitfld.word 0x0A 8. " ERRORINTRSIG_ENABLEREGBIT8 ,Auto CMD12 error signal" "Masked,Enabled" bitfld.word 0x0A 7. " ERRORINTRSIG_ENABLEREGBIT7 ,Current limit error signal" "Masked,Enabled" textline " " bitfld.word 0x0A 6. " ERRORINTRSIG_ENABLEREGBIT6 ,Data end bit error signal" "Masked,Enabled" bitfld.word 0x0A 5. " ERRORINTRSIG_ENABLEREGBIT5 ,Data CRC error signal" "Masked,Enabled" textline " " bitfld.word 0x0A 4. " ERRORINTRSIG_ENABLEREGBIT4 ,Data timeout error signal" "Masked,Enabled" bitfld.word 0x0A 3. " ERRORINTRSIG_ENABLEREGBIT3 ,Command index error signal" "Masked,Enabled" textline " " bitfld.word 0x0A 2. " ERRORINTRSIG_ENABLEREGBIT2 ,Command end bit error signal" "Masked,Enabled" bitfld.word 0x0A 1. " ERRORINTRSIG_ENABLEREGBIT1 ,Command CRC error signal" "Masked,Enabled" textline " " bitfld.word 0x0A 0. " ERRORINTRSIG_ENABLEREGBIT0 ,Command timeout error signal" "Masked,Enabled" line.word 0x0C "REG_AUTOCMDERRSTS,Auto CMD Error Status Register" bitfld.word 0x0C 7. " AUTOCMDERRSTS_NEXTERROR ,Command not issued by auto CMD12 error" "No Error,Not Issued" bitfld.word 0x0C 4. " AUTOCMDERRSTS_INDEXERROR ,Auto CMD index error" "Not occurred,Occurred" textline " " bitfld.word 0x0C 3. " AUTOCMDERRSTS_ENDBITERROR ,Auto CMD end bit error" "Not occurred,Occurred" bitfld.word 0x0C 2. " AUTOCMDERRSTS_CRCERROR ,Auto CMD CRC error" "Not occurred,Occurred" textline " " bitfld.word 0x0C 1. " AUTOCMDERRSTS_TIMEOUTERROR ,Auto CMD timeout error" "Not occurred,Occurred" bitfld.word 0x0C 0. " AUTOCMDERRSTS_NOTEXECERROR ,Auto CMD12" "Executed,not executed" line.word 0x0E "REG_HOSTCONTROL2,Host Control 2 Register" bitfld.word 0x0E 15. " HOSTCTRL2_PRESETVALUEENABLE ,Preset value enable" "Disabled,Enabled" bitfld.word 0x0E 14. " HOSTCTRL2_ASYNCHINTRENABLE ,Asynchronous interrupt enable" "Disabled,Enabled" rgroup.long 0x40++0x0B line.long 0x00 "REG_CAPABILITIES,Capabilities Register" bitfld.long 0x00 30.--31. " CORECFG_SLOTTYPE ,This field indicates usage of a slot by a specific host system" "Removable,Embedded,?..." bitfld.long 0x00 29. " CORECFG_ASYNCHINTRSUPPORT ,Asynchronous interrupt support" "Not supported,Supported" textline " " bitfld.long 0x00 28. " CORECFG_64BITSUPPORT ,64-bit system address supports" "Not supported,Supported" bitfld.long 0x00 26. " CORECFG_1P8VOLTSUPPORT ,1.8V support" "Not supported,Supported" textline " " bitfld.long 0x00 25. " CORECFG_3P0VOLTSUPPORT ,3.0V support" "Not supported,Supported" bitfld.long 0x00 24. " CORECFG_3P3VOLTSUPPORT ,3.3V support" "Not supported,Supported" textline " " bitfld.long 0x00 23. " CORECFG_SUSPRESSUPPORT ,Suspend/Resume functionality support" "Not supported,Supported" bitfld.long 0x00 22. " CORECFG_SDMASUPPORT ,DMA transfer data between system memory and the HC support" "Not supported,Supported" textline " " bitfld.long 0x00 21. " CORECFG_HIGHSPEEDSUPPORT ,High speed support" "Not supported,Supported" bitfld.long 0x00 19. " CORECFG_ADMA2SUPPORT ,ADMA2 supported" "Not supported,Supported" textline " " bitfld.long 0x00 18. " CORECFG_8BITSUPPORT ,Extended media bus support" "Not supported,Supported" bitfld.long 0x00 16.--17. " CORECFG_MAXBLKLENGTH ,Maximum block size data read and write to the buffer" "512 byte,1024 byte,2048 byte,4096 byte" textline " " hexmask.long.byte 0x00 8.--15. 1. " CORECFG_BASECLKFREQ ,Base clock frequency for SDIO_CLK" bitfld.long 0x00 7. " CORECFG_TIMEOUTCLKUNIT ,Unit of base clock frequency used to detect Data Timeout Error" "kHz,MHz" textline " " bitfld.long 0x00 0.--5. " CORECFG_TIMEOUTCLKFREQ ,Base clock frequency used to detect Data Timeout Error" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "REG_CAPABILITIES_CONT,Capabilities Register (Continue)" bitfld.long 0x04 25. " CORECFG_SPIBLKMODE ,SPI Block mode support" "Not supported,Supported" bitfld.long 0x04 24. " CORECFG_SPISUPPORT ,SPI mode support" "Not supported,Supported" textline " " hexmask.long.byte 0x04 16.--23. 1. " CORECFG_CLOCKMULTIPLIER ,Clock multiplier value of programmable clock generator" line.long 0x08 "REG_MAXCURRENTCAP,Maximum Current Capabilities Register" hexmask.long.byte 0x08 16.--23. 1. " CORECFG_MAXCURRENT1P8V ,Maximum current for 1.8V" hexmask.long.byte 0x08 8.--15. 1. " CORECFG_MAXCURRENT3P0V ,Maximum current for 3.0V" textline " " hexmask.long.byte 0x08 0.--7. 1. " CORECFG_MAXCURRENT3P3V ,Maximum current for 3.3V" wgroup.word 0x50++0x03 line.word 0x00 "REG_FORCEEVENTFORAUTOCMDERRORSTATUS,Force Event For Auto CMD Error Status Register" bitfld.word 0x00 7. " FORCECMDNOTISSUEDBYAUTOCMD12ERR ,Force event for command not issued by AUTO CMD12 error" "No interrupt,Interrupt" bitfld.word 0x00 4. " FORCEAUTOCMDINDEXERR ,Force event for AUTO CMD index error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " FORCEAUTOCMDENDBITERR ,Force event for AUTO CMD end bit error" "No interrupt,Interrupt" bitfld.word 0x00 2. " FORCEAUTOCMDCRCERR ,Force event for AUTO CMD CRC error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " FORCEAUTOCMDTIMEOUTERR ,Force event for AUTO CMD timeout error" "No interrupt,Interrupt" bitfld.word 0x00 0. " FORCEAUTOCMDNOTEXEC ,Force event for AUTO CMD12 not executed" "No interrupt,Interrupt" line.word 0x02 "REG_FORCEEVENTFORERRINTSTS,Force Event for Error Interrupt Status Register" bitfld.word 0x02 9. " FORCEADMAERR ,Force event for ADMA error" "No interrupt,Interrupt" bitfld.word 0x02 8. " FORCEAUTOCMDERR ,Force event for Auto CMD error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 7. " FORCECURRLIMERR ,Force event for current limit error" "No interrupt,Interrupt" bitfld.word 0x02 6. " FORCEDATENDBITERR ,Force event for data end bit error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 5. " FORCEDATCRCERR ,Force event for data CRC error" "No interrupt,Interrupt" bitfld.word 0x02 4. " FORCEDATTIMEOUTERR ,Force event for data timeout error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 3. " FORCECMDINDEXERR ,Force event for command index error" "No interrupt,Interrupt" bitfld.word 0x02 2. " FORCECMDENDBITERR ,Force event for command end bit error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 1. " FORCECMDCRCERR ,Force event for command CRC error" "No interrupt,Interrupt" bitfld.word 0x02 0. " FORCECMDTIMEOUTERR ,Force event for command timeout error" "No interrupt,Interrupt" rgroup.byte 0x54++0x00 line.byte 0x00 "REG_ADMAERRSTS,ADMA Error Status Register" bitfld.byte 0x00 2. " ADMAERRSTS_ADMALENMISMATCHERR ,DMA length mismatch error" "Not occurred,Occurred" bitfld.byte 0x00 0.--1. " ADMAERRSTS_ADMAERRORSTATE ,ADMA error state" "ST_STOP,ST_FDS,,ST_TFR" hgroup.word 0x58++0x01 hide.word 0x00 "REG_ADMASYSADDR0,ADMA System Address Register Low" hgroup.word 0x5A++0x01 hide.word 0x00 "REG_ADMASYSADDR1,ADMA System Address Register High" rgroup.word 0x60++0x0B line.word 0x00 "REG_PRESETVALUE0,Preset Value Register For Initialization" bitfld.word 0x00 10. " CLOCKGENERATORSELECTVALUE ,Clock generator select value" "Compatible,Programmable" hexmask.word 0x00 0.--9. 1. " SDCLKFREQUENCYSELECTVALUE ,SDCLK frequency select value" line.word 0x02 "REG_PRESETVALUE1,Preset Value Register For Default Speed" bitfld.word 0x02 10. " CLOCKGENERATORSELECTVALUE ,Clock generator select value" "Compatible,Programmable" hexmask.word 0x02 0.--9. 1. " SDCLKFREQUENCYSELECTVALUE ,SDCLK frequency select value" line.word 0x04 "REG_PRESETVALUE2,Preset Value Register For High Speed" bitfld.word 0x04 10. " CLOCKGENERATORSELECTVALUE ,Clock generator select value" "Compatible,Programmable" hexmask.word 0x04 0.--9. 1. " SDCLKFREQUENCYSELECTVALUE ,SDCLK frequency select value" rgroup.word 0xFC++0x03 line.word 0x00 "REG_SLOTINTRSTS,Slot Interrupt Status Register" bitfld.word 0x00 0. " SDHCHOSTIF_SLOTINTRSTS ,Logical OR of interrupt signal and wakeup signal for slot status bit" "0,1" line.word 0x02 "REG_HOSTCONTROLLERVER,Host Controller Version Register" hexmask.word.byte 0x02 8.--15. 1. " SDHC_VENVERNUM ,The vendor version number" hexmask.word.byte 0x02 0.--7. 1. " SPECIFICATIONVERSIONNUMBER ,The HC version number" width 0x0B tree.end tree "SDIO2" base ad:0x40101000 width 37. group.word 0x00++0x03 line.word 0x00 "REG_SDMASYSADDRLO,SDMA System Address Register Low" line.word 0x02 "REG_SDMASYSADDRHI,SDMA System Address Register High" if (((per.w(ad:0x40101000+0x0C))&0x0001)==0x0001) group.word 0x04++0x01 line.word 0x00 "REG_BLOCKSIZE,Block Size Register" bitfld.word 0x00 12.--14. " SDMA_BUFBOUNDARY ,Host SDMA buffer boundary" "4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB" hexmask.word 0x00 0.--11. 1. " XFER_BLOCKSIZE ,Transfer block size" else group.word 0x04++0x01 line.word 0x00 "REG_BLOCKSIZE,Block Size Register" hexmask.word 0x00 0.--11. 1. " XFER_BLOCKSIZE ,Transfer block size" endif if (((per.w(ad:0x40101000+0x0C))&0x0022)==0x0022) group.word 0x06++0x01 line.word 0x00 "REG_BLOCKCOUNT,Block Count Register" else hgroup.word 0x06++0x01 hide.word 0x00 "REG_BLOCKCOUNT,Block Count Register" endif group.word 0x08++0x03 line.word 0x00 "REG_ARGUMENT1LO,Argument1 Register Low" line.word 0x02 "REG_ARGUMENT1HI,Argument1 Register High" if (((per.l(ad:0x40101000+0x40))&0x00400000)==0x00400000) group.word 0x0C++0x01 line.word 0x00 "REG_TRANSFERMODE,Transfer Mode Register" bitfld.word 0x00 5. " XFERMODE_MULTIBLKSEL ,Multi / Single block select" "Single,Multiple" bitfld.word 0x00 4. " XFERMODE_DATAXFERDIR ,Data transfer direction select" "Write,Read" textline " " bitfld.word 0x00 2.--3. " XFERMODE_AUTOCMDENA ,Auto CMD enable" "Disabled,CMD12,CMD23,?..." bitfld.word 0x00 1. " XFERMODE_BLKCNTENA ,Block count enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " XFERMODE_DMAENABLE ,DMA enable" "Disabled,Enabled" else group.word 0x0C++0x01 line.word 0x00 "REG_TRANSFERMODE,Transfer Mode Register" bitfld.word 0x00 5. " XFERMODE_MULTIBLKSEL ,Multi / Single block select" "Single,Multiple" bitfld.word 0x00 4. " XFERMODE_DATAXFERDIR ,Data Transfer direction select" "Write,Read" textline " " bitfld.word 0x00 2.--3. " XFERMODE_AUTOCMDENA ,Auto CMD enable" "Disabled,CMD12,CMD23,?..." bitfld.word 0x00 1. " XFERMODE_BLKCNTENA ,Block count enable" "Disabled,Enabled" endif group.word 0x0E++0x01 line.word 0x00 "REG_COMMAND,Command Register" bitfld.word 0x00 8.--13. " COMMAND_CMDINDEX ,command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 6.--7. " COMMAND_CMDTYPE ,Command type" "Normal,Suspend,Resume,Abort" textline " " bitfld.word 0x00 5. " COMMAND_DATAPRESENT ,Data present select" "Not Present,Present" bitfld.word 0x00 4. " COMMAND_INDEXCHKENA ,Command Index check enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " COMMAND_CRCCHKENA ,Command CRC check enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " COMMAND_RESPONSETYPE ,Response type select" "No Response,Length 136,Length 48,Length 48 checked" rgroup.word 0x10++0x01 line.word 0x00 "REG_RESPONSE0,Response Register 0" rgroup.word 0x12++0x01 line.word 0x00 "REG_RESPONSE1,Response Register 1" rgroup.word 0x14++0x01 line.word 0x00 "REG_RESPONSE2,Response Register 2" rgroup.word 0x16++0x01 line.word 0x00 "REG_RESPONSE3,Response Register 3" rgroup.word 0x18++0x01 line.word 0x00 "REG_RESPONSE4,Response Register 4" rgroup.word 0x1A++0x01 line.word 0x00 "REG_RESPONSE5,Response Register 5" rgroup.word 0x1C++0x01 line.word 0x00 "REG_RESPONSE6,Response Register 6" rgroup.word 0x1E++0x01 line.word 0x00 "REG_RESPONSE7,Response Register 7" hgroup.long 0x20++0x03 hide.long 0x00 "REG_DATAPORT,Buffer Data Port Register" in rgroup.long 0x24++0x03 line.long 0x00 "REG_PRESENTSTATE,Present State Register" bitfld.long 0x00 28. " SDIF_DAT7IN_DSYNC ,DAT[7] errors and debugging status" "Not occurred,Occurred" bitfld.long 0x00 27. " SDIF_DAT6IN_DSYNC ,DAT[6] errors and debugging status" "Not occurred,Occurred" textline " " bitfld.long 0x00 26. " SDIF_DAT5IN_DSYNC ,DAT[5] errors and debugging status" "Not occurred,Occurred" bitfld.long 0x00 25. " SDIF_DAT4IN_DSYNC ,DAT[4] errors and debugging status" "Not occurred,Occurred" textline " " bitfld.long 0x00 24. " SDIF_CMDIN_DSYNC ,CMD errors and debugging status" "Not occurred,Occurred" bitfld.long 0x00 23. " SDIF_DAT3IN_DSYNC ,DAT[3] errors and debugging status" "Not occurred,Occurred" textline " " bitfld.long 0x00 22. " SDIF_DAT2IN_DSYNC ,DAT[2] errors and debugging status" "Not occurred,Occurred" bitfld.long 0x00 21. " SDIF_DAT1IN_DSYNC ,DAT[1] errors and debugging status" "Not occurred,Occurred" textline " " bitfld.long 0x00 20. " SDIF_DAT0IN_DSYNC ,DAT[0] errors and debugging status" "Not occurred,Occurred" bitfld.long 0x00 19. " SDIF_WP_DSYNC ,The Write protect switch supported for memory and combo cards" "Protected,Enabled" textline " " bitfld.long 0x00 18. " SDIF_CD_N_DSYNC ,Inverse value of the SDIO_CD_N pin" "No Card,Card" bitfld.long 0x00 17. " SDHCCARDDET_STATESTABLE_DSYNC ,Testing bit" "Reset of Debouncing,No Card or Inserted" textline " " bitfld.long 0x00 16. " SDHCCARDDET_INSERTED_DSYNC ,Card status flag" "Reset/Debouncing/No Card,Card Inserted" bitfld.long 0x00 11. " SDHCDMACTRL_PIOBUFRDENA ,Non-DMA read transfers status flag" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " SDHCDMACTRL_PIOBUFWRENA ,Non-DMA write transfers status flag" "Disabled,Enabled" bitfld.long 0x00 9. " SDHCDMACTRL_RDXFERACTIVE ,Read transfer status" "No valid data,Transferring data" textline " " bitfld.long 0x00 8. " SDHCDMACTRL_WRXFERACTIV ,Write transfer status" "No valid data,Transferring data" bitfld.long 0x00 2. " SDHCDMACTRL_DATALINEACTIVE ,DAT line on SD status" "Inactive,Active" textline " " bitfld.long 0x00 1. " PRESENTSTATE_INHIBITDAT ,Permission issue command which uses the DAT line" "Allowed,Not allowed" bitfld.long 0x00 0. " PRESENTSTATE_INHIBITCMD ,Permission issue command which uses the CMD line" "Allowed,Not allowed" if (((per.b(ad:0x40101000+0x28))&0x80)==0x80) group.byte 0x28++0x00 line.byte 0x00 "REG_HOSTCONTROL1,Host Control 1 Register" bitfld.byte 0x00 7. " HOSTCTRL1_CDSIGSELECT ,Card detect signal detection" "SDIO_CD_N,Test level" bitfld.byte 0x00 6. " HOSTCTRL1_CDTESTLEVEL ,Card detect Test level" "Not inserted,Inserted" textline " " bitfld.byte 0x00 5. " HOSTCTRL1_EXTDATAWIDTH ,Extended data transfer width" "Data transfer width,8-bit" bitfld.byte 0x00 3.--4. " HOSTCTRL1_DMASELECT ,DMA Select" "SDMA,ADMA1(32-bit),ADMA2(32-bit),ADMA2(64-bit)" textline " " bitfld.byte 0x00 2. " HOSTCTRL1_HIGHSPEEDENA ,High speed enable" "Disabled,Enabled" bitfld.byte 0x00 1. " HOSTCTRL1_DATAWIDTH ,Data transfer width" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " HOSTCTRL1_LEDCONTROL ,LED control" "Off,On" else group.byte 0x28++0x00 line.byte 0x00 "REG_HOSTCONTROL1,Host Control 1 Register" bitfld.byte 0x00 7. " HOSTCTRL1_CDSIGSELECT ,Card detect signal detection" "SDIO_CD_N,Test level" textline " " bitfld.byte 0x00 5. " HOSTCTRL1_EXTDATAWIDTH ,Extended data transfer width" "Data transfer width,8-bit" bitfld.byte 0x00 3.--4. " HOSTCTRL1_DMASELECT ,DMA Select" "SDMA,ADMA1(32-bit),ADMA2(32-bit),ADMA2(64-bit)" textline " " bitfld.byte 0x00 2. " HOSTCTRL1_HIGHSPEEDENA ,High speed enable" "Disabled,Enabled" bitfld.byte 0x00 1. " HOSTCTRL1_DATAWIDTH ,Data transfer width" "1-bit,4-bit" textline " " bitfld.byte 0x00 0. " HOSTCTRL1_LEDCONTROL ,LED control" "Off,On" endif group.byte 0x29++0x00 line.byte 0x00 "REG_POWERCONTROL,Power Control Register" bitfld.byte 0x00 4. " EMMC_HWRESET ,Hardware reset" "Not Occurred,Occurred" bitfld.byte 0x00 1.--3. " PWRCTRL_SDBUSVOLTAGE ,SD Bus voltage select" ",,,,,,,3.3V" textline " " bitfld.byte 0x00 0. " PWRCTRL_SDBUSPOWER ,SD Bus power" "Off,On" if ((((per.b(ad:0x40101000+0x2A))&0x10)==0x00)&&(((per.b(ad:0x40101000+0x28))&0x02)==0x02)) group.byte 0x2A++0x00 line.byte 0x00 "REG_BLOCKGAPCONTROL,Block Gap Control Register" bitfld.byte 0x00 4. " BLKGAPCTRL_SPIMODE ,SPI mode enable bit" "Disabled,Enabled" bitfld.byte 0x00 3. " BLKGAPCTRL_INTERRUPT ,Interrupt at block gap" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " BLKGAPCTRL_RDWAITCTRL ,Read wait control" "Disabled,Enabled" bitfld.byte 0x00 1. " BLKGAPCTRL_CONTINUE ,Continue Request" "Ignored,Restarted" textline " " bitfld.byte 0x00 0. " BLKGAPCTRL_STOPATBLKGAP ,Stop at block gap request" "Transferred,Stopped" else group.byte 0x2A++0x00 line.byte 0x00 "REG_BLOCKGAPCONTROL,Block Gap Control Register" bitfld.byte 0x00 4. " BLKGAPCTRL_SPIMODE ,SPI mode enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " BLKGAPCTRL_RDWAITCTRL ,Read wait control" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " BLKGAPCTRL_CONTINUE ,Continue request" "Ignored,Restarted" bitfld.byte 0x00 0. " BLKGAPCTRL_STOPATBLKGAP ,Stop at block gap request" "Transferred,Stopped" endif group.byte 0x2B++0x00 line.byte 0x00 "REG_WAKEUPCONTROL,Wake-Up Control Register" bitfld.byte 0x00 2. " WKUPCTRL_CARDREMOVAL ,Wakeup event enable On SD card removal" "Disabled,Enabled" bitfld.byte 0x00 1. " WKUPCTRL_CARDINSERTION ,Wakeup event enable on SD card insertion" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " WKUPCTRL_CARDINTERRUPT ,Wakeup event enable on card interrupt" "Disabled,Enabled" group.word 0x2C++0x01 line.word 0x00 "REG_CLOCKCONTROL,Clock Control Register" hexmask.word.byte 0x00 8.--15. 1. " CLKCTRL_SDCLKFREQSEL ,SDIO_CLK frequency select" bitfld.word 0x00 6.--7. " CLKCTRL_SDCLKFREQSEL_UPPERBITS ,This field is assigned to highest 2-bit of clock divider in SDIO_CLK frequency select" "0,1,2,3" textline " " rbitfld.word 0x00 5. " CLKCTRL_CLKGENSEL ,Clock generator select" "Divided Clock Mode,?..." bitfld.word 0x00 2. " CLKCTRL_SDCLKENA ,SD Clock Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " SDHCCLKGEN_INTCLKSTABLE_DSYNC ,Internal clock stable" "Not Ready,Ready" bitfld.word 0x00 0. " CLKCTRL_INTCLKENA ,Internal clock enable" "Stop,Oscillate" group.byte 0x2E++0x01 line.byte 0x00 "REG_TIMEOUTCONTROL,Timeout Control Register" bitfld.byte 0x00 0.--3. " TIMEOUT_CTRVALUE ,Data timeout counter value" "2^13,2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,?..." line.byte 0x01 "REG_SOFTWARERESET,Software Reset Register" bitfld.byte 0x01 2. " SWRESET_FOR_DAT ,Software reset for DAT line" "No reset,Reset" bitfld.byte 0x01 1. " SWRESET_FOR_CMD ,Software reset for CMD line" "No reset,Reset" textline " " bitfld.byte 0x01 0. " SWRESET_FOR_ALL ,Software reset for all" "No reset,Reset" group.word 0x30++0x0F line.word 0x00 "REG_NORMALINTRSTS,Normal Interrupt Status Register" bitfld.word 0x00 15. " REG_ERRORINTRSTS ,Error interrupt" "Not occurred,Occurred" bitfld.word 0x00 8. " NORMALINTRSTS_CARDINTSTS ,Card interrupt" "Not occurred,Occurred" textline " " bitfld.word 0x00 7. " NORMALINTRSTS_CARDREMSTS ,Card status interrupt" "Stable or Debouncing,Removed" bitfld.word 0x00 6. " NORMALINTRSTS_CARDINSSTS ,Card insertion" "Stable or Debouncing,Inserted" textline " " eventfld.word 0x00 5. " NORMALINTRSTS_BUFRDREADY ,Buffer read ready" "Not ready,Ready" eventfld.word 0x00 4. " NORMALINTRSTS_BUFWRREADY ,Buffer write ready" "Not ready,Ready" textline " " eventfld.word 0x00 3. " NORMALINTRSTS_DMAINTERRUPT ,DMA interrupt" "Not occurred,Occurred" bitfld.word 0x00 2. " NORMALINTRSTS_BLKGAPEVENT ,Block gap event" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " NORMALINTRSTS_XFERCOMPLETE ,Transfer complete" "Not completed,Completed" eventfld.word 0x00 0. " NORMALINTRSTS_CMDCOMPLETE ,Command complete" "Not completed,Completed" line.word 0x02 "REG_ERRORINTRSTS,Error Interrupt Status Register" eventfld.word 0x02 12. " ERRORINTRSTS_HOSTERROR ,Host error detecting" "No error,Error" eventfld.word 0x02 9. " ERRORINTRSTS_ADMAERROR ,ADMA based data transfer errors detecting" "No error,Error" textline " " eventfld.word 0x02 8. " ERRORINTRSTS_AUTOCMDERROR ,Auto CMD error status register changed detecting" "No error,Error" eventfld.word 0x02 7. " ERRORINTRSTS_CURRLIMITERROR ,Power error detecting" "No error,Error" textline " " eventfld.word 0x02 6. " ERRORINTRSTS_DATAENDBITERROR ,End bit position of read data error detecting" "No error,Error" eventfld.word 0x02 5. " ERRORINTRSTS_DATACRCERRO ,CRC error detecting" "No error,Error" textline " " eventfld.word 0x02 4. " ERRORINTRSTS_DATATIMEOUTERROR ,Error timeout conditions: read data/write CRC/busy after CRC/busy for R1b/R5b type" "No error,Error" eventfld.word 0x02 3. " ERRORINTRSTS_CMDINDEXERROR ,Command index error" "No error,Error" textline " " eventfld.word 0x02 2. " ERRORINTRSTS_CMDENDBITERROR ,End bit of a command response error detecting" "No error,Error" eventfld.word 0x02 1. " ERRORINTRSTS_CMDCRCERRO ,Command CRC error" "No error,Error" textline " " eventfld.word 0x02 0. " ERRORINTRSTS_CMDTIMEOUTERROR ,Timeout request error" "No error,Error" line.word 0x04 "REG_NORMALINTRSTSENA,Normal Interrupt Status Enable Register" rbitfld.word 0x04 15. " NORMALINTRSTS_ENABLEREGBIT15 ,Normal interrupt status enable" "Disabled,Enabled" bitfld.word 0x04 8. " SDHCREGSET_CARDINTSTSENA ,Card interrupt status" "Masked,Enabled" textline " " bitfld.word 0x04 7. " SDHCREGSET_CARDREMSTSENA ,Card removal status" "Masked,Enabled" bitfld.word 0x04 6. " SDHCREGSET_CARDINSSTSENA ,Card insertion status" "Masked,Enabled" textline " " bitfld.word 0x04 5. " NORMALINTRSTS_ENABLEREGBIT5 ,Buffer read ready status" "Masked,Enabled" bitfld.word 0x04 4. " NORMALINTRSTS_ENABLEREGBIT4 ,Buffer write ready status" "Masked,Enabled" textline " " bitfld.word 0x04 3. " NORMALINTRSTS_ENABLEREGBIT3 ,DMA interrupt status" "Masked,Enabled" bitfld.word 0x04 2. " NORMALINTRSTS_ENABLEREGBIT2 ,Block gap event status" "Masked,Enabled" textline " " bitfld.word 0x04 1. " NORMALINTRSTS_ENABLEREGBIT1 ,Transfer complete status" "Masked,Enabled" bitfld.word 0x04 0. " NORMALINTRSTS_ENABLEREGBIT0 ,Command complete status" "Masked,Enabled" line.word 0x06 "REG_ERRORINTRSTSENA,Error Interrupt Status Enable Register" rbitfld.word 0x06 12. " ERRORINTRSTS_ENABLEREGBIT12 ,Target response error status" "Masked,Enabled" bitfld.word 0x06 9. " ERRORINTRSTS_ENABLEREGBIT9 ,ADMA error status" "Masked,Enabled" textline " " bitfld.word 0x06 8. " ERRORINTRSTS_ENABLEREGBIT8 ,Auto CMD12 error status" "Masked,Enabled" bitfld.word 0x06 7. " ERRORINTRSTS_ENABLEREGBIT7 ,Current limit error status" "Masked,Enabled" textline " " bitfld.word 0x06 6. " ERRORINTRSTS_ENABLEREGBIT6 ,Data bit end error status" "Masked,Enabled" bitfld.word 0x06 5. " ERRORINTRSTS_ENABLEREGBIT5 ,Data CRC error status" "Masked,Enabled" textline " " bitfld.word 0x06 4. " ERRORINTRSTS_ENABLEREGBIT4 ,Data timeout error status" "Masked,Enabled" bitfld.word 0x06 3. " ERRORINTRSTS_ENABLEREGBIT3 ,Command index error status" "Masked,Enabled" textline " " bitfld.word 0x06 2. " ERRORINTRSTS_ENABLEREGBIT2 ,Command end bit error status" "Masked,Enabled" bitfld.word 0x06 1. " ERRORINTRSTS_ENABLEREGBIT1 ,Command CRC error status" "Masked,Enabled" textline " " bitfld.word 0x06 0. " ERRORINTRSTS_ENABLEREGBIT0 ,Command timeout error status" "Masked,Enabled" line.word 0x08 "REG_NORMALINTRSIGENA,Normal Interrupt Signal Enable Register" rbitfld.word 0x08 15. " NORMALINTRSIG_ENABLEREGBIT15 ,Normal interrupt status enable" "Disabled,Enabled" bitfld.word 0x08 8. " NORMALINTRSIG_ENABLEREGBIT8 ,Card interrupt signal" "Masked,Enabled" textline " " bitfld.word 0x08 7. " NORMALINTRSIG_ENABLEREGBIT7 ,Card removal signal" "Masked,Enabled" bitfld.word 0x08 6. " NORMALINTRSIG_ENABLEREGBIT6 ,Card insertion signal" "Masked,Enabled" textline " " bitfld.word 0x08 5. " NORMALINTRSIG_ENABLEREGBIT5 ,Buffer read ready signal" "Masked,Enabled" bitfld.word 0x08 4. " NORMALINTRSIG_ENABLEREGBIT4 ,Buffer write ready signal" "Masked,Enabled" textline " " bitfld.word 0x08 3. " NORMALINTRSIG_ENABLEREGBIT3 ,DMA interrupt signal" "Masked,Enabled" bitfld.word 0x08 2. " NORMALINTRSIG_ENABLEREGBIT2 ,Block gap event signal" "Masked,Enabled" textline " " bitfld.word 0x08 1. " NORMALINTRSIG_ENABLEREGBIT1 ,Transfer complete signal" "Masked,Enabled" bitfld.word 0x08 0. " NORMALINTRSIG_ENABLEREGBIT0 ,Command complete signal" "Masked,Enabled" line.word 0x0A "REG_ERRORINTRSIGENA,Error Interrupt Signal Enable Register" bitfld.word 0x0A 12. " ERRORINTRSIG_ENABLEREGBIT12 ,Target response error signal" "Masked,Enabled" bitfld.word 0x0A 9. " ERRORINTRSIG_ENABLEREGBIT9 ,ADMA error signal" "Masked,Enabled" textline " " bitfld.word 0x0A 8. " ERRORINTRSIG_ENABLEREGBIT8 ,Auto CMD12 error signal" "Masked,Enabled" bitfld.word 0x0A 7. " ERRORINTRSIG_ENABLEREGBIT7 ,Current limit error signal" "Masked,Enabled" textline " " bitfld.word 0x0A 6. " ERRORINTRSIG_ENABLEREGBIT6 ,Data end bit error signal" "Masked,Enabled" bitfld.word 0x0A 5. " ERRORINTRSIG_ENABLEREGBIT5 ,Data CRC error signal" "Masked,Enabled" textline " " bitfld.word 0x0A 4. " ERRORINTRSIG_ENABLEREGBIT4 ,Data timeout error signal" "Masked,Enabled" bitfld.word 0x0A 3. " ERRORINTRSIG_ENABLEREGBIT3 ,Command index error signal" "Masked,Enabled" textline " " bitfld.word 0x0A 2. " ERRORINTRSIG_ENABLEREGBIT2 ,Command end bit error signal" "Masked,Enabled" bitfld.word 0x0A 1. " ERRORINTRSIG_ENABLEREGBIT1 ,Command CRC error signal" "Masked,Enabled" textline " " bitfld.word 0x0A 0. " ERRORINTRSIG_ENABLEREGBIT0 ,Command timeout error signal" "Masked,Enabled" line.word 0x0C "REG_AUTOCMDERRSTS,Auto CMD Error Status Register" bitfld.word 0x0C 7. " AUTOCMDERRSTS_NEXTERROR ,Command not issued by auto CMD12 error" "No Error,Not Issued" bitfld.word 0x0C 4. " AUTOCMDERRSTS_INDEXERROR ,Auto CMD index error" "Not occurred,Occurred" textline " " bitfld.word 0x0C 3. " AUTOCMDERRSTS_ENDBITERROR ,Auto CMD end bit error" "Not occurred,Occurred" bitfld.word 0x0C 2. " AUTOCMDERRSTS_CRCERROR ,Auto CMD CRC error" "Not occurred,Occurred" textline " " bitfld.word 0x0C 1. " AUTOCMDERRSTS_TIMEOUTERROR ,Auto CMD timeout error" "Not occurred,Occurred" bitfld.word 0x0C 0. " AUTOCMDERRSTS_NOTEXECERROR ,Auto CMD12" "Executed,not executed" line.word 0x0E "REG_HOSTCONTROL2,Host Control 2 Register" bitfld.word 0x0E 15. " HOSTCTRL2_PRESETVALUEENABLE ,Preset value enable" "Disabled,Enabled" bitfld.word 0x0E 14. " HOSTCTRL2_ASYNCHINTRENABLE ,Asynchronous interrupt enable" "Disabled,Enabled" rgroup.long 0x40++0x0B line.long 0x00 "REG_CAPABILITIES,Capabilities Register" bitfld.long 0x00 30.--31. " CORECFG_SLOTTYPE ,This field indicates usage of a slot by a specific host system" "Removable,Embedded,?..." bitfld.long 0x00 29. " CORECFG_ASYNCHINTRSUPPORT ,Asynchronous interrupt support" "Not supported,Supported" textline " " bitfld.long 0x00 28. " CORECFG_64BITSUPPORT ,64-bit system address supports" "Not supported,Supported" bitfld.long 0x00 26. " CORECFG_1P8VOLTSUPPORT ,1.8V support" "Not supported,Supported" textline " " bitfld.long 0x00 25. " CORECFG_3P0VOLTSUPPORT ,3.0V support" "Not supported,Supported" bitfld.long 0x00 24. " CORECFG_3P3VOLTSUPPORT ,3.3V support" "Not supported,Supported" textline " " bitfld.long 0x00 23. " CORECFG_SUSPRESSUPPORT ,Suspend/Resume functionality support" "Not supported,Supported" bitfld.long 0x00 22. " CORECFG_SDMASUPPORT ,DMA transfer data between system memory and the HC support" "Not supported,Supported" textline " " bitfld.long 0x00 21. " CORECFG_HIGHSPEEDSUPPORT ,High speed support" "Not supported,Supported" bitfld.long 0x00 19. " CORECFG_ADMA2SUPPORT ,ADMA2 supported" "Not supported,Supported" textline " " bitfld.long 0x00 18. " CORECFG_8BITSUPPORT ,Extended media bus support" "Not supported,Supported" bitfld.long 0x00 16.--17. " CORECFG_MAXBLKLENGTH ,Maximum block size data read and write to the buffer" "512 byte,1024 byte,2048 byte,4096 byte" textline " " hexmask.long.byte 0x00 8.--15. 1. " CORECFG_BASECLKFREQ ,Base clock frequency for SDIO_CLK" bitfld.long 0x00 7. " CORECFG_TIMEOUTCLKUNIT ,Unit of base clock frequency used to detect Data Timeout Error" "kHz,MHz" textline " " bitfld.long 0x00 0.--5. " CORECFG_TIMEOUTCLKFREQ ,Base clock frequency used to detect Data Timeout Error" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "REG_CAPABILITIES_CONT,Capabilities Register (Continue)" bitfld.long 0x04 25. " CORECFG_SPIBLKMODE ,SPI Block mode support" "Not supported,Supported" bitfld.long 0x04 24. " CORECFG_SPISUPPORT ,SPI mode support" "Not supported,Supported" textline " " hexmask.long.byte 0x04 16.--23. 1. " CORECFG_CLOCKMULTIPLIER ,Clock multiplier value of programmable clock generator" line.long 0x08 "REG_MAXCURRENTCAP,Maximum Current Capabilities Register" hexmask.long.byte 0x08 16.--23. 1. " CORECFG_MAXCURRENT1P8V ,Maximum current for 1.8V" hexmask.long.byte 0x08 8.--15. 1. " CORECFG_MAXCURRENT3P0V ,Maximum current for 3.0V" textline " " hexmask.long.byte 0x08 0.--7. 1. " CORECFG_MAXCURRENT3P3V ,Maximum current for 3.3V" wgroup.word 0x50++0x03 line.word 0x00 "REG_FORCEEVENTFORAUTOCMDERRORSTATUS,Force Event For Auto CMD Error Status Register" bitfld.word 0x00 7. " FORCECMDNOTISSUEDBYAUTOCMD12ERR ,Force event for command not issued by AUTO CMD12 error" "No interrupt,Interrupt" bitfld.word 0x00 4. " FORCEAUTOCMDINDEXERR ,Force event for AUTO CMD index error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " FORCEAUTOCMDENDBITERR ,Force event for AUTO CMD end bit error" "No interrupt,Interrupt" bitfld.word 0x00 2. " FORCEAUTOCMDCRCERR ,Force event for AUTO CMD CRC error" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " FORCEAUTOCMDTIMEOUTERR ,Force event for AUTO CMD timeout error" "No interrupt,Interrupt" bitfld.word 0x00 0. " FORCEAUTOCMDNOTEXEC ,Force event for AUTO CMD12 not executed" "No interrupt,Interrupt" line.word 0x02 "REG_FORCEEVENTFORERRINTSTS,Force Event for Error Interrupt Status Register" bitfld.word 0x02 9. " FORCEADMAERR ,Force event for ADMA error" "No interrupt,Interrupt" bitfld.word 0x02 8. " FORCEAUTOCMDERR ,Force event for Auto CMD error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 7. " FORCECURRLIMERR ,Force event for current limit error" "No interrupt,Interrupt" bitfld.word 0x02 6. " FORCEDATENDBITERR ,Force event for data end bit error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 5. " FORCEDATCRCERR ,Force event for data CRC error" "No interrupt,Interrupt" bitfld.word 0x02 4. " FORCEDATTIMEOUTERR ,Force event for data timeout error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 3. " FORCECMDINDEXERR ,Force event for command index error" "No interrupt,Interrupt" bitfld.word 0x02 2. " FORCECMDENDBITERR ,Force event for command end bit error" "No interrupt,Interrupt" textline " " bitfld.word 0x02 1. " FORCECMDCRCERR ,Force event for command CRC error" "No interrupt,Interrupt" bitfld.word 0x02 0. " FORCECMDTIMEOUTERR ,Force event for command timeout error" "No interrupt,Interrupt" rgroup.byte 0x54++0x00 line.byte 0x00 "REG_ADMAERRSTS,ADMA Error Status Register" bitfld.byte 0x00 2. " ADMAERRSTS_ADMALENMISMATCHERR ,DMA length mismatch error" "Not occurred,Occurred" bitfld.byte 0x00 0.--1. " ADMAERRSTS_ADMAERRORSTATE ,ADMA error state" "ST_STOP,ST_FDS,,ST_TFR" hgroup.word 0x58++0x01 hide.word 0x00 "REG_ADMASYSADDR0,ADMA System Address Register Low" hgroup.word 0x5A++0x01 hide.word 0x00 "REG_ADMASYSADDR1,ADMA System Address Register High" rgroup.word 0x60++0x0B line.word 0x00 "REG_PRESETVALUE0,Preset Value Register For Initialization" bitfld.word 0x00 10. " CLOCKGENERATORSELECTVALUE ,Clock generator select value" "Compatible,Programmable" hexmask.word 0x00 0.--9. 1. " SDCLKFREQUENCYSELECTVALUE ,SDCLK frequency select value" line.word 0x02 "REG_PRESETVALUE1,Preset Value Register For Default Speed" bitfld.word 0x02 10. " CLOCKGENERATORSELECTVALUE ,Clock generator select value" "Compatible,Programmable" hexmask.word 0x02 0.--9. 1. " SDCLKFREQUENCYSELECTVALUE ,SDCLK frequency select value" line.word 0x04 "REG_PRESETVALUE2,Preset Value Register For High Speed" bitfld.word 0x04 10. " CLOCKGENERATORSELECTVALUE ,Clock generator select value" "Compatible,Programmable" hexmask.word 0x04 0.--9. 1. " SDCLKFREQUENCYSELECTVALUE ,SDCLK frequency select value" rgroup.word 0xFC++0x03 line.word 0x00 "REG_SLOTINTRSTS,Slot Interrupt Status Register" bitfld.word 0x00 0. " SDHCHOSTIF_SLOTINTRSTS ,Logical OR of interrupt signal and wakeup signal for slot status bit" "0,1" line.word 0x02 "REG_HOSTCONTROLLERVER,Host Controller Version Register" hexmask.word.byte 0x02 8.--15. 1. " SDHC_VENVERNUM ,The vendor version number" hexmask.word.byte 0x02 0.--7. 1. " SPECIFICATIONVERSIONNUMBER ,The HC version number" width 0x0B tree.end tree.end tree.open "USB 2.0" tree "OHCI" base ad:0x40020000 width 20. rgroup.long 0x00++0x03 line.long 0x00 "HCREVISION,HcRevision Register" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Version of the OHCI" group.long 0x04++0x07 line.long 0x00 "HCCONTROL,HcControl Register" bitfld.long 0x00 10. " RWE ,Remote wakeup enable" "Disabled,Enabled" bitfld.long 0x00 9. " RWC ,Remote wakeup supported" "Not supported,Supported" sif !cpuis("R7S91*") bitfld.long 0x00 8. " IR ,Interrupt routing" "INTA,?..." bitfld.long 0x00 6.--7. " HCFS ,Host controller functional state" "Reset,Resume,Operational,Suspend" else bitfld.long 0x00 6.--7. " HCFS ,Host controller functional state" "Reset,Resume,Operational,Suspend" endif newline bitfld.long 0x00 5. " BLE ,Bulk list processing enable" "Disabled,Enabled" bitfld.long 0x00 4. " CLE ,Control list processing enable" "Disabled,Enabled" bitfld.long 0x00 3. " IE ,Isochronous EDs processing enable" "Disabled,Enabled" bitfld.long 0x00 2. " PLE ,Periodic list processing enable" "Disabled,Enabled" newline bitfld.long 0x00 0.--1. " CBSR ,Sets service ratio between control and bulk EDs" "1:1,2:1,3:1,4:1" line.long 0x04 "HCCOMMANDSTATUS,HcCommandStatus Register" rbitfld.long 0x04 16.--17. " SOC ,Scheduling overrun count" "0,1,2,3" bitfld.long 0x04 3. " OCR ,Ownership change request" "Not requested,Requested" bitfld.long 0x04 2. " BLF ,Bulk list field" "TD,No TD" bitfld.long 0x04 1. " CLF ,Control list field" "TD,No TD" newline bitfld.long 0x04 0. " HCR ,Host controller reset request" "Not requested,Requested" group.long 0x0C++0x03 line.long 0x00 "HCINTERRUPTSTATUS,HcInterruptStatus Register" eventfld.long 0x00 6. " RHSC ,Root hub status change" "Not occurred,Occurred" eventfld.long 0x00 5. " FNO ,Frame number overflow" "Not occurred,Occurred" newline eventfld.long 0x00 4. " UE ,Unrecoverable error" "Not occurred,Occurred" eventfld.long 0x00 3. " RD ,Resume detected" "Not occurred,Occurred" eventfld.long 0x00 2. " SF ,Start of frame" "Not occurred,Occurred" newline eventfld.long 0x00 1. " WDH ,Write back done head" "Not occurred,Occurred" eventfld.long 0x00 0. " SO ,Scheduling overrun" "Not occurred,Occurred" if (((per.l(ad:0x40020000+0x10))&0x80000000)==0x80000000) group.long 0x10++0x03 line.long 0x00 "HCINTERRUPTENABLE,HcInterruptEnable Register" bitfld.long 0x00 31. " MIE ,Master interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " RHSCE ,Root hub status change interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " FNOE ,Frame number overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 4. " UEE ,Unrecoverable error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " RDE ,Resume detected interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SFE ,Start of frame interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 1. " WDHE ,Write back done head interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " SOE ,Scheduling overrun interrupt enable" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "HCINTERRUPTENABLE,HcInterruptEnable Register" bitfld.long 0x00 31. " MIE ,Master interrupt enable" "Disabled,Enabled" endif if (((per.l(ad:0x40020000+0x14))&0x80000000)==0x80000000) group.long 0x14++0x03 line.long 0x00 "HCINTERRUPTDISABLE,HcInterruptDisable Register" bitfld.long 0x00 31. " MID ,Master interrupt disable" "No,Yes" bitfld.long 0x00 6. " RHSCD ,Root hub status change disable" "No,Yes" bitfld.long 0x00 5. " FNOD ,Frame number overflow disable" "No,Yes" newline bitfld.long 0x00 4. " UED ,Unrecoverable error disable" "No,Yes" bitfld.long 0x00 3. " RDD ,Resume detected disable" "No,Yes" bitfld.long 0x00 2. " SFD , Start of frame disable" "No,Yes" newline bitfld.long 0x00 1. " WDHD ,Writeback done head disable" "No,Yes" bitfld.long 0x00 0. " SOD , Scheduling overrun disable" "No,Yes" else group.long 0x14++0x03 line.long 0x00 "HCINTERRUPTDISABLE,HcInterruptDisable Register" bitfld.long 0x00 31. " MID ,Master interrupt disable" "No,Yes" endif sif !cpuis("R7S91*") group.long 0x18++0x03 line.long 0x00 "HCHCCA,HcHCCA Register" hexmask.long.tbyte 0x00 8.--31. 0x01 " HCHCCA ,Base address of host controller communication area" else rgroup.long 0x18++0x03 line.long 0x00 "HCHCCA,HcHCCA Register" hexmask.long.tbyte 0x00 8.--31. 0x01 " HCHCCA ,Base address of host controller communication area" endif rgroup.long 0x1C++0x03 line.long 0x00 "HCPERIODCURRENTED,HcPeriodicCurrentED Register" hexmask.long 0x00 4.--31. 0x10 " PERIODICCURRENTED ,Period current ED" group.long 0x20++0x0F line.long 0x00 "HCCONTROLHEADED,HcControlHeadED Register" hexmask.long 0x00 4.--31. 0x10 " CONTROLHEADED ,Physical address of the first ED in the control list" line.long 0x04 "HCCONTROLCURRENTED,HcControlCurrentED Register" hexmask.long 0x04 4.--31. 0x10 " CONTROLCURRENTED ,Physical address of the current ED in the control list" line.long 0x08 "HCBULKHEADED,HcBulkHeadED Register" hexmask.long 0x08 4.--31. 0x10 " BULKHEADED ,Physical address of the first ED in the bulk list" line.long 0x0C "HCBULKCURRENTED,HcBulkCurrentED Register" hexmask.long 0x0C 4.--31. 0x10 " BULKCURRENTED ,Physical address of the current ED in the bulk list" rgroup.long 0x30++0x03 line.long 0x00 "HCDONEHEAD,HcDoneHead Register" hexmask.long 0x00 4.--31. 0x10 " DONEHEAD ,Physical address of HcDoneHead in the host controller" group.long 0x34++0x03 line.long 0x00 "HCFMINTERVAL,Hc Frame Interval Register" bitfld.long 0x00 31. " FIT ,Frame interval toggle" "0,1" hexmask.long.word 0x00 16.--30. 1. " FSMPS ,FS largest data packet" hexmask.long.word 0x00 0.--13. 1. " FI ,Frame interval" rgroup.long 0x38++0x07 line.long 0x00 "HCFMREMAINING,Hc Frame Remaining Register" bitfld.long 0x00 31. " FRT ,Frame remaining toggle" "0,1" hexmask.long.word 0x00 0.--13. 1. " FR ,Frame remaining" line.long 0x04 "HCFMNUMBER,Hc Frame Number Register" hexmask.long.word 0x04 0.--15. 1. " FRAMENUMBER ,Frame number" group.long 0x40++0x0B line.long 0x00 "HCPERIODICSTART,HcPeriodicStart Register" hexmask.long.word 0x00 0.--13. 1. " PERIODICSTART ,Periodic start" line.long 0x04 "HCLSTHRESHOLD,HcLSThreshold Register" hexmask.long.word 0x04 0.--11. 1. " HCLSTHRESHOLD ,LS threshold" line.long 0x08 "HCRHDESCRIPTORA,HcRhDescriptorA Register" hexmask.long.byte 0x08 24.--31. 1. " POTPGT ,Power On To Power Good Time" bitfld.long 0x08 12. " NOCP ,No over current protection" "Supported,Not supported" bitfld.long 0x08 11. " OCPM ,Over-current protection mode" "Global,Per-port" rbitfld.long 0x08 10. " DT ,Device type" "0,?..." newline bitfld.long 0x08 9. " NPS ,No Power Switching" "Disabled,Enabled" bitfld.long 0x08 8. " PSM ,Power switching mode" "Global,Per-port" hexmask.long.byte 0x08 0.--7. 1. " NDP ,Number downstream port" if ((per.l(ad:0x40020000+0x48)&0x100)==0x00) group.long 0x4C++0x03 line.long 0x0 "HCRHDESCRIPTORB,HcRhDescriptorB Register" sif !cpuis("R7S91*") bitfld.long 0x00 2. " DR2 ,Device removable 2" "Not removable,Removable" newline endif bitfld.long 0x00 1. " DR1 ,Device removable 1" "Not removable,Removable" else group.long 0x4C++0x03 line.long 0x0 "HCRHDESCRIPTORB,HcRhDescriptorB Register" sif !cpuis("R7S91*") bitfld.long 0x00 18. " PPCM2 ,Port 1 Power control mask" "Not masked,Masked" newline endif bitfld.long 0x00 17. " PPCM1 ,Port 1 power control mask" "Not masked,Masked" newline sif !cpuis("R7S91*") bitfld.long 0x00 2. " DR2 ,Device removable 2" "Not removable,Removable" newline endif bitfld.long 0x00 1. " DR1 ,Device removable 1" "Not removable,Removable" endif group.long 0x50++0x07 line.long 0x00 "HCRHSTATUS,HcRhStatus Register" bitfld.long 0x00 31. " CRWE ,Clear remote wakeup enable" "No effect,Clear" eventfld.long 0x00 17. " OCIC ,Overcurrent indicator change" "Not changed,Changed" bitfld.long 0x00 16. " R_LPSC__W_SGP ,Local power status change/set global power" "0,1" bitfld.long 0x00 15. " R_DRWE__W_SRWE ,Device remote wakeup enable" "Disabled,Enabled" newline bitfld.long 0x00 1. " OCI ,Over current indicator" "Normal,Overcurrent" bitfld.long 0x00 0. " R_LPS__W_CGP ,Local power status / clear global power" "0,1" line.long 0x04 "HCRHPORTSTATUS1,HcRhPortStatus1 Register" eventfld.long 0x04 20. " PRSC ,Port reset status change" "Not completed,Completed" eventfld.long 0x04 19. " OCIC ,Port overcurrent indicator change" "Not changed,Changed" eventfld.long 0x04 18. " PSSC ,Port suspend status change" "Not completed,Completed" eventfld.long 0x04 17. " PESC ,Port enable status change" "Not changed,Changed" newline eventfld.long 0x04 16. " CSC ,Connect status change" "Not changed,Changed" rbitfld.long 0x04 9. " R_LSDA__W_CPP ,Indicates speed of device attached to this port" "FS,LS" setclrfld.long 0x04 8. 0x04 8. 0x04 9. " R_PPS__W_SPP ,Port power status" "Off,On" bitfld.long 0x04 4. " R_PRS__W_SPR ,Indicates the port reset status" "Not active,Active" newline bitfld.long 0x04 3. " R_POCI__W_CSS ,Port over current indicator" "Normal,Overcurrent" bitfld.long 0x04 2. " R_PSS__W_SPS ,Port suspend status" "Not suspended,Suspended" setclrfld.long 0x04 1. 0x04 1. 0x04 0. " R_PES__W_SPE ,Port enable status" "Disabled,Enabled" rbitfld.long 0x04 0. " R_CCS__W_CPE ,Current state of downstream port" "Not connected,Connected" sif !cpuis("R7S91*") group.long 0x58++0x03 line.long 0x00 "HCRHPORTSTATUS2,HcRhPortStatus2 Register" eventfld.long 0x00 20. " PRSC ,Port reset status change" "Not completed,Completed" eventfld.long 0x00 19. " OCIC ,Port overcurrent indicator change" "Not changed,Changed" eventfld.long 0x00 18. " PSSC ,Port suspend status change" "Not completed,Completed" eventfld.long 0x00 17. " PESC ,Port enable status change" "Not changed,Changed" newline eventfld.long 0x00 16. " CSC ,Connect status change" "Not changed,Changed" rbitfld.long 0x00 9. " R_LSDA__W_CPP ,Indicates speed of device attached to this port" "FS,LS" setclrfld.long 0x00 8. 0x00 8. 0x00 9. " R_PPS__W_SPP ,Port power status" "Off,On" bitfld.long 0x00 4. " R_PRS__W_SPR ,Indicates the port reset status" "Not active,Active" newline bitfld.long 0x00 3. " R_POCI__W_CSS ,Port over current indicator" "Normal,Overcurrent" bitfld.long 0x00 2. " R_PSS__W_SPS ,Port suspend status" "Not suspended,Suspended" setclrfld.long 0x00 1. 0x00 1. 0x00 0. " R_PES__W_SPE ,Port enable status" "Disabled,Enabled" rbitfld.long 0x00 0. " R_CCS__W_CPE ,Current state of downstream port" "Not connected,Connected" endif width 0x0B tree.end tree "EHCI" base ad:0x40021000 width 20. rgroup.long 0x00++0x0F line.long 0x00 "CAPL_VERSION,HCIVERSION/CAPLENGTH Register" hexmask.long.word 0x00 16.--31. 1. " INTERFACE_VERSION_NUMBER ,EHCI Specification implemented in this host controller" hexmask.long.byte 0x00 0.--7. 1. " CAPABILITY_REGISTERS_LENGTH ,Start address of the host controller operational register" line.long 0x04 "HCSPARAMS,HCSPARAMS Register" bitfld.long 0x04 20.--23. " DEBUG_PORT_NUMBER ,Debug port number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16. " P_INDICATOR ,Port Indicators control supports" "Not supported,Supported" newline bitfld.long 0x04 12.--15. " N_CC , Number of OHCI host controllers related to the EHCI host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " N_PCC ,Number of ports supported by one OHCI host controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 7. " PORT_ROUTING_RULES ,Port routing Rules" "0,1" bitfld.long 0x04 4. " PPC ,Port Power Control" "Not supported,Supported" newline bitfld.long 0x04 0.--3. " N_PORTS ,Indicates the number of downstream ports" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "HCCPARAMS,HCCPARAMS Register" hexmask.long.byte 0x08 8.--15. 0x01 " EECP ,Offset address of the EHCI extend registers" bitfld.long 0x08 4.--7 " IST ,Isochronous scheduling threshold" "Not supported,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 2. " ASPC , Park mode for high speed QH/Queue Head support" "Not supported,Supported" bitfld.long 0x08 1. " PFLF ,Frame list size enable" ",Enabled" newline sif !cpuis("R7S91*") bitfld.long 0x08 0. " AC64 ,Address memory pointers support" "32-bit,64-bit" else bitfld.long 0x08 0. " AC64 ,Address memory pointers support" "32-bit,?..." endif line.long 0x0C "HCSP_PORTROUTE,HCSP_PORTROUTE Register" if ((((per.l(ad:0x40021000+0x20))&0x00000800)==0x00000800)&&(((per.l(ad:0x40021000+0x24))&0x00001000)==0x00001000)) group.long 0x20++0x03 line.long 0x00 "USBCMD,USBCMD Register" hexmask.long.byte 0x00 16.--23. 1. " INTERRUPT_THRESHOLD_CONTROL ,Maximum rate until the host controller generates an interrupt in micro-frame unit" bitfld.long 0x00 11. " ASYNCHRONOUS_SCHEDULE_PARK_MODE_ENABLE ,Park Mode enable" "Disabled,Enabled" newline bitfld.long 0x00 8.--9. " ASYNCHRONOUS_SCHEDULE_PARK_MODE_COUNT ,Number of transactions that can be executed successively from one QH" "0,?..." bitfld.long 0x00 7. " LIGHT_HOST_CONTROLLER_RESET ,Status light host controller reset" "Not supported,?..." newline bitfld.long 0x00 6. " INTERRUPT_ON_ASYNC_ADVANCE_DOORBELL ,This bit is used by software as a doorbell" "0,1" bitfld.long 0x00 5. " ASYNCHRONOUS_SCHEDULE_ENABLE ,Continue asynchronous list processing" "Disabled,Enabled" newline bitfld.long 0x00 4. " PERIODIC_SCHEDULE_ENABLE ,Continue periodic list processing" "Disabled,Enabled" bitfld.long 0x00 2.--3. " FRAME_LIST_SIZE ,Frame list size" "1024 elements,512 elements,256 elements,?..." newline bitfld.long 0x00 1. " HCRESET ,Host Controller Reset" "No reset,Reset" bitfld.long 0x00 0. " RS ,Run/Stop EHCI host controller" "Stop,Ran" elif ((((per.l(ad:0x40021000+0x20))&0x00000800)==0x00000000)&&(((per.l(ad:0x40021000+0x24))&0x00001000)==0x00001000)) group.long 0x20++0x03 line.long 0x00 "USBCMD,USBCMD Register" hexmask.long.byte 0x00 16.--23. 1. " INTERRUPT_THRESHOLD_CONTROL ,Maximum rate until the host controller generates an interrupt in micro-frame unit" bitfld.long 0x00 11. " ASYNCHRONOUS_SCHEDULE_PARK_MODE_ENABLE ,Park mode enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " LIGHT_HOST_CONTROLLER_RESET ,Status light host controller reset" "Not supported,?..." newline bitfld.long 0x00 6. " INTERRUPT_ON_ASYNC_ADVANCE_DOORBELL ,This bit is used by software as a doorbell" "0,1" bitfld.long 0x00 5. " ASYNCHRONOUS_SCHEDULE_ENABLE ,Continue asynchronous list processing" "Disabled,Enabled" newline bitfld.long 0x00 4. " PERIODIC_SCHEDULE_ENABLE ,Continue periodic list processing" "Disabled,Enabled" bitfld.long 0x00 2.--3. " FRAME_LIST_SIZE ,Frame list size" "1024 elements,512 elements,256 elements,?..." newline bitfld.long 0x00 1. " HCRESET ,Host Controller Reset" "No reset,Reset" bitfld.long 0x00 0. " RS ,Run/Stop EHCI host controller" "Stop,Ran" elif ((((per.l(ad:0x40021000+0x20))&0x00000800)==0x00000800)&&(((per.l(ad:0x40021000+0x24))&0x00001000)==0x00000000)) group.long 0x20++0x03 line.long 0x00 "USBCMD,USBCMD Register" hexmask.long.byte 0x00 16.--23. 1. " INTERRUPT_THRESHOLD_CONTROL ,Maximum rate until the host controller generates an interrupt in micro-frame unit" bitfld.long 0x00 11. " ASYNCHRONOUS_SCHEDULE_PARK_MODE_ENABLE ,Park mode enable" "Disabled,Enabled" newline bitfld.long 0x00 8.--9. " ASYNCHRONOUS_SCHEDULE_PARK_MODE_COUNT ,Number of transactions that can be executed successively from one QH" "0,?..." bitfld.long 0x00 7. " LIGHT_HOST_CONTROLLER_RESET ,Status light host controller reset" "Not supported,?..." newline bitfld.long 0x00 6. " INTERRUPT_ON_ASYNC_ADVANCE_DOORBELL ,This bit is used by software as a doorbell" "0,1" bitfld.long 0x00 5. " ASYNCHRONOUS_SCHEDULE_ENABLE ,Continue asynchronous list processing" "Disabled,Enabled" newline bitfld.long 0x00 4. " PERIODIC_SCHEDULE_ENABLE ,Continue periodic list processing" "Disabled,Enabled" bitfld.long 0x00 2.--3. " FRAME_LIST_SIZE ,Frame list size" "1024 elements,512 elements,256 elements,?..." else group.long 0x20++0x03 line.long 0x00 "USBCMD,USBCMD Register" hexmask.long.byte 0x00 16.--23. 1. " INTERRUPT_THRESHOLD_CONTROL ,Maximum rate until the host controller generates an interrupt in micro-frame unit" bitfld.long 0x00 11. " ASYNCHRONOUS_SCHEDULE_PARK_MODE_ENABLE ,Park mode enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " LIGHT_HOST_CONTROLLER_RESET ,Status light host controller reset" "Not supported,?..." newline bitfld.long 0x00 6. " INTERRUPT_ON_ASYNC_ADVANCE_DOORBELL ,This bit is used by software as a doorbell" "0,1" bitfld.long 0x00 5. " ASYNCHRONOUS_SCHEDULE_ENABLE ,Continue asynchronous list processing" "Disabled,Enabled" newline bitfld.long 0x00 4. " PERIODIC_SCHEDULE_ENABLE ,Continue periodic list processing" "Disabled,Enabled" bitfld.long 0x00 2.--3. " FRAME_LIST_SIZE ,Frame list size" "1024 elements,512 elements,256 elements,?..." endif group.long 0x24++0x0B line.long 0x00 "USBSTS,USBSTS Register" rbitfld.long 0x00 15. " ASYNCHRONOUS_SCHEDULE_STATUS ,Asynchronous scheduling status" "Invalid,Valid" rbitfld.long 0x00 14. " PERIODIC_SCHEDULE_STATUS ,Periodic scheduling status" "Invalid,Valid" newline rbitfld.long 0x00 13. " RECLAMATION ,Empty asynchronous schedule detect" "Not detected,Detected" rbitfld.long 0x00 12. " HCHALTED ,EHCI host controller state" "Running,Halt" newline bitfld.long 0x00 5. " INTERRUPT_ON_ASYNC_ADVANCE ,Async Advance interrupt status" "Not occurred,Occurred" eventfld.long 0x00 4. " HOST_SYSTEM_ERROR ,Serious error on the host controller" "Not occurred,Occurred" newline eventfld.long 0x00 3. " FRAME_LIST_ROLLOVER ,The frame list count rolled over" "Not rolled,Rolled" eventfld.long 0x00 2. " PORT_CHANGE_DETECT ,Indicates the change in the port status" "Not changed,Changed" newline eventfld.long 0x00 1. " USBERRINT ,USB error interrupt" "Not occurred,Occurred" eventfld.long 0x00 0. " USBINT ,USB transfer normal completion" "Not completed,Completed" line.long 0x04 "USBINTR,USBINTR Register" bitfld.long 0x04 5. " INTERRUPT_ON_ASYNC_ADVANCE_ENABLE ,Async Advance error enable" "Disabled,Enabled" bitfld.long 0x04 4. " HOST_SYSTEM_ERROR_ENABLE ,Host system error enable" "Disabled,Enabled" newline bitfld.long 0x04 3. " FRAME_LIST_ROLLOVER_ENABLE ,Frame list rollover enable" "Disabled,Enabled" bitfld.long 0x04 2. " PORT_CHANGE_INTERRUPT_ENABLE ,Port change interrupt enable" "Disabled,Enabled" newline bitfld.long 0x04 1. " USB_ERROR_INTERRUPT_ENABLE ,USB error interrupt enable" "Disabled,Enabled" bitfld.long 0x04 0. " USB_INTERRUPT_ENABLE ,USB interrupt enable" "Disabled,Enabled" line.long 0x08 "FRINDEX,Frame Index Register" hexmask.long.word 0x08 0.--13. 1. " FRAMEINDEX ,Used by host controller to index into periodic frame list" hgroup.long 0x30++0x03 hide.long 0x00 "CTRLDSSEGMENT,CTRLDSSEGMENT Register" group.long 0x34++0x07 line.long 0x00 "PERIODICLISTBASE,PERIODICLISTBASE Register" hexmask.long.tbyte 0x00 12.--31. 0x10 " BASEADDRESS ,Specifies base address of periodic Frame list in system memory" line.long 0x04 "ASYNCLISTADDR,ASYNCLISTADDR Register" hexmask.long 0x04 5.--31. 0x20 " LPL ,Specifies address of next asynchronous queue head to be executed" group.long 0x60++0x07 line.long 0x00 "CONFIGFLAG,CONFIGFLAG Register" bitfld.long 0x00 0. " CF ,Default port-routing control logic" "OHCI,EHCI" line.long 0x04 "PORTSC1,PORTSC1 Register" bitfld.long 0x04 22. " WKOC_E ,Wake on over-current enable" "No effect,Enable" bitfld.long 0x04 21. " WKDSCNNT_E ,Wake on disconnect enable" "No effect,Enable" newline bitfld.long 0x04 20. " WKCNNT_E ,Wake on connect enable" "No effect,Enable" bitfld.long 0x04 16.--19. " PORT_TEST_CONTROL ,Port test control" "Normal,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,?..." newline rbitfld.long 0x04 14.--15. " PORT_INDICATOR_CONTROL ,Port indicator control" "0,?..." bitfld.long 0x04 13. " PORT_OWNER ,Port owner" "EHCI,OHCI" newline bitfld.long 0x04 12. " PP ,Port power" "Off,On" bitfld.long 0x04 10.--11. " LINE_STATUS ,Line status" "SE0,K-state,J-state,Undefined" newline bitfld.long 0x04 8. " PORT_RESET ,Reset status of the port" "No reset,Reset" bitfld.long 0x04 7. " SUSPEND ,Port transition to suspend state" "Not suspended,Suspended" newline bitfld.long 0x04 6. " FORCE_PORT_RESUME ,Force port resume" "Not resumed,Resumed" eventfld.long 0x04 5. " OVER_CURRENT_CHANGE ,Over-current change" "Not changed,Changed" newline rbitfld.long 0x04 4. " OVER_CURRENT_ACTIVE ,Port over-current status" "No over-current,Over-current" eventfld.long 0x04 3. " PORT_ENABLE_DISABLE_CHANGE ,Port enable/disable status change" "No effect,Yes" newline bitfld.long 0x04 2. " PORT_ENABLED_DISABLED ,Port enable" "Disabled,Enabled" newline eventfld.long 0x04 1. " CONNECT_STATUS_CHANGE ,Current Connect status change" "Not changed,Changed" rbitfld.long 0x04 0. " CURRENT_CONNECT_STATUS ,Current connect status" "Not connected,Connected" sif !cpuis("R8A77420")&&!cpuis("R8A77430")&&!cpuis("R8A77450")&&!cpuis("R7S91*") group.long 0x68++0x03 line.long 0x00 "PORTSC2,PORTSC2 Register" bitfld.long 0x00 22. " WKOC_E ,Wake on Over-current enable" "No effect,Enable" bitfld.long 0x00 21. " WKDSCNNT_E ,Wake on Disconnect enable" "No effect,Enable" newline bitfld.long 0x00 20. " WKCNNT_E ,Wake on connect enable" "No effect,Enable" bitfld.long 0x00 16.--19. " PORT_TEST_CONTROL ,Port Test control" "Normal,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,?..." newline rbitfld.long 0x00 14.--15. " PORT_INDICATOR_CONTROL ,Port indicator control" "0,?..." bitfld.long 0x00 13. " PORT_OWNER ,Port Owner" "EHCI,OHCI" newline bitfld.long 0x00 12. " PP ,Port Power" "Off,On" bitfld.long 0x00 10.--11. " LINE_STATUS ,Line status" "SE0,K-state,J-state,Undefined" newline bitfld.long 0x00 8. " PORT_RESET ,Reset status of the port" "No reset,Reset" bitfld.long 0x00 7. " SUSPEND ,Port transition to suspend state" "Not suspended,Suspended" newline bitfld.long 0x00 6. " FORCE_PORT_RESUME ,Force port resume" "Not resumed,Resumed" eventfld.long 0x00 5. " OVER_CURRENT_CHANGE ,Over-current change" "Not changed,Changed" newline rbitfld.long 0x00 4. " OVER_CURRENT_ACTIVE ,Port over-current status" "No over-current,Over-current" eventfld.long 0x00 3. " PORT_ENABLE_DISABLE_CHANGE ,Port Enable/Disable status change" "Not changed,Changed" newline bitfld.long 0x00 2. " PORT_ENABLED_DISABLED ,Port enable" "Disabled,Enabled" eventfld.long 0x00 1. " CONNECT_STATUS_CHANGE ,Current Connect status change" "Not changed,Changed" newline rbitfld.long 0x00 0. " CURRENT_CONNECT_STATUS ,Current Connect Status" "Not connected,Connected" endif width 0x0B tree.end tree.open "PCI Configuration/Communication Space" tree "OHCI" base ad:0x40030000 width 19. rgroup.long 0x00++0x03 line.long 0x00 "VID_DID,Device ID - Vendor ID" hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID ,Indicates the device type" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,Indicates the device vendor" group.long 0x04++0x03 line.long 0x00 "CMND_STS,Status-Command" bitfld.long 0x00 31. " DETECTED_PARITY_ERROR ,Parity error status" "Not occurred,Occurred" bitfld.long 0x00 30. " SIGNALED_SYSTEM_ERROR ,SERR status" "Not occurred,Occurred" bitfld.long 0x00 29. " RECEIVED_MASTER_ABORT ,Master-Master Abort status" "Not occurred,Occurred" newline bitfld.long 0x00 28. " RECEIVED_TARGET_ABORT ,Master-Target Abort status" "Not occurred,Occurred" bitfld.long 0x00 27. " SIGNALED_TARGET_ABORT ,Slave Target Abort status" "Not occurred,Occurred" rbitfld.long 0x00 25.--26. " DEVSEL_TIMING ,DEVSEL response speed" ",mid-speed,?..." newline bitfld.long 0x00 24. " DATA_PARITY_ERROR_DETECTED ,Host controller serving as a master detects a parity error" "Not occurred,Occurred" sif cpuis("R7S91*") rbitfld.long 0x00 23. " FBBE_CAP ,Fast back to back support" "Not supported,Supported" newline rbitfld.long 0x00 20. " CAP_LIST ,Power management mode support" "Not supported,Supported" newline rbitfld.long 0x00 9. " FBBE ,Fast back to back enable" "Disabled,Enabled" bitfld.long 0x00 8. " SERR_ENABLE ,Enable system error response" "Disabled,Enabled" bitfld.long 0x00 7. " WCC ,Wait cycle control enable" "Disabled,Enabled" else rbitfld.long 0x00 20. " CAPABILITIES_LIST ,Power management mode is supported" ",1" bitfld.long 0x00 8. " SERR_ENABLE ,Enable system error response" "Disabled,Enabled" endif newline bitfld.long 0x00 6. " PARITY_ERROR_RESPONSE ,Enable parity error response" "Disabled,Enabled" bitfld.long 0x00 4. " MEM_WR_AND_INVALIDATE_EN ,Enable Memory Write and Invalidate" "Disabled,Enabled" bitfld.long 0x00 2. " BUS_MASTER ,Enable the bus master" "Disabled,Enabled" newline bitfld.long 0x00 1. " MEMORY_SPACE ,Enable accessing to the memory spaces" "Disabled,Enabled" rbitfld.long 0x00 0. " I_O_SPACE ,Enable accessing to the I/O spaces" "Disabled,?..." rgroup.long 0x08++0x03 line.long 0x00 "REVID_CC,Class Code-Revision ID" hexmask.long.byte 0x00 24.--31. 1. " BASE_CLASS ,Base class defined in the PCI specification" hexmask.long.byte 0x00 16.--23. 1. " SUB_CLASS ,Subclass defined in the PCI specification" hexmask.long.byte 0x00 8.--15. 1. " PROGRAMMING_I_F ,Program interface defined in the PCI specification" newline hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID ,Host controller revision" group.long 0x0C++0x07 line.long 0x00 "CLS_LT_HT_BIST,BIST-Header Type-Latency Timer-Cache Line Size" hexmask.long.byte 0x00 16.--23. 1. " HEADER_TYPE ,Header type to the system" hexmask.long.byte 0x00 8.--15. 1. " LATENCY_TIMER ,Latency timer to the system" hexmask.long.byte 0x00 0.--7. 1. " CACHE_LINE_SIZE ,Cache line size to the system" line.long 0x04 "BASEAD,OHCI Base Address" hexmask.long 0x04 4.--31. 0x10 " OHCI_BASE_ADDRESS ,Base address of the operational register" rbitfld.long 0x04 1.--2. " TYPE ,Indicates that the base address of the OHCI operational registers is 32-bit width" "0,?..." rbitfld.long 0x04 0. " MEMORY_SPACE_INDICATOR ,Indicates that the OHCI operational registers are mapped on a system memory space" "0,?..." rgroup.long 0x2C++0x03 line.long 0x00 "SSVID_SSID,Subsystem ID-Subsystem Vendor ID" hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID ,Indicates the device type" hexmask.long.word 0x00 0.--15. 1. " SUBSYSTEM_VENDOR_ID ,Indicates the device vendor" sif cpuis("R7S91*") rgroup.long 0x30++0x07 line.long 0x00 "EROM_BASEAD,Expansion ROM Base Address" hexmask.long.tbyte 0x00 10.--31. 0x04 " EPO_ROM_BASE_ADDR ,Expansion ROM base address" bitfld.long 0x00 0. " ROM_DECEN ,Expansion ROM decode enable" "Disabled,Enabled" else hgroup.long 0x30++0x03 hide.long 0x00 "EROM_BASEAD,Expansion ROM Base Address" endif rgroup.long 0x34++0x03 line.long 0x00 "CAPPTR,Capability Pointer" hexmask.long.byte 0x00 0.--7. 0x01 " CAPABILITY_POINTER ,Pointer to the capability identifier" group.long 0x3C++0x3 line.long 0x00 "INTR_LINE_PIN,Max_Lat-Min_Gnt-Interrupt Pin-Interrupt Line" hexmask.long.byte 0x00 24.--31. 1. " MAX_LATENCY ,Maximum acquisition frequency of the PCI bus" hexmask.long.byte 0x00 16.--23. 1. " MIN_GNT ,Minimum burst transfer time" hexmask.long.byte 0x00 8.--15. 1. " INTERRUPT_PIN ,Interrupt output pin" newline hexmask.long.byte 0x00 0.--7. 1. " INTERRUPT_LINE ,Interrupt line" rgroup.long 0x40++0x03 line.long 0x00 "CAPID_NIP_PMCAP,Capability Identifier-Next Item Pointer-Power Management Capabilities" bitfld.long 0x00 31. " PME_SUPPORT_1 ,D3 Cold state is supported" "Not supported,?..." bitfld.long 0x00 27.--30. " PME_SUPPORT_0 ,PME interrupt generation supported in all PCI power states" ",,,,,,,,,,,,,,,Supported" bitfld.long 0x00 26. " D2_SUPPORT ,PCI power state D2 is supported" ",Supported" newline bitfld.long 0x00 25. " D1_SUPPORT ,PCI power state D1 is supported" ",Supported" bitfld.long 0x00 22.--24. " AUX_CURRENT ,Specified current value required for the 3.3 V auxiliary power supply" "0,?..." bitfld.long 0x00 21. " DSI ,Power management-special initialization required" "Not required,?..." newline bitfld.long 0x00 19. " PME_CLK ,PME interrupts generating-USB_PCICLK required" "Not required,?..." bitfld.long 0x00 16.--18. " VERSION ,System is compliant with PCI power management interface specification release 1.1" ",,2,?..." hexmask.long.byte 0x00 8.--15. 1. " NEXT_ITEM_POINTER ,No subsequent item" newline hexmask.long.byte 0x00 0.--7. 1. " CAPABILITY_IDENTIFIER ,PCI power management register ID" sif cpuis("R7S91*") group.long 0x44++0x03 line.long 0x00 "PMC_STS_PMCSR,Power Management Control/Status and PMCSR Bridge Support Extensions" hexmask.long.byte 0x00 24.--31. 1. " DATA ,Data field" rbitfld.long 0x00 23. " BPCC ,BPCC enable" "Disabled,Enabled" rbitfld.long 0x00 22. " B2_B3 ,Bit for bridge support" "Not supported,Supported" newline bitfld.long 0x00 15. " PME_STAT ,PME interrupt status" "Not interrupted,Interrupted" rbitfld.long 0x00 13.--14. " DATA_SCALE ,Data scale field" "0,1,2,3" rbitfld.long 0x00 9.--12. " DATA_SEL ,Data selection field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8. " PME_EN ,PME enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PWR_STAT ,PCI power status" "D0,D1,D2,D3 hot" else group.long 0x44++0x03 line.long 0x00 "PMC_STS_PMCSR,Power Management Control and Status-PMCSR Bridge Support Extensions" bitfld.long 0x00 15. " PME_STATUS ,PME interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " PME_ENABLE ,Enable of PME" "Disabled,Enabled" bitfld.long 0x00 0.--1. " POWER_STATE ,PCI power status" "D0,D1,D2,D3 hot" endif group.long 0xE0++0x03 line.long 0x00 "EXT1,EXT1 Register" hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,Setting for PPOTPGT of the OHCI HcRhDescriptorA register" bitfld.long 0x00 19.--23. " HYPER_SPEED_TRANSFER_CONTROL_2 ,Hyper speed transfer control 2" ",,2,?..." bitfld.long 0x00 13. " HYPER_SPEED_TRANSFER_CONTROL_1 ,HS ASYNC OUT advance Mode" "Disabled,Enabled" newline sif cpuis("R7S91*") bitfld.long 0x00 12. " PSD ,Periodic schedule disable" "No,Yes" newline endif bitfld.long 0x00 7. " ID_WRITE_ENABLE ,Write protection for parameters Subsystem ID/Subsystem Vendor ID/Max Latency/Min Gnt" "Protected,Not protected" newline sif !cpuis("R7S91*") bitfld.long 0x00 2. " PPCNT ,Setting for bit PPC of the EHCI HCSPARAMS register/Controls the port power" "Always on,Control switch" newline endif bitfld.long 0x00 0.--1. " PORT_NO ,Number of valid USB downstream port" "1,1 and 2,?..." newline sif !cpuis("R7S91*") if (((per.l(ad:0x40030000+0xE4))&0x20000)==0x20000) group.long 0xE4++0x03 line.long 0x00 "EXT2,EXT2 Register" bitfld.long 0x00 24. " PLL_UNLOCK_ACCESS_MODE ,Set the response mode for register access during USBPLL unlock" "Wait,Return dummy value" rbitfld.long 0x00 18. " RAM_CONNECT_CHECK_RESULT ,Result of RAM connection check" "NG,OK" rbitfld.long 0x00 17. " RAM_CONNECT_CHECK_END_FLAG ,End of RAM connection check" "Not finished,Finished" newline bitfld.long 0x00 16. " RUN_RAM_CONNECT_CHECK ,RAM connection check" "Disabled,Enabled" bitfld.long 0x00 1. " HYPER_SPEED_TRANSFER_CONTROL_3 ,Hyper-speed transfer mode feature used for asynchronous IN/OUT transfer" "Disabled,Enabled" bitfld.long 0x00 0. " EHCI_MASK ,Mask of EHCI host controller" "No,Yes" else group.long 0xE4++0x03 line.long 0x00 "EXT2,EXT2 Register" bitfld.long 0x00 24. " PLL_UNLOCK_ACCESS_MODE ,Set the response mode for register access during USBPLL unlock" "Wait,Return dummy value" newline rbitfld.long 0x00 17. " RAM_CONNECT_CHECK_END_FLAG ,End of RAM connection check" "Not finished,Finished" newline bitfld.long 0x00 16. " RUN_RAM_CONNECT_CHECK ,RAM connection check" "Disabled,Enabled" bitfld.long 0x00 1. " HYPER_SPEED_TRANSFER_CONTROL_3 ,Hyper-speed transfer mode feature used for asynchronous IN/OUT transfer" "Disabled,Enabled" bitfld.long 0x00 0. " EHCI_MASK ,Mask of EHCI host controller" "No,Yes" endif else group.long 0xE4++0x03 line.long 0x00 "EXT2,EXT2 Register" rbitfld.long 0x00 17. " RAM_CONNECT_CHECK_END_FLAG ,End of RAM connection check" "Not finished,Finished" bitfld.long 0x00 16. " RUN_RAM_CONNECT_CHECK ,RAM connection check" "Disabled,Enabled" newline bitfld.long 0x00 1. " HYPER_SPEED_TRANSFER_CONTROL_3 ,Hyper-speed transfer mode feature used for asynchronous IN/OUT transfer" "Disabled,Enabled" bitfld.long 0x00 0. " EHCI_MASK ,Mask of EHCI host controller" "No,Yes" endif sif !cpuis("R7S91*") group.long 0xF4++0x03 line.long 0x00 "UTMICTRL,USBPHY Operation Mode Control Register" bitfld.long 0x00 16.--17. " REPSEL ,Interval of periodic terminal resistance adjustment" "0,?..." endif width 0xB tree.end tree "EHCI" base ad:0x40030100 width 19. rgroup.long 0x00++0x03 line.long 0x00 "VID_DID,Device ID - Vendor ID" hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID ,Indicates the device type" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,Indicates the device vendor" group.long 0x04++0x03 line.long 0x00 "CMND_STS,Status-Command" bitfld.long 0x00 31. " DETECTED_PARITY_ERROR ,Parity error status" "Not occurred,Occurred" bitfld.long 0x00 30. " SIGNALED_SYSTEM_ERROR ,SERR status" "Not occurred,Occurred" bitfld.long 0x00 29. " RECEIVED_MASTER_ABORT ,Master-Master Abort status" "Not occurred,Occurred" newline bitfld.long 0x00 28. " RECEIVED_TARGET_ABORT ,Master-Target Abort status" "Not occurred,Occurred" bitfld.long 0x00 27. " SIGNALED_TARGET_ABORT ,Slave Target Abort status" "Not occurred,Occurred" rbitfld.long 0x00 25.--26. " DEVSEL_TIMING ,DEVSEL response speed" ",mid-speed,?..." newline bitfld.long 0x00 24. " DATA_PARITY_ERROR_DETECTED ,Host controller serving as a master detects a parity error" "Not occurred,Occurred" sif cpuis("R7S91*") rbitfld.long 0x00 23. " FBBE_CAP ,Fast back to back support" "Not supported,Supported" newline rbitfld.long 0x00 21. " MHZ66_CAPABLE ,Indicates 66 MHz operation capability" "33 MHz only,?..." newline rbitfld.long 0x00 20. " CAP_LIST ,Power management mode support" "Not supported,Supported" newline rbitfld.long 0x00 9. " FBBE ,Fast back to back enable" "Disabled,Enabled" bitfld.long 0x00 8. " SERR_ENABLE ,Enable system error response" "Disabled,Enabled" bitfld.long 0x00 7. " WCC ,Wait cycle control enable" "Disabled,Enabled" else rbitfld.long 0x00 21. " MHZ66_CAPABLE ,Indicates 66 MHz operation capability" "33 MHz only,?..." rbitfld.long 0x00 20. " CAPABILITIES_LIST ,Power management mode is supported" ",1" newline bitfld.long 0x00 8. " SERR_ENABLE ,Enable system error response" "Disabled,Enabled" endif newline bitfld.long 0x00 6. " PARITY_ERROR_RESPONSE ,Enable parity error response" "Disabled,Enabled" bitfld.long 0x00 4. " MEM_WR_AND_INVALIDATE_EN ,Enable Memory Write and Invalidate" "Disabled,Enabled" bitfld.long 0x00 2. " BUS_MASTER ,Enable the bus master" "Disabled,Enabled" newline bitfld.long 0x00 1. " MEMORY_SPACE ,Enable accessing to the memory spaces" "Disabled,Enabled" rbitfld.long 0x00 0. " I_O_SPACE ,Enable accessing to the I/O spaces" "Disabled,?..." rgroup.long 0x08++0x03 line.long 0x00 "REVID_CC,Class Code-Revision ID" hexmask.long.byte 0x00 24.--31. 1. " BASE_CLASS ,Base class defined in the PCI specification" hexmask.long.byte 0x00 16.--23. 1. " SUB_CLASS ,Subclass defined in the PCI specification" hexmask.long.byte 0x00 8.--15. 1. " PROGRAMMING_I_F ,Program interface defined in the PCI specification" newline hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID ,Host controller revision" group.long 0x0C++0x07 line.long 0x00 "CLS_LT_HT_BIST,BIST-Header Type-Latency Timer-Cache Line Size" hexmask.long.byte 0x00 16.--23. 1. " HEADER_TYPE ,Header type to the system" hexmask.long.byte 0x00 8.--15. 1. " LATENCY_TIMER ,Latency timer to the system" hexmask.long.byte 0x00 0.--7. 1. " CACHE_LINE_SIZE ,Cache line size to the system" line.long 0x04 "BASEAD,EHCI Base Address" hexmask.long 0x04 4.--31. 0x10 " EHCI_BASE_ADDRESS ,Base address of the operational register" rbitfld.long 0x04 1.--2. " TYPE ,Indicates that the base address of the EHCI operational registers is 32-bit width" "0,?..." rbitfld.long 0x04 0. " MEMORY_SPACE_INDICATOR ,Indicates that the EHCI operational registers are mapped on a system memory space" "0,?..." rgroup.long 0x2C++0x03 line.long 0x00 "SSVID_SSID,Subsystem ID-Subsystem Vendor ID" hexmask.long.word 0x00 16.--31. 1. " SUBSYSTEM_ID ,Indicates the device type" hexmask.long.word 0x00 0.--15. 1. " SUBSYSTEM_VENDOR_ID ,Indicates the device vendor" sif cpuis("R7S91*") rgroup.long 0x30++0x07 line.long 0x00 "EROM_BASEAD,Expansion ROM Base Address" hexmask.long.tbyte 0x00 10.--31. 0x04 " EPO_ROM_BASE_ADDR ,Expansion ROM base address" bitfld.long 0x00 0. " ROM_DECEN ,Expansion ROM decode enable" "Disabled,Enabled" else hgroup.long 0x30++0x03 hide.long 0x00 "EROM_BASEAD,Expansion ROM Base Address" endif rgroup.long 0x34++0x03 line.long 0x00 "CAPPTR,Capability Pointer" hexmask.long.byte 0x00 0.--7. 0x01 " CAPABILITY_POINTER ,Pointer to the capability identifier" group.long 0x3C++0x3 line.long 0x00 "INTR_LINE_PIN,Max_Lat-Min_Gnt-Interrupt Pin-Interrupt Line" hexmask.long.byte 0x00 24.--31. 1. " MAX_LATENCY ,Maximum acquisition frequency of the PCI bus" hexmask.long.byte 0x00 16.--23. 1. " MIN_GNT ,Minimum burst transfer time" hexmask.long.byte 0x00 8.--15. 1. " INTERRUPT_PIN ,Interrupt output pin" newline hexmask.long.byte 0x00 0.--7. 1. " INTERRUPT_LINE ,Interrupt line" rgroup.long 0x40++0x03 line.long 0x00 "CAPID_NIP_PMCAP,Capability Identifier-Next Item Pointer-Power Management Capabilities" bitfld.long 0x00 31. " PME_SUPPORT_1 ,D3 Cold state is supported" "Not supported,?..." bitfld.long 0x00 27.--30. " PME_SUPPORT_0 ,PME interrupt generation supported in all PCI power states" ",,,,,,,,,,,,,,,Supported" bitfld.long 0x00 26. " D2_SUPPORT ,PCI power state D2 is supported" ",Supported" newline bitfld.long 0x00 25. " D1_SUPPORT ,PCI power state D1 is supported" ",Supported" bitfld.long 0x00 22.--24. " AUX_CURRENT ,Specified current value required for the 3.3 V auxiliary power supply" "0,?..." bitfld.long 0x00 21. " DSI ,Power management-special initialization required" "Not required,?..." newline bitfld.long 0x00 19. " PME_CLK ,PME interrupts generating-USB_PCICLK required" "Not required,?..." bitfld.long 0x00 16.--18. " VERSION ,System is compliant with PCI power management interface specification release 1.1" ",,2,?..." hexmask.long.byte 0x00 8.--15. 1. " NEXT_ITEM_POINTER ,No subsequent item" newline hexmask.long.byte 0x00 0.--7. 1. " CAPABILITY_IDENTIFIER ,PCI power management register ID" sif cpuis("R7S91*") group.long 0x44++0x03 line.long 0x00 "PMC_STS_PMCSR,Power Management Control/Status and PMCSR Bridge Support Extensions" hexmask.long.byte 0x00 24.--31. 1. " DATA ,Data field" rbitfld.long 0x00 23. " BPCC ,BPCC enable" "Disabled,Enabled" rbitfld.long 0x00 22. " B2_B3 ,Bit for bridge support" "Not supported,Supported" newline bitfld.long 0x00 15. " PME_STAT ,PME interrupt status" "Not interrupted,Interrupted" rbitfld.long 0x00 13.--14. " DATA_SCALE ,Data scale field" "0,1,2,3" rbitfld.long 0x00 9.--12. " DATA_SEL ,Data selection field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8. " PME_EN ,PME enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PWR_STAT ,PCI power status" "D0,D1,D2,D3 hot" else group.long 0x44++0x03 line.long 0x00 "PMC_STS_PMCSR,Power Management Control and Status-PMCSR Bridge Support Extensions" bitfld.long 0x00 15. " PME_STATUS ,PME interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " PME_ENABLE ,Enable of PME" "Disabled,Enabled" bitfld.long 0x00 0.--1. " POWER_STATE ,PCI power status" "D0,D1,D2,D3 hot" endif group.long 0x60++0x03 line.long 0x00 "SBRN_FLADJ_PW,SBRN-FLADJ-PORTWAKECAP" hexmask.long.word 0x00 16.--31. 1. " PORTWAKECAP ,Mask which ports wakeup event used" hexmask.long.byte 0x00 8.--15. 1. " FLADJ ,Length of 1 micro-frame in 16HS bit time units" hexmask.long.byte 0x00 0.--7. 1. " SBRN ,Serial bus release number" group.long 0xE0++0x03 line.long 0x00 "EXT1,EXT1 Register" hexmask.long.byte 0x00 24.--31. 1. " POTPGT ,Setting for PPOTPGT of the OHCI HcRhDescriptorA register" bitfld.long 0x00 19.--23. " HYPER_SPEED_TRANSFER_CONTROL_2 ,Hyper speed transfer control 2" ",,2,?..." bitfld.long 0x00 13. " HYPER_SPEED_TRANSFER_CONTROL_1 ,HS ASYNC OUT advance Mode" "Disabled,Enabled" newline sif cpuis("R7S91*") bitfld.long 0x00 12. " PSD ,Periodic schedule disable" "No,Yes" newline endif bitfld.long 0x00 7. " ID_WRITE_ENABLE ,Write protection for parameters Subsystem ID/Subsystem Vendor ID/Max Latency/Min Gnt" "Protected,Not protected" newline sif !cpuis("R7S91*") bitfld.long 0x00 2. " PPCNT ,Setting for bit PPC of the EHCI HCSPARAMS register/Controls the port power" "Always on,Control switch" newline endif bitfld.long 0x00 0.--1. " PORT_NO ,Number of valid USB downstream port" "1,1 and 2,?..." newline sif !cpuis("R7S91*") if (((per.l(ad:0x40030100+0xE4))&0x20000)==0x20000) group.long 0xE4++0x03 line.long 0x00 "EXT2,EXT2 Register" bitfld.long 0x00 24. " PLL_UNLOCK_ACCESS_MODE ,Set the response mode for register access during USBPLL unlock" "Wait,Return dummy value" rbitfld.long 0x00 18. " RAM_CONNECT_CHECK_RESULT ,Result of RAM connection check" "NG,OK" rbitfld.long 0x00 17. " RAM_CONNECT_CHECK_END_FLAG ,End of RAM connection check" "Not finished,Finished" newline bitfld.long 0x00 16. " RUN_RAM_CONNECT_CHECK ,RAM connection check" "Disabled,Enabled" bitfld.long 0x00 1. " HYPER_SPEED_TRANSFER_CONTROL_3 ,Hyper-speed transfer mode feature used for asynchronous IN/OUT transfer" "Disabled,Enabled" bitfld.long 0x00 0. " EHCI_MASK ,Mask of EHCI host controller" "No,Yes" else group.long 0xE4++0x03 line.long 0x00 "EXT2,EXT2 Register" bitfld.long 0x00 24. " PLL_UNLOCK_ACCESS_MODE ,Set the response mode for register access during USBPLL unlock" "Wait,Return dummy value" newline rbitfld.long 0x00 17. " RAM_CONNECT_CHECK_END_FLAG ,End of RAM connection check" "Not finished,Finished" newline bitfld.long 0x00 16. " RUN_RAM_CONNECT_CHECK ,RAM connection check" "Disabled,Enabled" bitfld.long 0x00 1. " HYPER_SPEED_TRANSFER_CONTROL_3 ,Hyper-speed transfer mode feature used for asynchronous IN/OUT transfer" "Disabled,Enabled" bitfld.long 0x00 0. " EHCI_MASK ,Mask of EHCI host controller" "No,Yes" endif else group.long 0xE4++0x03 line.long 0x00 "EXT2,EXT2 Register" rbitfld.long 0x00 17. " RAM_CONNECT_CHECK_END_FLAG ,End of RAM connection check" "Not finished,Finished" bitfld.long 0x00 16. " RUN_RAM_CONNECT_CHECK ,RAM connection check" "Disabled,Enabled" newline bitfld.long 0x00 1. " HYPER_SPEED_TRANSFER_CONTROL_3 ,Hyper-speed transfer mode feature used for asynchronous IN/OUT transfer" "Disabled,Enabled" bitfld.long 0x00 0. " EHCI_MASK ,Mask of EHCI host controller" "No,Yes" endif sif !cpuis("R7S91*") group.long 0xF4++0x03 line.long 0x00 "UTMICTRL,USBPHY Operation Mode Control Register" bitfld.long 0x00 16.--17. " REPSEL ,Interval of periodic terminal resistance adjustment" "0,?..." endif width 0xB tree.end tree "AHB-PCI Bridge Configuration" base ad:0x40030000 width 17. rgroup.long 0x00++0x03 line.long 0x00 "VID_DID,Device ID-Vendor ID/AHB-PCI Bridge" hexmask.long.word 0x00 16.--31. 1. " DEVICE_ID ,Device type" hexmask.long.word 0x00 0.--15. 1. " VENDOR_ID ,Device vendor" group.long 0x04++0x03 line.long 0x00 "CMND_STS,Status-Command" eventfld.long 0x00 31. " DETPERR ,Parity error status bit" "Not detected,Detected" eventfld.long 0x00 30. " SIGSERR ,SERR status bit" "Not occurred,Occurred" eventfld.long 0x00 29. " REMABORT ,Master abort status bit" "Not received,Received" newline eventfld.long 0x00 28. " RETABORT ,Master target abort status bit" "Not received,Received" eventfld.long 0x00 27. " SIGTABORT ,Slave target abort status bit" "Not occurred,Occurred" rbitfld.long 0x00 25.--26. " DEVTIM ,DEVSEL response speed" ",Medium Mode,?..." newline eventfld.long 0x00 24. " MDPERR ,Parity error detection bit" "Not detected,Detected" sif cpuis("R7S91*") rbitfld.long 0x00 23. " FBTBCAP ,Fast back to back capability" "Not supported,Supported" rbitfld.long 0x00 21. " CAP66M ,66-MHz operation support" "Not supported,Supported" newline rbitfld.long 0x00 20. " CAPLIST ,Capabilities list support" "Not supported,Supported" rbitfld.long 0x00 9. " FBTBEN ,Fast back to back enable" "Disabled,Enabled" bitfld.long 0x00 8. " SERREN ,Set the operation when system error is detected" "Ignored,SERR# is asserted" newline else bitfld.long 0x00 8. " SERREN ,Set the operation when system error is detected" "Ignored,SERR# is asserted" newline endif bitfld.long 0x00 6. " PERREN ,Set the operation when a parity error is detected" "Ignored,PERR# is asserted" newline bitfld.long 0x00 5. " VGAPSNP ,Enable of VGA palette snoop" "Disabled,?..." bitfld.long 0x00 4. " MWINVEN ,Enable of memory write and invalidate" "Disabled,?..." bitfld.long 0x00 3. " SPECIALC ,Enable of special cycle" "Disabled,?..." newline bitfld.long 0x00 2. " MASTEREN ,Enable of PCI master operation" "Disabled,Enabled" bitfld.long 0x00 1. " MEMEN ,Enable of PCI slave operation" "Disabled,Enabled" bitfld.long 0x00 0. " IOEN ,Enables access to the I_O space" "Disabled,?..." rgroup.long 0x08++0x03 line.long 0x00 "REVID_CC,Class Code-Revision ID" hexmask.long.tbyte 0x00 8.--31. 1. " CLASS_CODE ,Class code" hexmask.long.byte 0x00 0.--7. 1. " REVISION_ID ,Revision id" group.long 0x0C++0x0B line.long 0x00 "CLS_LT_HT_BIST,BIST-Header Type-Latency Timer-Cache Line Size" hexmask.long.byte 0x00 16.--23. 1. " HEADER_TYPE ,Header type" hexmask.long.byte 0x00 8.--15. 1. " LATENCY_TIMER ,This bit is used to notify Latency Timer to the system" line.long 0x04 "BASEAD,AHB-PCI Bridge Registers Base Address" hexmask.long.tbyte 0x04 10.--31. 0x04 " PCICOM_BASEADR ,Base address of the AHB-PCI Bridge PCI Communication Register area" rbitfld.long 0x04 3. " PREFETCH ,Data prefetch" "Disabled,?..." rbitfld.long 0x04 1.--2. " TYPE ,Base address type" "0,1,2,3" newline rbitfld.long 0x04 0. " MEM ,Bits specified with the base address are the memory space" "0,?..." line.long 0x08 "WIN1_BASEAD,PCI-AHB Window1 Base Address" hexmask.long.byte 0x08 28.--31. 0x10 " PCI_WIN1_BASEADR ,Specify the base address of the PCI-AHB Window 1 space" rbitfld.long 0x08 3. " PREFETCH ,Prefetching data" ",Enabled" rbitfld.long 0x08 1.--2. " TYPE ,Base address type" "0,1,2,3" newline rbitfld.long 0x08 0. " MEM ,Indicates that the field specified by the base address is in the memory space" "0,?..." sif !cpuis("R7S91*") group.long 0x18++0x03 line.long 0x00 "WIN2_BASEAD,PCI-AHB Window2 Base Address" hexmask.long.byte 0x00 28.--31. 0x10 " PCI_WIN2_BASEADR ,Base address of the PCI-AHB Window 2 space" rbitfld.long 0x00 3. " PREFETCH ,Prefetching data" ",Enabled" rbitfld.long 0x00 1.--2. " TYPE ,Base address type" "0,1,2,3" newline rbitfld.long 0x00 0. " MEM ,Indicates that the field specified by the base address is in the memory space" "0,?..." endif rgroup.long 0x2C++0x03 line.long 0x00 "SSVID_SSID,Subsystem ID-Subsystem Vendor ID" hexmask.long.word 0x00 16.--31. 1. " SUBSYS_ID ,Subsystem id" hexmask.long.word 0x00 0.--15. 1. " SUBSYS_VENDOR_ID ,Subsystem vendor id" sif !cpuis("R7S91*") group.long 0x3C++0x03 line.long 0x00 "NTR_LINE_PIN,Max_Lat-Min_Gnt-Interrupt Pin-Interrupt Line" hexmask.long.byte 0x00 24.--31. 1. " MAX_LAT ,Max lat" hexmask.long.byte 0x00 16.--23. 1. " MIN_GNT ,Maximum burst transfer time" hexmask.long.byte 0x00 8.--15. 1. " INT_PIN ,Interrupt output pin" newline hexmask.long.byte 0x00 0.--7. 1. " INT_LINE ,Interrupt line" else rgroup.long 0x3C++0x03 line.long 0x00 "NTR_LINE_PIN,Max_Lat-Min_Gnt-Interrupt Pin-Interrupt Line" hexmask.long.byte 0x00 24.--31. 1. " MAX_LAT ,Max lat" hexmask.long.byte 0x00 16.--23. 1. " MIN_GNT ,Maximum burst transfer time" hexmask.long.byte 0x00 8.--15. 1. " INT_PIN ,Interrupt output pin" newline hexmask.long.byte 0x00 0.--7. 1. " INT_LINE ,Interrupt line" endif width 0x0B tree.end tree "AHB-PCI Bridge Communication" base ad:0x40030800 width 17. group.long 0x00++0x03 line.long 0x00 "PCIAHB_WIN1_CTR,PCIAHB Window1 Control Register" hexmask.long.byte 0x00 28.--31. 0x10 " AHB_BASEADR ,Base address of the AHB when the host controller access the PCI-AHB Window 1 space" sif !cpuis("R7S91*") bitfld.long 0x00 6.--8. " ENDIAN_CTR ,Specify convert type of endianness on AHB" "No conversion,Access type data swapping,Byte data swapping,Halfword swapping,Address conversion,?..." bitfld.long 0x00 0.--1. " PREFETCH ,Enable of prefetch on AHB" ",,,16" else newline bitfld.long 0x00 0.--1. " PREFETCH ,Enable of prefetch on AHB" "Disabled,4,8,16" endif sif !cpuis("R7S91*") group.long 0x04++0x03 line.long 0x00 "PCIAHB_WIN2_CTR,PCIAHB Window2 Control Register" hexmask.long.byte 0x00 28.--31. 0x10 " AHB_BASEADR ,Base address of the AHB when the host controller access the PCI-AHB Window 2 space" bitfld.long 0x00 6.--8. " ENDIAN_CTR ,Convert type of endianness on AHB" "No conversion,Access type data swapping,Byte data swapping,Halfword swapping,Address conversion,?..." bitfld.long 0x00 0.--1. " PREFETCH ,Enable of prefetch on AHB" ",,,Enabled" endif group.long 0x10++0x07 line.long 0x00 "AHBPCI_WIN1_CTR,AHBPCI Window1 Control Register" hexmask.long.tbyte 0x00 11.--31. 0x08 " PCIWIN1_BASEADR ,Base address of the PCI bus when it accesses AHB-PCI Window 1 space from AHB" sif !cpuis("R7S91*") bitfld.long 0x00 1.--3. " PCICMD ,Specify the PCI bus cycle type" ",,,,,,Configuration Read/Write,?..." newline else bitfld.long 0x00 1.--3. " PCICMD ,Specify the PCI bus cycle type (Read/Write)" "Interrupt acknowledge/Special cycle,I/O,,Memory,,Configuration,Memory multiple,Memory line" newline endif line.long 0x04 "AHBPCI_WIN2_CTR,AHBPCI Window2 Control Register" hexmask.long.word 0x04 16.--31. 0x01 " PCIWIN2_BASEADR ,Base address of the PCI bus when it accesses AHB-PCI Window 2 space from AHB" bitfld.long 0x04 5. " BURST_EN ,Enable of burst transfer on the PCI bus" "Disabled,?..." newline sif !cpuis("R7S91*") bitfld.long 0x04 1.--3. " PCICMD ,PCI bus cycle type" ",,,Memory Read/Write,?..." else bitfld.long 0x04 1.--3. " PCICMD ,PCI bus cycle type (Read/Write)" ",IO,,Memory,,,Memory multiple,Memory line" endif group.long 0x20++0x07 line.long 0x00 "PCI_INT_ENABLE,PCI Interrupt Enable Register" bitfld.long 0x00 19. " USBH_PMEEN ,Enable of USBH_PME" "Disabled,Enabled" bitfld.long 0x00 17. " USBH_INTBEN ,Enable of USBH_INTB" "Disabled,Enabled" bitfld.long 0x00 16. " USBH_INTAEN ,Enable of USBH_INTA" "Disabled,Enabled" newline bitfld.long 0x00 13. " PCIAHB_WIN2_INTEN ,Enable of PCIAHB_WIN2_INT" "Disabled,Enabled" bitfld.long 0x00 12. " PCIAHB_WIN1_INTEN ,Enable of PCIAHB_WIN1_INT" "Disabled,Enabled" bitfld.long 0x00 5. " RESERR_INTEN ,Enable of RESERR_INT" "Disabled,Enabled" newline bitfld.long 0x00 4. " SIGSERR_INTEN ,Enable of SIGSERR_INT" "Disabled,Enabled" bitfld.long 0x00 3. " PERR_INTEN ,Enable of PERR_INT" "Disabled,Enabled" bitfld.long 0x00 2. " REMARBORT_INTEN ,Enable of REMABORT_INT" "Disabled,Enabled" newline bitfld.long 0x00 1. " RETABORT_INTEN ,Enable of RETABORT_INT" "Disabled,Enabled" bitfld.long 0x00 0. " SIGTABORT_INTEN ,Enable of SIGTABORT_INT" "Disabled,Enabled" line.long 0x04 "PCI_INT_STATUS,PCI Interrupt Status Register" bitfld.long 0x04 19. " USBH_PME ,Status of PME interrupt" "No interrupt,Interrupt" bitfld.long 0x04 17. " USBH_INTB ,Status of INTB interrupt" "No interrupt,Interrupt" bitfld.long 0x04 16. " USBH_INTA ,Status of INTA interrupt" "No interrupt,Interrupt" newline bitfld.long 0x04 13. " PCIAHB_WIN2_INT ,Status of AHB bus error in PCIAHB windows 2" "Not occurred,Occurred" bitfld.long 0x04 12. " PCIAHB_WIN1_INT ,Status of AHB bus error in PCIAHB windows 1" "Not occurred,Occurred" bitfld.long 0x04 5. " RESERR_INT ,Status of interrupt caused by SERR input" "No interrupt,Interrupt" newline bitfld.long 0x04 4. " SIGSERR_INT ,Status of interrupt caused by SERR output" "No interrupt,Interrupt" bitfld.long 0x04 3. " PERR_INT ,Status of interrupt caused by PERR input\output" "No interrupt,Interrupt" bitfld.long 0x04 2. " REMARBORT_INT ,MasterAbort is received during PCI master operation" "Not received,Received" newline bitfld.long 0x04 1. " RETABORT_INT ,Target Abort is reported during PCI master operation" "Nor reported,Reported" bitfld.long 0x04 0. " SIGTABORT_INT ,Target Abort is reported during PCI slave operation" "Nor reported,Reported" group.long 0x30++0x07 line.long 0x00 "AHB_BUS_CTR,AHB Bus Control Register" bitfld.long 0x00 17. " SMODE_READY_CTR ,Wait cycle control type for AHB slave" ",HREADY=0" bitfld.long 0x00 7. " MMODE_HBUSREQ ,HBUSREQ de-assert timing for the AHB master" ",HGRANT=1 & HREADY=1" newline bitfld.long 0x00 2. " MMODE_WR_INCR ,AHB INCR burst use condition at write for the AHB master" ",INCR4/8/16 or INCR 2/3 beat" newline bitfld.long 0x00 1. " MMODE_BYTE_BURST ,Burst mode setting in 16 bit/8 bit transfer for the AHB master" ",No burst" bitfld.long 0x00 0. " MMODE_HTRANS ,HTRANS behavior setting for the AHB master" ",IDLE and HBUSREQ" line.long 0x04 "USBCTR,USB Control Register" sif !cpuis("R7S91*") bitfld.long 0x04 10.--11. " PCI_AHB_WIN1_SIZE ,PCI-AHB Window 1 area control" "256 MB,512 MB,1 GB,2 GB" else bitfld.long 0x04 10.--11. " PCI_AHB_WIN1_SIZE ,PCI-AHB Window 1 area control" ",,1 GB,?..." endif bitfld.long 0x04 9. " PCI_AHB_WIN2_EN ,Enable the PCI-AHB Window 2" "Disabled,Enabled" newline sif !cpuis("R7S91*") bitfld.long 0x04 8. " DIRPD ,Power down state enable" "Disabled,Enabled" bitfld.long 0x04 2. " PLL_RST ,Reset of USBPLL" "No reset,Reset" newline endif bitfld.long 0x04 1. " PCICLK_MASK ,Control PCI clock supply in the host controller" "Supplied,Stopped" bitfld.long 0x04 0. " USBH_RST ,Control the reset signal supplied to the host controller" "No reset,Reset" group.long 0x40++0x03 line.long 0x00 "PCI_ARBITER_CTR,PCI Arbiter Control Register" bitfld.long 0x00 12. " PCIBP_MODE ,PCI bus master in the bus parking" "This unit,Last accessed master" bitfld.long 0x00 1. " PCIREQ1 ,Enable of PCI bus request1 signal" "Disabled,Enabled" bitfld.long 0x00 0. " PCIREQ0 ,Enable of PCI bus request0 signal" "Disabled,Enabled" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") group.long 0x48++0x03 line.long 0x00 "PCI_UNIT_REV,PCI Unit Revision Register" elif cpuis("R7S91*") group.long 0x48++0x03 line.long 0x00 "PCI_UNIT_REV,PCI Unit Revision Register" hexmask.long.word 0x00 16.--31. 1. " MAJOR_REV_ID ,Major revision ID" hexmask.long.word 0x00 0.--15. 1. " MINOR_REV_ID ,Minor revision ID" endif width 0x0B tree.end tree.end tree "EPC" base ad:0x4001E000 width 19. group.long 0x00++0x03 line.long 0x00 "USB_CONTROL,USB Control Register" bitfld.long 0x00 16.--18. " USBTESTMODE ,USB test mode" "Normal,Test_J,Test_K,Test_SE0_NAK,Test_Packet,?..." bitfld.long 0x00 11. " SOF_CLK_MODE ,Operating mode for SOF output pin in HS mode" "Invert when SOF/uSOF,Invert when SOF" bitfld.long 0x00 10. " INT_SEL ,U2F_EPC_INT Interrupt output type select" ",Level" textline " " bitfld.long 0x00 9. " FORCEFS ,FORCEFS" "Normal operation,?..." bitfld.long 0x00 8. " SOF_RCV ,Enable bit for automatic recovery at SOF reception error" ",Enabled" bitfld.long 0x00 7. " RSUM_IN ,Remote wakeup trigger" "No resume,Resume" textline " " bitfld.long 0x00 6. " SUSPEND ,Disabled clock supply" "Enabled,Disabled" bitfld.long 0x00 5. " CONF ,Enable bit for Endpoints other than Endpoint 0" "Disabled,Enabled" bitfld.long 0x00 4. " DEFAULT ,Enable bit for Endpoint 0" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CONNECTB ,Disable the USB signals to the SIE block" "Enabled,Disabled" bitfld.long 0x00 2. " PUE2 ,Enable D+ pull-up" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "USB_STATUS,USB Status Register" bitfld.long 0x00 31. " SOF_DELAY_STATUS ,SOF delay status" "Normally,Ignored" bitfld.long 0x00 6. " SPEED_MODE ,USB port speed" "Full-Speed,High-Speed" bitfld.long 0x00 5. " CONF ,Status of Endpoints other than Endpoint 0 are enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DEFAULT ,Status of Endpoint 0" "Disabled,Enabled" bitfld.long 0x00 3. " USB_RST ,BusReset state" "No reset,Reset" bitfld.long 0x00 2. " SPND_OUT ,Suspend state" "Not suspended,Suspended" textline " " bitfld.long 0x00 1. " RSUM_OUT ,Resume status" "Not received,Received" if (((per.l(ad:0x4001E000))&0x00000020)==0x00000020) group.long 0x08++0x03 line.long 0x00 "USB_ADDRESS,Frame Number & USB Address Register" bitfld.long 0x00 31. " SOF_DELAY_MODE ,Setting of SOF unacceptable period" "Valid,Ignore" hexmask.long.byte 0x00 16.--22. 0x01 " USB_ADDR ,USB address" bitfld.long 0x00 15. " SOF_STATUS ,SOF/uSOF reception status" "No error,Error" textline " " bitfld.long 0x00 12.--14. " UFRAME ,The number of times for received uSOF within a frame" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--10. 1. " FRAME ,The frame number of the SOF" else group.long 0x08++0x03 line.long 0x00 "USB_ADDRESS,Frame Number & USB Address Register" bitfld.long 0x00 31. " SOF_DELAY_MODE ,Setting of SOF unacceptable period" "Valid,Ignore" hexmask.long.byte 0x00 16.--22. 0x01 " USB_ADDR ,USB address" bitfld.long 0x00 15. " SOF_STATUS ,SOF/uSOF reception status" "No error,Error" textline " " hexmask.long.word 0x00 0.--10. 1. " FRAME ,The frame number of the SOF" endif group.long 0x10++0x03 line.long 0x00 "TEST_CONTROL,Test Control Register" bitfld.long 0x00 2. " FORCEHS ,Subsystem HS mode" "Normal operation,?..." bitfld.long 0x00 1. " CS_TESTMODEEN ,Enable USB test mode" "Disabled,Enabled" bitfld.long 0x00 0. " LOOPBACK ,Enable bit for hardware loopback on logic side" "Disabled,Enabled" newline hgroup.long 0x18++0x03 hide.long 0x00 "SETUP_DATA0,Setup Data0 Register" in hgroup.long 0x1C++0x03 hide.long 0x00 "SETUP_DATA1,Setup Data1 Register" in newline group.long 0x20++0x07 line.long 0x00 "USB_INT_STA,USB Interrupt Status Register" bitfld.long 0x00 23. " EP15_INT/EP0_INT_INT ,Interrupt for Endpoint 0/15" "No interrupt,Interrupt" bitfld.long 0x00 22. " EP14_INT/EP0_INT_INT ,Interrupt for Endpoint 0/14" "No interrupt,Interrupt" bitfld.long 0x00 21. " EP13_INT/EP0_INT_INT ,Interrupt for Endpoint 0/13" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " EP12_INT/EP0_INT_INT ,Interrupt for Endpoint 0/12" "No interrupt,Interrupt" bitfld.long 0x00 19. " EP11_INT/EP0_INT_INT ,Interrupt for Endpoint 0/11" "No interrupt,Interrupt" bitfld.long 0x00 18. " EP10_INT/EP0_INT_INT ,Interrupt for Endpoint 0/10" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " EP9_INT/EP0_INT_INT ,Interrupt for Endpoint 0/9" "No interrupt,Interrupt" bitfld.long 0x00 16. " EP8_INT/EP0_INT_INT ,Interrupt for Endpoint 0/8" "No interrupt,Interrupt" bitfld.long 0x00 15. " EP7_INT/EP0_INT_INT ,Interrupt for Endpoint 0/7" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " EP6_INT/EP0_INT_INT ,Interrupt for Endpoint 0/6" "No interrupt,Interrupt" bitfld.long 0x00 13. " EP5_INT/EP0_INT_INT ,Interrupt for Endpoint 0/5" "No interrupt,Interrupt" bitfld.long 0x00 12. " EP4_INT/EP0_INT_INT ,Interrupt for Endpoint 0/4" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " EP3_INT/EP0_INT_INT ,Interrupt for Endpoint 0/3" "No interrupt,Interrupt" bitfld.long 0x00 10. " EP2_INT/EP0_INT_INT ,Interrupt for Endpoint 0/2" "No interrupt,Interrupt" bitfld.long 0x00 9. " EP1_INT/EP0_INT_INT ,Interrupt for Endpoint 0/1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " EP0_INT/EP0_INT_INT ,Interrupt for Endpoint 0/0" "No interrupt,Interrupt" bitfld.long 0x00 6. " SPEED_MODE_INT_INT ,Interrupt for speed mode change" "No interrupt,Interrupt" bitfld.long 0x00 5. " SOF_ERROR_INT ,Interrupt for SOF/uSOF reception error" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " SOF_INT ,Interrupt for SOF/uSOF reception" "No interrupt,Interrupt" bitfld.long 0x00 3. " USB_RST_INT ,Interrupt for BusReset" "No interrupt,Interrupt" bitfld.long 0x00 2. " SPND_INT ,Interrupt for suspend state" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " RSUM_INT ,Interrupt for resume reception" "No interrupt,Interrupt" line.long 0x04 "USB_INT_ENA,USB Interrupt Enable Register" bitfld.long 0x04 23. " EP15_INT/EP0_INT_EN ,Enable bit for Endpoint 0/15" "Disabled,Enabled" bitfld.long 0x04 22. " EP14_INT/EP0_INT_EN ,Enable bit for Endpoint 0/14" "Disabled,Enabled" bitfld.long 0x04 21. " EP13_INT/EP0_INT_EN ,Enable bit for Endpoint 0/13" "Disabled,Enabled" textline " " bitfld.long 0x04 20. " EP12_INT/EP0_INT_EN ,Enable bit for Endpoint 0/12" "Disabled,Enabled" bitfld.long 0x04 19. " EP11_INT/EP0_INT_EN ,Enable bit for Endpoint 0/11" "Disabled,Enabled" bitfld.long 0x04 18. " EP10_INT/EP0_INT_EN ,Enable bit for Endpoint 0/10" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " EP9_INT/EP0_INT_EN ,Enable bit for Endpoint 0/9" "Disabled,Enabled" bitfld.long 0x04 16. " EP8_INT/EP0_INT_EN ,Enable bit for Endpoint 0/8" "Disabled,Enabled" bitfld.long 0x04 15. " EP7_INT/EP0_INT_EN ,Enable bit for Endpoint 0/7" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " EP6_INT/EP0_INT_EN ,Enable bit for Endpoint 0/6" "Disabled,Enabled" bitfld.long 0x04 13. " EP5_INT/EP0_INT_EN ,Enable bit for Endpoint 0/5" "Disabled,Enabled" bitfld.long 0x04 12. " EP4_INT/EP0_INT_EN ,Enable bit for Endpoint 0/4" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " EP3_INT/EP0_INT_EN ,Enable bit for Endpoint 0/3" "Disabled,Enabled" bitfld.long 0x04 10. " EP2_INT/EP0_INT_EN ,Interrupt for Endpoint 0/2" "Disabled,Enabled" bitfld.long 0x04 9. " EP1_INT/EP0_INT_EN ,Interrupt for Endpoint 0/1" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " EP0_INT/EP0_INT_EN ,Interrupt for Endpoint 0/0" "Disabled,Enabled" bitfld.long 0x04 6. " SPEED_MODE_INT_EN ,Enable bit for SPEED_MODE_INT" "Disabled,Enabled" bitfld.long 0x04 5. " SOF_ERROR_EN ,Enable bit for SOF_ERROR_INT" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " SOF_EN ,Enable bit for SOF_INT" "Disabled,Enabled" bitfld.long 0x04 3. " USB_RST_EN ,Enable bit for USB_RST_INT" "Disabled,Enabled" bitfld.long 0x04 2. " SPND_EN ,Enable bit for SPND_INT" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " RSUM_EN ,Enable bit for RSUM_INT" "Disabled,Enabled" if (((per.l(ad:0x4001E000+0x28))&0x80)==0x80) group.long 0x28++0x03 line.long 0x00 "EP0_CONTROL,EP0 Control Register" bitfld.long 0x00 18. " EP0_STGSEL ,Operation mode when data other than null data is received in status stage" "Normal reception,?..." bitfld.long 0x00 17. " EP0_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return STALL,?..." bitfld.long 0x00 16. " EP0_AUTO ,EP0_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " EP0_PIDCLR ,Initialize DATA PID for Endpoint 0" "Not initialize,Initialize" bitfld.long 0x00 8. " EP0_BCLR ,Clear both EP0 Write and EP0 Read Registers" "Not clear,clear" bitfld.long 0x00 7. " EP0_DEND ,Transmission enable of EP0 Write Register" "Disable,Enable" textline " " bitfld.long 0x00 5.--6. " EP0_DW ,Valid data size for last data written in EP0 Write Register" "4,1,2,3" bitfld.long 0x00 4. " EP0_INAK_EN ,Write enable bit of EP0_INAK" "Disable,Enable" bitfld.long 0x00 3. " EP0_PERR_NAK_CLR ,Cancel forced NAK state by illegal token" "Not cancel,Cancel" textline " " bitfld.long 0x00 2. " EP0_STL ,NAK response control bit for IN/OUT/PING token to Endpoint0" "Not returned,Returned NAK" bitfld.long 0x00 1. " EP0_INAK ,NAK response control bit for IN token to Endpoint0" "Transmit data,Returned NAK" bitfld.long 0x00 0. " EP0_ONAK ,NAK response control bit for OUT/PING token to Endpoint0" "Receive data,Returned NAK" else group.long 0x28++0x03 line.long 0x00 "EP0_CONTROL,EP0 Control Register" bitfld.long 0x00 18. " EP0_STGSEL ,Operation mode when data other than null data is received in status stage" "Normal reception,?..." bitfld.long 0x00 17. " EP0_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return STALL,?..." bitfld.long 0x00 16. " EP0_AUTO ,EP0_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " EP0_PIDCLR ,Initialize DATA PID for Endpoint 0" "Not initialize,Initialize" bitfld.long 0x00 8. " EP0_BCLR ,Clear both EP0 Write and EP0 Read Registers" "Not clear,clear" bitfld.long 0x00 7. " EP0_DEND ,Transmission enable of EP0 Write Register" "Disable,Enable" textline " " bitfld.long 0x00 4. " EP0_INAK_EN ,Write enable bit of EP0_INAK" "Disable,Enable" bitfld.long 0x00 3. " EP0_PERR_NAK_CLR ,Cancel forced NAK state by illegal token" "Not cancel,Cancel" textline " " bitfld.long 0x00 2. " EP0_STL ,NAK response control bit for IN/OUT/PING token to Endpoint0" "Not returned,Returned NAK" bitfld.long 0x00 1. " EP0_INAK ,NAK response control bit for IN token to Endpoint0" "Transmit data,Returned NAK" bitfld.long 0x00 0. " EP0_ONAK ,NAK response control bit for OUT/PING token to Endpoint0" "Receive data,Returned NAK" endif group.long 0x2C++0x07 line.long 0x00 "EP0_STATUS,EP0 Status Register" rbitfld.long 0x00 18. " EP0_PID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 17. " EP0_PERR_NAK ,Forced NAK state due to reception of illegal token at Endpoint0" "Not forced,Forced" bitfld.long 0x00 16. " EP0_PERR_NAK_INT ,Receive Illegal token" "Not received,Received" textline " " bitfld.long 0x00 15. " EP0_OUT_NAK_INT ,NAK was sent for OUT/PING token to Endpoint 0" "Not sent,Sent" rbitfld.long 0x00 14. " EP0_OUT_NULL ,Receive null data to Endpoint 0" "Disabled,Enabled" rbitfld.long 0x00 13. " EP0_OUT_FULL ,Read Register/reception buffer full status" "Not full,Full" textline " " rbitfld.long 0x00 12. " EP0_OUT_EMPTY ,EP0 Read Register/reception buffer empty status" "Not empty,Empty" bitfld.long 0x00 11. " EP0_IN_NAK_INT ,NAK was sent in response to an IN token" "No,Yes" rbitfld.long 0x00 10. " EP0_IN_DATA ,EP0 Write Register/transmission buffer data valid" "Data,No data" textline " " rbitfld.long 0x00 9. " EP0_IN_FULL ,Write Register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 8. " EP0_IN_EMPTY ,EP0 ,EP0 ,EP0,Write Register/transmission buffer empty status" "Not empty,Empty" bitfld.long 0x00 7. " EP0_OUT_NULL_INT ,Received null data is stored in the EP0 Read Register/reception buffer" "Not received,Received" textline " " bitfld.long 0x00 6. " EP0_OUT_OR_INT ,Overrun occurs while Endpoint0 receives a data" "Not occurred,Occurred" bitfld.long 0x00 5. " EP0_OUT_INT ,Read from reception buffer" "Not ready,Ready" bitfld.long 0x00 4. " EP0_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" textline " " bitfld.long 0x00 3. " EP0_STALL_INT ,Endpoint0 moves to STALL state" "Not stalled,Stalled" bitfld.long 0x00 2. " STG_END_INT ,Control transfer completed status stage" "Not completed,Completed" bitfld.long 0x00 1. " STG_START_INT ,Control transfer starts status stages" "Not started,Started" textline " " bitfld.long 0x00 0. " SETUP_INT ,Valid SETUP data" "Not received,Received" line.long 0x04 "EP0_INT_ENA,EP0 Interrupt Enable Register" bitfld.long 0x04 16. " EP0_PERR_NAK_EN ,Enable for bit 16 of EP0 status register" "Disabled,Enabled" bitfld.long 0x04 15. " EP0_OUT_NAK_EN ,Enable for bit 15 of EP0 status register" "Disabled,Enabled" bitfld.long 0x04 11. " EP0_IN_NAK_EN ,Enable for bit 11 of EP0 status register" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " EP0_OUT_NULL_EN ,Enable for bit 7 of EP0 status register" "Disabled,Enabled" bitfld.long 0x04 6. " EP0_OUT_OR_EN ,Enable for bit 6 of EP0 status register" "Disabled,Enabled" bitfld.long 0x04 5. " EP0_OUT_EN ,Enable for bit 5 of EP0 status register" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " EP0_IN_EN ,Enable for bit 4 of EP0 status register" "Disabled,Enabled" bitfld.long 0x04 3. " EP0_STALL_EN ,Enable for bit 3 of EP0 Status register" "Disabled,Enabled" bitfld.long 0x04 2. " STG_END_EN ,Enable for bit 2 of EP0 Status register" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " STG_START_EN ,Enable for bit 1 of EP0 Status register" "Disabled,Enabled" bitfld.long 0x04 0. " SETUP_EN ,Enable for bit 0 of EP0 status register" "Disabled,Enabled" rgroup.long 0x34++0x07 line.long 0x00 "EP0_LENGTH,EP0 OUT Data Length Register" hexmask.long.byte 0x00 0.--6. 1. " EP0_LDATA ,Number of received bytes" line.long 0x04 "EP0_READ,EP0 Read Register" hexmask.long.byte 0x04 24.--31. 1. " EP0_RDATA4 ,Endpoint0 received data" hexmask.long.byte 0x04 16.--23. 1. " EP0_RDATA3 ,Endpoint0 received data" hexmask.long.byte 0x04 8.--15. 1. " EP0_RDATA2 ,Endpoint0 received data" textline " " hexmask.long.byte 0x04 0.--7. 1. " EP0_RDATA1 ,Endpoint0 received data" wgroup.long 0x3C++0x03 line.long 0x00 "EP0_WRITE,EP0 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP0_WDATA4 ,Endpoint0 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP0_WDATA3 ,Endpoint0 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP0_WDATA2 ,Endpoint0 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP0_WDATA1 ,Endpoint0 transmit data" tree "EP_CONTROL" group.long 0x40++0x03 line.long 0x00 "EP1_CONTROL,EP1 Control Register" bitfld.long 0x00 31. " EP1_EN ,Enable of Endpoint1" "Disabled,Enabled" rbitfld.long 0x00 30. " EP1_BUF_TYPE ,Buffer type of EP1 buffering." "Single,Double" bitfld.long 0x00 26. " EP1_DIR0 ,Direction of Endpoint1" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP1_MODE ,Transfer type of Endpoint1" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP1_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP1_AUTO ,EP1_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP1_IPIDCLR ,Initialize receive DATA PID for Endpoint1" "Not initialize,Initialize" bitfld.long 0x00 10. " EP1_OPIDCLR ,Initialize receive DATA PID for Endpoint1" "Not initialize,Initialize" bitfld.long 0x00 9. " EP1_BCLR ,Clear both EP1 Write and EP1 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP1_CBCLR ,Clear both EP1 Write and EP1 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP1_DEND ,Transmission enable of EP1 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP1_DW ,Valid data size for last data written in EP1 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP1_OSTL_EN ,Write enable bit of EP1_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP1_ISTL ,STALL response control bit for IN token to Endpoint1" "Return,Return" bitfld.long 0x00 2. " EP1_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint1" "Not return,Return" textline " " bitfld.long 0x00 0. " EP1_ONAK ,NAK response control bit for OUT/PING token to Endpoint1" "Receive data,Return NAK" group.long 0x60++0x03 line.long 0x00 "EP2_CONTROL,EP2 Control Register" bitfld.long 0x00 31. " EP2_EN ,Enable of Endpoint2" "Disabled,Enabled" rbitfld.long 0x00 30. " EP2_BUF_TYPE ,Buffer type of EP2 buffering." "Single,Double" bitfld.long 0x00 26. " EP2_DIR0 ,Direction of Endpoint2" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP2_MODE ,Transfer type of Endpoint2" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP2_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP2_AUTO ,EP2_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP2_IPIDCLR ,Initialize receive DATA PID for Endpoint2" "Not initialize,Initialize" bitfld.long 0x00 10. " EP2_OPIDCLR ,Initialize receive DATA PID for Endpoint2" "Not initialize,Initialize" bitfld.long 0x00 9. " EP2_BCLR ,Clear both EP2 Write and EP2 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP2_CBCLR ,Clear both EP2 Write and EP2 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP2_DEND ,Transmission enable of EP2 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP2_DW ,Valid data size for last data written in EP2 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP2_OSTL_EN ,Write enable bit of EP2_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP2_ISTL ,STALL response control bit for IN token to Endpoint2" "Return,Return" bitfld.long 0x00 2. " EP2_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint2" "Not return,Return" textline " " bitfld.long 0x00 0. " EP2_ONAK ,NAK response control bit for OUT/PING token to Endpoint2" "Receive data,Return NAK" group.long 0x80++0x03 line.long 0x00 "EP3_CONTROL,EP3 Control Register" bitfld.long 0x00 31. " EP3_EN ,Enable of Endpoint3" "Disabled,Enabled" rbitfld.long 0x00 30. " EP3_BUF_TYPE ,Buffer type of EP3 buffering." "Single,Double" bitfld.long 0x00 26. " EP3_DIR0 ,Direction of Endpoint3" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP3_MODE ,Transfer type of Endpoint3" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP3_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP3_AUTO ,EP3_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP3_IPIDCLR ,Initialize receive DATA PID for Endpoint3" "Not initialize,Initialize" bitfld.long 0x00 10. " EP3_OPIDCLR ,Initialize receive DATA PID for Endpoint3" "Not initialize,Initialize" bitfld.long 0x00 9. " EP3_BCLR ,Clear both EP3 Write and EP3 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP3_CBCLR ,Clear both EP3 Write and EP3 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP3_DEND ,Transmission enable of EP3 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP3_DW ,Valid data size for last data written in EP3 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP3_OSTL_EN ,Write enable bit of EP3_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP3_ISTL ,STALL response control bit for IN token to Endpoint3" "Return,Return" bitfld.long 0x00 2. " EP3_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint3" "Not return,Return" textline " " bitfld.long 0x00 0. " EP3_ONAK ,NAK response control bit for OUT/PING token to Endpoint3" "Receive data,Return NAK" group.long 0xA0++0x03 line.long 0x00 "EP4_CONTROL,EP4 Control Register" bitfld.long 0x00 31. " EP4_EN ,Enable of Endpoint4" "Disabled,Enabled" rbitfld.long 0x00 30. " EP4_BUF_TYPE ,Buffer type of EP4 buffering." "Single,Double" bitfld.long 0x00 26. " EP4_DIR0 ,Direction of Endpoint4" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP4_MODE ,Transfer type of Endpoint4" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP4_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP4_AUTO ,EP4_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP4_IPIDCLR ,Initialize receive DATA PID for Endpoint4" "Not initialize,Initialize" bitfld.long 0x00 10. " EP4_OPIDCLR ,Initialize receive DATA PID for Endpoint4" "Not initialize,Initialize" bitfld.long 0x00 9. " EP4_BCLR ,Clear both EP4 Write and EP4 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP4_CBCLR ,Clear both EP4 Write and EP4 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP4_DEND ,Transmission enable of EP4 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP4_DW ,Valid data size for last data written in EP4 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP4_OSTL_EN ,Write enable bit of EP4_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP4_ISTL ,STALL response control bit for IN token to Endpoint4" "Return,Return" bitfld.long 0x00 2. " EP4_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint4" "Not return,Return" textline " " bitfld.long 0x00 0. " EP4_ONAK ,NAK response control bit for OUT/PING token to Endpoint4" "Receive data,Return NAK" group.long 0xC0++0x03 line.long 0x00 "EP5_CONTROL,EP5 Control Register" bitfld.long 0x00 31. " EP5_EN ,Enable of Endpoint5" "Disabled,Enabled" rbitfld.long 0x00 30. " EP5_BUF_TYPE ,Buffer type of EP5 buffering." "Single,Double" bitfld.long 0x00 26. " EP5_DIR0 ,Direction of Endpoint5" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP5_MODE ,Transfer type of Endpoint5" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP5_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP5_AUTO ,EP5_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP5_IPIDCLR ,Initialize receive DATA PID for Endpoint5" "Not initialize,Initialize" bitfld.long 0x00 10. " EP5_OPIDCLR ,Initialize receive DATA PID for Endpoint5" "Not initialize,Initialize" bitfld.long 0x00 9. " EP5_BCLR ,Clear both EP5 Write and EP5 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP5_CBCLR ,Clear both EP5 Write and EP5 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP5_DEND ,Transmission enable of EP5 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP5_DW ,Valid data size for last data written in EP5 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP5_OSTL_EN ,Write enable bit of EP5_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP5_ISTL ,STALL response control bit for IN token to Endpoint5" "Return,Return" bitfld.long 0x00 2. " EP5_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint5" "Not return,Return" textline " " bitfld.long 0x00 0. " EP5_ONAK ,NAK response control bit for OUT/PING token to Endpoint5" "Receive data,Return NAK" group.long 0xE0++0x03 line.long 0x00 "EP6_CONTROL,EP6 Control Register" bitfld.long 0x00 31. " EP6_EN ,Enable of Endpoint6" "Disabled,Enabled" rbitfld.long 0x00 30. " EP6_BUF_TYPE ,Buffer type of EP6 buffering." "Single,Double" bitfld.long 0x00 26. " EP6_DIR0 ,Direction of Endpoint6" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP6_MODE ,Transfer type of Endpoint6" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP6_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP6_AUTO ,EP6_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP6_IPIDCLR ,Initialize receive DATA PID for Endpoint6" "Not initialize,Initialize" bitfld.long 0x00 10. " EP6_OPIDCLR ,Initialize receive DATA PID for Endpoint6" "Not initialize,Initialize" bitfld.long 0x00 9. " EP6_BCLR ,Clear both EP6 Write and EP6 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP6_CBCLR ,Clear both EP6 Write and EP6 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP6_DEND ,Transmission enable of EP6 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP6_DW ,Valid data size for last data written in EP6 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP6_OSTL_EN ,Write enable bit of EP6_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP6_ISTL ,STALL response control bit for IN token to Endpoint6" "Return,Return" bitfld.long 0x00 2. " EP6_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint6" "Not return,Return" textline " " bitfld.long 0x00 0. " EP6_ONAK ,NAK response control bit for OUT/PING token to Endpoint6" "Receive data,Return NAK" group.long 0x100++0x03 line.long 0x00 "EP7_CONTROL,EP7 Control Register" bitfld.long 0x00 31. " EP7_EN ,Enable of Endpoint7" "Disabled,Enabled" rbitfld.long 0x00 30. " EP7_BUF_TYPE ,Buffer type of EP7 buffering." "Single,Double" bitfld.long 0x00 26. " EP7_DIR0 ,Direction of Endpoint7" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP7_MODE ,Transfer type of Endpoint7" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP7_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP7_AUTO ,EP7_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP7_IPIDCLR ,Initialize receive DATA PID for Endpoint7" "Not initialize,Initialize" bitfld.long 0x00 10. " EP7_OPIDCLR ,Initialize receive DATA PID for Endpoint7" "Not initialize,Initialize" bitfld.long 0x00 9. " EP7_BCLR ,Clear both EP7 Write and EP7 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP7_CBCLR ,Clear both EP7 Write and EP7 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP7_DEND ,Transmission enable of EP7 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP7_DW ,Valid data size for last data written in EP7 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP7_OSTL_EN ,Write enable bit of EP7_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP7_ISTL ,STALL response control bit for IN token to Endpoint7" "Return,Return" bitfld.long 0x00 2. " EP7_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint7" "Not return,Return" textline " " bitfld.long 0x00 0. " EP7_ONAK ,NAK response control bit for OUT/PING token to Endpoint7" "Receive data,Return NAK" group.long 0x120++0x03 line.long 0x00 "EP8_CONTROL,EP8 Control Register" bitfld.long 0x00 31. " EP8_EN ,Enable of Endpoint8" "Disabled,Enabled" rbitfld.long 0x00 30. " EP8_BUF_TYPE ,Buffer type of EP8 buffering." "Single,Double" bitfld.long 0x00 26. " EP8_DIR0 ,Direction of Endpoint8" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP8_MODE ,Transfer type of Endpoint8" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP8_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP8_AUTO ,EP8_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP8_IPIDCLR ,Initialize receive DATA PID for Endpoint8" "Not initialize,Initialize" bitfld.long 0x00 10. " EP8_OPIDCLR ,Initialize receive DATA PID for Endpoint8" "Not initialize,Initialize" bitfld.long 0x00 9. " EP8_BCLR ,Clear both EP8 Write and EP8 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP8_CBCLR ,Clear both EP8 Write and EP8 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP8_DEND ,Transmission enable of EP8 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP8_DW ,Valid data size for last data written in EP8 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP8_OSTL_EN ,Write enable bit of EP8_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP8_ISTL ,STALL response control bit for IN token to Endpoint8" "Return,Return" bitfld.long 0x00 2. " EP8_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint8" "Not return,Return" textline " " bitfld.long 0x00 0. " EP8_ONAK ,NAK response control bit for OUT/PING token to Endpoint8" "Receive data,Return NAK" group.long 0x140++0x03 line.long 0x00 "EP9_CONTROL,EP9 Control Register" bitfld.long 0x00 31. " EP9_EN ,Enable of Endpoint9" "Disabled,Enabled" rbitfld.long 0x00 30. " EP9_BUF_TYPE ,Buffer type of EP9 buffering." "Single,Double" bitfld.long 0x00 26. " EP9_DIR0 ,Direction of Endpoint9" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP9_MODE ,Transfer type of Endpoint9" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP9_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP9_AUTO ,EP9_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP9_IPIDCLR ,Initialize receive DATA PID for Endpoint9" "Not initialize,Initialize" bitfld.long 0x00 10. " EP9_OPIDCLR ,Initialize receive DATA PID for Endpoint9" "Not initialize,Initialize" bitfld.long 0x00 9. " EP9_BCLR ,Clear both EP9 Write and EP9 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP9_CBCLR ,Clear both EP9 Write and EP9 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP9_DEND ,Transmission enable of EP9 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP9_DW ,Valid data size for last data written in EP9 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP9_OSTL_EN ,Write enable bit of EP9_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP9_ISTL ,STALL response control bit for IN token to Endpoint9" "Return,Return" bitfld.long 0x00 2. " EP9_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint9" "Not return,Return" textline " " bitfld.long 0x00 0. " EP9_ONAK ,NAK response control bit for OUT/PING token to Endpoint9" "Receive data,Return NAK" group.long 0x160++0x03 line.long 0x00 "EP10_CONTROL,EP10 Control Register" bitfld.long 0x00 31. " EP10_EN ,Enable of Endpoint10" "Disabled,Enabled" rbitfld.long 0x00 30. " EP10_BUF_TYPE ,Buffer type of EP10 buffering." "Single,Double" bitfld.long 0x00 26. " EP10_DIR0 ,Direction of Endpoint10" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP10_MODE ,Transfer type of Endpoint10" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP10_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP10_AUTO ,EP10_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP10_IPIDCLR ,Initialize receive DATA PID for Endpoint10" "Not initialize,Initialize" bitfld.long 0x00 10. " EP10_OPIDCLR ,Initialize receive DATA PID for Endpoint10" "Not initialize,Initialize" bitfld.long 0x00 9. " EP10_BCLR ,Clear both EP10 Write and EP10 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP10_CBCLR ,Clear both EP10 Write and EP10 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP10_DEND ,Transmission enable of EP10 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP10_DW ,Valid data size for last data written in EP10 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP10_OSTL_EN ,Write enable bit of EP10_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP10_ISTL ,STALL response control bit for IN token to Endpoint10" "Return,Return" bitfld.long 0x00 2. " EP10_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint10" "Not return,Return" textline " " bitfld.long 0x00 0. " EP10_ONAK ,NAK response control bit for OUT/PING token to Endpoint10" "Receive data,Return NAK" group.long 0x180++0x03 line.long 0x00 "EP11_CONTROL,EP11 Control Register" bitfld.long 0x00 31. " EP11_EN ,Enable of Endpoint11" "Disabled,Enabled" rbitfld.long 0x00 30. " EP11_BUF_TYPE ,Buffer type of EP11 buffering." "Single,Double" bitfld.long 0x00 26. " EP11_DIR0 ,Direction of Endpoint11" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP11_MODE ,Transfer type of Endpoint11" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP11_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP11_AUTO ,EP11_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP11_IPIDCLR ,Initialize receive DATA PID for Endpoint11" "Not initialize,Initialize" bitfld.long 0x00 10. " EP11_OPIDCLR ,Initialize receive DATA PID for Endpoint11" "Not initialize,Initialize" bitfld.long 0x00 9. " EP11_BCLR ,Clear both EP11 Write and EP11 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP11_CBCLR ,Clear both EP11 Write and EP11 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP11_DEND ,Transmission enable of EP11 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP11_DW ,Valid data size for last data written in EP11 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP11_OSTL_EN ,Write enable bit of EP11_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP11_ISTL ,STALL response control bit for IN token to Endpoint11" "Return,Return" bitfld.long 0x00 2. " EP11_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint11" "Not return,Return" textline " " bitfld.long 0x00 0. " EP11_ONAK ,NAK response control bit for OUT/PING token to Endpoint11" "Receive data,Return NAK" group.long 0x1A0++0x03 line.long 0x00 "EP12_CONTROL,EP12 Control Register" bitfld.long 0x00 31. " EP12_EN ,Enable of Endpoint12" "Disabled,Enabled" rbitfld.long 0x00 30. " EP12_BUF_TYPE ,Buffer type of EP12 buffering." "Single,Double" bitfld.long 0x00 26. " EP12_DIR0 ,Direction of Endpoint12" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP12_MODE ,Transfer type of Endpoint12" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP12_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP12_AUTO ,EP12_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP12_IPIDCLR ,Initialize receive DATA PID for Endpoint12" "Not initialize,Initialize" bitfld.long 0x00 10. " EP12_OPIDCLR ,Initialize receive DATA PID for Endpoint12" "Not initialize,Initialize" bitfld.long 0x00 9. " EP12_BCLR ,Clear both EP12 Write and EP12 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP12_CBCLR ,Clear both EP12 Write and EP12 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP12_DEND ,Transmission enable of EP12 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP12_DW ,Valid data size for last data written in EP12 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP12_OSTL_EN ,Write enable bit of EP12_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP12_ISTL ,STALL response control bit for IN token to Endpoint12" "Return,Return" bitfld.long 0x00 2. " EP12_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint12" "Not return,Return" textline " " bitfld.long 0x00 0. " EP12_ONAK ,NAK response control bit for OUT/PING token to Endpoint12" "Receive data,Return NAK" group.long 0x1C0++0x03 line.long 0x00 "EP13_CONTROL,EP13 Control Register" bitfld.long 0x00 31. " EP13_EN ,Enable of Endpoint13" "Disabled,Enabled" rbitfld.long 0x00 30. " EP13_BUF_TYPE ,Buffer type of EP13 buffering." "Single,Double" bitfld.long 0x00 26. " EP13_DIR0 ,Direction of Endpoint13" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP13_MODE ,Transfer type of Endpoint13" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP13_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP13_AUTO ,EP13_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP13_IPIDCLR ,Initialize receive DATA PID for Endpoint13" "Not initialize,Initialize" bitfld.long 0x00 10. " EP13_OPIDCLR ,Initialize receive DATA PID for Endpoint13" "Not initialize,Initialize" bitfld.long 0x00 9. " EP13_BCLR ,Clear both EP13 Write and EP13 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP13_CBCLR ,Clear both EP13 Write and EP13 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP13_DEND ,Transmission enable of EP13 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP13_DW ,Valid data size for last data written in EP13 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP13_OSTL_EN ,Write enable bit of EP13_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP13_ISTL ,STALL response control bit for IN token to Endpoint13" "Return,Return" bitfld.long 0x00 2. " EP13_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint13" "Not return,Return" textline " " bitfld.long 0x00 0. " EP13_ONAK ,NAK response control bit for OUT/PING token to Endpoint13" "Receive data,Return NAK" group.long 0x1E0++0x03 line.long 0x00 "EP14_CONTROL,EP14 Control Register" bitfld.long 0x00 31. " EP14_EN ,Enable of Endpoint14" "Disabled,Enabled" rbitfld.long 0x00 30. " EP14_BUF_TYPE ,Buffer type of EP14 buffering." "Single,Double" bitfld.long 0x00 26. " EP14_DIR0 ,Direction of Endpoint14" "IN,OUT" textline " " rbitfld.long 0x00 24.--25. " EP14_MODE ,Transfer type of Endpoint14" "Bulk,Interrupt,Isochronous,?..." bitfld.long 0x00 17. " EP14_OVERSEL ,Select the operation for next OUT token when an overrun occurs in OUT transfer" "Return a STALL,?..." bitfld.long 0x00 16. " EP14_AUTO ,EP14_DEND automatic state" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " EP14_IPIDCLR ,Initialize receive DATA PID for Endpoint14" "Not initialize,Initialize" bitfld.long 0x00 10. " EP14_OPIDCLR ,Initialize receive DATA PID for Endpoint14" "Not initialize,Initialize" bitfld.long 0x00 9. " EP14_BCLR ,Clear both EP14 Write and EP14 Read Registers on CPU side and USB side" "Not clear,Clear" textline " " bitfld.long 0x00 8. " EP14_CBCLR ,Clear both EP14 Write and EP14 Read Registers on CPU side" "Not clear,Clear" bitfld.long 0x00 7. " EP14_DEND ,Transmission enable of EP14 write register" "Disable,Enable" bitfld.long 0x00 5.--6. " EP14_DW ,Valid data size for last data written in EP14 Write register" "4,1,2,3" textline " " bitfld.long 0x00 4. " EP14_OSTL_EN ,Write enable bit of EP14_OSTL" "Disable,Enable" bitfld.long 0x00 3. " EP14_ISTL ,STALL response control bit for IN token to Endpoint14" "Return,Return" bitfld.long 0x00 2. " EP14_OSTL ,STALL response control bit for IN/OUT/PING token to Endpoint14" "Not return,Return" textline " " bitfld.long 0x00 0. " EP14_ONAK ,NAK response control bit for OUT/PING token to Endpoint14" "Receive data,Return NAK" tree.end tree "EP_STATUS" if (((per.l(ad:0x4001E000+0x44-0x04))&0x03000000)==0x02000000) group.long 0x44++0x03 line.long 0x00 "EP1_STATUS,EP1 Status Register" rbitfld.long 0x00 29. " EP1_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP1_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP1_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP1_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP1_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP1_OUT_END_INT ,Read DMA for OUT-direction Endpoint1 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP1_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP1_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP1_OUT_STALL_INT ,EP1 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP1_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP1_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP1_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP1_OUT_EMPTY ,EP1 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP1_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP1_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP1_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP1_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP1_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP1_IN_STALL_INT ,EP1 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP1_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP1_IN_DATA ,EP1 Write Register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP1_IN_FULL ,EP1 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP1_IN_EMPTY ,EP1 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x44++0x03 line.long 0x00 "EP1_STATUS,EP1 Status Register" rbitfld.long 0x00 28. " EP1_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP1_OUT_END_INT ,Read DMA for OUT-direction Endpoint1 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP1_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP1_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP1_OUT_STALL_INT ,EP1 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP1_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP1_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP1_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP1_OUT_EMPTY ,EP1 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP1_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP1_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP1_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP1_IN_STALL_INT ,EP1 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP1_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP1_IN_DATA ,EP1 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP1_IN_FULL ,EP1 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP1_IN_EMPTY ,EP1 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0x64-0x04))&0x03000000)==0x02000000) group.long 0x64++0x03 line.long 0x00 "EP2_STATUS,EP2 Status Register" rbitfld.long 0x00 29. " EP2_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP2_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP2_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP2_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP2_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP2_OUT_END_INT ,Read DMA for OUT-direction Endpoint2 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP2_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP2_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP2_OUT_STALL_INT ,EP2 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP2_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP2_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP2_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP2_OUT_EMPTY ,EP2 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP2_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP2_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP2_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP2_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP2_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP2_IN_STALL_INT ,EP2 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP2_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP2_IN_DATA ,EP2 Write Register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP2_IN_FULL ,EP2 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP2_IN_EMPTY ,EP2 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x64++0x03 line.long 0x00 "EP2_STATUS,EP2 Status Register" rbitfld.long 0x00 28. " EP2_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP2_OUT_END_INT ,Read DMA for OUT-direction Endpoint2 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP2_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP2_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP2_OUT_STALL_INT ,EP2 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP2_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP2_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP2_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP2_OUT_EMPTY ,EP2 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP2_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP2_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP2_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP2_IN_STALL_INT ,EP2 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP2_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP2_IN_DATA ,EP2 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP2_IN_FULL ,EP2 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP2_IN_EMPTY ,EP2 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0x84-0x04))&0x03000000)==0x02000000) group.long 0x84++0x03 line.long 0x00 "EP3_STATUS,EP3 Status Register" rbitfld.long 0x00 29. " EP3_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP3_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP3_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP3_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP3_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP3_OUT_END_INT ,Read DMA for OUT-direction Endpoint3 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP3_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP3_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP3_OUT_STALL_INT ,EP3 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP3_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP3_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP3_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP3_OUT_EMPTY ,EP3 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP3_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP3_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP3_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP3_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP3_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP3_IN_STALL_INT ,EP3 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP3_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP3_IN_DATA ,EP3 Write Register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP3_IN_FULL ,EP3 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP3_IN_EMPTY ,EP3 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x84++0x03 line.long 0x00 "EP3_STATUS,EP3 Status Register" rbitfld.long 0x00 28. " EP3_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP3_OUT_END_INT ,Read DMA for OUT-direction Endpoint3 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP3_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP3_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP3_OUT_STALL_INT ,EP3 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP3_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP3_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP3_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP3_OUT_EMPTY ,EP3 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP3_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP3_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP3_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP3_IN_STALL_INT ,EP3 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP3_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP3_IN_DATA ,EP3 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP3_IN_FULL ,EP3 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP3_IN_EMPTY ,EP3 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0xA4-0x04))&0x03000000)==0x02000000) group.long 0xA4++0x03 line.long 0x00 "EP4_STATUS,EP4 Status Register" rbitfld.long 0x00 29. " EP4_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP4_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP4_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP4_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP4_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP4_OUT_END_INT ,Read DMA for OUT-direction Endpoint4 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP4_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP4_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP4_OUT_STALL_INT ,EP4 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP4_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP4_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP4_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP4_OUT_EMPTY ,EP4 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP4_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP4_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP4_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP4_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP4_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP4_IN_STALL_INT ,EP4 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP4_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP4_IN_DATA ,EP4 Write Register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP4_IN_FULL ,EP4 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP4_IN_EMPTY ,EP4 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0xA4++0x03 line.long 0x00 "EP4_STATUS,EP4 Status Register" rbitfld.long 0x00 28. " EP4_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP4_OUT_END_INT ,Read DMA for OUT-direction Endpoint4 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP4_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP4_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP4_OUT_STALL_INT ,EP4 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP4_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP4_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP4_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP4_OUT_EMPTY ,EP4 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP4_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP4_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP4_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP4_IN_STALL_INT ,EP4 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP4_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP4_IN_DATA ,EP4 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP4_IN_FULL ,EP4 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP4_IN_EMPTY ,EP4 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0xC4-0x04))&0x03000000)==0x02000000) group.long 0xC4++0x03 line.long 0x00 "EP5_STATUS,EP5 Status Register" rbitfld.long 0x00 29. " EP5_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP5_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP5_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP5_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP5_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP5_OUT_END_INT ,Read DMA for OUT-direction Endpoint5 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP5_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP5_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP5_OUT_STALL_INT ,EP5 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP5_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP5_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP5_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP5_OUT_EMPTY ,EP5 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP5_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP5_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP5_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP5_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP5_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP5_IN_STALL_INT ,EP5 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP5_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP5_IN_DATA ,EP5 Write Register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP5_IN_FULL ,EP5 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP5_IN_EMPTY ,EP5 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0xC4++0x03 line.long 0x00 "EP5_STATUS,EP5 Status Register" rbitfld.long 0x00 28. " EP5_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP5_OUT_END_INT ,Read DMA for OUT-direction Endpoint5 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP5_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP5_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP5_OUT_STALL_INT ,EP5 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP5_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP5_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP5_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP5_OUT_EMPTY ,EP5 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP5_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP5_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP5_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP5_IN_STALL_INT ,EP5 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP5_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP5_IN_DATA ,EP5 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP5_IN_FULL ,EP5 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP5_IN_EMPTY ,EP5 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0xE4-0x04))&0x03000000)==0x02000000) group.long 0xE4++0x03 line.long 0x00 "EP6_STATUS,EP6 Status Register" rbitfld.long 0x00 29. " EP6_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP6_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP6_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP6_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP6_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP6_OUT_END_INT ,Read DMA for OUT-direction Endpoint6 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP6_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP6_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP6_OUT_STALL_INT ,EP6 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP6_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP6_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP6_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP6_OUT_EMPTY ,EP6 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP6_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP6_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP6_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP6_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP6_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP6_IN_STALL_INT ,EP6 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP6_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP6_IN_DATA ,EP6 Write Register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP6_IN_FULL ,EP6 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP6_IN_EMPTY ,EP6 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0xE4++0x03 line.long 0x00 "EP6_STATUS,EP6 Status Register" rbitfld.long 0x00 28. " EP6_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP6_OUT_END_INT ,Read DMA for OUT-direction Endpoint6 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP6_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP6_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP6_OUT_STALL_INT ,EP6 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP6_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP6_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP6_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP6_OUT_EMPTY ,EP6 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP6_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP6_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP6_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP6_IN_STALL_INT ,EP6 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP6_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP6_IN_DATA ,EP6 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP6_IN_FULL ,EP6 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP6_IN_EMPTY ,EP6 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0x104-0x04))&0x03000000)==0x02000000) group.long 0x104++0x03 line.long 0x00 "EP7_STATUS,EP7 Status Register" rbitfld.long 0x00 29. " EP7_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP7_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP7_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP7_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP7_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP7_OUT_END_INT ,Read DMA for OUT-direction Endpoint7 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP7_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP7_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP7_OUT_STALL_INT ,EP7 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP7_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP7_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP7_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP7_OUT_EMPTY ,EP7 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP7_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP7_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP7_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP7_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP7_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP7_IN_STALL_INT ,EP7 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP7_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP7_IN_DATA ,EP7 Write Register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP7_IN_FULL ,EP7 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP7_IN_EMPTY ,EP7 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x104++0x03 line.long 0x00 "EP7_STATUS,EP7 Status Register" rbitfld.long 0x00 28. " EP7_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP7_OUT_END_INT ,Read DMA for OUT-direction Endpoint7 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP7_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP7_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP7_OUT_STALL_INT ,EP7 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP7_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP7_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP7_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP7_OUT_EMPTY ,EP7 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP7_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP7_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP7_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP7_IN_STALL_INT ,EP7 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP7_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP7_IN_DATA ,EP7 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP7_IN_FULL ,EP7 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP7_IN_EMPTY ,EP7 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0x124-0x04))&0x03000000)==0x02000000) group.long 0x124++0x03 line.long 0x00 "EP8_STATUS,EP8 Status Register" rbitfld.long 0x00 29. " EP8_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP8_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP8_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP8_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP8_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP8_OUT_END_INT ,Read DMA for OUT-direction Endpoint8 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP8_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP8_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP8_OUT_STALL_INT ,EP8 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP8_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP8_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP8_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP8_OUT_EMPTY ,EP8 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP8_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP8_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP8_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP8_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP8_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP8_IN_STALL_INT ,EP8 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP8_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP8_IN_DATA ,EP8 Write Register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP8_IN_FULL ,EP8 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP8_IN_EMPTY ,EP8 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x124++0x03 line.long 0x00 "EP8_STATUS,EP8 Status Register" rbitfld.long 0x00 28. " EP8_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP8_OUT_END_INT ,Read DMA for OUT-direction Endpoint8 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP8_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP8_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP8_OUT_STALL_INT ,EP8 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP8_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP8_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP8_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP8_OUT_EMPTY ,EP8 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP8_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP8_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP8_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP8_IN_STALL_INT ,EP8 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP8_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP8_IN_DATA ,EP8 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP8_IN_FULL ,EP8 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP8_IN_EMPTY ,EP8 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0x144-0x04))&0x03000000)==0x02000000) group.long 0x144++0x03 line.long 0x00 "EP9_STATUS,EP9 Status Register" rbitfld.long 0x00 29. " EP9_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP9_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP9_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP9_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP9_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP9_OUT_END_INT ,Read DMA for OUT-direction Endpoint9 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP9_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP9_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP9_OUT_STALL_INT ,EP9 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP9_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP9_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP9_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP9_OUT_EMPTY ,EP9 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP9_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP9_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP9_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP9_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP9_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP9_IN_STALL_INT ,EP9 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP9_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP9_IN_DATA ,EP9 Write Register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP9_IN_FULL ,EP9 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP9_IN_EMPTY ,EP9 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x144++0x03 line.long 0x00 "EP9_STATUS,EP9 Status Register" rbitfld.long 0x00 28. " EP9_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP9_OUT_END_INT ,Read DMA for OUT-direction Endpoint9 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP9_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP9_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP9_OUT_STALL_INT ,EP9 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP9_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP9_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP9_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP9_OUT_EMPTY ,EP9 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP9_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP9_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP9_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP9_IN_STALL_INT ,EP9 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP9_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP9_IN_DATA ,EP9 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP9_IN_FULL ,EP9 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP9_IN_EMPTY ,EP9 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0x164-0x04))&0x03000000)==0x02000000) group.long 0x164++0x03 line.long 0x00 "EP10_STATUS,EP10 Status Register" rbitfld.long 0x00 29. " EP10_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP10_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP10_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP10_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP10_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP10_OUT_END_INT ,Read DMA for OUT-direction Endpoint10 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP10_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP10_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP10_OUT_STALL_INT ,EP10 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP10_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP10_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP10_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP10_OUT_EMPTY ,EP10 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP10_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP10_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP10_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP10_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP10_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP10_IN_STALL_INT ,EP10 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP10_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP10_IN_DATA ,EP10 Write Register (transmission buffer) data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP10_IN_FULL ,EP10 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP10_IN_EMPTY ,EP10 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x164++0x03 line.long 0x00 "EP10_STATUS,EP10 Status Register" rbitfld.long 0x00 28. " EP10_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP10_OUT_END_INT ,Read DMA for OUT-direction Endpoint10 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP10_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP10_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP10_OUT_STALL_INT ,EP10 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP10_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP10_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP10_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP10_OUT_EMPTY ,EP10 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP10_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP10_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP10_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP10_IN_STALL_INT ,EP10 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP10_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP10_IN_DATA ,EP10 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP10_IN_FULL ,EP10 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP10_IN_EMPTY ,EP10 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0x184-0x04))&0x03000000)==0x02000000) group.long 0x184++0x03 line.long 0x00 "EP11_STATUS,EP11 Status Register" rbitfld.long 0x00 29. " EP11_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP11_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP11_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP11_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP11_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP11_OUT_END_INT ,Read DMA for OUT-direction Endpoint11 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP11_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP11_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP11_OUT_STALL_INT ,EP11 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP11_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP11_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP11_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP11_OUT_EMPTY ,EP11 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP11_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP11_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP11_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP11_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP11_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP11_IN_STALL_INT ,EP11 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP11_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP11_IN_DATA ,EP11 Write Register (transmission buffer) data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP11_IN_FULL ,EP11 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP11_IN_EMPTY ,EP11 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x184++0x03 line.long 0x00 "EP11_STATUS,EP11 Status Register" rbitfld.long 0x00 28. " EP11_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP11_OUT_END_INT ,Read DMA for OUT-direction Endpoint11 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP11_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP11_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP11_OUT_STALL_INT ,EP11 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP11_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP11_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP11_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP11_OUT_EMPTY ,EP11 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP11_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP11_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP11_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP11_IN_STALL_INT ,EP11 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP11_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP11_IN_DATA ,EP11 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP11_IN_FULL ,EP11 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP11_IN_EMPTY ,EP11 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0x1A4-0x04))&0x03000000)==0x02000000) group.long 0x1A4++0x03 line.long 0x00 "EP12_STATUS,EP12 Status Register" rbitfld.long 0x00 29. " EP12_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP12_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP12_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP12_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP12_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP12_OUT_END_INT ,Read DMA for OUT-direction Endpoint12 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP12_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP12_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP12_OUT_STALL_INT ,EP12 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP12_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP12_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP12_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP12_OUT_EMPTY ,EP12 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP12_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP12_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP12_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP12_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP12_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP12_IN_STALL_INT ,EP12 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP12_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP12_IN_DATA ,EP12 Write Register (transmission buffer) data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP12_IN_FULL ,EP12 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP12_IN_EMPTY ,EP12 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x1A4++0x03 line.long 0x00 "EP12_STATUS,EP12 Status Register" rbitfld.long 0x00 28. " EP12_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP12_OUT_END_INT ,Read DMA for OUT-direction Endpoint12 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP12_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP12_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP12_OUT_STALL_INT ,EP12 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP12_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP12_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP12_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP12_OUT_EMPTY ,EP12 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP12_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP12_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP12_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP12_IN_STALL_INT ,EP12 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP12_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP12_IN_DATA ,EP12 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP12_IN_FULL ,EP12 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP12_IN_EMPTY ,EP12 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0x1C4-0x04))&0x03000000)==0x02000000) group.long 0x1C4++0x03 line.long 0x00 "EP13_STATUS,EP13 Status Register" rbitfld.long 0x00 29. " EP13_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP13_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP13_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP13_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP13_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP13_OUT_END_INT ,Read DMA for OUT-direction Endpoint13 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP13_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP13_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP13_OUT_STALL_INT ,EP13 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP13_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP13_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP13_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP13_OUT_EMPTY ,EP13 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP13_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP13_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP13_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP13_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP13_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP13_IN_STALL_INT ,EP13 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP13_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP13_IN_DATA ,EP13 Write Register (transmission buffer) data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP13_IN_FULL ,EP13 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP13_IN_EMPTY ,EP13 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x1C4++0x03 line.long 0x00 "EP13_STATUS,EP13 Status Register" rbitfld.long 0x00 28. " EP13_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP13_OUT_END_INT ,Read DMA for OUT-direction Endpoint13 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP13_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP13_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP13_OUT_STALL_INT ,EP13 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP13_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP13_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP13_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP13_OUT_EMPTY ,EP13 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP13_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP13_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP13_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP13_IN_STALL_INT ,EP13 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP13_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP13_IN_DATA ,EP13 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP13_IN_FULL ,EP13 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP13_IN_EMPTY ,EP13 Write register/transmission buffer empty status" "Not empty,Empty" endif if (((per.l(ad:0x4001E000+0x1E4-0x04))&0x03000000)==0x02000000) group.long 0x1E4++0x03 line.long 0x00 "EP14_STATUS,EP14 Status Register" rbitfld.long 0x00 29. " EP14_ISO_PIDERR ,Illegal DATA PIN" "Not received,Received" rbitfld.long 0x00 28. " EP14_OPID ,Next expected DATA PID" "DATA0,DATA1" rbitfld.long 0x00 27. " EP14_OUT_NOTKN , No OUT token received in the interval between SOF" "Received,Not received" textline " " rbitfld.long 0x00 26. " EP14_ISO_OR ,The received OUT data" "Not discarded,Discarded" rbitfld.long 0x00 24. " EP14_ISO_CRC ,CRC error in receive data" "Not occurred,Occurred" bitfld.long 0x00 23. " EP14_OUT_END_INT ,Read DMA for OUT-direction Endpoint14 completes" "Not completed,Completed" textline " " bitfld.long 0x00 22. " EP14_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" bitfld.long 0x00 21. " EP14_OUT_NAK_ERR_INT ,OUT/PING token NAK response" "Not sent,Sent" bitfld.long 0x00 20. " EP14_OUT_STALL_INT ,EP14 becomes STALL" "Not in STALL,In STALL" textline " " bitfld.long 0x00 19. " EP14_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" bitfld.long 0x00 18. " EP14_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP14_OUT_FULL ,Reception buffer state" "Not full,Full" textline " " rbitfld.long 0x00 16. " EP14_OUT_EMPTY ,EP14 Read register/reception buffer empty status" "Not empty,Empty" rbitfld.long 0x00 10. " EP14_IPID ,Next DATA PID" "DATA0,DATA1" rbitfld.long 0x00 9. " EP14_IN_NOTKN ,No IN tokens receives" "Received,Not received" textline " " rbitfld.long 0x00 8. " EP14_ISO_UR ,Null data send automatically" "No,Yes" bitfld.long 0x00 7. " EP14_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP14_IN_NAK_ERR_INT ,Transmission error" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " EP14_IN_STALL_INT ,EP14 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP14_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP14_IN_DATA ,EP14 Write Register (transmission buffer) data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP14_IN_FULL ,EP14 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP14_IN_EMPTY ,EP14 Write register/transmission buffer empty status" "Not empty,Empty" else group.long 0x1E4++0x03 line.long 0x00 "EP14_STATUS,EP14 Status Register" rbitfld.long 0x00 28. " EP14_OPID ,Next expected DATA PID" "DATA0,DATA1" bitfld.long 0x00 23. " EP14_OUT_END_INT ,Read DMA for OUT-direction Endpoint14 completes" "Not completed,Completed" bitfld.long 0x00 22. " EP14_OUT_OR_INT ,Overrun occurs" "Not occurred,Occurred" textline " " bitfld.long 0x00 21. " EP14_OUT_NAK_ERR_INT ,Reception error" "Not occurred,Occurred" bitfld.long 0x00 20. " EP14_OUT_STALL_INT ,EP14 becomes STALL" "Not in STALL,In STALL" bitfld.long 0x00 19. " EP14_OUT_INT ,Reception buffer becomes readable" "Not readable,Readable" textline " " bitfld.long 0x00 18. " EP14_OUT_NULL_INT ,Null data receives" "Not received,Received" rbitfld.long 0x00 17. " EP14_OUT_FULL ,Reception buffer state" "Not full,Full" rbitfld.long 0x00 16. " EP14_OUT_EMPTY ,EP14 Read register/reception buffer empty status" "Not empty,Empty" textline " " rbitfld.long 0x00 10. " EP14_IPID ,Next DATA PID" "DATA0,DATA1" bitfld.long 0x00 7. " EP14_IN_END_INT ,Buffer write DMA state" "Not completed,Completed" bitfld.long 0x00 5. " EP14_IN_NAK_ERR_INT ,NAK was sent for IN token" "Not sent,Sent" textline " " bitfld.long 0x00 4. " EP14_IN_STALL_INT ,EP14 is IN and in STAL" "Not STALL,STALL" bitfld.long 0x00 3. " EP14_IN_INT ,Transmission buffer becomes writable" "Not writable,Writable" rbitfld.long 0x00 2. " EP14_IN_DATA ,EP14 Write register/transmission buffer data valid" "Invalid,Valid" textline " " rbitfld.long 0x00 1. " EP14_IN_FULL ,EP14 Write register/transmission buffer full status" "Not full,Full" rbitfld.long 0x00 0. " EP14_IN_EMPTY ,EP14 Write register/transmission buffer empty status" "Not empty,Empty" endif tree.end tree "EP_INT_ENA" group.long 0x48++0x03 line.long 0x00 "EP1_INT_ENA,EP1 Interrupt Enable Register" bitfld.long 0x00 23. " EP1_OUT_END_EN ,Enable for bit 23 of EP1 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP1_OUT_OR_EN ,Enable for bit 22 of EP1 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP1_OUT_NAK_ERR_EN ,Enable for bit 21 of EP1 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP1_OUT_STALL_EN ,Enable for bit 20 of EP1 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP1_OUT_EN ,Enable for bit 19 of EP1 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP1_OUT_NULL_EN ,Enable for bit 18 of EP1 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP1_IN_END_EN ,Enable for bit 7 of EP1 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP1_IN_NAK_ERR_EN ,Enable for bit 5 of EP1 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP1_IN_STALL_EN ,Enable for bit 4 of EP1 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP1_IN_EN ,Enable for bit 3 of EP1 status register" "Disabled,Enabled" group.long 0x68++0x03 line.long 0x00 "EP2_INT_ENA,EP2 Interrupt Enable Register" bitfld.long 0x00 23. " EP2_OUT_END_EN ,Enable for bit 23 of EP2 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP2_OUT_OR_EN ,Enable for bit 22 of EP2 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP2_OUT_NAK_ERR_EN ,Enable for bit 21 of EP2 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP2_OUT_STALL_EN ,Enable for bit 20 of EP2 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP2_OUT_EN ,Enable for bit 19 of EP2 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP2_OUT_NULL_EN ,Enable for bit 18 of EP2 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP2_IN_END_EN ,Enable for bit 7 of EP2 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP2_IN_NAK_ERR_EN ,Enable for bit 5 of EP2 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP2_IN_STALL_EN ,Enable for bit 4 of EP2 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP2_IN_EN ,Enable for bit 3 of EP2 status register" "Disabled,Enabled" group.long 0x88++0x03 line.long 0x00 "EP3_INT_ENA,EP3 Interrupt Enable Register" bitfld.long 0x00 23. " EP3_OUT_END_EN ,Enable for bit 23 of EP3 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP3_OUT_OR_EN ,Enable for bit 22 of EP3 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP3_OUT_NAK_ERR_EN ,Enable for bit 21 of EP3 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP3_OUT_STALL_EN ,Enable for bit 20 of EP3 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP3_OUT_EN ,Enable for bit 19 of EP3 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP3_OUT_NULL_EN ,Enable for bit 18 of EP3 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP3_IN_END_EN ,Enable for bit 7 of EP3 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP3_IN_NAK_ERR_EN ,Enable for bit 5 of EP3 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP3_IN_STALL_EN ,Enable for bit 4 of EP3 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP3_IN_EN ,Enable for bit 3 of EP3 status register" "Disabled,Enabled" group.long 0xA8++0x03 line.long 0x00 "EP4_INT_ENA,EP4 Interrupt Enable Register" bitfld.long 0x00 23. " EP4_OUT_END_EN ,Enable for bit 23 of EP4 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP4_OUT_OR_EN ,Enable for bit 22 of EP4 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP4_OUT_NAK_ERR_EN ,Enable for bit 21 of EP4 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP4_OUT_STALL_EN ,Enable for bit 20 of EP4 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP4_OUT_EN ,Enable for bit 19 of EP4 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP4_OUT_NULL_EN ,Enable for bit 18 of EP4 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP4_IN_END_EN ,Enable for bit 7 of EP4 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP4_IN_NAK_ERR_EN ,Enable for bit 5 of EP4 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP4_IN_STALL_EN ,Enable for bit 4 of EP4 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP4_IN_EN ,Enable for bit 3 of EP4 status register" "Disabled,Enabled" group.long 0xC8++0x03 line.long 0x00 "EP5_INT_ENA,EP5 Interrupt Enable Register" bitfld.long 0x00 23. " EP5_OUT_END_EN ,Enable for bit 23 of EP5 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP5_OUT_OR_EN ,Enable for bit 22 of EP5 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP5_OUT_NAK_ERR_EN ,Enable for bit 21 of EP5 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP5_OUT_STALL_EN ,Enable for bit 20 of EP5 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP5_OUT_EN ,Enable for bit 19 of EP5 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP5_OUT_NULL_EN ,Enable for bit 18 of EP5 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP5_IN_END_EN ,Enable for bit 7 of EP5 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP5_IN_NAK_ERR_EN ,Enable for bit 5 of EP5 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP5_IN_STALL_EN ,Enable for bit 4 of EP5 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP5_IN_EN ,Enable for bit 3 of EP5 status register" "Disabled,Enabled" group.long 0xE8++0x03 line.long 0x00 "EP6_INT_ENA,EP6 Interrupt Enable Register" bitfld.long 0x00 23. " EP6_OUT_END_EN ,Enable for bit 23 of EP6 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP6_OUT_OR_EN ,Enable for bit 22 of EP6 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP6_OUT_NAK_ERR_EN ,Enable for bit 21 of EP6 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP6_OUT_STALL_EN ,Enable for bit 20 of EP6 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP6_OUT_EN ,Enable for bit 19 of EP6 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP6_OUT_NULL_EN ,Enable for bit 18 of EP6 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP6_IN_END_EN ,Enable for bit 7 of EP6 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP6_IN_NAK_ERR_EN ,Enable for bit 5 of EP6 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP6_IN_STALL_EN ,Enable for bit 4 of EP6 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP6_IN_EN ,Enable for bit 3 of EP6 status register" "Disabled,Enabled" group.long 0x108++0x03 line.long 0x00 "EP7_INT_ENA,EP7 Interrupt Enable Register" bitfld.long 0x00 23. " EP7_OUT_END_EN ,Enable for bit 23 of EP7 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP7_OUT_OR_EN ,Enable for bit 22 of EP7 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP7_OUT_NAK_ERR_EN ,Enable for bit 21 of EP7 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP7_OUT_STALL_EN ,Enable for bit 20 of EP7 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP7_OUT_EN ,Enable for bit 19 of EP7 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP7_OUT_NULL_EN ,Enable for bit 18 of EP7 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP7_IN_END_EN ,Enable for bit 7 of EP7 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP7_IN_NAK_ERR_EN ,Enable for bit 5 of EP7 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP7_IN_STALL_EN ,Enable for bit 4 of EP7 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP7_IN_EN ,Enable for bit 3 of EP7 status register" "Disabled,Enabled" group.long 0x128++0x03 line.long 0x00 "EP8_INT_ENA,EP8 Interrupt Enable Register" bitfld.long 0x00 23. " EP8_OUT_END_EN ,Enable for bit 23 of EP8 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP8_OUT_OR_EN ,Enable for bit 22 of EP8 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP8_OUT_NAK_ERR_EN ,Enable for bit 21 of EP8 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP8_OUT_STALL_EN ,Enable for bit 20 of EP8 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP8_OUT_EN ,Enable for bit 19 of EP8 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP8_OUT_NULL_EN ,Enable for bit 18 of EP8 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP8_IN_END_EN ,Enable for bit 7 of EP8 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP8_IN_NAK_ERR_EN ,Enable for bit 5 of EP8 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP8_IN_STALL_EN ,Enable for bit 4 of EP8 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP8_IN_EN ,Enable for bit 3 of EP8 status register" "Disabled,Enabled" group.long 0x148++0x03 line.long 0x00 "EP9_INT_ENA,EP9 Interrupt Enable Register" bitfld.long 0x00 23. " EP9_OUT_END_EN ,Enable for bit 23 of EP9 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP9_OUT_OR_EN ,Enable for bit 22 of EP9 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP9_OUT_NAK_ERR_EN ,Enable for bit 21 of EP9 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP9_OUT_STALL_EN ,Enable for bit 20 of EP9 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP9_OUT_EN ,Enable for bit 19 of EP9 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP9_OUT_NULL_EN ,Enable for bit 18 of EP9 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP9_IN_END_EN ,Enable for bit 7 of EP9 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP9_IN_NAK_ERR_EN ,Enable for bit 5 of EP9 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP9_IN_STALL_EN ,Enable for bit 4 of EP9 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP9_IN_EN ,Enable for bit 3 of EP9 status register" "Disabled,Enabled" group.long 0x168++0x03 line.long 0x00 "EP10_INT_ENA,EP10 Interrupt Enable Register" bitfld.long 0x00 23. " EP10_OUT_END_EN ,Enable for bit 23 of EP10 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP10_OUT_OR_EN ,Enable for bit 22 of EP10 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP10_OUT_NAK_ERR_EN ,Enable for bit 21 of EP10 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP10_OUT_STALL_EN ,Enable for bit 20 of EP10 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP10_OUT_EN ,Enable for bit 19 of EP10 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP10_OUT_NULL_EN ,Enable for bit 18 of EP10 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP10_IN_END_EN ,Enable for bit 7 of EP10 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP10_IN_NAK_ERR_EN ,Enable for bit 5 of EP10 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP10_IN_STALL_EN ,Enable for bit 4 of EP10 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP10_IN_EN ,Enable for bit 3 of EP10 status register" "Disabled,Enabled" group.long 0x188++0x03 line.long 0x00 "EP11_INT_ENA,EP11 Interrupt Enable Register" bitfld.long 0x00 23. " EP11_OUT_END_EN ,Enable for bit 23 of EP11 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP11_OUT_OR_EN ,Enable for bit 22 of EP11 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP11_OUT_NAK_ERR_EN ,Enable for bit 21 of EP11 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP11_OUT_STALL_EN ,Enable for bit 20 of EP11 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP11_OUT_EN ,Enable for bit 19 of EP11 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP11_OUT_NULL_EN ,Enable for bit 18 of EP11 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP11_IN_END_EN ,Enable for bit 7 of EP11 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP11_IN_NAK_ERR_EN ,Enable for bit 5 of EP11 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP11_IN_STALL_EN ,Enable for bit 4 of EP11 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP11_IN_EN ,Enable for bit 3 of EP11 status register" "Disabled,Enabled" group.long 0x1A8++0x03 line.long 0x00 "EP12_INT_ENA,EP12 Interrupt Enable Register" bitfld.long 0x00 23. " EP12_OUT_END_EN ,Enable for bit 23 of EP12 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP12_OUT_OR_EN ,Enable for bit 22 of EP12 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP12_OUT_NAK_ERR_EN ,Enable for bit 21 of EP12 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP12_OUT_STALL_EN ,Enable for bit 20 of EP12 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP12_OUT_EN ,Enable for bit 19 of EP12 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP12_OUT_NULL_EN ,Enable for bit 18 of EP12 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP12_IN_END_EN ,Enable for bit 7 of EP12 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP12_IN_NAK_ERR_EN ,Enable for bit 5 of EP12 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP12_IN_STALL_EN ,Enable for bit 4 of EP12 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP12_IN_EN ,Enable for bit 3 of EP12 status register" "Disabled,Enabled" group.long 0x1C8++0x03 line.long 0x00 "EP13_INT_ENA,EP13 Interrupt Enable Register" bitfld.long 0x00 23. " EP13_OUT_END_EN ,Enable for bit 23 of EP13 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP13_OUT_OR_EN ,Enable for bit 22 of EP13 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP13_OUT_NAK_ERR_EN ,Enable for bit 21 of EP13 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP13_OUT_STALL_EN ,Enable for bit 20 of EP13 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP13_OUT_EN ,Enable for bit 19 of EP13 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP13_OUT_NULL_EN ,Enable for bit 18 of EP13 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP13_IN_END_EN ,Enable for bit 7 of EP13 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP13_IN_NAK_ERR_EN ,Enable for bit 5 of EP13 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP13_IN_STALL_EN ,Enable for bit 4 of EP13 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP13_IN_EN ,Enable for bit 3 of EP13 status register" "Disabled,Enabled" group.long 0x1E8++0x03 line.long 0x00 "EP14_INT_ENA,EP14 Interrupt Enable Register" bitfld.long 0x00 23. " EP14_OUT_END_EN ,Enable for bit 23 of EP14 Status register" "Disabled,Enabled" bitfld.long 0x00 22. " EP14_OUT_OR_EN ,Enable for bit 22 of EP14 Status register" "Disabled,Enabled" bitfld.long 0x00 21. " EP14_OUT_NAK_ERR_EN ,Enable for bit 21 of EP14 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EP14_OUT_STALL_EN ,Enable for bit 20 of EP14 status Register" "Disabled,Enabled" bitfld.long 0x00 19. " EP14_OUT_EN ,Enable for bit 19 of EP14 status register" "Disabled,Enabled" bitfld.long 0x00 18. " EP14_OUT_NULL_EN ,Enable for bit 18 of EP14 Status Register" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " EP14_IN_END_EN ,Enable for bit 7 of EP14 status register" "Disabled,Enabled" bitfld.long 0x00 5. " EP14_IN_NAK_ERR_EN ,Enable for bit 5 of EP14 status register" "Disabled,Enabled" bitfld.long 0x00 4. " EP14_IN_STALL_EN ,Enable for bit 4 of EP14 status register" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " EP14_IN_EN ,Enable for bit 3 of EP14 status register" "Disabled,Enabled" tree.end tree "EP_DMA_CTRL" if (((per.l(ad:0x4001E000+0x4C))&0x00000100)==0x00000100) group.long 0x4C++0x03 line.long 0x00 " EP1_DMA_CTRL,EP1 DMA Control Register" bitfld.long 0x00 11. " EP1_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP1_DEND_SET ,EP1_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP1_BURST_SET ,Clear EP1_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP1_STOP_SET ,Clear EP1_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP1_DMA_EN ,Endpoint1 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP1_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x4C++0x03 line.long 0x00 " EP1_DMA_CTRL,EP1 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP1_DEND_SET ,EP1_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP1_BURST_SET ,Clear EP1_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP1_STOP_SET ,Clear EP1_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP1_DMA_EN ,Endpoint1 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP1_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0x6C))&0x00000100)==0x00000100) group.long 0x6C++0x03 line.long 0x00 " EP2_DMA_CTRL,EP2 DMA Control Register" bitfld.long 0x00 11. " EP2_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP2_DEND_SET ,EP2_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP2_BURST_SET ,Clear EP2_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP2_STOP_SET ,Clear EP2_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP2_DMA_EN ,Endpoint2 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP2_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x6C++0x03 line.long 0x00 " EP2_DMA_CTRL,EP2 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP2_DEND_SET ,EP2_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP2_BURST_SET ,Clear EP2_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP2_STOP_SET ,Clear EP2_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP2_DMA_EN ,Endpoint2 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP2_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0x8C))&0x00000100)==0x00000100) group.long 0x8C++0x03 line.long 0x00 " EP3_DMA_CTRL,EP3 DMA Control Register" bitfld.long 0x00 11. " EP3_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP3_DEND_SET ,EP3_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP3_BURST_SET ,Clear EP3_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP3_STOP_SET ,Clear EP3_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP3_DMA_EN ,Endpoint3 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP3_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x8C++0x03 line.long 0x00 " EP3_DMA_CTRL,EP3 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP3_DEND_SET ,EP3_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP3_BURST_SET ,Clear EP3_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP3_STOP_SET ,Clear EP3_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP3_DMA_EN ,Endpoint3 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP3_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0xAC))&0x00000100)==0x00000100) group.long 0xAC++0x03 line.long 0x00 " EP4_DMA_CTRL,EP4 DMA Control Register" bitfld.long 0x00 11. " EP4_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP4_DEND_SET ,EP4_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP4_BURST_SET ,Clear EP4_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP4_STOP_SET ,Clear EP4_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP4_DMA_EN ,Endpoint4 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP4_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0xAC++0x03 line.long 0x00 " EP4_DMA_CTRL,EP4 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP4_DEND_SET ,EP4_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP4_BURST_SET ,Clear EP4_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP4_STOP_SET ,Clear EP4_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP4_DMA_EN ,Endpoint4 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP4_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0xCC))&0x00000100)==0x00000100) group.long 0xCC++0x03 line.long 0x00 " EP5_DMA_CTRL,EP5 DMA Control Register" bitfld.long 0x00 11. " EP5_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP5_DEND_SET ,EP5_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP5_BURST_SET ,Clear EP5_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP5_STOP_SET ,Clear EP5_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP5_DMA_EN ,Endpoint5 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP5_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0xCC++0x03 line.long 0x00 " EP5_DMA_CTRL,EP5 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP5_DEND_SET ,EP5_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP5_BURST_SET ,Clear EP5_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP5_STOP_SET ,Clear EP5_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP5_DMA_EN ,Endpoint5 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP5_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0xEC))&0x00000100)==0x00000100) group.long 0xEC++0x03 line.long 0x00 " EP6_DMA_CTRL,EP6 DMA Control Register" bitfld.long 0x00 11. " EP6_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP6_DEND_SET ,EP6_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP6_BURST_SET ,Clear EP6_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP6_STOP_SET ,Clear EP6_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP6_DMA_EN ,Endpoint6 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP6_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0xEC++0x03 line.long 0x00 " EP6_DMA_CTRL,EP6 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP6_DEND_SET ,EP6_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP6_BURST_SET ,Clear EP6_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP6_STOP_SET ,Clear EP6_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP6_DMA_EN ,Endpoint6 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP6_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0x10C))&0x00000100)==0x00000100) group.long 0x10C++0x03 line.long 0x00 " EP7_DMA_CTRL,EP7 DMA Control Register" bitfld.long 0x00 11. " EP7_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP7_DEND_SET ,EP7_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP7_BURST_SET ,Clear EP7_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP7_STOP_SET ,Clear EP7_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP7_DMA_EN ,Endpoint7 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP7_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x10C++0x03 line.long 0x00 " EP7_DMA_CTRL,EP7 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP7_DEND_SET ,EP7_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP7_BURST_SET ,Clear EP7_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP7_STOP_SET ,Clear EP7_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP7_DMA_EN ,Endpoint7 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP7_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0x12C))&0x00000100)==0x00000100) group.long 0x12C++0x03 line.long 0x00 " EP8_DMA_CTRL,EP8 DMA Control Register" bitfld.long 0x00 11. " EP8_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP8_DEND_SET ,EP8_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP8_BURST_SET ,Clear EP8_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP8_STOP_SET ,Clear EP8_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP8_DMA_EN ,Endpoint8 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP8_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x12C++0x03 line.long 0x00 " EP8_DMA_CTRL,EP8 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP8_DEND_SET ,EP8_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP8_BURST_SET ,Clear EP8_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP8_STOP_SET ,Clear EP8_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP8_DMA_EN ,Endpoint8 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP8_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0x14C))&0x00000100)==0x00000100) group.long 0x14C++0x03 line.long 0x00 " EP9_DMA_CTRL,EP9 DMA Control Register" bitfld.long 0x00 11. " EP9_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP9_DEND_SET ,EP9_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP9_BURST_SET ,Clear EP9_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP9_STOP_SET ,Clear EP9_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP9_DMA_EN ,Endpoint9 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP9_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x14C++0x03 line.long 0x00 " EP9_DMA_CTRL,EP9 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP9_DEND_SET ,EP9_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP9_BURST_SET ,Clear EP9_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP9_STOP_SET ,Clear EP9_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP9_DMA_EN ,Endpoint9 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP9_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0x16C))&0x00000100)==0x00000100) group.long 0x16C++0x03 line.long 0x00 " EP10_DMA_CTRL,EP10 DMA Control Register" bitfld.long 0x00 11. " EP10_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP10_DEND_SET ,EP10_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP10_BURST_SET ,Clear EP10_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP10_STOP_SET ,Clear EP10_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP10_DMA_EN ,Endpoint10 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP10_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x16C++0x03 line.long 0x00 " EP10_DMA_CTRL,EP10 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP10_DEND_SET ,EP10_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP10_BURST_SET ,Clear EP10_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP10_STOP_SET ,Clear EP10_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP10_DMA_EN ,Endpoint10 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP10_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0x18C))&0x00000100)==0x00000100) group.long 0x18C++0x03 line.long 0x00 " EP11_DMA_CTRL,EP11 DMA Control Register" bitfld.long 0x00 11. " EP11_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP11_DEND_SET ,EP11_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP11_BURST_SET ,Clear EP11_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP11_STOP_SET ,Clear EP11_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP11_DMA_EN ,Endpoint11 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP11_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x18C++0x03 line.long 0x00 " EP11_DMA_CTRL,EP11 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP11_DEND_SET ,EP11_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP11_BURST_SET ,Clear EP11_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP11_STOP_SET ,Clear EP11_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP11_DMA_EN ,Endpoint11 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP11_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0x1AC))&0x00000100)==0x00000100) group.long 0x1AC++0x03 line.long 0x00 " EP12_DMA_CTRL,EP12 DMA Control Register" bitfld.long 0x00 11. " EP12_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP12_DEND_SET ,EP12_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP12_BURST_SET ,Clear EP12_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP12_STOP_SET ,Clear EP12_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP12_DMA_EN ,Endpoint12 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP12_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x1AC++0x03 line.long 0x00 " EP12_DMA_CTRL,EP12 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP12_DEND_SET ,EP12_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP12_BURST_SET ,Clear EP12_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP12_STOP_SET ,Clear EP12_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP12_DMA_EN ,Endpoint12 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP12_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0x1CC))&0x00000100)==0x00000100) group.long 0x1CC++0x03 line.long 0x00 " EP13_DMA_CTRL,EP13 DMA Control Register" bitfld.long 0x00 11. " EP13_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP13_DEND_SET ,EP13_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP13_BURST_SET ,Clear EP13_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP13_STOP_SET ,Clear EP13_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP13_DMA_EN ,Endpoint13 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP13_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x1CC++0x03 line.long 0x00 " EP13_DMA_CTRL,EP13 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP13_DEND_SET ,EP13_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP13_BURST_SET ,Clear EP13_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP13_STOP_SET ,Clear EP13_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP13_DMA_EN ,Endpoint13 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP13_DMAMODE0 ,DMA mode select" ",Demand" endif if (((per.l(ad:0x4001E000+0x1EC))&0x00000100)==0x00000100) group.long 0x1EC++0x03 line.long 0x00 " EP14_DMA_CTRL,EP14 DMA Control Register" bitfld.long 0x00 11. " EP14_STOP_MODE ,DMA stop conditions setting" "DMA transfer completed,Ready to read" bitfld.long 0x00 10. " EP14_DEND_SET ,EP14_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP14_BURST_SET ,Clear EP14_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP14_STOP_SET ,Clear EP14_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP14_DMA_EN ,Endpoint14 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP14_DMAMODE0 ,DMA mode select" ",Demand" else group.long 0x1EC++0x03 line.long 0x00 " EP14_DMA_CTRL,EP14 DMA Control Register" textfld " " bitfld.long 0x00 10. " EP14_DEND_SET ,EP14_DEND automatic state" "Disabled,Enabled" bitfld.long 0x00 9. " EP14_BURST_SET ,Clear EP14_DMA_EN automatically" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " EP14_STOP_SET ,Clear EP14_DMA_EN and send DMA completion notice to AHB-EPC bridge" ",Enabled" bitfld.long 0x00 4. " EP14_DMA_EN ,Endpoint14 DMA enable" "Not used,Used" bitfld.long 0x00 0. " EP14_DMAMODE0 ,DMA mode select" ",Demand" endif tree.end tree "EP_PCKT_ADRS" group.long 0x50++0x03 line.long 0x00 "EP1_PCKT_ADRS,EP1 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP1_BASEAD ,Base address RAM mapping for Endpoint1" hexmask.long.word 0x00 0.--10. 1. " EP1_MPKT ,MaxPacketSize for Endpoint1" group.long 0x70++0x03 line.long 0x00 "EP2_PCKT_ADRS,EP2 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP2_BASEAD ,Base address RAM mapping for Endpoint2" hexmask.long.word 0x00 0.--10. 1. " EP2_MPKT ,MaxPacketSize for Endpoint2" group.long 0x90++0x03 line.long 0x00 "EP3_PCKT_ADRS,EP3 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP3_BASEAD ,Base address RAM mapping for Endpoint3" hexmask.long.word 0x00 0.--10. 1. " EP3_MPKT ,MaxPacketSize for Endpoint3" group.long 0xB0++0x03 line.long 0x00 "EP4_PCKT_ADRS,EP4 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP4_BASEAD ,Base address RAM mapping for Endpoint4" hexmask.long.word 0x00 0.--10. 1. " EP4_MPKT ,MaxPacketSize for Endpoint4" group.long 0xD0++0x03 line.long 0x00 "EP5_PCKT_ADRS,EP5 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP5_BASEAD ,Base address RAM mapping for Endpoint5" hexmask.long.word 0x00 0.--10. 1. " EP5_MPKT ,MaxPacketSize for Endpoint5" group.long 0xF0++0x03 line.long 0x00 "EP6_PCKT_ADRS,EP6 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP6_BASEAD ,Base address RAM mapping for Endpoint6" hexmask.long.word 0x00 0.--10. 1. " EP6_MPKT ,MaxPacketSize for Endpoint6" group.long 0x110++0x03 line.long 0x00 "EP7_PCKT_ADRS,EP7 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP7_BASEAD ,Base address RAM mapping for Endpoint7" hexmask.long.word 0x00 0.--10. 1. " EP7_MPKT ,MaxPacketSize for Endpoint7" group.long 0x130++0x03 line.long 0x00 "EP8_PCKT_ADRS,EP8 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP8_BASEAD ,Base address RAM mapping for Endpoint8" hexmask.long.word 0x00 0.--10. 1. " EP8_MPKT ,MaxPacketSize for Endpoint8" group.long 0x150++0x03 line.long 0x00 "EP9_PCKT_ADRS,EP9 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP9_BASEAD ,Base address RAM mapping for Endpoint9" hexmask.long.word 0x00 0.--10. 1. " EP9_MPKT ,MaxPacketSize for Endpoint9" group.long 0x170++0x03 line.long 0x00 "EP10_PCKT_ADRS,EP10 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP10_BASEAD ,Base address RAM mapping for Endpoint10" hexmask.long.word 0x00 0.--10. 1. " EP10_MPKT ,MaxPacketSize for Endpoint10" group.long 0x190++0x03 line.long 0x00 "EP11_PCKT_ADRS,EP11 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP11_BASEAD ,Base address RAM mapping for Endpoint11" hexmask.long.word 0x00 0.--10. 1. " EP11_MPKT ,MaxPacketSize for Endpoint11" group.long 0x1B0++0x03 line.long 0x00 "EP12_PCKT_ADRS,EP12 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP12_BASEAD ,Base address RAM mapping for Endpoint12" hexmask.long.word 0x00 0.--10. 1. " EP12_MPKT ,MaxPacketSize for Endpoint12" group.long 0x1D0++0x03 line.long 0x00 "EP13_PCKT_ADRS,EP13 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP13_BASEAD ,Base address RAM mapping for Endpoint13" hexmask.long.word 0x00 0.--10. 1. " EP13_MPKT ,MaxPacketSize for Endpoint13" group.long 0x1F0++0x03 line.long 0x00 "EP14_PCKT_ADRS,EP14 MaxPacket & BaseAddress Register" hexmask.long.byte 0x00 16.--28. 0x01 " EP14_BASEAD ,Base address RAM mapping for Endpoint14" hexmask.long.word 0x00 0.--10. 1. " EP14_MPKT ,MaxPacketSize for Endpoint14" tree.end tree "EP_LEN_DCNT" group.long 0x54++0x03 line.long 0x00 "EP1_LEN_DCNT,EP1 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP1_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP1_LDATA ,Number of readable bytes stored in the EP1 read Register" group.long 0x74++0x03 line.long 0x00 "EP2_LEN_DCNT,EP2 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP2_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP2_LDATA ,Number of readable bytes stored in the EP2 read Register" group.long 0x94++0x03 line.long 0x00 "EP3_LEN_DCNT,EP3 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP3_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP3_LDATA ,Number of readable bytes stored in the EP3 read Register" group.long 0xB4++0x03 line.long 0x00 "EP4_LEN_DCNT,EP4 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP4_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP4_LDATA ,Number of readable bytes stored in the EP4 read Register" group.long 0xD4++0x03 line.long 0x00 "EP5_LEN_DCNT,EP5 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP5_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP5_LDATA ,Number of readable bytes stored in the EP5 read Register" group.long 0xF4++0x03 line.long 0x00 "EP6_LEN_DCNT,EP6 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP6_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP6_LDATA ,Number of readable bytes stored in the EP6 read Register" group.long 0x114++0x03 line.long 0x00 "EP7_LEN_DCNT,EP7 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP7_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP7_LDATA ,Number of readable bytes stored in the EP7 read Register" group.long 0x134++0x03 line.long 0x00 "EP8_LEN_DCNT,EP8 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP8_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP8_LDATA ,Number of readable bytes stored in the EP8 read Register" group.long 0x154++0x03 line.long 0x00 "EP9_LEN_DCNT,EP9 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP9_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP9_LDATA ,Number of readable bytes stored in the EP9 read Register" group.long 0x174++0x03 line.long 0x00 "EP10_LEN_DCNT,EP10 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP10_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP10_LDATA ,Number of readable bytes stored in the EP10 read Register" group.long 0x194++0x03 line.long 0x00 "EP11_LEN_DCNT,EP11 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP11_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP11_LDATA ,Number of readable bytes stored in the EP11 read Register" group.long 0x1B4++0x03 line.long 0x00 "EP12_LEN_DCNT,EP12 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP12_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP12_LDATA ,Number of readable bytes stored in the EP12 read Register" group.long 0x1D4++0x03 line.long 0x00 "EP13_LEN_DCNT,EP13 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP13_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP13_LDATA ,Number of readable bytes stored in the EP13 read Register" group.long 0x1F4++0x03 line.long 0x00 "EP14_LEN_DCNT,EP14 Length & DMA Count Register" hexmask.long.word 0x00 16.--24. 0x01 " EP14_DMACNT ,Arbitrary number of DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP14_LDATA ,Number of readable bytes stored in the EP14 read Register" tree.end tree "EP_READ" rgroup.long 0x58++0x03 line.long 0x00 "EP1_READ,EP1 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP1_RDATA4 ,Endpoint1 received data" hexmask.long.byte 0x00 16.--23. 1. " EP1_RDATA3 ,Endpoint1 received data" hexmask.long.byte 0x00 8.--15. 1. " EP1_RDATA2 ,Endpoint1 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP1_RDATA1 ,Endpoint1 received data" rgroup.long 0x78++0x03 line.long 0x00 "EP2_READ,EP2 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP2_RDATA4 ,Endpoint2 received data" hexmask.long.byte 0x00 16.--23. 1. " EP2_RDATA3 ,Endpoint2 received data" hexmask.long.byte 0x00 8.--15. 1. " EP2_RDATA2 ,Endpoint2 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP2_RDATA1 ,Endpoint2 received data" rgroup.long 0x98++0x03 line.long 0x00 "EP3_READ,EP3 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP3_RDATA4 ,Endpoint3 received data" hexmask.long.byte 0x00 16.--23. 1. " EP3_RDATA3 ,Endpoint3 received data" hexmask.long.byte 0x00 8.--15. 1. " EP3_RDATA2 ,Endpoint3 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP3_RDATA1 ,Endpoint3 received data" rgroup.long 0xB8++0x03 line.long 0x00 "EP4_READ,EP4 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP4_RDATA4 ,Endpoint4 received data" hexmask.long.byte 0x00 16.--23. 1. " EP4_RDATA3 ,Endpoint4 received data" hexmask.long.byte 0x00 8.--15. 1. " EP4_RDATA2 ,Endpoint4 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP4_RDATA1 ,Endpoint4 received data" rgroup.long 0xD8++0x03 line.long 0x00 "EP5_READ,EP5 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP5_RDATA4 ,Endpoint5 received data" hexmask.long.byte 0x00 16.--23. 1. " EP5_RDATA3 ,Endpoint5 received data" hexmask.long.byte 0x00 8.--15. 1. " EP5_RDATA2 ,Endpoint5 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP5_RDATA1 ,Endpoint5 received data" rgroup.long 0xF8++0x03 line.long 0x00 "EP6_READ,EP6 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP6_RDATA4 ,Endpoint6 received data" hexmask.long.byte 0x00 16.--23. 1. " EP6_RDATA3 ,Endpoint6 received data" hexmask.long.byte 0x00 8.--15. 1. " EP6_RDATA2 ,Endpoint6 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP6_RDATA1 ,Endpoint6 received data" rgroup.long 0x118++0x03 line.long 0x00 "EP7_READ,EP7 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP7_RDATA4 ,Endpoint7 received data" hexmask.long.byte 0x00 16.--23. 1. " EP7_RDATA3 ,Endpoint7 received data" hexmask.long.byte 0x00 8.--15. 1. " EP7_RDATA2 ,Endpoint7 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP7_RDATA1 ,Endpoint7 received data" rgroup.long 0x138++0x03 line.long 0x00 "EP8_READ,EP8 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP8_RDATA4 ,Endpoint8 received data" hexmask.long.byte 0x00 16.--23. 1. " EP8_RDATA3 ,Endpoint8 received data" hexmask.long.byte 0x00 8.--15. 1. " EP8_RDATA2 ,Endpoint8 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP8_RDATA1 ,Endpoint8 received data" rgroup.long 0x158++0x03 line.long 0x00 "EP9_READ,EP9 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP9_RDATA4 ,Endpoint9 received data" hexmask.long.byte 0x00 16.--23. 1. " EP9_RDATA3 ,Endpoint9 received data" hexmask.long.byte 0x00 8.--15. 1. " EP9_RDATA2 ,Endpoint9 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP9_RDATA1 ,Endpoint9 received data" rgroup.long 0x178++0x03 line.long 0x00 "EP10_READ,EP10 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP10_RDATA4 ,Endpoint10 received data" hexmask.long.byte 0x00 16.--23. 1. " EP10_RDATA3 ,Endpoint10 received data" hexmask.long.byte 0x00 8.--15. 1. " EP10_RDATA2 ,Endpoint10 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP10_RDATA1 ,Endpoint10 received data" rgroup.long 0x198++0x03 line.long 0x00 "EP11_READ,EP11 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP11_RDATA4 ,Endpoint11 received data" hexmask.long.byte 0x00 16.--23. 1. " EP11_RDATA3 ,Endpoint11 received data" hexmask.long.byte 0x00 8.--15. 1. " EP11_RDATA2 ,Endpoint11 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP11_RDATA1 ,Endpoint11 received data" rgroup.long 0x1B8++0x03 line.long 0x00 "EP12_READ,EP12 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP12_RDATA4 ,Endpoint12 received data" hexmask.long.byte 0x00 16.--23. 1. " EP12_RDATA3 ,Endpoint12 received data" hexmask.long.byte 0x00 8.--15. 1. " EP12_RDATA2 ,Endpoint12 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP12_RDATA1 ,Endpoint12 received data" rgroup.long 0x1D8++0x03 line.long 0x00 "EP13_READ,EP13 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP13_RDATA4 ,Endpoint13 received data" hexmask.long.byte 0x00 16.--23. 1. " EP13_RDATA3 ,Endpoint13 received data" hexmask.long.byte 0x00 8.--15. 1. " EP13_RDATA2 ,Endpoint13 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP13_RDATA1 ,Endpoint13 received data" rgroup.long 0x1F8++0x03 line.long 0x00 "EP14_READ,EP14 Read Register" hexmask.long.byte 0x00 24.--31. 1. " EP14_RDATA4 ,Endpoint14 received data" hexmask.long.byte 0x00 16.--23. 1. " EP14_RDATA3 ,Endpoint14 received data" hexmask.long.byte 0x00 8.--15. 1. " EP14_RDATA2 ,Endpoint14 received data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP14_RDATA1 ,Endpoint14 received data" tree.end tree "EP_WRITE" wgroup.long 0x5C++0x03 line.long 0x00 "EP1_WRITE,EP1 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP1_WDATA4 ,Endpoint1 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP1_WDATA3 ,Endpoint1 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP1_WDATA2 ,Endpoint1 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP1_WDATA1 ,Endpoint1 transmit data" wgroup.long 0x7C++0x03 line.long 0x00 "EP2_WRITE,EP2 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP2_WDATA4 ,Endpoint2 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP2_WDATA3 ,Endpoint2 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP2_WDATA2 ,Endpoint2 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP2_WDATA1 ,Endpoint2 transmit data" wgroup.long 0x9C++0x03 line.long 0x00 "EP3_WRITE,EP3 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP3_WDATA4 ,Endpoint3 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP3_WDATA3 ,Endpoint3 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP3_WDATA2 ,Endpoint3 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP3_WDATA1 ,Endpoint3 transmit data" wgroup.long 0xBC++0x03 line.long 0x00 "EP4_WRITE,EP4 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP4_WDATA4 ,Endpoint4 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP4_WDATA3 ,Endpoint4 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP4_WDATA2 ,Endpoint4 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP4_WDATA1 ,Endpoint4 transmit data" wgroup.long 0xDC++0x03 line.long 0x00 "EP5_WRITE,EP5 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP5_WDATA4 ,Endpoint5 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP5_WDATA3 ,Endpoint5 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP5_WDATA2 ,Endpoint5 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP5_WDATA1 ,Endpoint5 transmit data" wgroup.long 0xFC++0x03 line.long 0x00 "EP6_WRITE,EP6 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP6_WDATA4 ,Endpoint6 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP6_WDATA3 ,Endpoint6 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP6_WDATA2 ,Endpoint6 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP6_WDATA1 ,Endpoint6 transmit data" wgroup.long 0x11C++0x03 line.long 0x00 "EP7_WRITE,EP7 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP7_WDATA4 ,Endpoint7 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP7_WDATA3 ,Endpoint7 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP7_WDATA2 ,Endpoint7 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP7_WDATA1 ,Endpoint7 transmit data" wgroup.long 0x13C++0x03 line.long 0x00 "EP8_WRITE,EP8 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP8_WDATA4 ,Endpoint8 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP8_WDATA3 ,Endpoint8 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP8_WDATA2 ,Endpoint8 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP8_WDATA1 ,Endpoint8 transmit data" wgroup.long 0x15C++0x03 line.long 0x00 "EP9_WRITE,EP9 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP9_WDATA4 ,Endpoint9 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP9_WDATA3 ,Endpoint9 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP9_WDATA2 ,Endpoint9 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP9_WDATA1 ,Endpoint9 transmit data" wgroup.long 0x17C++0x03 line.long 0x00 "EP10_WRITE,EP10 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP10_WDATA4 ,Endpoint10 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP10_WDATA3 ,Endpoint10 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP10_WDATA2 ,Endpoint10 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP10_WDATA1 ,Endpoint10 transmit data" wgroup.long 0x19C++0x03 line.long 0x00 "EP11_WRITE,EP11 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP11_WDATA4 ,Endpoint11 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP11_WDATA3 ,Endpoint11 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP11_WDATA2 ,Endpoint11 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP11_WDATA1 ,Endpoint11 transmit data" wgroup.long 0x1BC++0x03 line.long 0x00 "EP12_WRITE,EP12 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP12_WDATA4 ,Endpoint12 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP12_WDATA3 ,Endpoint12 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP12_WDATA2 ,Endpoint12 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP12_WDATA1 ,Endpoint12 transmit data" wgroup.long 0x1DC++0x03 line.long 0x00 "EP13_WRITE,EP13 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP13_WDATA4 ,Endpoint13 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP13_WDATA3 ,Endpoint13 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP13_WDATA2 ,Endpoint13 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP13_WDATA1 ,Endpoint13 transmit data" wgroup.long 0x1FC++0x03 line.long 0x00 "EP14_WRITE,EP14 Write Register" hexmask.long.byte 0x00 24.--31. 1. " EP14_WDATA4 ,Endpoint14 transmit data" hexmask.long.byte 0x00 16.--23. 1. " EP14_WDATA3 ,Endpoint14 transmit data" hexmask.long.byte 0x00 8.--15. 1. " EP14_WDATA2 ,Endpoint14 transmit data" textline " " hexmask.long.byte 0x00 0.--7. 1. " EP14_WDATA1 ,Endpoint14 transmit data" tree.end width 0x0B tree.end tree "AHB-EPC" base ad:0x4001F000 width 19. group.long 0x00++0x13 line.long 0x00 "AHBSCTR,AHB Slave Controller Configuration Register" bitfld.long 0x00 0. " WAIT_MODE ,Wait behavior control setting for AHB slave" ",By HREADY" line.long 0x04 "AHBMCTR,AHB Master Controller Configuration Register" bitfld.long 0x04 31. " ARBITER_CTR ,Arbitration type for the Endpoint which uses DMA transfer" "RoundRobin priority,Fixed priority" bitfld.long 0x04 8.--9. " ENDIAN_CTR ,Data conversion type during DMA transfer" "Little endian,?..." bitfld.long 0x04 2. " WBURST_TYPE ,Variable-length burst use condition for AHB master write" ",NCR4/8/16 + INCR for 2 to 3 burst" line.long 0x08 "AHBBINT,AHB-EPC Bridge Interrupt Source Register" eventfld.long 0x08 31. " DMA_ENDINT_EP[15] ,DMA transfer for Endpoint15" "Not completed,Completed" eventfld.long 0x08 30. " [14] ,DMA transfer for Endpoint14" "Not completed,Completed" eventfld.long 0x08 29. " [13] ,DMA transfer for Endpoint13" "Not completed,Completed" textline " " eventfld.long 0x08 28. " [12] ,DMA transfer for Endpoint12" "Not completed,Completed" eventfld.long 0x08 27. " [11] ,DMA transfer for Endpoint11" "Not completed,Completed" eventfld.long 0x08 26. " [10] ,DMA transfer for Endpoint10" "Not completed,Completed" textline " " eventfld.long 0x08 25. " [9] ,DMA transfer for Endpoint9" "Not completed,Completed" eventfld.long 0x08 24. " [8] ,DMA transfer for Endpoint8" "Not completed,Completed" eventfld.long 0x08 23. " [7] ,DMA transfer for Endpoint7" "Not completed,Completed" textline " " eventfld.long 0x08 22. " [6] ,DMA transfer for Endpoint6" "Not completed,Completed" eventfld.long 0x08 21. " [5] ,DMA transfer for Endpoint5" "Not completed,Completed" eventfld.long 0x08 20. " [4] ,DMA transfer for Endpoint4" "Not completed,Completed" textline " " eventfld.long 0x08 19. " [3] ,DMA transfer for Endpoint3" "Not completed,Completed" eventfld.long 0x08 18. " [2] ,DMA transfer for Endpoint2" "Not completed,Completed" eventfld.long 0x08 17. " [1] ,DMA transfer for Endpoint1" "Not completed,Completed" textline " " eventfld.long 0x08 13. " VBUS_INT ,VBUS signal level change" "Not changed,Changed" eventfld.long 0x08 6. " MBUS_ERRINT ,AHB master error response" "Not received,Received" eventfld.long 0x08 4. " SBUS_ERRINT0 ,AHB slave error response for over 32 bit access" "Not occurred,Occurred" textline " " rbitfld.long 0x08 0.--3. " ERR_MASTER ,Master number at error response" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "AHBBINTEN,AHB-EPC Bridge Interrupt Enable Register" bitfld.long 0x0C 31. " DMA_ENDINTEN_EP[15] ,Enable for DMA_ENDINT_EP15 of AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 30. " [14] ,Enable for DMA_ENDINT_EP14 of AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 29. " [13] ,Enable for DMA_ENDINT_EP13 of AHBBINT register" "Disabled,Enabled" textline " " bitfld.long 0x0C 28. " [12] ,Enable for DMA_ENDINT_EP12 of AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 27. " [11] ,Enable for DMA_ENDINT_EP11 of AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 26. " [10] ,Enable for DMA_ENDINT_EP10 of AHBBINT register" "Disabled,Enabled" textline " " bitfld.long 0x0C 25. " [9] ,Enable for DMA_ENDINT_EP9 of AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 24. " [8] ,Enable for DMA_ENDINT_EP8 of AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 23. " [7] ,Enable for DMA_ENDINT_EP7 of AHBBINT register" "Disabled,Enabled" textline " " bitfld.long 0x0C 22. " [6] ,Enable for DMA_ENDINT_EP6 of AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 21. " [5] ,Enable for DMA_ENDINT_EP5 of AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 20. " [4] ,Enable for DMA_ENDINT_EP4 of AHBBINT register" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " [3] ,Enable for DMA_ENDINT_EP3 of AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 18. " [2] ,Enable for DMA_ENDINT_EP3 of AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 17. " [1] ,Enable for DMA_ENDINT_EP1 of AHBBINT register" "Disabled,Enabled" textline " " bitfld.long 0x0C 13. " VBUS_INTEN ,Enable for VBUS_INT of the AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 6. " MBUS_ERRINTEN ,Enable MBUS_ERRINT of the AHBBINT register" "Disabled,Enabled" bitfld.long 0x0C 4. " SBUS_ERRINT0EN ,Enable SBUS_ERRINT0 of the AHBBINT register" "Disabled,Enabled" line.long 0x10 "EPCTR,EPC and Transceiver Control Register" bitfld.long 0x10 12. " DIRPD ,USB subsystem power-down state" "Disabled,Enabled" rbitfld.long 0x10 8. " VBUS_LEVEL ,Status of the VBUS input pin" "0,1" bitfld.long 0x10 5. " PLL_RESUME ,Resume clock supply" "Disabled,Enabled" textline " " rbitfld.long 0x10 4. " PLL_LOCK ,USBPLL lock status" "Not locked,Locked" bitfld.long 0x10 2. " PLL_RST ,Reset of USBPLL" "No reset,Reset" bitfld.long 0x10 1. " EPC_RST ,Reset of EPC bloc" "No reset,Reset" rgroup.long 0x20++0x07 line.long 0x00 "USBSSVER,USBf Version Register" hexmask.long.byte 0x00 16.--23. 1. " AHBB_VER ,AHB bridge version" hexmask.long.byte 0x00 8.--15. 1. " EPC_VER ,EPC version" hexmask.long.byte 0x00 0.--7. 1. " SS_VER ,USB function controller version" line.long 0x04 "USBSSCONF,Endpoint Configuration Register" bitfld.long 0x04 31. " EP_AVAILABLE[15] ,Implement Endpoint 15 module" "Not available,Available" bitfld.long 0x04 30. " [14] ,Implement Endpoint 14 module" "Not available,Available" bitfld.long 0x04 29. " [13] ,Implement Endpoint 13 module" "Not available,Available" newline bitfld.long 0x04 28. " [12] ,Implement Endpoint 12 module" "Not available,Available" bitfld.long 0x04 27. " [11] ,Implement Endpoint 11 module" "Not available,Available" bitfld.long 0x04 26. " [10] ,Implement Endpoint 10 module" "Not available,Available" newline bitfld.long 0x04 25. " [9] ,Implement Endpoint 9 module" "Not available,Available" bitfld.long 0x04 24. " [8] ,Implement Endpoint 7 module" "Not available,Available" bitfld.long 0x04 23. " [7] ,Implement Endpoint 7 module" "Not available,Available" newline bitfld.long 0x04 22. " [6] ,Implement Endpoint 6 module" "Not available,Available" bitfld.long 0x04 21. " [5] ,Implement Endpoint 5 module" "Not available,Available" bitfld.long 0x04 20. " [4] ,Implement Endpoint 4 module" "Not available,Available" newline bitfld.long 0x04 19. " [3] ,Implement Endpoint 3 module" "Not available,Available" bitfld.long 0x04 18. " [2] ,Implement Endpoint 2 module" "Not available,Available" newline bitfld.long 0x04 17. " [1] ,Implement Endpoint 1 module" "Not available,Available" bitfld.long 0x04 16. " [0] ,Implement Endpoint 0 module" "Not available,Available" newline bitfld.long 0x04 15. " DMA_AVAILABLE[15] ,Endpoint 15 that can be used for DMA transfers" "Not available,Available" bitfld.long 0x04 14. " [14] ,Endpoint 14 that can be used for DMA transfers" "Not available,Available" bitfld.long 0x04 13. " [13] ,Endpoint 13 that can be used for DMA transfers" "Not available,Available" newline bitfld.long 0x04 12. " [12] ,Endpoint 12 that can be used for DMA transfers" "Not available,Available" bitfld.long 0x04 11. " [11] ,Endpoint 11 that can be used for DMA transfers" "Not available,Available" bitfld.long 0x04 10. " [10] ,Endpoint 10 that can be used for DMA transfers" "Not available,Available" newline bitfld.long 0x04 9. " [9] ,Endpoint 9 that can be used for DMA transfers" "Not available,Available" bitfld.long 0x04 8. " [8] ,Endpoint 8 that can be used for DMA transfers" "Not available,Available" bitfld.long 0x04 7. " [7] ,Endpoint 7 that can be used for DMA transfers" "Not available,Available" newline bitfld.long 0x04 6. " [6] ,Endpoint 6 that can be used for DMA transfers" "Not available,Available" bitfld.long 0x04 5. " [5] ,Endpoint 5 that can be used for DMA transfers" "Not available,Available" bitfld.long 0x04 4. " [4] ,Endpoint 4 that can be used for DMA transfers" "Not available,Available" newline bitfld.long 0x04 3. " [3] ,Endpoint 3 that can be used for DMA transfers" "Not available,Available" bitfld.long 0x04 2. " [2] ,Endpoint 2 that can be used for DMA transfers" "Not available,Available" newline bitfld.long 0x04 1. " [1] ,Endpoint 1 that can be used for DMA transfers" "Not available,Available" bitfld.long 0x04 0. " [0] ,Endpoint 0 that can be used for DMA transfers" "Not available,?..." if (((per.l(ad:0x4001F000+0x110))&0x00000001)==0x00000001) group.long 0x110++0x03 line.long 0x00 "EP1DCR1,Endpoint1 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP1_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP1_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP1_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x110++0x03 line.long 0x00 "EP1DCR1,Endpoint1 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP1_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP1_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP1_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x120))&0x00000001)==0x00000001) group.long 0x120++0x03 line.long 0x00 "EP2DCR1,Endpoint2 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP2_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP2_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP2_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x120++0x03 line.long 0x00 "EP2DCR1,Endpoint2 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP2_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP2_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP2_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x130))&0x00000001)==0x00000001) group.long 0x130++0x03 line.long 0x00 "EP3DCR1,Endpoint3 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP3_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP3_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP3_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x130++0x03 line.long 0x00 "EP3DCR1,Endpoint3 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP3_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP3_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP3_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x140))&0x00000001)==0x00000001) group.long 0x140++0x03 line.long 0x00 "EP4DCR1,Endpoint4 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP4_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP4_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP4_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x140++0x03 line.long 0x00 "EP4DCR1,Endpoint4 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP4_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP4_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP4_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x150))&0x00000001)==0x00000001) group.long 0x150++0x03 line.long 0x00 "EP5DCR1,Endpoint5 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP5_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP5_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP5_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x150++0x03 line.long 0x00 "EP5DCR1,Endpoint5 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP5_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP5_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP5_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x160))&0x00000001)==0x00000001) group.long 0x160++0x03 line.long 0x00 "EP6DCR1,Endpoint6 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP6_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP6_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP6_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x160++0x03 line.long 0x00 "EP6DCR1,Endpoint6 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP6_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP6_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP6_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x170))&0x00000001)==0x00000001) group.long 0x170++0x03 line.long 0x00 "EP7DCR1,Endpoint7 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP7_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP7_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP7_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x170++0x03 line.long 0x00 "EP7DCR1,Endpoint7 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP7_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP7_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP7_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x180))&0x00000001)==0x00000001) group.long 0x180++0x03 line.long 0x00 "EP8DCR1,Endpoint8 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP8_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP8_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP8_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x180++0x03 line.long 0x00 "EP8DCR1,Endpoint8 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP8_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP8_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP8_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x190))&0x00000001)==0x00000001) group.long 0x190++0x03 line.long 0x00 "EP9DCR1,Endpoint9 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP9_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP9_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP9_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x190++0x03 line.long 0x00 "EP9DCR1,Endpoint9 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP9_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP9_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP9_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x1A0))&0x00000001)==0x00000001) group.long 0x1A0++0x03 line.long 0x00 "EP10DCR1,Endpoint10 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP10_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP10_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP10_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x1A0++0x03 line.long 0x00 "EP10DCR1,Endpoint10 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP10_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP10_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP10_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x1B0))&0x00000001)==0x00000001) group.long 0x1B0++0x03 line.long 0x00 "EP11DCR1,Endpoint11 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP11_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP11_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP11_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x1B0++0x03 line.long 0x00 "EP11DCR1,Endpoint11 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP11_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP11_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP11_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x1C0))&0x00000001)==0x00000001) group.long 0x1C0++0x03 line.long 0x00 "EP12DCR1,Endpoint12 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP12_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP12_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP12_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x1C0++0x03 line.long 0x00 "EP12DCR1,Endpoint12 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP12_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP12_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP12_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x1D0))&0x00000001)==0x00000001) group.long 0x1D0++0x03 line.long 0x00 "EP13DCR1,Endpoint13 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP13_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP13_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP13_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x1D0++0x03 line.long 0x00 "EP13DCR1,Endpoint13 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP13_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP13_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP13_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x1E0))&0x00000001)==0x00000001) group.long 0x1E0++0x03 line.long 0x00 "EP14DCR1,Endpoint14 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP14_DMACNT ,Number of packets in DMA transfer" rbitfld.long 0x00 1. " EP14_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP14_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" else group.long 0x1E0++0x03 line.long 0x00 "EP14DCR1,Endpoint14 DMA Setting Register1" hexmask.long.byte 0x00 16.--23. 1. " EP14_DMACNT ,Number of packets in DMA transfer" bitfld.long 0x00 1. " EP14_DIR0 ,DMA direction setting" "IN,OUT" bitfld.long 0x00 0. " EP14_REQEN ,Setting for DMA transfer requests from EPC" "Ignored,Permitted" endif if (((per.l(ad:0x4001F000+0x114-0x04))&0x00000001)==0x00000001) rgroup.long 0x114++0x03 line.long 0x00 "EP1DCR2,Endpoint1 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP1_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP1_MPKT ,Maximum packet size of endpoint1" else group.long 0x114++0x03 line.long 0x00 "EP1DCR2,Endpoint1 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP1_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP1_MPKT ,Maximum packet size of endpoint1" endif if (((per.l(ad:0x4001F000+0x124-0x04))&0x00000001)==0x00000001) rgroup.long 0x124++0x03 line.long 0x00 "EP2DCR2,Endpoint2 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP2_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP2_MPKT ,Maximum packet size of endpoint2" else group.long 0x124++0x03 line.long 0x00 "EP2DCR2,Endpoint2 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP2_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP2_MPKT ,Maximum packet size of endpoint2" endif if (((per.l(ad:0x4001F000+0x134-0x04))&0x00000001)==0x00000001) rgroup.long 0x134++0x03 line.long 0x00 "EP3DCR2,Endpoint3 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP3_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP3_MPKT ,Maximum packet size of endpoint3" else group.long 0x134++0x03 line.long 0x00 "EP3DCR2,Endpoint3 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP3_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP3_MPKT ,Maximum packet size of endpoint3" endif if (((per.l(ad:0x4001F000+0x144-0x04))&0x00000001)==0x00000001) rgroup.long 0x144++0x03 line.long 0x00 "EP4DCR2,Endpoint4 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP4_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP4_MPKT ,Maximum packet size of endpoint4" else group.long 0x144++0x03 line.long 0x00 "EP4DCR2,Endpoint4 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP4_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP4_MPKT ,Maximum packet size of endpoint4" endif if (((per.l(ad:0x4001F000+0x154-0x04))&0x00000001)==0x00000001) rgroup.long 0x154++0x03 line.long 0x00 "EP5DCR2,Endpoint5 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP5_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP5_MPKT ,Maximum packet size of endpoint5" else group.long 0x154++0x03 line.long 0x00 "EP5DCR2,Endpoint5 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP5_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP5_MPKT ,Maximum packet size of endpoint5" endif if (((per.l(ad:0x4001F000+0x164-0x04))&0x00000001)==0x00000001) rgroup.long 0x164++0x03 line.long 0x00 "EP6DCR2,Endpoint6 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP6_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP6_MPKT ,Maximum packet size of endpoint6" else group.long 0x164++0x03 line.long 0x00 "EP6DCR2,Endpoint6 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP6_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP6_MPKT ,Maximum packet size of endpoint6" endif if (((per.l(ad:0x4001F000+0x174-0x04))&0x00000001)==0x00000001) rgroup.long 0x174++0x03 line.long 0x00 "EP7DCR2,Endpoint7 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP7_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP7_MPKT ,Maximum packet size of endpoint7" else group.long 0x174++0x03 line.long 0x00 "EP7DCR2,Endpoint7 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP7_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP7_MPKT ,Maximum packet size of endpoint7" endif if (((per.l(ad:0x4001F000+0x184-0x04))&0x00000001)==0x00000001) rgroup.long 0x184++0x03 line.long 0x00 "EP8DCR2,Endpoint8 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP8_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP8_MPKT ,Maximum packet size of endpoint8" else group.long 0x184++0x03 line.long 0x00 "EP8DCR2,Endpoint8 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP8_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP8_MPKT ,Maximum packet size of endpoint8" endif if (((per.l(ad:0x4001F000+0x194-0x04))&0x00000001)==0x00000001) rgroup.long 0x194++0x03 line.long 0x00 "EP9DCR2,Endpoint9 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP9_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP9_MPKT ,Maximum packet size of endpoint9" else group.long 0x194++0x03 line.long 0x00 "EP9DCR2,Endpoint9 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP9_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP9_MPKT ,Maximum packet size of endpoint9" endif if (((per.l(ad:0x4001F000+0x1A4-0x04))&0x00000001)==0x00000001) rgroup.long 0x1A4++0x03 line.long 0x00 "EP10DCR2,Endpoint10 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP10_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP10_MPKT ,Maximum packet size of endpoint10" else group.long 0x1A4++0x03 line.long 0x00 "EP10DCR2,Endpoint10 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP10_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP10_MPKT ,Maximum packet size of endpoint10" endif if (((per.l(ad:0x4001F000+0x1B4-0x04))&0x00000001)==0x00000001) rgroup.long 0x1B4++0x03 line.long 0x00 "EP11DCR2,Endpoint11 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP11_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP11_MPKT ,Maximum packet size of endpoint11" else group.long 0x1B4++0x03 line.long 0x00 "EP11DCR2,Endpoint11 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP11_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP11_MPKT ,Maximum packet size of endpoint11" endif if (((per.l(ad:0x4001F000+0x1C4-0x04))&0x00000001)==0x00000001) rgroup.long 0x1C4++0x03 line.long 0x00 "EP12DCR2,Endpoint12 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP12_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP12_MPKT ,Maximum packet size of endpoint12" else group.long 0x1C4++0x03 line.long 0x00 "EP12DCR2,Endpoint12 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP12_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP12_MPKT ,Maximum packet size of endpoint12" endif if (((per.l(ad:0x4001F000+0x1D4-0x04))&0x00000001)==0x00000001) rgroup.long 0x1D4++0x03 line.long 0x00 "EP13DCR2,Endpoint13 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP13_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP13_MPKT ,Maximum packet size of endpoint13" else group.long 0x1D4++0x03 line.long 0x00 "EP13DCR2,Endpoint13 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP13_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP13_MPKT ,Maximum packet size of endpoint13" endif if (((per.l(ad:0x4001F000+0x1E4-0x04))&0x00000001)==0x00000001) rgroup.long 0x1E4++0x03 line.long 0x00 "EP14DCR2,Endpoint14 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP14_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP14_MPKT ,Maximum packet size of endpoint14" else group.long 0x1E4++0x03 line.long 0x00 "EP14DCR2,Endpoint14 DMA Setting Register2" hexmask.long.byte 0x00 16.--26. 1. " EP14_LMPKT ,Byte length setting of last packet for DMA transfer" hexmask.long.word 0x00 0.--10. 1. " EP14_MPKT ,Maximum packet size of endpoint14" endif if (((per.l(ad:0x4001F000+0x118-0x08))&0x00000001)==0x00000001) rgroup.long 0x118++0x03 line.long 0x00 "EP1TADR,Endpoint1 DMA Start Address Register" else group.long 0x118++0x03 line.long 0x00 "EP1TADR,Endpoint1 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x128-0x08))&0x00000001)==0x00000001) rgroup.long 0x128++0x03 line.long 0x00 "EP2TADR,Endpoint2 DMA Start Address Register" else group.long 0x128++0x03 line.long 0x00 "EP2TADR,Endpoint2 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x138-0x08))&0x00000001)==0x00000001) rgroup.long 0x138++0x03 line.long 0x00 "EP3TADR,Endpoint3 DMA Start Address Register" else group.long 0x138++0x03 line.long 0x00 "EP3TADR,Endpoint3 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x148-0x08))&0x00000001)==0x00000001) rgroup.long 0x148++0x03 line.long 0x00 "EP4TADR,Endpoint4 DMA Start Address Register" else group.long 0x148++0x03 line.long 0x00 "EP4TADR,Endpoint4 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x158-0x08))&0x00000001)==0x00000001) rgroup.long 0x158++0x03 line.long 0x00 "EP5TADR,Endpoint5 DMA Start Address Register" else group.long 0x158++0x03 line.long 0x00 "EP5TADR,Endpoint5 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x168-0x08))&0x00000001)==0x00000001) rgroup.long 0x168++0x03 line.long 0x00 "EP6TADR,Endpoint6 DMA Start Address Register" else group.long 0x168++0x03 line.long 0x00 "EP6TADR,Endpoint6 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x178-0x08))&0x00000001)==0x00000001) rgroup.long 0x178++0x03 line.long 0x00 "EP7TADR,Endpoint7 DMA Start Address Register" else group.long 0x178++0x03 line.long 0x00 "EP7TADR,Endpoint7 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x188-0x08))&0x00000001)==0x00000001) rgroup.long 0x188++0x03 line.long 0x00 "EP8TADR,Endpoint8 DMA Start Address Register" else group.long 0x188++0x03 line.long 0x00 "EP8TADR,Endpoint8 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x198-0x08))&0x00000001)==0x00000001) rgroup.long 0x198++0x03 line.long 0x00 "EP9TADR,Endpoint9 DMA Start Address Register" else group.long 0x198++0x03 line.long 0x00 "EP9TADR,Endpoint9 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x1A8-0x08))&0x00000001)==0x00000001) rgroup.long 0x1A8++0x03 line.long 0x00 "EP10TADR,Endpoint10 DMA Start Address Register" else group.long 0x1A8++0x03 line.long 0x00 "EP10TADR,Endpoint10 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x1B8-0x08))&0x00000001)==0x00000001) rgroup.long 0x1B8++0x03 line.long 0x00 "EP11TADR,Endpoint11 DMA Start Address Register" else group.long 0x1B8++0x03 line.long 0x00 "EP11TADR,Endpoint11 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x1C8-0x08))&0x00000001)==0x00000001) rgroup.long 0x1C8++0x03 line.long 0x00 "EP12TADR,Endpoint12 DMA Start Address Register" else group.long 0x1C8++0x03 line.long 0x00 "EP12TADR,Endpoint12 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x1D8-0x08))&0x00000001)==0x00000001) rgroup.long 0x1D8++0x03 line.long 0x00 "EP13TADR,Endpoint13 DMA Start Address Register" else group.long 0x1D8++0x03 line.long 0x00 "EP13TADR,Endpoint13 DMA Start Address Register" endif if (((per.l(ad:0x4001F000+0x1E8-0x08))&0x00000001)==0x00000001) rgroup.long 0x1E8++0x03 line.long 0x00 "EP14TADR,Endpoint14 DMA Start Address Register" else group.long 0x1E8++0x03 line.long 0x00 "EP14TADR,Endpoint14 DMA Start Address Register" endif width 0x0B tree.end tree.end tree.open "DMA (DMA Controller)" tree "DMAC1" base ad:0x40104000 width 15. tree "Channel 0" if (((per.q(ad:0x40104000+0x3A0))&(1<<0))==(1<<0)) group.quad 0x0++0x57 line.quad 0x00 "SAR0,Source Address Register For Channel 0" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR0,Destination Address Register For Channel 0" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP0,Linked List Pointer Register For Channel 0 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL0,Control Register For Channel 0" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT0,Source Status Register For Channel 0" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 0 register" line.quad 0x28 "DSTAT0,Destination Status Register for Channel 0" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 0 register" line.quad 0x30 "SSTATAR0,Source Status Address Register for Channel 0" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR0,Destination Status Address Register for Channel 0" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG0,Configuration Register For Channel 0" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR0,Source Gather Register for Channel 0" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR0,Destination Scatter Register for Channel 0" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x0++0x07 hide.quad 0x00 "SAR0,Source Address Register For Channel 0" hgroup.quad (0x0+0x08)++0x07 hide.quad 0x00 "DAR0,Destination Address Register For Channel 0" hgroup.quad (0x0+0x10)++0x07 hide.quad 0x00 "LLP0,Linked List Pointer Register For Channel 0" hgroup.quad (0x0+0x18)++0x07 hide.quad 0x00 "CTL0,Control Register For Channel 0" hgroup.quad (0x0+0x20)++0x07 hide.quad 0x00 "SSTAT0,Source Status Register For Channel 0" hgroup.quad (0x0+0x28)++0x07 hide.quad 0x00 "DSTAT0,Destination Status Register For Channel 0" hgroup.quad (0x0+0x30)++0x07 hide.quad 0x00 "SSTATAR0,Source Status Address Register For Channel 0" hgroup.quad (0x0+0x38)++0x07 hide.quad 0x00 "DSTATAR0,Destination Status Address Register For Channel 0" hgroup.quad (0x0+0x40)++0x07 hide.quad 0x00 "CFG0,Configuration Register For Channel 0" hgroup.quad (0x0+0x48)++0x07 hide.quad 0x00 "SGR0,Source Gather Register For Channel 0" hgroup.quad (0x0+0x50)++0x07 hide.quad 0x00 "DSR0,Destination Scatter Register For Channel 0" endif tree.end tree "Channel 1" if (((per.q(ad:0x40104000+0x3A0))&(1<<1))==(1<<1)) group.quad 0x58++0x57 line.quad 0x00 "SAR1,Source Address Register For Channel 1" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR1,Destination Address Register For Channel 1" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP1,Linked List Pointer Register For Channel 1 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL1,Control Register For Channel 1" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT1,Source Status Register For Channel 1" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 1 register" line.quad 0x28 "DSTAT1,Destination Status Register for Channel 1" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 1 register" line.quad 0x30 "SSTATAR1,Source Status Address Register for Channel 1" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR1,Destination Status Address Register for Channel 1" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG1,Configuration Register For Channel 1" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR1,Source Gather Register for Channel 1" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR1,Destination Scatter Register for Channel 1" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x58++0x07 hide.quad 0x00 "SAR1,Source Address Register For Channel 1" hgroup.quad (0x58+0x08)++0x07 hide.quad 0x00 "DAR1,Destination Address Register For Channel 1" hgroup.quad (0x58+0x10)++0x07 hide.quad 0x00 "LLP1,Linked List Pointer Register For Channel 1" hgroup.quad (0x58+0x18)++0x07 hide.quad 0x00 "CTL1,Control Register For Channel 1" hgroup.quad (0x58+0x20)++0x07 hide.quad 0x00 "SSTAT1,Source Status Register For Channel 1" hgroup.quad (0x58+0x28)++0x07 hide.quad 0x00 "DSTAT1,Destination Status Register For Channel 1" hgroup.quad (0x58+0x30)++0x07 hide.quad 0x00 "SSTATAR1,Source Status Address Register For Channel 1" hgroup.quad (0x58+0x38)++0x07 hide.quad 0x00 "DSTATAR1,Destination Status Address Register For Channel 1" hgroup.quad (0x58+0x40)++0x07 hide.quad 0x00 "CFG1,Configuration Register For Channel 1" hgroup.quad (0x58+0x48)++0x07 hide.quad 0x00 "SGR1,Source Gather Register For Channel 1" hgroup.quad (0x58+0x50)++0x07 hide.quad 0x00 "DSR1,Destination Scatter Register For Channel 1" endif tree.end tree "Channel 2" if (((per.q(ad:0x40104000+0x3A0))&(1<<2))==(1<<2)) group.quad 0xB0++0x57 line.quad 0x00 "SAR2,Source Address Register For Channel 2" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR2,Destination Address Register For Channel 2" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP2,Linked List Pointer Register For Channel 2 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL2,Control Register For Channel 2" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT2,Source Status Register For Channel 2" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 2 register" line.quad 0x28 "DSTAT2,Destination Status Register for Channel 2" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 2 register" line.quad 0x30 "SSTATAR2,Source Status Address Register for Channel 2" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR2,Destination Status Address Register for Channel 2" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG2,Configuration Register For Channel 2" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR2,Source Gather Register for Channel 2" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR2,Destination Scatter Register for Channel 2" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0xB0++0x07 hide.quad 0x00 "SAR2,Source Address Register For Channel 2" hgroup.quad (0xB0+0x08)++0x07 hide.quad 0x00 "DAR2,Destination Address Register For Channel 2" hgroup.quad (0xB0+0x10)++0x07 hide.quad 0x00 "LLP2,Linked List Pointer Register For Channel 2" hgroup.quad (0xB0+0x18)++0x07 hide.quad 0x00 "CTL2,Control Register For Channel 2" hgroup.quad (0xB0+0x20)++0x07 hide.quad 0x00 "SSTAT2,Source Status Register For Channel 2" hgroup.quad (0xB0+0x28)++0x07 hide.quad 0x00 "DSTAT2,Destination Status Register For Channel 2" hgroup.quad (0xB0+0x30)++0x07 hide.quad 0x00 "SSTATAR2,Source Status Address Register For Channel 2" hgroup.quad (0xB0+0x38)++0x07 hide.quad 0x00 "DSTATAR2,Destination Status Address Register For Channel 2" hgroup.quad (0xB0+0x40)++0x07 hide.quad 0x00 "CFG2,Configuration Register For Channel 2" hgroup.quad (0xB0+0x48)++0x07 hide.quad 0x00 "SGR2,Source Gather Register For Channel 2" hgroup.quad (0xB0+0x50)++0x07 hide.quad 0x00 "DSR2,Destination Scatter Register For Channel 2" endif tree.end tree "Channel 3" if (((per.q(ad:0x40104000+0x3A0))&(1<<3))==(1<<3)) group.quad 0x108++0x57 line.quad 0x00 "SAR3,Source Address Register For Channel 3" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR3,Destination Address Register For Channel 3" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP3,Linked List Pointer Register For Channel 3 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL3,Control Register For Channel 3" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT3,Source Status Register For Channel 3" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 3 register" line.quad 0x28 "DSTAT3,Destination Status Register for Channel 3" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 3 register" line.quad 0x30 "SSTATAR3,Source Status Address Register for Channel 3" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR3,Destination Status Address Register for Channel 3" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG3,Configuration Register For Channel 3" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR3,Source Gather Register for Channel 3" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR3,Destination Scatter Register for Channel 3" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x108++0x07 hide.quad 0x00 "SAR3,Source Address Register For Channel 3" hgroup.quad (0x108+0x08)++0x07 hide.quad 0x00 "DAR3,Destination Address Register For Channel 3" hgroup.quad (0x108+0x10)++0x07 hide.quad 0x00 "LLP3,Linked List Pointer Register For Channel 3" hgroup.quad (0x108+0x18)++0x07 hide.quad 0x00 "CTL3,Control Register For Channel 3" hgroup.quad (0x108+0x20)++0x07 hide.quad 0x00 "SSTAT3,Source Status Register For Channel 3" hgroup.quad (0x108+0x28)++0x07 hide.quad 0x00 "DSTAT3,Destination Status Register For Channel 3" hgroup.quad (0x108+0x30)++0x07 hide.quad 0x00 "SSTATAR3,Source Status Address Register For Channel 3" hgroup.quad (0x108+0x38)++0x07 hide.quad 0x00 "DSTATAR3,Destination Status Address Register For Channel 3" hgroup.quad (0x108+0x40)++0x07 hide.quad 0x00 "CFG3,Configuration Register For Channel 3" hgroup.quad (0x108+0x48)++0x07 hide.quad 0x00 "SGR3,Source Gather Register For Channel 3" hgroup.quad (0x108+0x50)++0x07 hide.quad 0x00 "DSR3,Destination Scatter Register For Channel 3" endif tree.end tree "Channel 4" if (((per.q(ad:0x40104000+0x3A0))&(1<<4))==(1<<4)) group.quad 0x160++0x57 line.quad 0x00 "SAR4,Source Address Register For Channel 4" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR4,Destination Address Register For Channel 4" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP4,Linked List Pointer Register For Channel 4 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL4,Control Register For Channel 4" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT4,Source Status Register For Channel 4" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 4 register" line.quad 0x28 "DSTAT4,Destination Status Register for Channel 4" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 4 register" line.quad 0x30 "SSTATAR4,Source Status Address Register for Channel 4" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR4,Destination Status Address Register for Channel 4" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG4,Configuration Register For Channel 4" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR4,Source Gather Register for Channel 4" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR4,Destination Scatter Register for Channel 4" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x160++0x07 hide.quad 0x00 "SAR4,Source Address Register For Channel 4" hgroup.quad (0x160+0x08)++0x07 hide.quad 0x00 "DAR4,Destination Address Register For Channel 4" hgroup.quad (0x160+0x10)++0x07 hide.quad 0x00 "LLP4,Linked List Pointer Register For Channel 4" hgroup.quad (0x160+0x18)++0x07 hide.quad 0x00 "CTL4,Control Register For Channel 4" hgroup.quad (0x160+0x20)++0x07 hide.quad 0x00 "SSTAT4,Source Status Register For Channel 4" hgroup.quad (0x160+0x28)++0x07 hide.quad 0x00 "DSTAT4,Destination Status Register For Channel 4" hgroup.quad (0x160+0x30)++0x07 hide.quad 0x00 "SSTATAR4,Source Status Address Register For Channel 4" hgroup.quad (0x160+0x38)++0x07 hide.quad 0x00 "DSTATAR4,Destination Status Address Register For Channel 4" hgroup.quad (0x160+0x40)++0x07 hide.quad 0x00 "CFG4,Configuration Register For Channel 4" hgroup.quad (0x160+0x48)++0x07 hide.quad 0x00 "SGR4,Source Gather Register For Channel 4" hgroup.quad (0x160+0x50)++0x07 hide.quad 0x00 "DSR4,Destination Scatter Register For Channel 4" endif tree.end tree "Channel 5" if (((per.q(ad:0x40104000+0x3A0))&(1<<5))==(1<<5)) group.quad 0x1B8++0x57 line.quad 0x00 "SAR5,Source Address Register For Channel 5" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR5,Destination Address Register For Channel 5" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP5,Linked List Pointer Register For Channel 5 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL5,Control Register For Channel 5" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT5,Source Status Register For Channel 5" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 5 register" line.quad 0x28 "DSTAT5,Destination Status Register for Channel 5" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 5 register" line.quad 0x30 "SSTATAR5,Source Status Address Register for Channel 5" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR5,Destination Status Address Register for Channel 5" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG5,Configuration Register For Channel 5" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR5,Source Gather Register for Channel 5" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR5,Destination Scatter Register for Channel 5" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x1B8++0x07 hide.quad 0x00 "SAR5,Source Address Register For Channel 5" hgroup.quad (0x1B8+0x08)++0x07 hide.quad 0x00 "DAR5,Destination Address Register For Channel 5" hgroup.quad (0x1B8+0x10)++0x07 hide.quad 0x00 "LLP5,Linked List Pointer Register For Channel 5" hgroup.quad (0x1B8+0x18)++0x07 hide.quad 0x00 "CTL5,Control Register For Channel 5" hgroup.quad (0x1B8+0x20)++0x07 hide.quad 0x00 "SSTAT5,Source Status Register For Channel 5" hgroup.quad (0x1B8+0x28)++0x07 hide.quad 0x00 "DSTAT5,Destination Status Register For Channel 5" hgroup.quad (0x1B8+0x30)++0x07 hide.quad 0x00 "SSTATAR5,Source Status Address Register For Channel 5" hgroup.quad (0x1B8+0x38)++0x07 hide.quad 0x00 "DSTATAR5,Destination Status Address Register For Channel 5" hgroup.quad (0x1B8+0x40)++0x07 hide.quad 0x00 "CFG5,Configuration Register For Channel 5" hgroup.quad (0x1B8+0x48)++0x07 hide.quad 0x00 "SGR5,Source Gather Register For Channel 5" hgroup.quad (0x1B8+0x50)++0x07 hide.quad 0x00 "DSR5,Destination Scatter Register For Channel 5" endif tree.end tree "Channel 6" if (((per.q(ad:0x40104000+0x3A0))&(1<<6))==(1<<6)) group.quad 0x210++0x57 line.quad 0x00 "SAR6,Source Address Register For Channel 6" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR6,Destination Address Register For Channel 6" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP6,Linked List Pointer Register For Channel 6 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL6,Control Register For Channel 6" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT6,Source Status Register For Channel 6" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 6 register" line.quad 0x28 "DSTAT6,Destination Status Register for Channel 6" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 6 register" line.quad 0x30 "SSTATAR6,Source Status Address Register for Channel 6" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR6,Destination Status Address Register for Channel 6" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG6,Configuration Register For Channel 6" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR6,Source Gather Register for Channel 6" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR6,Destination Scatter Register for Channel 6" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x210++0x07 hide.quad 0x00 "SAR6,Source Address Register For Channel 6" hgroup.quad (0x210+0x08)++0x07 hide.quad 0x00 "DAR6,Destination Address Register For Channel 6" hgroup.quad (0x210+0x10)++0x07 hide.quad 0x00 "LLP6,Linked List Pointer Register For Channel 6" hgroup.quad (0x210+0x18)++0x07 hide.quad 0x00 "CTL6,Control Register For Channel 6" hgroup.quad (0x210+0x20)++0x07 hide.quad 0x00 "SSTAT6,Source Status Register For Channel 6" hgroup.quad (0x210+0x28)++0x07 hide.quad 0x00 "DSTAT6,Destination Status Register For Channel 6" hgroup.quad (0x210+0x30)++0x07 hide.quad 0x00 "SSTATAR6,Source Status Address Register For Channel 6" hgroup.quad (0x210+0x38)++0x07 hide.quad 0x00 "DSTATAR6,Destination Status Address Register For Channel 6" hgroup.quad (0x210+0x40)++0x07 hide.quad 0x00 "CFG6,Configuration Register For Channel 6" hgroup.quad (0x210+0x48)++0x07 hide.quad 0x00 "SGR6,Source Gather Register For Channel 6" hgroup.quad (0x210+0x50)++0x07 hide.quad 0x00 "DSR6,Destination Scatter Register For Channel 6" endif tree.end tree "Channel 7" if (((per.q(ad:0x40104000+0x3A0))&(1<<7))==(1<<7)) group.quad 0x268++0x57 line.quad 0x00 "SAR7,Source Address Register For Channel 7" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR7,Destination Address Register For Channel 7" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP7,Linked List Pointer Register For Channel 7 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL7,Control Register For Channel 7" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT7,Source Status Register For Channel 7" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 7 register" line.quad 0x28 "DSTAT7,Destination Status Register for Channel 7" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 7 register" line.quad 0x30 "SSTATAR7,Source Status Address Register for Channel 7" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR7,Destination Status Address Register for Channel 7" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG7,Configuration Register For Channel 7" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR7,Source Gather Register for Channel 7" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR7,Destination Scatter Register for Channel 7" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x268++0x07 hide.quad 0x00 "SAR7,Source Address Register For Channel 7" hgroup.quad (0x268+0x08)++0x07 hide.quad 0x00 "DAR7,Destination Address Register For Channel 7" hgroup.quad (0x268+0x10)++0x07 hide.quad 0x00 "LLP7,Linked List Pointer Register For Channel 7" hgroup.quad (0x268+0x18)++0x07 hide.quad 0x00 "CTL7,Control Register For Channel 7" hgroup.quad (0x268+0x20)++0x07 hide.quad 0x00 "SSTAT7,Source Status Register For Channel 7" hgroup.quad (0x268+0x28)++0x07 hide.quad 0x00 "DSTAT7,Destination Status Register For Channel 7" hgroup.quad (0x268+0x30)++0x07 hide.quad 0x00 "SSTATAR7,Source Status Address Register For Channel 7" hgroup.quad (0x268+0x38)++0x07 hide.quad 0x00 "DSTATAR7,Destination Status Address Register For Channel 7" hgroup.quad (0x268+0x40)++0x07 hide.quad 0x00 "CFG7,Configuration Register For Channel 7" hgroup.quad (0x268+0x48)++0x07 hide.quad 0x00 "SGR7,Source Gather Register For Channel 7" hgroup.quad (0x268+0x50)++0x07 hide.quad 0x00 "DSR7,Destination Scatter Register For Channel 7" endif tree.end textline " " group.quad 0x2C0++0x07 line.quad 0x00 "RAWTFR,Raw Status For IntTFR Interrupt Register" bitfld.quad 0x00 7. " RAW[7] ,Raw interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Raw interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Raw interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Raw interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Raw interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Raw interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Raw interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Raw interrupt status channel 0" "No interrupt,Interrupt" group.quad 0x2C8++0x07 line.quad 0x00 "RAWBLOCK,Raw Status For IntBLOCK Interrupt Register" bitfld.quad 0x00 7. " RAW[7] ,Raw interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Raw interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Raw interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Raw interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Raw interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Raw interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Raw interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Raw interrupt status channel 0" "No interrupt,Interrupt" group.quad 0x2D0++0x07 line.quad 0x00 "RAWSRCTRAN,Raw Status For IntSRCTRAN Interrupt Register" bitfld.quad 0x00 7. " RAW[7] ,Raw interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Raw interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Raw interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Raw interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Raw interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Raw interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Raw interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Raw interrupt status channel 0" "No interrupt,Interrupt" group.quad 0x2D8++0x07 line.quad 0x00 "RAWDSTTRAN,Raw Status For IntDSTTRAN Interrupt Register" bitfld.quad 0x00 7. " RAW[7] ,Raw interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Raw interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Raw interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Raw interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Raw interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Raw interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Raw interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Raw interrupt status channel 0" "No interrupt,Interrupt" group.quad 0x2E0++0x07 line.quad 0x00 "RAWERR,Raw Status For IntERR Interrupt Register" bitfld.quad 0x00 7. " RAW[7] ,Raw interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Raw interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Raw interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Raw interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Raw interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Raw interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Raw interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Raw interrupt status channel 0" "No interrupt,Interrupt" newline rgroup.quad 0x2E8++0x07 line.quad 0x00 "STATUSTFR,Status for IntTFR Interrupt Register" bitfld.quad 0x00 7. " STATUS[7] ,Interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Interrupt status channel 0" "No interrupt,Interrupt" rgroup.quad 0x2F0++0x07 line.quad 0x00 "STATUSBLOCK,Status for IntBLOCK Interrupt Register" bitfld.quad 0x00 7. " STATUS[7] ,Interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Interrupt status channel 0" "No interrupt,Interrupt" rgroup.quad 0x2F8++0x07 line.quad 0x00 "STATUSSRCTRAN,Status for IntSRCTRAN Interrupt Register" bitfld.quad 0x00 7. " STATUS[7] ,Interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Interrupt status channel 0" "No interrupt,Interrupt" rgroup.quad 0x300++0x07 line.quad 0x00 "STATUSDSTTRAN,Status for IntDSTTRAN Interrupt Register" bitfld.quad 0x00 7. " STATUS[7] ,Interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Interrupt status channel 0" "No interrupt,Interrupt" rgroup.quad 0x308++0x07 line.quad 0x00 "STATUSERR,Status for IntERR Interrupt Register" bitfld.quad 0x00 7. " STATUS[7] ,Interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Interrupt status channel 0" "No interrupt,Interrupt" newline group.quad 0x310++0x07 line.quad 0x00 "MASKTFR,Mask for IntTFR Interrupt Register" bitfld.quad 0x00 15. " INT_MASK_WE[7] ,Interrupt mask 7 write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Interrupt mask 6 write enable" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Interrupt mask 5 write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Interrupt mask 4 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Interrupt mask 3 write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Interrupt mask 2 write enable" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Interrupt mask 1 write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Interrupt mask 0 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " INT_MASK[7] ,Interrupt mask channel 7" "Masked,Unmasked" bitfld.quad 0x00 6. " [6] ,Interrupt mask channel 6" "Masked,Unmasked" bitfld.quad 0x00 5. " [5] ,Interrupt mask channel 5" "Masked,Unmasked" bitfld.quad 0x00 4. " [4] ,Interrupt mask channel 4" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt mask channel 3" "Masked,Unmasked" bitfld.quad 0x00 2. " [2] ,Interrupt mask channel 2" "Masked,Unmasked" bitfld.quad 0x00 1. " [1] ,Interrupt mask channel 1" "Masked,Unmasked" bitfld.quad 0x00 0. " [0] ,Interrupt mask channel 0" "Masked,Unmasked" group.quad 0x318++0x07 line.quad 0x00 "MASKBLOCK,Mask for IntBLOCK Interrupt Register" bitfld.quad 0x00 15. " INT_MASK_WE[7] ,Interrupt mask 7 write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Interrupt mask 6 write enable" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Interrupt mask 5 write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Interrupt mask 4 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Interrupt mask 3 write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Interrupt mask 2 write enable" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Interrupt mask 1 write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Interrupt mask 0 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " INT_MASK[7] ,Interrupt mask channel 7" "Masked,Unmasked" bitfld.quad 0x00 6. " [6] ,Interrupt mask channel 6" "Masked,Unmasked" bitfld.quad 0x00 5. " [5] ,Interrupt mask channel 5" "Masked,Unmasked" bitfld.quad 0x00 4. " [4] ,Interrupt mask channel 4" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt mask channel 3" "Masked,Unmasked" bitfld.quad 0x00 2. " [2] ,Interrupt mask channel 2" "Masked,Unmasked" bitfld.quad 0x00 1. " [1] ,Interrupt mask channel 1" "Masked,Unmasked" bitfld.quad 0x00 0. " [0] ,Interrupt mask channel 0" "Masked,Unmasked" group.quad 0x320++0x07 line.quad 0x00 "MASKSRCTRAN,Mask for IntSRCTRAN Interrupt Register" bitfld.quad 0x00 15. " INT_MASK_WE[7] ,Interrupt mask 7 write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Interrupt mask 6 write enable" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Interrupt mask 5 write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Interrupt mask 4 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Interrupt mask 3 write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Interrupt mask 2 write enable" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Interrupt mask 1 write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Interrupt mask 0 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " INT_MASK[7] ,Interrupt mask channel 7" "Masked,Unmasked" bitfld.quad 0x00 6. " [6] ,Interrupt mask channel 6" "Masked,Unmasked" bitfld.quad 0x00 5. " [5] ,Interrupt mask channel 5" "Masked,Unmasked" bitfld.quad 0x00 4. " [4] ,Interrupt mask channel 4" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt mask channel 3" "Masked,Unmasked" bitfld.quad 0x00 2. " [2] ,Interrupt mask channel 2" "Masked,Unmasked" bitfld.quad 0x00 1. " [1] ,Interrupt mask channel 1" "Masked,Unmasked" bitfld.quad 0x00 0. " [0] ,Interrupt mask channel 0" "Masked,Unmasked" group.quad 0x328++0x07 line.quad 0x00 "MASKDSTTRAN,Mask for IntDSTTRAN Interrupt Register" bitfld.quad 0x00 15. " INT_MASK_WE[7] ,Interrupt mask 7 write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Interrupt mask 6 write enable" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Interrupt mask 5 write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Interrupt mask 4 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Interrupt mask 3 write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Interrupt mask 2 write enable" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Interrupt mask 1 write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Interrupt mask 0 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " INT_MASK[7] ,Interrupt mask channel 7" "Masked,Unmasked" bitfld.quad 0x00 6. " [6] ,Interrupt mask channel 6" "Masked,Unmasked" bitfld.quad 0x00 5. " [5] ,Interrupt mask channel 5" "Masked,Unmasked" bitfld.quad 0x00 4. " [4] ,Interrupt mask channel 4" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt mask channel 3" "Masked,Unmasked" bitfld.quad 0x00 2. " [2] ,Interrupt mask channel 2" "Masked,Unmasked" bitfld.quad 0x00 1. " [1] ,Interrupt mask channel 1" "Masked,Unmasked" bitfld.quad 0x00 0. " [0] ,Interrupt mask channel 0" "Masked,Unmasked" group.quad 0x330++0x07 line.quad 0x00 "MASKERR,Mask for IntERR Interrupt Register" bitfld.quad 0x00 15. " INT_MASK_WE[7] ,Interrupt mask 7 write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Interrupt mask 6 write enable" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Interrupt mask 5 write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Interrupt mask 4 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Interrupt mask 3 write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Interrupt mask 2 write enable" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Interrupt mask 1 write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Interrupt mask 0 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " INT_MASK[7] ,Interrupt mask channel 7" "Masked,Unmasked" bitfld.quad 0x00 6. " [6] ,Interrupt mask channel 6" "Masked,Unmasked" bitfld.quad 0x00 5. " [5] ,Interrupt mask channel 5" "Masked,Unmasked" bitfld.quad 0x00 4. " [4] ,Interrupt mask channel 4" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt mask channel 3" "Masked,Unmasked" bitfld.quad 0x00 2. " [2] ,Interrupt mask channel 2" "Masked,Unmasked" bitfld.quad 0x00 1. " [1] ,Interrupt mask channel 1" "Masked,Unmasked" bitfld.quad 0x00 0. " [0] ,Interrupt mask channel 0" "Masked,Unmasked" newline wgroup.quad 0x338++0x07 line.quad 0x00 "CLEARTFR,Clear for IntTFR Interrupt Register" bitfld.quad 0x00 7. " CLEAR[7] ,Interrupt clear channel 7" "No effect,Clear" bitfld.quad 0x00 6. " [6] ,Interrupt clear channel 6" "No effect,Clear" bitfld.quad 0x00 5. " [5] ,Interrupt clear channel 5" "No effect,Clear" bitfld.quad 0x00 4. " [4] ,Interrupt clear channel 4" "No effect,Clear" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt clear channel 3" "No effect,Clear" bitfld.quad 0x00 2. " [2] ,Interrupt clear channel 2" "No effect,Clear" bitfld.quad 0x00 1. " [1] ,Interrupt clear channel 1" "No effect,Clear" bitfld.quad 0x00 0. " [0] ,Interrupt clear channel 0" "No effect,Clear" wgroup.quad 0x340++0x07 line.quad 0x00 "CLEARBLOCK,Clear for IntBLOCK Interrupt Register" bitfld.quad 0x00 7. " CLEAR[7] ,Interrupt clear channel 7" "No effect,Clear" bitfld.quad 0x00 6. " [6] ,Interrupt clear channel 6" "No effect,Clear" bitfld.quad 0x00 5. " [5] ,Interrupt clear channel 5" "No effect,Clear" bitfld.quad 0x00 4. " [4] ,Interrupt clear channel 4" "No effect,Clear" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt clear channel 3" "No effect,Clear" bitfld.quad 0x00 2. " [2] ,Interrupt clear channel 2" "No effect,Clear" bitfld.quad 0x00 1. " [1] ,Interrupt clear channel 1" "No effect,Clear" bitfld.quad 0x00 0. " [0] ,Interrupt clear channel 0" "No effect,Clear" wgroup.quad 0x348++0x07 line.quad 0x00 "CLEARSRCTRAN,Clear for IntSRCTRAN Interrupt Register" bitfld.quad 0x00 7. " CLEAR[7] ,Interrupt clear channel 7" "No effect,Clear" bitfld.quad 0x00 6. " [6] ,Interrupt clear channel 6" "No effect,Clear" bitfld.quad 0x00 5. " [5] ,Interrupt clear channel 5" "No effect,Clear" bitfld.quad 0x00 4. " [4] ,Interrupt clear channel 4" "No effect,Clear" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt clear channel 3" "No effect,Clear" bitfld.quad 0x00 2. " [2] ,Interrupt clear channel 2" "No effect,Clear" bitfld.quad 0x00 1. " [1] ,Interrupt clear channel 1" "No effect,Clear" bitfld.quad 0x00 0. " [0] ,Interrupt clear channel 0" "No effect,Clear" wgroup.quad 0x350++0x07 line.quad 0x00 "CLEARDSTTRAN,Clear for IntDSTTRAN Interrupt Register" bitfld.quad 0x00 7. " CLEAR[7] ,Interrupt clear channel 7" "No effect,Clear" bitfld.quad 0x00 6. " [6] ,Interrupt clear channel 6" "No effect,Clear" bitfld.quad 0x00 5. " [5] ,Interrupt clear channel 5" "No effect,Clear" bitfld.quad 0x00 4. " [4] ,Interrupt clear channel 4" "No effect,Clear" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt clear channel 3" "No effect,Clear" bitfld.quad 0x00 2. " [2] ,Interrupt clear channel 2" "No effect,Clear" bitfld.quad 0x00 1. " [1] ,Interrupt clear channel 1" "No effect,Clear" bitfld.quad 0x00 0. " [0] ,Interrupt clear channel 0" "No effect,Clear" wgroup.quad 0x358++0x07 line.quad 0x00 "CLEARERR,Clear for IntERR Interrupt Register" bitfld.quad 0x00 7. " CLEAR[7] ,Interrupt clear channel 7" "No effect,Clear" bitfld.quad 0x00 6. " [6] ,Interrupt clear channel 6" "No effect,Clear" bitfld.quad 0x00 5. " [5] ,Interrupt clear channel 5" "No effect,Clear" bitfld.quad 0x00 4. " [4] ,Interrupt clear channel 4" "No effect,Clear" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt clear channel 3" "No effect,Clear" bitfld.quad 0x00 2. " [2] ,Interrupt clear channel 2" "No effect,Clear" bitfld.quad 0x00 1. " [1] ,Interrupt clear channel 1" "No effect,Clear" bitfld.quad 0x00 0. " [0] ,Interrupt clear channel 0" "No effect,Clear" newline rgroup.quad 0x360++0x07 line.quad 0x00 "STATUSINT,Combined Interrupt Status Register" bitfld.quad 0x00 4. " ERR ,OR of the contents of StatusErr register" "Not occurred,Occurred" bitfld.quad 0x00 3. " DSTT ,OR of the contents of StatusDst register" "Not occurred,Occurred" bitfld.quad 0x00 2. " SRCT ,OR of the contents of StatusSrcTran register" "Not occurred,Occurred" bitfld.quad 0x00 1. " BLOCK ,OR of the contents of StatusBlock register" "Not occurred,Occurred" textline " " bitfld.quad 0x00 0. " TFR ,OR of the contents of StatusTfr register" "Not occurred,Occurred" group.quad 0x368++0x3F line.quad 0x00 "REQSRCREG,Source Software Transaction Request Register" bitfld.quad 0x00 15. " SRC_REQ_WE[7] ,Source request Write-Enable channel 7" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Source request Write-Enable channel 6" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Source request Write-Enable channel 5" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Source request Write-Enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Source request Write-Enable channel 3" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Source request Write-Enable channel 2" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Source request Write-Enable channel 1" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Source request Write-Enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " SRC_REQ[7] ,Source request channel 7" "Not requested,Requested" bitfld.quad 0x00 6. " [6] ,Source request channel 6" "Not requested,Requested" bitfld.quad 0x00 5. " [5] ,Source request channel 5" "Not requested,Requested" bitfld.quad 0x00 4. " [4] ,Source request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x00 3. " [3] ,Source request channel 3" "Not requested,Requested" bitfld.quad 0x00 2. " [2] ,Source request channel 2" "Not requested,Requested" bitfld.quad 0x00 1. " [1] ,Source request channel 1" "Not requested,Requested" bitfld.quad 0x00 0. " [0] ,Source request channel 0" "Not requested,Requested" line.quad 0x08 "REQDSTREG,Destination Software Transaction Request Register" bitfld.quad 0x08 15. " DST_REQ_WE[7] ,Destination request Write-Enable channel 7" "Disabled,Enabled" bitfld.quad 0x08 14. " [6] ,Destination request Write-Enable channel 6" "Disabled,Enabled" bitfld.quad 0x08 13. " [5] ,Destination request Write-Enable channel 5" "Disabled,Enabled" bitfld.quad 0x08 12. " [4] ,Destination request Write-Enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x08 11. " [3] ,Destination request Write-Enable channel 3" "Disabled,Enabled" bitfld.quad 0x08 10. " [2] ,Destination request Write-Enable channel 2" "Disabled,Enabled" bitfld.quad 0x08 9. " [1] ,Destination request Write-Enable channel 1" "Disabled,Enabled" bitfld.quad 0x08 8. " [0] ,Destination request Write-Enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x08 7. " DST_REQ[7] ,Destination request channel 7" "Not requested,Requested" bitfld.quad 0x08 6. " [6] ,Destination request channel 6" "Not requested,Requested" bitfld.quad 0x08 5. " [5] ,Destination request channel 5" "Not requested,Requested" bitfld.quad 0x08 4. " [4] ,Destination request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x08 3. " [3] ,Destination request channel 3" "Not requested,Requested" bitfld.quad 0x08 2. " [2] ,Destination request channel 2" "Not requested,Requested" bitfld.quad 0x08 1. " [1] ,Destination request channel 1" "Not requested,Requested" bitfld.quad 0x08 0. " [0] ,Destination request channel 0" "Not requested,Requested" line.quad 0x10 "SGLRQSRCREG,Single Source Transaction Request Register" bitfld.quad 0x10 15. " SRC_SGLREQ_WE[7] ,Source single request Write-Enable channel 7" "Disabled,Enabled" bitfld.quad 0x10 14. " [6] ,Source single request Write-Enable channel 6" "Disabled,Enabled" bitfld.quad 0x10 13. " [5] ,Source single request Write-Enable channel 5" "Disabled,Enabled" bitfld.quad 0x10 12. " [4] ,Source single request Write-Enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x10 11. " [3] ,Source single request Write-Enable channel 3" "Disabled,Enabled" bitfld.quad 0x10 10. " [2] ,Source single request Write-Enable channel 2" "Disabled,Enabled" bitfld.quad 0x10 9. " [1] ,Source single request Write-Enable channel 1" "Disabled,Enabled" bitfld.quad 0x10 8. " [0] ,Source single request Write-Enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x10 7. " SRC_SGLREQ[7] ,Source single request channel 7" "Not requested,Requested" bitfld.quad 0x10 6. " [6] ,Source single request channel 6" "Not requested,Requested" bitfld.quad 0x10 5. " [5] ,Source single request channel 5" "Not requested,Requested" bitfld.quad 0x10 4. " [4] ,Source single request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x10 3. " [3] ,Source single request channel 3" "Not requested,Requested" bitfld.quad 0x10 2. " [2] ,Source single request channel 2" "Not requested,Requested" bitfld.quad 0x10 1. " [1] ,Source single request channel 1" "Not requested,Requested" bitfld.quad 0x10 0. " [0] ,Source single request channel 0" "Not requested,Requested" line.quad 0x18 "SGLRQDSTREG,Single Destination Transaction Request Register" bitfld.quad 0x18 15. " DST_SGLREQ_WE[7] ,Destination single or burst request write-enable channel 7" "Disabled,Enabled" bitfld.quad 0x18 14. " [6] ,Destination single or burst request write-enable channel 6" "Disabled,Enabled" bitfld.quad 0x18 13. " [5] ,Destination single or burst request write-enable channel 5" "Disabled,Enabled" bitfld.quad 0x18 12. " [4] ,Destination single or burst request write-enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x18 11. " [3] ,Destination single or burst request write-enable channel 3" "Disabled,Enabled" bitfld.quad 0x18 10. " [2] ,Destination single or burst request write-enable channel 2" "Disabled,Enabled" bitfld.quad 0x18 9. " [1] ,Destination single or burst request write-enable channel 1" "Disabled,Enabled" bitfld.quad 0x18 8. " [0] ,Destination single or burst request write-enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x18 7. " DST_SGLREQ[7] ,Destination single or burst request channel 7" "Not requested,Requested" bitfld.quad 0x18 6. " [6] ,Destination single or burst request channel 6" "Not requested,Requested" bitfld.quad 0x18 5. " [5] ,Destination single or burst request channel 5" "Not requested,Requested" bitfld.quad 0x18 4. " [4] ,Destination single or burst request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x18 3. " [3] ,Destination single or burst request channel 3" "Not requested,Requested" bitfld.quad 0x18 2. " [2] ,Destination single or burst request channel 2" "Not requested,Requested" bitfld.quad 0x18 1. " [1] ,Destination single or burst request channel 1" "Not requested,Requested" bitfld.quad 0x18 0. " [0] ,Destination single or burst request channel 0" "Not requested,Requested" line.quad 0x20 "LSTSRCREG,Last Source Transaction Request Register" bitfld.quad 0x20 15. " LSTSRC_WE[7] ,Source last transaction request write-enable channel 7" "Disabled,Enabled" bitfld.quad 0x20 14. " [6] ,Source last transaction request write-enable channel 6" "Disabled,Enabled" bitfld.quad 0x20 13. " [5] ,Source last transaction request write-enable channel 5" "Disabled,Enabled" bitfld.quad 0x20 12. " [4] ,Source last transaction request write-enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x20 11. " [3] ,Source last transaction request write-enable channel 3" "Disabled,Enabled" bitfld.quad 0x20 10. " [2] ,Source last transaction request write-enable channel 2" "Disabled,Enabled" bitfld.quad 0x20 9. " [1] ,Source last transaction request write-enable channel 1" "Disabled,Enabled" bitfld.quad 0x20 8. " [0] ,Source last transaction request write-enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x20 7. " LSTSRC[7] ,Source last transaction request channel 7" "Not requested,Requested" bitfld.quad 0x20 6. " [6] ,Source last transaction request channel 6" "Not requested,Requested" bitfld.quad 0x20 5. " [5] ,Source last transaction request channel 5" "Not requested,Requested" bitfld.quad 0x20 4. " [4] ,Source last transaction request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x20 3. " [3] ,Source last transaction request channel 3" "Not requested,Requested" bitfld.quad 0x20 2. " [2] ,Source last transaction request channel 2" "Not requested,Requested" bitfld.quad 0x20 1. " [1] ,Source last transaction request channel 1" "Not requested,Requested" bitfld.quad 0x20 0. " [0] ,Source last transaction request channel 0" "Not requested,Requested" line.quad 0x28 "LSTDSTREG,Last Destination Transaction Request Register" bitfld.quad 0x28 15. " LSTDST_WE[7] ,Destination last transaction request write-enable channel 7" "Disabled,Enabled" bitfld.quad 0x28 14. " [6] ,Destination last transaction request write-enable channel 6" "Disabled,Enabled" bitfld.quad 0x28 13. " [5] ,Destination last transaction request write-enable channel 5" "Disabled,Enabled" bitfld.quad 0x28 12. " [4] ,Destination last transaction request write-enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x28 11. " [3] ,Destination last transaction request write-enable channel 3" "Disabled,Enabled" bitfld.quad 0x28 10. " [2] ,Destination last transaction request write-enable channel 2" "Disabled,Enabled" bitfld.quad 0x28 9. " [1] ,Destination last transaction request write-enable channel 1" "Disabled,Enabled" bitfld.quad 0x28 8. " [0] ,Destination last transaction request write-enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x28 7. " LSTDST[7] ,Destination last transaction request channel 7" "Not requested,Requested" bitfld.quad 0x28 6. " [6] ,Destination last transaction request channel 6" "Not requested,Requested" bitfld.quad 0x28 5. " [5] ,Destination last transaction request channel 5" "Not requested,Requested" bitfld.quad 0x28 4. " [4] ,Destination last transaction request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x28 3. " [3] ,Destination last transaction request channel 3" "Not requested,Requested" bitfld.quad 0x28 2. " [2] ,Destination last transaction request channel 2" "Not requested,Requested" bitfld.quad 0x28 1. " [1] ,Destination last transaction request channel 1" "Not requested,Requested" bitfld.quad 0x28 0. " [0] ,Destination last transaction request channel 0" "Not requested,Requested" line.quad 0x30 "DMACFGREG,DMA Configuration Register" bitfld.quad 0x30 0. " DMA_EN ,DMA controller enable bit" "Disabled,Enabled" line.quad 0x38 "CHENREG,DMA Controller Channel enable Register" bitfld.quad 0x38 15. " CH_EN_WE[7] ,Write-enable channel 7" "Disabled,Enabled" bitfld.quad 0x38 14. " [6] ,Write-enable channel 6" "Disabled,Enabled" bitfld.quad 0x38 13. " [5] ,Write-enable channel 5" "Disabled,Enabled" bitfld.quad 0x38 12. " [4] ,Write-enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x38 11. " [3] ,Write-enable channel 3" "Disabled,Enabled" bitfld.quad 0x38 10. " [2] ,Write-enable channel 2" "Disabled,Enabled" bitfld.quad 0x38 9. " [1] ,Write-enable channel 1" "Disabled,Enabled" bitfld.quad 0x38 8. " [0] ,Write-enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x38 7. " CH_EN[7] ,Enables/Disables channel 7" "Disabled,Enabled" bitfld.quad 0x38 6. " [6] ,Enables/Disables channel 6" "Disabled,Enabled" bitfld.quad 0x38 5. " [5] ,Enables/Disables channel 5" "Disabled,Enabled" bitfld.quad 0x38 4. " [4] ,Enables/Disables channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x38 3. " [3] ,Enables/Disables channel 3" "Disabled,Enabled" bitfld.quad 0x38 2. " [2] ,Enables/Disables channel 2" "Disabled,Enabled" bitfld.quad 0x38 1. " [1] ,Enables/Disables channel 1" "Disabled,Enabled" bitfld.quad 0x38 0. " [0] ,Enables/Disables channel 0" "Disabled,Enabled" rgroup.quad 0x3A8++0x07 line.quad 0x00 "DMAIDREG,DMA ID Register" hexmask.quad.long 0x00 0.--31. 1. " DMA_ID ,DMA ID register" group.quad 0x3B0++0x07 line.quad 0x00 "DMATESTREG,DMA Controller Test Register" bitfld.quad 0x00 0. " TEST_SLV_IF ,AHB slave interface test mode" "Disabled,Enabled" width 0x0B tree.end tree "DMAC2" base ad:0x40105000 width 15. tree "Channel 0" if (((per.q(ad:0x40105000+0x3A0))&(1<<0))==(1<<0)) group.quad 0x0++0x57 line.quad 0x00 "SAR0,Source Address Register For Channel 0" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR0,Destination Address Register For Channel 0" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP0,Linked List Pointer Register For Channel 0 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL0,Control Register For Channel 0" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT0,Source Status Register For Channel 0" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 0 register" line.quad 0x28 "DSTAT0,Destination Status Register for Channel 0" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 0 register" line.quad 0x30 "SSTATAR0,Source Status Address Register for Channel 0" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR0,Destination Status Address Register for Channel 0" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG0,Configuration Register For Channel 0" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 0 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR0,Source Gather Register for Channel 0" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR0,Destination Scatter Register for Channel 0" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x0++0x07 hide.quad 0x00 "SAR0,Source Address Register For Channel 0" hgroup.quad (0x0+0x08)++0x07 hide.quad 0x00 "DAR0,Destination Address Register For Channel 0" hgroup.quad (0x0+0x10)++0x07 hide.quad 0x00 "LLP0,Linked List Pointer Register For Channel 0" hgroup.quad (0x0+0x18)++0x07 hide.quad 0x00 "CTL0,Control Register For Channel 0" hgroup.quad (0x0+0x20)++0x07 hide.quad 0x00 "SSTAT0,Source Status Register For Channel 0" hgroup.quad (0x0+0x28)++0x07 hide.quad 0x00 "DSTAT0,Destination Status Register For Channel 0" hgroup.quad (0x0+0x30)++0x07 hide.quad 0x00 "SSTATAR0,Source Status Address Register For Channel 0" hgroup.quad (0x0+0x38)++0x07 hide.quad 0x00 "DSTATAR0,Destination Status Address Register For Channel 0" hgroup.quad (0x0+0x40)++0x07 hide.quad 0x00 "CFG0,Configuration Register For Channel 0" hgroup.quad (0x0+0x48)++0x07 hide.quad 0x00 "SGR0,Source Gather Register For Channel 0" hgroup.quad (0x0+0x50)++0x07 hide.quad 0x00 "DSR0,Destination Scatter Register For Channel 0" endif tree.end tree "Channel 1" if (((per.q(ad:0x40105000+0x3A0))&(1<<1))==(1<<1)) group.quad 0x58++0x57 line.quad 0x00 "SAR1,Source Address Register For Channel 1" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR1,Destination Address Register For Channel 1" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP1,Linked List Pointer Register For Channel 1 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL1,Control Register For Channel 1" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT1,Source Status Register For Channel 1" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 1 register" line.quad 0x28 "DSTAT1,Destination Status Register for Channel 1" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 1 register" line.quad 0x30 "SSTATAR1,Source Status Address Register for Channel 1" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR1,Destination Status Address Register for Channel 1" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG1,Configuration Register For Channel 1" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 1 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR1,Source Gather Register for Channel 1" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR1,Destination Scatter Register for Channel 1" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x58++0x07 hide.quad 0x00 "SAR1,Source Address Register For Channel 1" hgroup.quad (0x58+0x08)++0x07 hide.quad 0x00 "DAR1,Destination Address Register For Channel 1" hgroup.quad (0x58+0x10)++0x07 hide.quad 0x00 "LLP1,Linked List Pointer Register For Channel 1" hgroup.quad (0x58+0x18)++0x07 hide.quad 0x00 "CTL1,Control Register For Channel 1" hgroup.quad (0x58+0x20)++0x07 hide.quad 0x00 "SSTAT1,Source Status Register For Channel 1" hgroup.quad (0x58+0x28)++0x07 hide.quad 0x00 "DSTAT1,Destination Status Register For Channel 1" hgroup.quad (0x58+0x30)++0x07 hide.quad 0x00 "SSTATAR1,Source Status Address Register For Channel 1" hgroup.quad (0x58+0x38)++0x07 hide.quad 0x00 "DSTATAR1,Destination Status Address Register For Channel 1" hgroup.quad (0x58+0x40)++0x07 hide.quad 0x00 "CFG1,Configuration Register For Channel 1" hgroup.quad (0x58+0x48)++0x07 hide.quad 0x00 "SGR1,Source Gather Register For Channel 1" hgroup.quad (0x58+0x50)++0x07 hide.quad 0x00 "DSR1,Destination Scatter Register For Channel 1" endif tree.end tree "Channel 2" if (((per.q(ad:0x40105000+0x3A0))&(1<<2))==(1<<2)) group.quad 0xB0++0x57 line.quad 0x00 "SAR2,Source Address Register For Channel 2" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR2,Destination Address Register For Channel 2" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP2,Linked List Pointer Register For Channel 2 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL2,Control Register For Channel 2" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT2,Source Status Register For Channel 2" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 2 register" line.quad 0x28 "DSTAT2,Destination Status Register for Channel 2" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 2 register" line.quad 0x30 "SSTATAR2,Source Status Address Register for Channel 2" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR2,Destination Status Address Register for Channel 2" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG2,Configuration Register For Channel 2" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 2 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR2,Source Gather Register for Channel 2" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR2,Destination Scatter Register for Channel 2" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0xB0++0x07 hide.quad 0x00 "SAR2,Source Address Register For Channel 2" hgroup.quad (0xB0+0x08)++0x07 hide.quad 0x00 "DAR2,Destination Address Register For Channel 2" hgroup.quad (0xB0+0x10)++0x07 hide.quad 0x00 "LLP2,Linked List Pointer Register For Channel 2" hgroup.quad (0xB0+0x18)++0x07 hide.quad 0x00 "CTL2,Control Register For Channel 2" hgroup.quad (0xB0+0x20)++0x07 hide.quad 0x00 "SSTAT2,Source Status Register For Channel 2" hgroup.quad (0xB0+0x28)++0x07 hide.quad 0x00 "DSTAT2,Destination Status Register For Channel 2" hgroup.quad (0xB0+0x30)++0x07 hide.quad 0x00 "SSTATAR2,Source Status Address Register For Channel 2" hgroup.quad (0xB0+0x38)++0x07 hide.quad 0x00 "DSTATAR2,Destination Status Address Register For Channel 2" hgroup.quad (0xB0+0x40)++0x07 hide.quad 0x00 "CFG2,Configuration Register For Channel 2" hgroup.quad (0xB0+0x48)++0x07 hide.quad 0x00 "SGR2,Source Gather Register For Channel 2" hgroup.quad (0xB0+0x50)++0x07 hide.quad 0x00 "DSR2,Destination Scatter Register For Channel 2" endif tree.end tree "Channel 3" if (((per.q(ad:0x40105000+0x3A0))&(1<<3))==(1<<3)) group.quad 0x108++0x57 line.quad 0x00 "SAR3,Source Address Register For Channel 3" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR3,Destination Address Register For Channel 3" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP3,Linked List Pointer Register For Channel 3 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL3,Control Register For Channel 3" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT3,Source Status Register For Channel 3" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 3 register" line.quad 0x28 "DSTAT3,Destination Status Register for Channel 3" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 3 register" line.quad 0x30 "SSTATAR3,Source Status Address Register for Channel 3" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR3,Destination Status Address Register for Channel 3" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG3,Configuration Register For Channel 3" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 3 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR3,Source Gather Register for Channel 3" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR3,Destination Scatter Register for Channel 3" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x108++0x07 hide.quad 0x00 "SAR3,Source Address Register For Channel 3" hgroup.quad (0x108+0x08)++0x07 hide.quad 0x00 "DAR3,Destination Address Register For Channel 3" hgroup.quad (0x108+0x10)++0x07 hide.quad 0x00 "LLP3,Linked List Pointer Register For Channel 3" hgroup.quad (0x108+0x18)++0x07 hide.quad 0x00 "CTL3,Control Register For Channel 3" hgroup.quad (0x108+0x20)++0x07 hide.quad 0x00 "SSTAT3,Source Status Register For Channel 3" hgroup.quad (0x108+0x28)++0x07 hide.quad 0x00 "DSTAT3,Destination Status Register For Channel 3" hgroup.quad (0x108+0x30)++0x07 hide.quad 0x00 "SSTATAR3,Source Status Address Register For Channel 3" hgroup.quad (0x108+0x38)++0x07 hide.quad 0x00 "DSTATAR3,Destination Status Address Register For Channel 3" hgroup.quad (0x108+0x40)++0x07 hide.quad 0x00 "CFG3,Configuration Register For Channel 3" hgroup.quad (0x108+0x48)++0x07 hide.quad 0x00 "SGR3,Source Gather Register For Channel 3" hgroup.quad (0x108+0x50)++0x07 hide.quad 0x00 "DSR3,Destination Scatter Register For Channel 3" endif tree.end tree "Channel 4" if (((per.q(ad:0x40105000+0x3A0))&(1<<4))==(1<<4)) group.quad 0x160++0x57 line.quad 0x00 "SAR4,Source Address Register For Channel 4" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR4,Destination Address Register For Channel 4" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP4,Linked List Pointer Register For Channel 4 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL4,Control Register For Channel 4" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT4,Source Status Register For Channel 4" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 4 register" line.quad 0x28 "DSTAT4,Destination Status Register for Channel 4" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 4 register" line.quad 0x30 "SSTATAR4,Source Status Address Register for Channel 4" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR4,Destination Status Address Register for Channel 4" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG4,Configuration Register For Channel 4" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 4 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR4,Source Gather Register for Channel 4" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR4,Destination Scatter Register for Channel 4" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x160++0x07 hide.quad 0x00 "SAR4,Source Address Register For Channel 4" hgroup.quad (0x160+0x08)++0x07 hide.quad 0x00 "DAR4,Destination Address Register For Channel 4" hgroup.quad (0x160+0x10)++0x07 hide.quad 0x00 "LLP4,Linked List Pointer Register For Channel 4" hgroup.quad (0x160+0x18)++0x07 hide.quad 0x00 "CTL4,Control Register For Channel 4" hgroup.quad (0x160+0x20)++0x07 hide.quad 0x00 "SSTAT4,Source Status Register For Channel 4" hgroup.quad (0x160+0x28)++0x07 hide.quad 0x00 "DSTAT4,Destination Status Register For Channel 4" hgroup.quad (0x160+0x30)++0x07 hide.quad 0x00 "SSTATAR4,Source Status Address Register For Channel 4" hgroup.quad (0x160+0x38)++0x07 hide.quad 0x00 "DSTATAR4,Destination Status Address Register For Channel 4" hgroup.quad (0x160+0x40)++0x07 hide.quad 0x00 "CFG4,Configuration Register For Channel 4" hgroup.quad (0x160+0x48)++0x07 hide.quad 0x00 "SGR4,Source Gather Register For Channel 4" hgroup.quad (0x160+0x50)++0x07 hide.quad 0x00 "DSR4,Destination Scatter Register For Channel 4" endif tree.end tree "Channel 5" if (((per.q(ad:0x40105000+0x3A0))&(1<<5))==(1<<5)) group.quad 0x1B8++0x57 line.quad 0x00 "SAR5,Source Address Register For Channel 5" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR5,Destination Address Register For Channel 5" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP5,Linked List Pointer Register For Channel 5 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL5,Control Register For Channel 5" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT5,Source Status Register For Channel 5" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 5 register" line.quad 0x28 "DSTAT5,Destination Status Register for Channel 5" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 5 register" line.quad 0x30 "SSTATAR5,Source Status Address Register for Channel 5" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR5,Destination Status Address Register for Channel 5" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG5,Configuration Register For Channel 5" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 5 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR5,Source Gather Register for Channel 5" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR5,Destination Scatter Register for Channel 5" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x1B8++0x07 hide.quad 0x00 "SAR5,Source Address Register For Channel 5" hgroup.quad (0x1B8+0x08)++0x07 hide.quad 0x00 "DAR5,Destination Address Register For Channel 5" hgroup.quad (0x1B8+0x10)++0x07 hide.quad 0x00 "LLP5,Linked List Pointer Register For Channel 5" hgroup.quad (0x1B8+0x18)++0x07 hide.quad 0x00 "CTL5,Control Register For Channel 5" hgroup.quad (0x1B8+0x20)++0x07 hide.quad 0x00 "SSTAT5,Source Status Register For Channel 5" hgroup.quad (0x1B8+0x28)++0x07 hide.quad 0x00 "DSTAT5,Destination Status Register For Channel 5" hgroup.quad (0x1B8+0x30)++0x07 hide.quad 0x00 "SSTATAR5,Source Status Address Register For Channel 5" hgroup.quad (0x1B8+0x38)++0x07 hide.quad 0x00 "DSTATAR5,Destination Status Address Register For Channel 5" hgroup.quad (0x1B8+0x40)++0x07 hide.quad 0x00 "CFG5,Configuration Register For Channel 5" hgroup.quad (0x1B8+0x48)++0x07 hide.quad 0x00 "SGR5,Source Gather Register For Channel 5" hgroup.quad (0x1B8+0x50)++0x07 hide.quad 0x00 "DSR5,Destination Scatter Register For Channel 5" endif tree.end tree "Channel 6" if (((per.q(ad:0x40105000+0x3A0))&(1<<6))==(1<<6)) group.quad 0x210++0x57 line.quad 0x00 "SAR6,Source Address Register For Channel 6" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR6,Destination Address Register For Channel 6" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP6,Linked List Pointer Register For Channel 6 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL6,Control Register For Channel 6" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT6,Source Status Register For Channel 6" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 6 register" line.quad 0x28 "DSTAT6,Destination Status Register for Channel 6" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 6 register" line.quad 0x30 "SSTATAR6,Source Status Address Register for Channel 6" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR6,Destination Status Address Register for Channel 6" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG6,Configuration Register For Channel 6" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 6 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR6,Source Gather Register for Channel 6" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR6,Destination Scatter Register for Channel 6" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x210++0x07 hide.quad 0x00 "SAR6,Source Address Register For Channel 6" hgroup.quad (0x210+0x08)++0x07 hide.quad 0x00 "DAR6,Destination Address Register For Channel 6" hgroup.quad (0x210+0x10)++0x07 hide.quad 0x00 "LLP6,Linked List Pointer Register For Channel 6" hgroup.quad (0x210+0x18)++0x07 hide.quad 0x00 "CTL6,Control Register For Channel 6" hgroup.quad (0x210+0x20)++0x07 hide.quad 0x00 "SSTAT6,Source Status Register For Channel 6" hgroup.quad (0x210+0x28)++0x07 hide.quad 0x00 "DSTAT6,Destination Status Register For Channel 6" hgroup.quad (0x210+0x30)++0x07 hide.quad 0x00 "SSTATAR6,Source Status Address Register For Channel 6" hgroup.quad (0x210+0x38)++0x07 hide.quad 0x00 "DSTATAR6,Destination Status Address Register For Channel 6" hgroup.quad (0x210+0x40)++0x07 hide.quad 0x00 "CFG6,Configuration Register For Channel 6" hgroup.quad (0x210+0x48)++0x07 hide.quad 0x00 "SGR6,Source Gather Register For Channel 6" hgroup.quad (0x210+0x50)++0x07 hide.quad 0x00 "DSR6,Destination Scatter Register For Channel 6" endif tree.end tree "Channel 7" if (((per.q(ad:0x40105000+0x3A0))&(1<<7))==(1<<7)) group.quad 0x268++0x57 line.quad 0x00 "SAR7,Source Address Register For Channel 7" hexmask.quad.long 0x00 0.--31. 0x01 " SAR ,Current source address of DMA transfer" line.quad 0x08 "DAR7,Destination Address Register For Channel 7" hexmask.quad.long 0x08 0.--31. 0x01 " DAR ,Current destination address of DMA transfer" line.quad 0x10 "LLP7,Linked List Pointer Register For Channel 7 " hexmask.quad.long 0x10 2.--31. 0x04 " LOC ,Starting address in memory of next LLI" line.quad 0x18 "CTL7,Control Register For Channel 7" bitfld.quad 0x18 44. " DONE ,Done bit" "Not done,Done" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS ,Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN ,Block chaining enable on the source side only" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN ,Block chaining enable on the destination side only" "Disabled,Enabled" bitfld.quad 0x18 20.--22. " TT_FC ,Transfer type and flow control" "Memory to Memory-DMAC,Memory to Peripheral-DMAC,Peripheral to Memory-DMAC,Peripheral to Peripheral-DMAC,Peripheral to Memory-Peripheral,Peripheral to Peripheral-Source Peripheral,Memory to Peripheral-Peripheral,Peripheral to Peripheral-Destination Peripheral" bitfld.quad 0x18 18. " DST_SCATTER_EN ,Destination scatter enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 17. " SRC_GATHER_EN ,Source gather enable" "Disabled,Enabled" bitfld.quad 0x18 14.--16. " SRC_MSIZE ,Source burst transaction length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE ,Destination burst transaction length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC ,Source address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC ,Destination address increment" "Increment,Decrement,No change,No change" bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH ,Source transfer width" "8 bits,16 bits,32 bits,64 bits,?..." textline " " bitfld.quad 0x18 1.--3. " DST_TR_WIDTH ,Destination transfer width" "8 bits,16 bits,32 bits,64 bits,?..." bitfld.quad 0x18 0. " INT_EN ,Interrupt enable bit" "Disabled,Enabled" line.quad 0x20 "SSTAT7,Source Status Register For Channel 7" hexmask.quad.long 0x20 0.--31. 1. " SSTAT ,Source status information retrieved by hardware from the address pointed to by the contents of the SSTATAR 7 register" line.quad 0x28 "DSTAT7,Destination Status Register for Channel 7" hexmask.quad.long 0x28 0.--31. 1. " DSTAT ,Destination status information retrieved by hardware from the address pointed to by the contents of the DSTATAR 7 register" line.quad 0x30 "SSTATAR7,Source Status Address Register for Channel 7" hexmask.quad.long 0x30 0.--31. 0x01 " SSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x38 "DSTATAR7,Destination Status Address Register for Channel 7" hexmask.quad.long 0x38 0.--31. 0x01 " DSTATAR ,Pointer from where hardware can fetch the destination status information" line.quad 0x40 "CFG7,Configuration Register For Channel 7" bitfld.quad 0x40 43.--46. " DEST_PER ,Assigns a hardware handshaking interface to the destination of channel 7 " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 39.--42. " SRC_PER ,Assigns a hardware handshaking interface to the source of channel 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x40 38. " SS_UPD_EN ,Source status update enable" "Disabled,Enabled" textline " " bitfld.quad 0x40 37. " DS_UPD_EN ,Destination status update enable" "Disabled,Enabled" bitfld.quad 0x40 33. " FIFO_MODE ,Amount of space or data needs to be available in the FIFO" "Single AHB transfer,Half the FIFO depth" bitfld.quad 0x40 32. " FCMODE ,Flow control mode" "Serviced,Not serviced" textline " " bitfld.quad 0x40 31. " RELOAD_DST ,Automatic destination reload" "Not reloaded,Reloaded" bitfld.quad 0x40 30. " RELOAD_SRC ,Automatic source reload" "Not reloaded,Reloaded" hexmask.quad.word 0x40 20.--29. 1. " MAX_ABRST ,Maximum burst length" textline " " bitfld.quad 0x40 19. " SRC_HS_POL ,Source handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 18. " DST_HS_POL ,Destination handshaking interface polarity" "Active high,Active low" bitfld.quad 0x40 11. " HS_SEL_SRC ,Source software or hardware handshaking select" "Hardware,Software" textline " " bitfld.quad 0x40 10. " HS_SEL_DST ,Destination software or hardware handshaking select" "Hardware,Software" rbitfld.quad 0x40 9. " FIFO_EMPTY ,Channel FIFO state" "Not empty,Empty" bitfld.quad 0x40 8. " CH_SUSP ,Channel suspend" "Not suspended,Suspended" textline " " bitfld.quad 0x40 5.--7. " CH_PRIOR ,Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x48 "SGR7,Source Gather Register for Channel 7" hexmask.quad.word 0x48 20.--31. 1. " SGC ,Source gather count" hexmask.quad.tbyte 0x48 0.--19. 1. " SGI ,Source gather interval" line.quad 0x50 "DSR7,Destination Scatter Register for Channel 7" hexmask.quad.word 0x50 20.--31. 1. " DSC ,Destination scatter count" hexmask.quad.tbyte 0x50 0.--19. 1. " DSI ,Destination scatter interval" else hgroup.quad 0x268++0x07 hide.quad 0x00 "SAR7,Source Address Register For Channel 7" hgroup.quad (0x268+0x08)++0x07 hide.quad 0x00 "DAR7,Destination Address Register For Channel 7" hgroup.quad (0x268+0x10)++0x07 hide.quad 0x00 "LLP7,Linked List Pointer Register For Channel 7" hgroup.quad (0x268+0x18)++0x07 hide.quad 0x00 "CTL7,Control Register For Channel 7" hgroup.quad (0x268+0x20)++0x07 hide.quad 0x00 "SSTAT7,Source Status Register For Channel 7" hgroup.quad (0x268+0x28)++0x07 hide.quad 0x00 "DSTAT7,Destination Status Register For Channel 7" hgroup.quad (0x268+0x30)++0x07 hide.quad 0x00 "SSTATAR7,Source Status Address Register For Channel 7" hgroup.quad (0x268+0x38)++0x07 hide.quad 0x00 "DSTATAR7,Destination Status Address Register For Channel 7" hgroup.quad (0x268+0x40)++0x07 hide.quad 0x00 "CFG7,Configuration Register For Channel 7" hgroup.quad (0x268+0x48)++0x07 hide.quad 0x00 "SGR7,Source Gather Register For Channel 7" hgroup.quad (0x268+0x50)++0x07 hide.quad 0x00 "DSR7,Destination Scatter Register For Channel 7" endif tree.end textline " " group.quad 0x2C0++0x07 line.quad 0x00 "RAWTFR,Raw Status For IntTFR Interrupt Register" bitfld.quad 0x00 7. " RAW[7] ,Raw interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Raw interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Raw interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Raw interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Raw interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Raw interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Raw interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Raw interrupt status channel 0" "No interrupt,Interrupt" group.quad 0x2C8++0x07 line.quad 0x00 "RAWBLOCK,Raw Status For IntBLOCK Interrupt Register" bitfld.quad 0x00 7. " RAW[7] ,Raw interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Raw interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Raw interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Raw interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Raw interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Raw interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Raw interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Raw interrupt status channel 0" "No interrupt,Interrupt" group.quad 0x2D0++0x07 line.quad 0x00 "RAWSRCTRAN,Raw Status For IntSRCTRAN Interrupt Register" bitfld.quad 0x00 7. " RAW[7] ,Raw interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Raw interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Raw interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Raw interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Raw interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Raw interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Raw interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Raw interrupt status channel 0" "No interrupt,Interrupt" group.quad 0x2D8++0x07 line.quad 0x00 "RAWDSTTRAN,Raw Status For IntDSTTRAN Interrupt Register" bitfld.quad 0x00 7. " RAW[7] ,Raw interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Raw interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Raw interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Raw interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Raw interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Raw interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Raw interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Raw interrupt status channel 0" "No interrupt,Interrupt" group.quad 0x2E0++0x07 line.quad 0x00 "RAWERR,Raw Status For IntERR Interrupt Register" bitfld.quad 0x00 7. " RAW[7] ,Raw interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Raw interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Raw interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Raw interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Raw interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Raw interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Raw interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Raw interrupt status channel 0" "No interrupt,Interrupt" newline rgroup.quad 0x2E8++0x07 line.quad 0x00 "STATUSTFR,Status for IntTFR Interrupt Register" bitfld.quad 0x00 7. " STATUS[7] ,Interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Interrupt status channel 0" "No interrupt,Interrupt" rgroup.quad 0x2F0++0x07 line.quad 0x00 "STATUSBLOCK,Status for IntBLOCK Interrupt Register" bitfld.quad 0x00 7. " STATUS[7] ,Interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Interrupt status channel 0" "No interrupt,Interrupt" rgroup.quad 0x2F8++0x07 line.quad 0x00 "STATUSSRCTRAN,Status for IntSRCTRAN Interrupt Register" bitfld.quad 0x00 7. " STATUS[7] ,Interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Interrupt status channel 0" "No interrupt,Interrupt" rgroup.quad 0x300++0x07 line.quad 0x00 "STATUSDSTTRAN,Status for IntDSTTRAN Interrupt Register" bitfld.quad 0x00 7. " STATUS[7] ,Interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Interrupt status channel 0" "No interrupt,Interrupt" rgroup.quad 0x308++0x07 line.quad 0x00 "STATUSERR,Status for IntERR Interrupt Register" bitfld.quad 0x00 7. " STATUS[7] ,Interrupt status channel 7" "No interrupt,Interrupt" bitfld.quad 0x00 6. " [6] ,Interrupt status channel 6" "No interrupt,Interrupt" bitfld.quad 0x00 5. " [5] ,Interrupt status channel 5" "No interrupt,Interrupt" bitfld.quad 0x00 4. " [4] ,Interrupt status channel 4" "No interrupt,Interrupt" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt status channel 3" "No interrupt,Interrupt" bitfld.quad 0x00 2. " [2] ,Interrupt status channel 2" "No interrupt,Interrupt" bitfld.quad 0x00 1. " [1] ,Interrupt status channel 1" "No interrupt,Interrupt" bitfld.quad 0x00 0. " [0] ,Interrupt status channel 0" "No interrupt,Interrupt" newline group.quad 0x310++0x07 line.quad 0x00 "MASKTFR,Mask for IntTFR Interrupt Register" bitfld.quad 0x00 15. " INT_MASK_WE[7] ,Interrupt mask 7 write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Interrupt mask 6 write enable" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Interrupt mask 5 write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Interrupt mask 4 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Interrupt mask 3 write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Interrupt mask 2 write enable" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Interrupt mask 1 write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Interrupt mask 0 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " INT_MASK[7] ,Interrupt mask channel 7" "Masked,Unmasked" bitfld.quad 0x00 6. " [6] ,Interrupt mask channel 6" "Masked,Unmasked" bitfld.quad 0x00 5. " [5] ,Interrupt mask channel 5" "Masked,Unmasked" bitfld.quad 0x00 4. " [4] ,Interrupt mask channel 4" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt mask channel 3" "Masked,Unmasked" bitfld.quad 0x00 2. " [2] ,Interrupt mask channel 2" "Masked,Unmasked" bitfld.quad 0x00 1. " [1] ,Interrupt mask channel 1" "Masked,Unmasked" bitfld.quad 0x00 0. " [0] ,Interrupt mask channel 0" "Masked,Unmasked" group.quad 0x318++0x07 line.quad 0x00 "MASKBLOCK,Mask for IntBLOCK Interrupt Register" bitfld.quad 0x00 15. " INT_MASK_WE[7] ,Interrupt mask 7 write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Interrupt mask 6 write enable" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Interrupt mask 5 write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Interrupt mask 4 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Interrupt mask 3 write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Interrupt mask 2 write enable" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Interrupt mask 1 write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Interrupt mask 0 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " INT_MASK[7] ,Interrupt mask channel 7" "Masked,Unmasked" bitfld.quad 0x00 6. " [6] ,Interrupt mask channel 6" "Masked,Unmasked" bitfld.quad 0x00 5. " [5] ,Interrupt mask channel 5" "Masked,Unmasked" bitfld.quad 0x00 4. " [4] ,Interrupt mask channel 4" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt mask channel 3" "Masked,Unmasked" bitfld.quad 0x00 2. " [2] ,Interrupt mask channel 2" "Masked,Unmasked" bitfld.quad 0x00 1. " [1] ,Interrupt mask channel 1" "Masked,Unmasked" bitfld.quad 0x00 0. " [0] ,Interrupt mask channel 0" "Masked,Unmasked" group.quad 0x320++0x07 line.quad 0x00 "MASKSRCTRAN,Mask for IntSRCTRAN Interrupt Register" bitfld.quad 0x00 15. " INT_MASK_WE[7] ,Interrupt mask 7 write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Interrupt mask 6 write enable" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Interrupt mask 5 write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Interrupt mask 4 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Interrupt mask 3 write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Interrupt mask 2 write enable" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Interrupt mask 1 write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Interrupt mask 0 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " INT_MASK[7] ,Interrupt mask channel 7" "Masked,Unmasked" bitfld.quad 0x00 6. " [6] ,Interrupt mask channel 6" "Masked,Unmasked" bitfld.quad 0x00 5. " [5] ,Interrupt mask channel 5" "Masked,Unmasked" bitfld.quad 0x00 4. " [4] ,Interrupt mask channel 4" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt mask channel 3" "Masked,Unmasked" bitfld.quad 0x00 2. " [2] ,Interrupt mask channel 2" "Masked,Unmasked" bitfld.quad 0x00 1. " [1] ,Interrupt mask channel 1" "Masked,Unmasked" bitfld.quad 0x00 0. " [0] ,Interrupt mask channel 0" "Masked,Unmasked" group.quad 0x328++0x07 line.quad 0x00 "MASKDSTTRAN,Mask for IntDSTTRAN Interrupt Register" bitfld.quad 0x00 15. " INT_MASK_WE[7] ,Interrupt mask 7 write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Interrupt mask 6 write enable" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Interrupt mask 5 write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Interrupt mask 4 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Interrupt mask 3 write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Interrupt mask 2 write enable" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Interrupt mask 1 write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Interrupt mask 0 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " INT_MASK[7] ,Interrupt mask channel 7" "Masked,Unmasked" bitfld.quad 0x00 6. " [6] ,Interrupt mask channel 6" "Masked,Unmasked" bitfld.quad 0x00 5. " [5] ,Interrupt mask channel 5" "Masked,Unmasked" bitfld.quad 0x00 4. " [4] ,Interrupt mask channel 4" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt mask channel 3" "Masked,Unmasked" bitfld.quad 0x00 2. " [2] ,Interrupt mask channel 2" "Masked,Unmasked" bitfld.quad 0x00 1. " [1] ,Interrupt mask channel 1" "Masked,Unmasked" bitfld.quad 0x00 0. " [0] ,Interrupt mask channel 0" "Masked,Unmasked" group.quad 0x330++0x07 line.quad 0x00 "MASKERR,Mask for IntERR Interrupt Register" bitfld.quad 0x00 15. " INT_MASK_WE[7] ,Interrupt mask 7 write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Interrupt mask 6 write enable" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Interrupt mask 5 write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Interrupt mask 4 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Interrupt mask 3 write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Interrupt mask 2 write enable" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Interrupt mask 1 write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Interrupt mask 0 write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " INT_MASK[7] ,Interrupt mask channel 7" "Masked,Unmasked" bitfld.quad 0x00 6. " [6] ,Interrupt mask channel 6" "Masked,Unmasked" bitfld.quad 0x00 5. " [5] ,Interrupt mask channel 5" "Masked,Unmasked" bitfld.quad 0x00 4. " [4] ,Interrupt mask channel 4" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt mask channel 3" "Masked,Unmasked" bitfld.quad 0x00 2. " [2] ,Interrupt mask channel 2" "Masked,Unmasked" bitfld.quad 0x00 1. " [1] ,Interrupt mask channel 1" "Masked,Unmasked" bitfld.quad 0x00 0. " [0] ,Interrupt mask channel 0" "Masked,Unmasked" newline wgroup.quad 0x338++0x07 line.quad 0x00 "CLEARTFR,Clear for IntTFR Interrupt Register" bitfld.quad 0x00 7. " CLEAR[7] ,Interrupt clear channel 7" "No effect,Clear" bitfld.quad 0x00 6. " [6] ,Interrupt clear channel 6" "No effect,Clear" bitfld.quad 0x00 5. " [5] ,Interrupt clear channel 5" "No effect,Clear" bitfld.quad 0x00 4. " [4] ,Interrupt clear channel 4" "No effect,Clear" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt clear channel 3" "No effect,Clear" bitfld.quad 0x00 2. " [2] ,Interrupt clear channel 2" "No effect,Clear" bitfld.quad 0x00 1. " [1] ,Interrupt clear channel 1" "No effect,Clear" bitfld.quad 0x00 0. " [0] ,Interrupt clear channel 0" "No effect,Clear" wgroup.quad 0x340++0x07 line.quad 0x00 "CLEARBLOCK,Clear for IntBLOCK Interrupt Register" bitfld.quad 0x00 7. " CLEAR[7] ,Interrupt clear channel 7" "No effect,Clear" bitfld.quad 0x00 6. " [6] ,Interrupt clear channel 6" "No effect,Clear" bitfld.quad 0x00 5. " [5] ,Interrupt clear channel 5" "No effect,Clear" bitfld.quad 0x00 4. " [4] ,Interrupt clear channel 4" "No effect,Clear" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt clear channel 3" "No effect,Clear" bitfld.quad 0x00 2. " [2] ,Interrupt clear channel 2" "No effect,Clear" bitfld.quad 0x00 1. " [1] ,Interrupt clear channel 1" "No effect,Clear" bitfld.quad 0x00 0. " [0] ,Interrupt clear channel 0" "No effect,Clear" wgroup.quad 0x348++0x07 line.quad 0x00 "CLEARSRCTRAN,Clear for IntSRCTRAN Interrupt Register" bitfld.quad 0x00 7. " CLEAR[7] ,Interrupt clear channel 7" "No effect,Clear" bitfld.quad 0x00 6. " [6] ,Interrupt clear channel 6" "No effect,Clear" bitfld.quad 0x00 5. " [5] ,Interrupt clear channel 5" "No effect,Clear" bitfld.quad 0x00 4. " [4] ,Interrupt clear channel 4" "No effect,Clear" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt clear channel 3" "No effect,Clear" bitfld.quad 0x00 2. " [2] ,Interrupt clear channel 2" "No effect,Clear" bitfld.quad 0x00 1. " [1] ,Interrupt clear channel 1" "No effect,Clear" bitfld.quad 0x00 0. " [0] ,Interrupt clear channel 0" "No effect,Clear" wgroup.quad 0x350++0x07 line.quad 0x00 "CLEARDSTTRAN,Clear for IntDSTTRAN Interrupt Register" bitfld.quad 0x00 7. " CLEAR[7] ,Interrupt clear channel 7" "No effect,Clear" bitfld.quad 0x00 6. " [6] ,Interrupt clear channel 6" "No effect,Clear" bitfld.quad 0x00 5. " [5] ,Interrupt clear channel 5" "No effect,Clear" bitfld.quad 0x00 4. " [4] ,Interrupt clear channel 4" "No effect,Clear" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt clear channel 3" "No effect,Clear" bitfld.quad 0x00 2. " [2] ,Interrupt clear channel 2" "No effect,Clear" bitfld.quad 0x00 1. " [1] ,Interrupt clear channel 1" "No effect,Clear" bitfld.quad 0x00 0. " [0] ,Interrupt clear channel 0" "No effect,Clear" wgroup.quad 0x358++0x07 line.quad 0x00 "CLEARERR,Clear for IntERR Interrupt Register" bitfld.quad 0x00 7. " CLEAR[7] ,Interrupt clear channel 7" "No effect,Clear" bitfld.quad 0x00 6. " [6] ,Interrupt clear channel 6" "No effect,Clear" bitfld.quad 0x00 5. " [5] ,Interrupt clear channel 5" "No effect,Clear" bitfld.quad 0x00 4. " [4] ,Interrupt clear channel 4" "No effect,Clear" textline " " bitfld.quad 0x00 3. " [3] ,Interrupt clear channel 3" "No effect,Clear" bitfld.quad 0x00 2. " [2] ,Interrupt clear channel 2" "No effect,Clear" bitfld.quad 0x00 1. " [1] ,Interrupt clear channel 1" "No effect,Clear" bitfld.quad 0x00 0. " [0] ,Interrupt clear channel 0" "No effect,Clear" newline rgroup.quad 0x360++0x07 line.quad 0x00 "STATUSINT,Combined Interrupt Status Register" bitfld.quad 0x00 4. " ERR ,OR of the contents of StatusErr register" "Not occurred,Occurred" bitfld.quad 0x00 3. " DSTT ,OR of the contents of StatusDst register" "Not occurred,Occurred" bitfld.quad 0x00 2. " SRCT ,OR of the contents of StatusSrcTran register" "Not occurred,Occurred" bitfld.quad 0x00 1. " BLOCK ,OR of the contents of StatusBlock register" "Not occurred,Occurred" textline " " bitfld.quad 0x00 0. " TFR ,OR of the contents of StatusTfr register" "Not occurred,Occurred" group.quad 0x368++0x3F line.quad 0x00 "REQSRCREG,Source Software Transaction Request Register" bitfld.quad 0x00 15. " SRC_REQ_WE[7] ,Source request Write-Enable channel 7" "Disabled,Enabled" bitfld.quad 0x00 14. " [6] ,Source request Write-Enable channel 6" "Disabled,Enabled" bitfld.quad 0x00 13. " [5] ,Source request Write-Enable channel 5" "Disabled,Enabled" bitfld.quad 0x00 12. " [4] ,Source request Write-Enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " [3] ,Source request Write-Enable channel 3" "Disabled,Enabled" bitfld.quad 0x00 10. " [2] ,Source request Write-Enable channel 2" "Disabled,Enabled" bitfld.quad 0x00 9. " [1] ,Source request Write-Enable channel 1" "Disabled,Enabled" bitfld.quad 0x00 8. " [0] ,Source request Write-Enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " SRC_REQ[7] ,Source request channel 7" "Not requested,Requested" bitfld.quad 0x00 6. " [6] ,Source request channel 6" "Not requested,Requested" bitfld.quad 0x00 5. " [5] ,Source request channel 5" "Not requested,Requested" bitfld.quad 0x00 4. " [4] ,Source request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x00 3. " [3] ,Source request channel 3" "Not requested,Requested" bitfld.quad 0x00 2. " [2] ,Source request channel 2" "Not requested,Requested" bitfld.quad 0x00 1. " [1] ,Source request channel 1" "Not requested,Requested" bitfld.quad 0x00 0. " [0] ,Source request channel 0" "Not requested,Requested" line.quad 0x08 "REQDSTREG,Destination Software Transaction Request Register" bitfld.quad 0x08 15. " DST_REQ_WE[7] ,Destination request Write-Enable channel 7" "Disabled,Enabled" bitfld.quad 0x08 14. " [6] ,Destination request Write-Enable channel 6" "Disabled,Enabled" bitfld.quad 0x08 13. " [5] ,Destination request Write-Enable channel 5" "Disabled,Enabled" bitfld.quad 0x08 12. " [4] ,Destination request Write-Enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x08 11. " [3] ,Destination request Write-Enable channel 3" "Disabled,Enabled" bitfld.quad 0x08 10. " [2] ,Destination request Write-Enable channel 2" "Disabled,Enabled" bitfld.quad 0x08 9. " [1] ,Destination request Write-Enable channel 1" "Disabled,Enabled" bitfld.quad 0x08 8. " [0] ,Destination request Write-Enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x08 7. " DST_REQ[7] ,Destination request channel 7" "Not requested,Requested" bitfld.quad 0x08 6. " [6] ,Destination request channel 6" "Not requested,Requested" bitfld.quad 0x08 5. " [5] ,Destination request channel 5" "Not requested,Requested" bitfld.quad 0x08 4. " [4] ,Destination request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x08 3. " [3] ,Destination request channel 3" "Not requested,Requested" bitfld.quad 0x08 2. " [2] ,Destination request channel 2" "Not requested,Requested" bitfld.quad 0x08 1. " [1] ,Destination request channel 1" "Not requested,Requested" bitfld.quad 0x08 0. " [0] ,Destination request channel 0" "Not requested,Requested" line.quad 0x10 "SGLRQSRCREG,Single Source Transaction Request Register" bitfld.quad 0x10 15. " SRC_SGLREQ_WE[7] ,Source single request Write-Enable channel 7" "Disabled,Enabled" bitfld.quad 0x10 14. " [6] ,Source single request Write-Enable channel 6" "Disabled,Enabled" bitfld.quad 0x10 13. " [5] ,Source single request Write-Enable channel 5" "Disabled,Enabled" bitfld.quad 0x10 12. " [4] ,Source single request Write-Enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x10 11. " [3] ,Source single request Write-Enable channel 3" "Disabled,Enabled" bitfld.quad 0x10 10. " [2] ,Source single request Write-Enable channel 2" "Disabled,Enabled" bitfld.quad 0x10 9. " [1] ,Source single request Write-Enable channel 1" "Disabled,Enabled" bitfld.quad 0x10 8. " [0] ,Source single request Write-Enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x10 7. " SRC_SGLREQ[7] ,Source single request channel 7" "Not requested,Requested" bitfld.quad 0x10 6. " [6] ,Source single request channel 6" "Not requested,Requested" bitfld.quad 0x10 5. " [5] ,Source single request channel 5" "Not requested,Requested" bitfld.quad 0x10 4. " [4] ,Source single request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x10 3. " [3] ,Source single request channel 3" "Not requested,Requested" bitfld.quad 0x10 2. " [2] ,Source single request channel 2" "Not requested,Requested" bitfld.quad 0x10 1. " [1] ,Source single request channel 1" "Not requested,Requested" bitfld.quad 0x10 0. " [0] ,Source single request channel 0" "Not requested,Requested" line.quad 0x18 "SGLRQDSTREG,Single Destination Transaction Request Register" bitfld.quad 0x18 15. " DST_SGLREQ_WE[7] ,Destination single or burst request write-enable channel 7" "Disabled,Enabled" bitfld.quad 0x18 14. " [6] ,Destination single or burst request write-enable channel 6" "Disabled,Enabled" bitfld.quad 0x18 13. " [5] ,Destination single or burst request write-enable channel 5" "Disabled,Enabled" bitfld.quad 0x18 12. " [4] ,Destination single or burst request write-enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x18 11. " [3] ,Destination single or burst request write-enable channel 3" "Disabled,Enabled" bitfld.quad 0x18 10. " [2] ,Destination single or burst request write-enable channel 2" "Disabled,Enabled" bitfld.quad 0x18 9. " [1] ,Destination single or burst request write-enable channel 1" "Disabled,Enabled" bitfld.quad 0x18 8. " [0] ,Destination single or burst request write-enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x18 7. " DST_SGLREQ[7] ,Destination single or burst request channel 7" "Not requested,Requested" bitfld.quad 0x18 6. " [6] ,Destination single or burst request channel 6" "Not requested,Requested" bitfld.quad 0x18 5. " [5] ,Destination single or burst request channel 5" "Not requested,Requested" bitfld.quad 0x18 4. " [4] ,Destination single or burst request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x18 3. " [3] ,Destination single or burst request channel 3" "Not requested,Requested" bitfld.quad 0x18 2. " [2] ,Destination single or burst request channel 2" "Not requested,Requested" bitfld.quad 0x18 1. " [1] ,Destination single or burst request channel 1" "Not requested,Requested" bitfld.quad 0x18 0. " [0] ,Destination single or burst request channel 0" "Not requested,Requested" line.quad 0x20 "LSTSRCREG,Last Source Transaction Request Register" bitfld.quad 0x20 15. " LSTSRC_WE[7] ,Source last transaction request write-enable channel 7" "Disabled,Enabled" bitfld.quad 0x20 14. " [6] ,Source last transaction request write-enable channel 6" "Disabled,Enabled" bitfld.quad 0x20 13. " [5] ,Source last transaction request write-enable channel 5" "Disabled,Enabled" bitfld.quad 0x20 12. " [4] ,Source last transaction request write-enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x20 11. " [3] ,Source last transaction request write-enable channel 3" "Disabled,Enabled" bitfld.quad 0x20 10. " [2] ,Source last transaction request write-enable channel 2" "Disabled,Enabled" bitfld.quad 0x20 9. " [1] ,Source last transaction request write-enable channel 1" "Disabled,Enabled" bitfld.quad 0x20 8. " [0] ,Source last transaction request write-enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x20 7. " LSTSRC[7] ,Source last transaction request channel 7" "Not requested,Requested" bitfld.quad 0x20 6. " [6] ,Source last transaction request channel 6" "Not requested,Requested" bitfld.quad 0x20 5. " [5] ,Source last transaction request channel 5" "Not requested,Requested" bitfld.quad 0x20 4. " [4] ,Source last transaction request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x20 3. " [3] ,Source last transaction request channel 3" "Not requested,Requested" bitfld.quad 0x20 2. " [2] ,Source last transaction request channel 2" "Not requested,Requested" bitfld.quad 0x20 1. " [1] ,Source last transaction request channel 1" "Not requested,Requested" bitfld.quad 0x20 0. " [0] ,Source last transaction request channel 0" "Not requested,Requested" line.quad 0x28 "LSTDSTREG,Last Destination Transaction Request Register" bitfld.quad 0x28 15. " LSTDST_WE[7] ,Destination last transaction request write-enable channel 7" "Disabled,Enabled" bitfld.quad 0x28 14. " [6] ,Destination last transaction request write-enable channel 6" "Disabled,Enabled" bitfld.quad 0x28 13. " [5] ,Destination last transaction request write-enable channel 5" "Disabled,Enabled" bitfld.quad 0x28 12. " [4] ,Destination last transaction request write-enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x28 11. " [3] ,Destination last transaction request write-enable channel 3" "Disabled,Enabled" bitfld.quad 0x28 10. " [2] ,Destination last transaction request write-enable channel 2" "Disabled,Enabled" bitfld.quad 0x28 9. " [1] ,Destination last transaction request write-enable channel 1" "Disabled,Enabled" bitfld.quad 0x28 8. " [0] ,Destination last transaction request write-enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x28 7. " LSTDST[7] ,Destination last transaction request channel 7" "Not requested,Requested" bitfld.quad 0x28 6. " [6] ,Destination last transaction request channel 6" "Not requested,Requested" bitfld.quad 0x28 5. " [5] ,Destination last transaction request channel 5" "Not requested,Requested" bitfld.quad 0x28 4. " [4] ,Destination last transaction request channel 4" "Not requested,Requested" textline " " bitfld.quad 0x28 3. " [3] ,Destination last transaction request channel 3" "Not requested,Requested" bitfld.quad 0x28 2. " [2] ,Destination last transaction request channel 2" "Not requested,Requested" bitfld.quad 0x28 1. " [1] ,Destination last transaction request channel 1" "Not requested,Requested" bitfld.quad 0x28 0. " [0] ,Destination last transaction request channel 0" "Not requested,Requested" line.quad 0x30 "DMACFGREG,DMA Configuration Register" bitfld.quad 0x30 0. " DMA_EN ,DMA controller enable bit" "Disabled,Enabled" line.quad 0x38 "CHENREG,DMA Controller Channel enable Register" bitfld.quad 0x38 15. " CH_EN_WE[7] ,Write-enable channel 7" "Disabled,Enabled" bitfld.quad 0x38 14. " [6] ,Write-enable channel 6" "Disabled,Enabled" bitfld.quad 0x38 13. " [5] ,Write-enable channel 5" "Disabled,Enabled" bitfld.quad 0x38 12. " [4] ,Write-enable channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x38 11. " [3] ,Write-enable channel 3" "Disabled,Enabled" bitfld.quad 0x38 10. " [2] ,Write-enable channel 2" "Disabled,Enabled" bitfld.quad 0x38 9. " [1] ,Write-enable channel 1" "Disabled,Enabled" bitfld.quad 0x38 8. " [0] ,Write-enable channel 0" "Disabled,Enabled" textline " " bitfld.quad 0x38 7. " CH_EN[7] ,Enables/Disables channel 7" "Disabled,Enabled" bitfld.quad 0x38 6. " [6] ,Enables/Disables channel 6" "Disabled,Enabled" bitfld.quad 0x38 5. " [5] ,Enables/Disables channel 5" "Disabled,Enabled" bitfld.quad 0x38 4. " [4] ,Enables/Disables channel 4" "Disabled,Enabled" textline " " bitfld.quad 0x38 3. " [3] ,Enables/Disables channel 3" "Disabled,Enabled" bitfld.quad 0x38 2. " [2] ,Enables/Disables channel 2" "Disabled,Enabled" bitfld.quad 0x38 1. " [1] ,Enables/Disables channel 1" "Disabled,Enabled" bitfld.quad 0x38 0. " [0] ,Enables/Disables channel 0" "Disabled,Enabled" rgroup.quad 0x3A8++0x07 line.quad 0x00 "DMAIDREG,DMA ID Register" hexmask.quad.long 0x00 0.--31. 1. " DMA_ID ,DMA ID register" group.quad 0x3B0++0x07 line.quad 0x00 "DMATESTREG,DMA Controller Test Register" bitfld.quad 0x00 0. " TEST_SLV_IF ,AHB slave interface test mode" "Disabled,Enabled" width 0x0B tree.end tree.end sif cpu()!="R9A06G034-CM3" tree "RTC (Real-Time Clock)" base ad:0x40006000 width 12. if (((per.l(ad:0x40006000))&0x80)==0x80) group.long 0x00++0x03 line.long 0x00 "RTCA0CTL0,RTC Control Register 0" bitfld.long 0x00 7. " RTCA0CE ,RTC Controller enable bit" "Disabled,Enabled" rbitfld.long 0x00 6. " RTCA0CEST ,RTC Controller enable status" "Stopped,Started" bitfld.long 0x00 5. " RTCA0AMPM ,Display format" "12 hour,24 hour" else group.long 0x00++0x03 line.long 0x00 "RTCA0CTL0,RTC Control Register 0" bitfld.long 0x00 7. " RTCA0CE ,RTC Controller enable bit" "Disabled,Enabled" rbitfld.long 0x00 6. " RTCA0CEST ,RTC Controller enable status" "Stopped,Started" bitfld.long 0x00 5. " RTCA0AMPM ,Display format" "12 hour,24 hour" bitfld.long 0x00 4. " RTCA0SLSB ,RTCA0SUBU/RTCA0SCMP enable/disable setting" "Enabled SUBU/disabled SCMP,Disabled SUBU/enabled SMPC" endif group.long 0x04++0x07 line.long 0x00 "RTCA0CTL1,RTC Control Register 1" bitfld.long 0x00 4. " RTCA0ALME ,Alarm interrupt RTCATINTAL output enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " RTCA01SE ,1 second interrupt RTCATINT1S output enable bit" "Disabled,Enabled" bitfld.long 0x00 0.--2. " RTCA0CT ,Fixed interval interrupt output setting bit" "Stop,0.25 seconds,0.5 seconds,1 second,1 minute,1 hour,1 day,1 month" line.long 0x04 "RTCA0CTL2,RTC Control Register 2" rbitfld.long 0x04 5. " RTCA0WUST ,RTCA0SUBU write status" "Completed,In progress" rbitfld.long 0x04 4. " RTCA0WSST ,RTCA0SCMP write status" "Completed,In progress" rbitfld.long 0x04 3. " RTCA0RSST ,RTCA0SRBU transfer status" "Not completed,Completed" bitfld.long 0x04 2. " RTCA0RSUB ,RTCA0SUBC data transfer control" "Data hold,Transfer" textline " " rbitfld.long 0x04 1. " RTCA0WST ,RTC Controller counter wait status" "Not stopped,Stopped" bitfld.long 0x04 0. " RTCA0WAIT ,RTC Controller counter wait control" "Counter,Count-up" rgroup.long 0x0C++0x07 line.long 0x00 "RTCA0SUBC,RTC Sub Count Register" hexmask.long.tbyte 0x00 0.--21. 1. " RTCA0SUBC ,Register that counts the 1 second reference time" line.long 0x04 "RTCA0SRBU,RTC Sub Count Register Read Buffer" hexmask.long.tbyte 0x04 0.--21. 0x01 " RTCA0SRBU ,Read buffer register of RTCA0SUBC" group.long 0x14++0x07 line.long 0x00 "RTCA0SEC,RTC Sec Count Buffer Register" bitfld.long 0x00 4.--6. " RTCA0SEC ,RTC Second Count buffer in BDC format" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",RTC Second Count buffer in BDC format" "0,1,2,3,4,5,6,7,8,9,?..." line.long 0x04 "RTCA0MIN,RTC Min Count Buffer Register" bitfld.long 0x04 4.--6. " RTCA0MIN ,RTC Minute Count buffer in BDC format" "0,1,2,3,4,5,?..." bitfld.long 0x04 0.--3. ",RTC Minute Count buffer in BDC format" "0,1,2,3,4,5,6,7,8,9,?..." if (((per.l(ad:0x40006000))&0x20)==0x20) group.long 0x1C++0x03 line.long 0x00 "RTCA0HOUR,RTC Hour Count Buffer Register" bitfld.long 0x00 0.--5. " RTCA0HOUR ,RTC Hour Count buffer in BDC format" "0,1,2,3,4,5,6,7,8,9,,,,,,,10,11,12,13,14,15,16,17,18,19,,,,,,,20,21,22,23,?..." else group.long 0x1C++0x03 line.long 0x00 "RTCA0HOUR,RTC Hour Count Buffer Register" bitfld.long 0x00 0.--5. " RTCA0HOUR ,RTC Hour Count buffer in BDC format" ",1 am,2 am,3 am,4 am,5 am,6 am,7 am,8 am,9 am,,,,,,,10 am,11 am,12 am,,,,,,,,,,,,,,,1 pm,2 pm,3 pm,4 pm,5 pm,6 pm,7 pm,8 pm,9 pm,,,,,,,10 pm,11 pm,12 pm,?..." endif group.long 0x20++0x03 line.long 0x00 "RTCA0WEEK,RTC Week Count Buffer Register" bitfld.long 0x00 0.--2. " RTCA0WEEK ,RTC Week Count register in BDC format" "Sunday,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,?..." if (((per.l(ad:0x40006000+0x28))&0x1F)==(0x01||0x03||0x05||0x07||0x08||0x10||0x12)) if (((per.l(ad:0x40006000+0x24))&0x30)==0x30) group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-" elif (((per.l(ad:0x40006000+0x24))&0x30)==0x00) group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" endif elif (((per.l(ad:0x40006000+0x28))&0x1F)==0x02) if (((per.l(ad:0x40006000+0x2C))&0xFF)==(0x00||0x04||0x08||0x12||0x16||0x20||0x24||0x28))||(((per.l(ad:0x40006000+0x2C))&0xFF)==(0x32||0x36||0x40||0x44||0x48))||(((per.l(ad:0x40006000+0x2C))&0xFF)==(0x52||0x56||0x60||0x64||0x68||0x72||0x76||0x80))||(((per.l(ad:0x40006000+0x2C))&0xFF)==(0x84||0x88||0x92||0x96)) if (((per.l(ad:0x40006000+0x24))&0x30)==0x30) group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" elif (((per.l(ad:0x40006000+0x24))&0x30)==0x00) group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" endif else if (((per.l(ad:0x40006000+0x24))&0x30)==0x30) group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" elif (((per.l(ad:0x40006000+0x24))&0x30)==0x00) group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,1,2,3,4,5,6,7,8,-,-,-,-,-,-,-" else group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,-,-,-,-,-,-,-" endif endif else if (((per.l(ad:0x40006000+0x24))&0x30)==0x30) group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" elif (((per.l(ad:0x40006000+0x24))&0x30)==0x00) group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else group.long 0x24++0x03 line.long 0x00 "RTCA0DAY,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAY ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" endif endif group.long 0x28++0x0F line.long 0x00 "RTCA0MONTH,RTC Month Count Buffer Register" bitfld.long 0x00 0.--4. " RTCA0MONTH ,RTC month count buffer in BDC format" ",January,February,March,April,May,June,July,August,September,,,,,,,October,November,December,?..." line.long 0x04 "RTCA0YEAR,RTC Year Count Buffer Register" bitfld.long 0x04 4.--7. " RTCA0YEAR ,RTC year count buffer in BDC format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" bitfld.long 0x04 0.--3. ",RTC year count buffer in BDC format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" line.long 0x08 "RTCA0TIME,RTC Time Set Register" hexmask.long.byte 0x08 16.--23. 1. " RTCA0HOUR ,Refer to RTCA0HOUR register" hexmask.long.byte 0x08 8.--15. 1. " RTCA0MIN ,Refer to RTCA0MIN register" hexmask.long.byte 0x08 0.--7. 1. " RTCA0SEC ,Refer to RTCA0SEC register" line.long 0x0C "RTCA0CAL,RTC Calendar Set Register" hexmask.long.byte 0x0C 24.--31. 1. " RTCA0YEAR ,Refer to RTCA0YEAR register" hexmask.long.byte 0x0C 16.--23. 1. " RTCA0MONTH ,Refer to RTCA0MONTH register" hexmask.long.byte 0x0C 8.--15. 1. " RTCA0DAY ,Refer to RTCA0DAY register" hexmask.long.byte 0x0C 0.--7. 1. " RTCA0WEEK ,Refer to RTCA0WEEK register" if (((per.l(ad:0x40006000))&0x10)==0x00) if (((per.l(ad:0x40006000+0x08))&0x20)==0x00) group.long 0x38++0x03 line.long 0x00 "RTCA0SUBU,RTC Clock Error Correction Register" bitfld.long 0x00 7. " RTCA0DEV ,Bit Sets clock error correction timing" "00/20/40,00" bitfld.long 0x00 6. " RTCA0F6 ,Clock error correction value Bit6" "Incremented,Decremented" bitfld.long 0x00 5. " RTCA0F5 ,Clock error correction value Bit5" "Incremented,Decremented" bitfld.long 0x00 4. " RTCA0F4 ,Clock error correction value Bit4" "Incremented,Decremented" textline " " bitfld.long 0x00 3. " RTCA0F3 ,Clock error correction value Bit3" "Incremented,Decremented" bitfld.long 0x00 2. " RTCA0F2 ,Clock error correction value Bit2" "Incremented,Decremented" bitfld.long 0x00 1. " RTCA0F1 ,Clock error correction value Bit1" "Incremented,Decremented" bitfld.long 0x00 0. " RTCA0F0 ,Clock error correction value Bit0" "Incremented,Decremented" else rgroup.long 0x38++0x03 line.long 0x00 "RTCA0SUBU,RTC Clock Error Correction Register" bitfld.long 0x00 7. " RTCA0DEV ,Bit Sets clock error correction timing" "00/20/40,00" bitfld.long 0x00 6. " RTCA0F6 ,Clock error correction value Bit6" "Incremented,Decremented" bitfld.long 0x00 5. " RTCA0F5 ,Clock error correction value Bit5" "Incremented,Decremented" bitfld.long 0x00 4. " RTCA0F4 ,Clock error correction value Bit4" "Incremented,Decremented" textline " " bitfld.long 0x00 3. " RTCA0F3 ,Clock error correction value Bit3" "Incremented,Decremented" bitfld.long 0x00 2. " RTCA0F2 ,Clock error correction value Bit2" "Incremented,Decremented" bitfld.long 0x00 1. " RTCA0F1 ,Clock error correction value Bit1" "Incremented,Decremented" bitfld.long 0x00 0. " RTCA0F0 ,Clock error correction value Bit0" "Incremented,Decremented" endif else hgroup.long 0x38++0x03 hide.long 0x00 "RTCA0SUBU,RTC Clock Error Correction Register" endif if (((per.l(ad:0x40006000))&0x10)==0x10) if (((per.l(ad:0x40006000+0x08))&0x10)==0x00) group.long 0x3C++0x03 line.long 0x00 "RTCA0SCMP,RTC Sub Count Compare Register" hexmask.long.tbyte 0x00 0.--21. 1. " RTCA0SCMP ,Compare value of RTCA0SUBC (sub-counter)" else rgroup.long 0x3C++0x03 line.long 0x00 "RTCA0SCMP,RTC Sub Count Compare Register" hexmask.long.tbyte 0x00 0.--21. 1. " RTCA0SCMP ,Compare value of RTCA0SUBC (sub-counter)" endif else hgroup.long 0x3C++0x03 hide.long 0x00 "RTCA0SCMP,RTC Sub Count Compare Register" endif group.long 0x40++0x03 line.long 0x00 "RTCA0ALM,RTC Alarm Min Set Register" bitfld.long 0x00 4.--6. " RTCA0ALM ,Minute setting for the alarm interrupt" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",Minute setting for the alarm interrupt" "0,1,2,3,4,5,6,7,8,9,?..." if (((per.l(ad:0x40006000))&0x20)==0x20) group.long 0x44++0x03 line.long 0x00 "RTCA0ALH,RTC Alarm Hour Set Register" bitfld.long 0x00 0.--5. " RTCA0ALH ,Hour setting for the alarm interrupt" "0,1,2,3,4,5,6,7,8,9,,,,,,,10,11,12,13,14,15,16,17,18,19,,,,,,,20,21,22,23,?..." else group.long 0x44++0x03 line.long 0x00 "RTCA0ALH,RTC Alarm Hour Set Register" bitfld.long 0x00 0.--5. " RTCA0ALH ,Hour setting for the alarm interrupt" ",1 am,2 am,3 am,4 am,5 am,6 am,7 am,8 am,9 am,,,,,,,10 am,11 am,12 am,,,,,,,,,,,,,,,1 pm,2 pm,3 pm,4 pm,5 pm,6 pm,7 pm,8 pm,9 pm,,,,,,,10 pm,11 pm,12 pm,?..." endif group.long 0x48++0x03 line.long 0x00 "RTCA0ALW,RTC Alarm Week Set Register" bitfld.long 0x00 6. " RTCA0ALW6 ,Alarm interrupt day of the week setting bit 6-Saturday" "Disabled,Enabled" bitfld.long 0x00 5. " RTCA0ALW5 ,Alarm interrupt day of the week setting bit 5-Friday" "Disabled,Enabled" bitfld.long 0x00 4. " RTCA0ALW4 ,Alarm interrupt day of the week setting bit 4-Thursday" "Disabled,Enabled" bitfld.long 0x00 3. " RTCA0ALW3 ,Alarm interrupt day of the week setting bit 3-Wednesday" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " RTCA0ALW2 ,Alarm interrupt day of the week setting bit 2-Tuesday" "Disabled,Enabled" bitfld.long 0x00 1. " RTCA0ALW1 ,Alarm interrupt day of the week setting bit 1-Monday" "Disabled,Enabled" bitfld.long 0x00 0. " RTCA0ALW0 ,Alarm interrupt day of the week setting bit 0-Sunday" "Disabled,Enabled" rgroup.long 0x4C++0x07 line.long 0x00 "RTCA0SECC,RTC Second Count Register" bitfld.long 0x00 4.--6. " RTCA0SECC ,Counts Up the seconds" "0,1,2,3,4,5,?..." bitfld.long 0x00 0.--3. ",Counts Up the seconds" "0,1,2,3,4,5,6,7,8,9,?..." line.long 0x04 "RTCA0MINC,RTC Minute Count Register" bitfld.long 0x04 4.--6. " RTCA0MINC ,Counts Up the minutes" "0,1,2,3,4,5,?..." bitfld.long 0x04 0.--3. ",Counts Up the minutes" "0,1,2,3,4,5,6,7,8,9,?..." if (((per.l(ad:0x40006000))&0x20)==0x20) rgroup.long 0x54++0x03 line.long 0x00 "RTCA0HOURC,RTC Hour Count Register" bitfld.long 0x00 0.--5. " RTCA0HOURC ,Counts Up the hours" "0,1,2,3,4,5,6,7,8,9,,,,,,,10,11,12,13,14,15,16,17,18,19,,,,,,,20,21,22,23,?..." else rgroup.long 0x54++0x03 line.long 0x00 "RTCA0HOURC,RTC Hour Count Register" bitfld.long 0x00 0.--5. " RTCA0HOURC ,Counts Up the hours" ",1 am,2 am,3 am,4 am,5 am,6 am,7 am,8 am,9 am,,,,,,,10 am,11 am,,,,,,,,,,,,,,,,1 pm,2 pm,3 pm,4 pm,5 pm,6 pm,7 pm,8 pm,9 pm,,,,,,,10 pm,11 pm,0 pm,?..." endif rgroup.long 0x58++0x03 line.long 0x00 "RTCA0WEEKC,RTC Week Count Register" bitfld.long 0x00 0.--2. " RTCA0WEEKC ,Counts Up the weeks" "Sunday,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,?..." if (((per.l(ad:0x40006000+0x60))&0x1F)==(0x01||0x03||0x05||0x07||0x08||0x10||0x12)) if (((per.l(ad:0x40006000+0x24))&0x30)==0x30) rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,-,-,-,-,-,-,-,-,-,-,-,-,-,-" elif (((per.l(ad:0x40006000+0x5C))&0x30)==0x00) rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" endif elif (((per.l(ad:0x40006000+0x60))&0x1F)==0x02) if (((per.l(ad:0x40006000+0x64))&0xFF)==(0x00||0x04||0x08||0x12||0x16||0x20||0x24||0x28))||(((per.l(ad:0x40006000+0x64))&0xFF)==(0x32||0x36||0x40||0x44||0x48))||(((per.l(ad:0x40006000+0x64))&0xFF)==(0x52||0x56||0x60||0x64||0x68||0x72||0x76||0x80))||(((per.l(ad:0x40006000+0x64))&0xFF)==(0x84||0x88||0x92||0x96)) if (((per.l(ad:0x40006000+0x5C))&0x30)==0x30) rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" elif (((per.l(ad:0x40006000+0x5C))&0x30)==0x00) rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" endif else if (((per.l(ad:0x40006000+0x5C))&0x30)==0x30) rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" elif (((per.l(ad:0x40006000+0x5C))&0x30)==0x00) rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,1,2,3,4,5,6,7,8,-,-,-,-,-,-,-" else rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,-,-,-,-,-,-,-" endif endif else if (((per.l(ad:0x40006000+0x5C))&0x30)==0x30) rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-" elif (((per.l(ad:0x40006000+0x5C))&0x30)==0x00) rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "-,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" else rgroup.long 0x5C++0x03 line.long 0x00 "RTCA0DAYC,RTC Day Count Buffer Register" bitfld.long 0x00 4.--5. " RTCA0DAYC ,Date tens in BCD format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Date units in BCD format" "0,1,2,3,4,5,6,7,8,9,-,-,-,-,-,-" endif endif rgroup.long 0x60++0x0F line.long 0x00 "RTCA0MONC,RTC Month Count Register" bitfld.long 0x000 0.--4. " RTCA0MONC ,Counts Up the months" ",January,February,March,April,May,June,July,August,September,,,,,,,October,November,December,?..." line.long 0x04 "RTCA0YEARC,RTC Year Count Register" bitfld.long 0x04 4.--7. " RTCA0YEARC ,Counts Up the Years" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x04 0.--3. ",Counts Up the Years" "0,1,2,3,4,5,6,7,8,9,?..." line.long 0x08 "RTCA0TIMEC,RTC Time Count Register" hexmask.long.byte 0x08 16.--23. 1. " RTCA0HOURC ,Refer to RTCA0HOURC register" hexmask.long.byte 0x08 8.--15. 1. " RTCA0MINC ,Refer to RTCA0MINC register" hexmask.long.byte 0x08 0.--7. 1. " RTCA0SECC ,Refer to RTCA0SECC register" line.long 0x0C "RTCA0CALC,RTC Calendar Count Register" hexmask.long.byte 0x0C 24.--31. 1. " RTCA0YEARC ,Refer to RTCA0YEARC register" hexmask.long.byte 0x0C 16.--23. 1. " RTCA0MONC ,Refer to RTCA0MONC register" hexmask.long.byte 0x0C 8.--15. 1. " RTCA0DAYC ,Refer to RTCA0DAYC register" hexmask.long.byte 0x0C 0.--7. 1. " RTCA0WEEKC ,Refer to RTCA0WEEKC register" group.long 0x70++0x03 line.long 0x00 "RTCA0TCR,RTC Test Register" bitfld.long 0x00 15. " RTCA0OSE ,Enable interrupt substitution latch" "Disabled,Enabled" bitfld.long 0x00 3. " RTCA0OS3 ,Value of RTCATINTAL_Int substitution latch" "0,1" bitfld.long 0x00 2. " RTCA0OS2 ,Value of RTCATINT1S_Int substitution latch" "0,1" bitfld.long 0x00 1. " RTCA0OS1 ,Value of RTCATINTR_Int substitution latch" "0,1" width 0x0B tree.end endif tree.open "Watchdog" sif cpu()=="R9A06G032-CA7" tree "WDOGA7_1 (Watchdog for CA7 processor0)" base ad:0x40008000 width 16. group.long 0x00++0x03 line.long 0x00 " CTRL_RETRIGGER,Control and Retrigger Register" bitfld.long 0x00 14.--15. " WDSI ,Watchdog timer secure ID" ",,WDRV_enable,?..." bitfld.long 0x00 13. " WDE ,Watchdog timer enable flag" "Disabled,Enabled" bitfld.long 0x00 12. " PSF ,Prescaler factor" "2,2^14" hexmask.long.word 0x00 0.--11. 1. " WDRV ,Watchdog timer reload value" width 0x0B tree.end tree "WDOGA7_2 (Watchdog for CA7 processor1)" base ad:0x40009000 width 16. group.long 0x00++0x03 line.long 0x00 " CTRL_RETRIGGER,Control and Retrigger Register" bitfld.long 0x00 14.--15. " WDSI ,Watchdog timer secure ID" ",,WDRV_enable,?..." bitfld.long 0x00 13. " WDE ,Watchdog timer enable flag" "Disabled,Enabled" bitfld.long 0x00 12. " PSF ,Prescaler factor" "2,2^14" hexmask.long.word 0x00 0.--11. 1. " WDRV ,Watchdog timer reload value" width 0x0B tree.end endif sif cpuis("R9A06G0??-CM3") tree "WDOGCM3 (Watchdog for CM3)" base ad:0x4000A000 width 16. group.long 0x00++0x03 line.long 0x00 " CTRL_RETRIGGER,Control and Retrigger Register" bitfld.long 0x00 14.--15. " WDSI ,Watchdog timer secure ID" ",,WDRV_enable,?..." bitfld.long 0x00 13. " WDE ,Watchdog timer enable flag" "Disabled,Enabled" bitfld.long 0x00 12. " PSF ,Prescaler factor" "2,2^14" hexmask.long.word 0x00 0.--11. 1. " WDRV ,Watchdog timer reload value" width 0x0B tree.end endif tree.end tree "IPCM (Mailbox)" base ad:0x4000B000 width 14. tree "Channel 0" group.long 0x0++0x03 line.long 0x00 "IPCM0SOURCE,Mailbox0 Source Register" bitfld.long 0x00 2. " SRC2 ,Core source and acknowledge interrupt line" "Not set,Set" bitfld.long 0x00 1. " SRC1 ,Core source and acknowledge interrupt line" "Not set,Set" bitfld.long 0x00 0. " SRC0 ,Core source and acknowledge interrupt line" "Not set,Set" group.long (0x0+0x0C)++0x07 line.long 0x00 "IPCM0D,Mailbox0 Destination Register" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST2_clr/set ,Used to set bits in the IPCM[n]DSTATUS Register" "Not set,Set" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " DEST1_clr/set ,Used to set bits in the IPCM[n]DSTATUS Register" "Not set,Set" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DEST0_clr/set ,Used to set bits in the IPCM[n]DSTATUS Register" "Not set,Set" line.long 0x04 "IPCM0MODE,Mailbox0 Mode Register" bitfld.long 0x04 1. " AUTO_LINK ,Auto Link enable" "Disabled,Enabled" bitfld.long 0x04 0. " AUTO_ACK ,Auto Acknowledge enable" "Disabled,Enabled" group.long (0x0+0x1C)++0x23 line.long 0x00 "IPCM0M,Mailbox0 Mask Register" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " MASK2_clr/set ,Enable Mailbox interrupt" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " MASK1_clr/set ,Enable Mailbox interrupt" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " MASK0_clr/set ,Enable Mailbox interrupt" "Disabled,Enabled" line.long 0x04 "IPCM0SEND,Mailbox0 Send Register" bitfld.long 0x04 0.--1. " SEND ,Send message" "Inactive,To destination core(s),To source core,?..." line.long 0x08 "IPCM0DR0,Mailbox0 Data Register 0" line.long 0x0C "IPCM0DR1,Mailbox0 Data Register 1" line.long 0x10 "IPCM0DR2,Mailbox0 Data Register 2" line.long 0x14 "IPCM0DR3,Mailbox0 Data Register 3" line.long 0x18 "IPCM0DR4,Mailbox0 Data Register 4" line.long 0x1C "IPCM0DR5,Mailbox0 Data Register 5" line.long 0x20 "IPCM0DR6,Mailbox0 Data Register 6" rgroup.long 0x800++0x07 line.long 0x00 "IPCMMIS0,Masked Interrupt0 Status Register" bitfld.long 0x00 2. " MASK_INT_STAT2 ,Masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " MASK_INT_STAT1 ,Masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " MASK_INT_STAT0 ,Masked interrupt status" "No interrupt,Interrupt" line.long 0x04 "IPCMRIS0,Raw Interrupt0 Status Register" bitfld.long 0x04 2. " RAW_INT_STAT2 ,Raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " RAW_INT_STAT1 ,Raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " RAW_INT_STAT0 ,Raw interrupt status" "No interrupt,Interrupt" tree.end tree "Channel 1" group.long 0x40++0x03 line.long 0x00 "IPCM1SOURCE,Mailbox1 Source Register" bitfld.long 0x00 2. " SRC2 ,Core source and acknowledge interrupt line" "Not set,Set" bitfld.long 0x00 1. " SRC1 ,Core source and acknowledge interrupt line" "Not set,Set" bitfld.long 0x00 0. " SRC0 ,Core source and acknowledge interrupt line" "Not set,Set" group.long (0x40+0x0C)++0x07 line.long 0x00 "IPCM1D,Mailbox1 Destination Register" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST2_clr/set ,Used to set bits in the IPCM[n]DSTATUS Register" "Not set,Set" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " DEST1_clr/set ,Used to set bits in the IPCM[n]DSTATUS Register" "Not set,Set" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DEST0_clr/set ,Used to set bits in the IPCM[n]DSTATUS Register" "Not set,Set" line.long 0x04 "IPCM1MODE,Mailbox1 Mode Register" bitfld.long 0x04 1. " AUTO_LINK ,Auto Link enable" "Disabled,Enabled" bitfld.long 0x04 0. " AUTO_ACK ,Auto Acknowledge enable" "Disabled,Enabled" group.long (0x40+0x1C)++0x23 line.long 0x00 "IPCM1M,Mailbox1 Mask Register" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " MASK2_clr/set ,Enable Mailbox interrupt" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " MASK1_clr/set ,Enable Mailbox interrupt" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " MASK0_clr/set ,Enable Mailbox interrupt" "Disabled,Enabled" line.long 0x04 "IPCM1SEND,Mailbox1 Send Register" bitfld.long 0x04 0.--1. " SEND ,Send message" "Inactive,To destination core(s),To source core,?..." line.long 0x08 "IPCM1DR0,Mailbox1 Data Register 0" line.long 0x0C "IPCM1DR1,Mailbox1 Data Register 1" line.long 0x10 "IPCM1DR2,Mailbox1 Data Register 2" line.long 0x14 "IPCM1DR3,Mailbox1 Data Register 3" line.long 0x18 "IPCM1DR4,Mailbox1 Data Register 4" line.long 0x1C "IPCM1DR5,Mailbox1 Data Register 5" line.long 0x20 "IPCM1DR6,Mailbox1 Data Register 6" rgroup.long 0x808++0x07 line.long 0x00 "IPCMMIS1,Masked Interrupt1 Status Register" bitfld.long 0x00 2. " MASK_INT_STAT2 ,Masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " MASK_INT_STAT1 ,Masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " MASK_INT_STAT0 ,Masked interrupt status" "No interrupt,Interrupt" line.long 0x04 "IPCMRIS1,Raw Interrupt1 Status Register" bitfld.long 0x04 2. " RAW_INT_STAT2 ,Raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " RAW_INT_STAT1 ,Raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " RAW_INT_STAT0 ,Raw interrupt status" "No interrupt,Interrupt" tree.end tree "Channel 2" group.long 0x80++0x03 line.long 0x00 "IPCM2SOURCE,Mailbox2 Source Register" bitfld.long 0x00 2. " SRC2 ,Core source and acknowledge interrupt line" "Not set,Set" bitfld.long 0x00 1. " SRC1 ,Core source and acknowledge interrupt line" "Not set,Set" bitfld.long 0x00 0. " SRC0 ,Core source and acknowledge interrupt line" "Not set,Set" group.long (0x80+0x0C)++0x07 line.long 0x00 "IPCM2D,Mailbox2 Destination Register" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST2_clr/set ,Used to set bits in the IPCM[n]DSTATUS Register" "Not set,Set" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " DEST1_clr/set ,Used to set bits in the IPCM[n]DSTATUS Register" "Not set,Set" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " DEST0_clr/set ,Used to set bits in the IPCM[n]DSTATUS Register" "Not set,Set" line.long 0x04 "IPCM2MODE,Mailbox2 Mode Register" bitfld.long 0x04 1. " AUTO_LINK ,Auto Link enable" "Disabled,Enabled" bitfld.long 0x04 0. " AUTO_ACK ,Auto Acknowledge enable" "Disabled,Enabled" group.long (0x80+0x1C)++0x23 line.long 0x00 "IPCM2M,Mailbox2 Mask Register" setclrfld.long 0x00 2. -0x08 2. -0x04 2. " MASK2_clr/set ,Enable Mailbox interrupt" "Disabled,Enabled" setclrfld.long 0x00 1. -0x08 1. -0x04 1. " MASK1_clr/set ,Enable Mailbox interrupt" "Disabled,Enabled" setclrfld.long 0x00 0. -0x08 0. -0x04 0. " MASK0_clr/set ,Enable Mailbox interrupt" "Disabled,Enabled" line.long 0x04 "IPCM2SEND,Mailbox2 Send Register" bitfld.long 0x04 0.--1. " SEND ,Send message" "Inactive,To destination core(s),To source core,?..." line.long 0x08 "IPCM2DR0,Mailbox2 Data Register 0" line.long 0x0C "IPCM2DR1,Mailbox2 Data Register 1" line.long 0x10 "IPCM2DR2,Mailbox2 Data Register 2" line.long 0x14 "IPCM2DR3,Mailbox2 Data Register 3" line.long 0x18 "IPCM2DR4,Mailbox2 Data Register 4" line.long 0x1C "IPCM2DR5,Mailbox2 Data Register 5" line.long 0x20 "IPCM2DR6,Mailbox2 Data Register 6" rgroup.long 0x810++0x07 line.long 0x00 "IPCMMIS2,Masked Interrupt2 Status Register" bitfld.long 0x00 2. " MASK_INT_STAT2 ,Masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " MASK_INT_STAT1 ,Masked interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " MASK_INT_STAT0 ,Masked interrupt status" "No interrupt,Interrupt" line.long 0x04 "IPCMRIS2,Raw Interrupt2 Status Register" bitfld.long 0x04 2. " RAW_INT_STAT2 ,Raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " RAW_INT_STAT1 ,Raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " RAW_INT_STAT0 ,Raw interrupt status" "No interrupt,Interrupt" tree.end textline " " rgroup.long 0x900++0x03 line.long 0x00 "IPCMCFGSTAT,Configuration Status Register" bitfld.long 0x00 16.--21. " MAILBOXES ,Number of Mailboxes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " INTERRUPTS ,Number of Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--2. " DATA_WORDS ,Number of data registers" "0,1,2,3,4,5,6,7" group.long 0xF00++0x07 line.long 0x00 "IPCMTCR,Integration Test Control Register" bitfld.long 0x00 0. " ITEN ,Integration test mode" "Disabled,Enabled" line.long 0x04 "IPCMTOR,Integration Test Output Register" bitfld.long 0x04 2. " INTTEST2 ,IPCM_Int2 output" "Disabled,Enabled" bitfld.long 0x04 1. " INTTEST1 ,IPCM_Int1 output" "Disabled,Enabled" bitfld.long 0x04 0. " INTTEST0 ,IPCM_Int0 output" "Disabled,Enabled" width 0x0B tree.end tree "UART" base ad:0x40060000 width 16. tree "UART_1" if (((per.l(ad:0x40060000+0x0C+0x0))&0x80)==0x80) group.long 0x0++0x07 line.long 0x00 "RUART_DLL,Divisor Latch (Low)" hexmask.long.byte 0x00 0.--7. 1. " BUART_DLL ,Divisor latch low register" line.long 0x04 "RUART_DLH,Divisor Latch (High)" hexmask.long.byte 0x04 0.--7. 1. " BUART_DLH ,Divisor latch high register" else group.long 0x0++0x07 line.long 0x00 "RUART_RBR_THR,Receive Buffer/Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_RBR_THR ,Receive Buffer Register (rUart_RBR)" line.long 0x04 "RUART_IER,Interrupt Enable Register" bitfld.long 0x04 11. " BUART_ETIMEOUT3 ,Enable transceiver time-out with n=3 interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " BUART_ETIMEOUT2 ,Enable transceiver time-out with n=2 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " BUART_ETIMEOUT1 ,Enable receiver time-out with n=1 interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " BUART_ETIMEOUT0 ,Enable receiver time-out with n=0 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " BUART_PTIME ,Programmable THRE interrupt mode enable" "Disabled,Enabled" bitfld.long 0x04 3. " BUART_EDSSI ,Enable modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " BUART_ELSI ,Enable receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " BUART_ETBEI ,Enable transmit holding register empty interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " BUART_ERBFI ,Enable received data available interrupt" "Disabled,Enabled" endif rgroup.long (0x0+0x08)++0x03 line.long 0x00 "RUART_IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " BUART_FIFOSE ,FIFOs enabled" "Disabled,,,Enabled" bitfld.long 0x00 0.--3. " BUART_IID ,Interrupt ID" "Modem status,No interrupt pending,THR empty,,Received data available,Receiver time out,Receiver line status,Busy detect,,,,,Character timeout,?..." wgroup.long (0x0+0x08)++0x03 line.long 0x00 "RUART_FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " BUART_RCVR ,Receive FIFOs trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" bitfld.long 0x00 4.--5. " BUART_TET ,Transmit FIFOs Empty trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/4 full" textline " " bitfld.long 0x00 2. " BUART_XFIFOR ,Transmit FIFO Reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFIFOR ,Receive FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_FIFOE ,FIFO transmit and receive enable" "Disabled,Enabled" if (((per.l(ad:0x40060000+0x7C+0x0))&0x01)==0x00) if (((per.l(ad:0x40060000+0x0C+0x0))&0x08)==0x08) group.long (0x0+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x0+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif else if (((per.l(ad:0x40060000+0x0C+0x0))&0x08)==0x08) group.long (0x0+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x0+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif endif group.long (0x0+0x10)++0x03 line.long 0x00 "RUART_MCR,Modem Control Register" bitfld.long 0x00 5. " BUART_AFCE ,Auto flow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_LB ,LoopBack bit" "0,1" textline " " bitfld.long 0x00 3. " BUART_OUT2 ,Control the user-designated Output2" "De-asserted,Asserted" bitfld.long 0x00 2. " BUART_OUT1 ,Control the user-designated Output1" "De-asserted,Asserted" textline " " bitfld.long 0x00 1. " BUART_RTS ,Request to send" "0,1" bitfld.long 0x00 0. " BUART_DTR ,Data Terminal Ready" "De-asserted,Asserted" hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "RUART_LSR,Line Status Register" in newline rgroup.long (0x0+0x18)++0x03 line.long 0x00 "RUART_MSR,Modem Status Register" bitfld.long 0x00 7. " BUART_DCD ,Data carrier detect" "De-asserted,Asserted" bitfld.long 0x00 6. " BUART_RI ,Ring indicator" "De-asserted,Asserted" textline " " bitfld.long 0x00 5. " BUART_DSR ,Data set ready" "De-asserted,Asserted" bitfld.long 0x00 4. " BUART_CTS ,Clear to send" "De-asserted,Asserted" textline " " bitfld.long 0x00 3. " BUART_DDCD ,Delta data carrier detect" "Not changed,Changed" bitfld.long 0x00 2. " BUART_TERI ,Trailing edge of ring indicator" "Not changed,Changed" textline " " bitfld.long 0x00 1. " BUART_DDSR ,Delta data set ready" "Not changed,Changed" bitfld.long 0x00 0. " BUART_DCTS ,Delta clear to send" "Not changed,Changed" group.long (0x0+0x1C)++0x03 line.long 0x00 "RUART_SCR,Scratchpad Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SCR ,Scratchpad register" if (((per.l(ad:0x40060000+0x0C+0x0))&0x80)==0x00) rgroup.long (0x0+0x30)++0x03 line.long 0x00 "RUART_SRBR,Shadow Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SRBR ,Shadow receive buffer register" wgroup.long (0x0+0x30)++0x03 line.long 0x00 "RUART_STHR,Shadow Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_STHR ,Shadow transmit holding register" endif group.long (0x0+0x70)++0x03 line.long 0x00 "RUART_FAR,FIFO Access Register" bitfld.long 0x00 0. " BUART_FAR ,FIFO access register" "Disabled,Enabled" if (((per.l(ad:0x40060000+0x070+0x0))&0x01)==0x01) rgroup.long (0x0+0x74)++0x03 line.long 0x00 "RUART_TFR,Transmit FIFO Read" hexmask.long.byte 0x00 0.--7. 1. " BUART_TFR ,Transmit FIFO read" wgroup.long (0x0+0x78)++0x03 line.long 0x00 "RUART_RFW,Receive FIFO Write" bitfld.long 0x00 9. " BUART_RFFE ,Receive FIFO framing error" "No error,Error" bitfld.long 0x00 8. " BUART_RFPE ,Receive FIFO parity error" "No error,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " BUART_RFWD ,Receive FIFO write data" endif rgroup.long (0x0+0x7C)++0x03 line.long 0x00 "RUART_USR,UART Status Register" bitfld.long 0x00 4. " BUART_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BUART_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BUART_TFE ,Transmit FIFO empty" "No empty,Empty" bitfld.long 0x00 1. " BUART_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BUART_BUSY ,UART Busy" "Idle,Busy" rgroup.long (0x0+0x80)++0x07 line.long 0x00 "RUART_TFL,Transmit FIFO Level" bitfld.long 0x00 0.--4. " BUART_TFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RUART_RFL,Receive FIFO Level" bitfld.long 0x04 0.--4. " BUART_RFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.long (0x0+0x88)++0x03 line.long 0x00 "RUART_SRR,Software Reset Register" bitfld.long 0x00 2. " BUART_XFR ,Transmit FIFO reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFR ,Receive FIFO reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_UR ,UART reset" "No reset,Reset" group.long (0x0+0x8C)++0x07 line.long 0x00 "RUART_SRTS,Shadow Request to Send" bitfld.long 0x00 0. " BUART_SRTS ,Shadow request to send" "0,1" line.long 0x04 "RUART_SBCR,Shadow Break Control Register" bitfld.long 0x04 0. " BUART_SBCR ,Shadow break control bit" "0,1" group.long (0x0+0x98)++0x07 line.long 0x00 "RUART_SFE,Shadow FIFO Enable" bitfld.long 0x00 0. " BUART_SFE ,Shadow FIFO enable" "Disabled,Enabled" line.long 0x04 "RUART_SRT,Shadow RCVR Trigger" bitfld.long 0x04 0.--1. " BUART_SRCVR ,Shadow receive FIFO trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" group.long (0x0+0xA0)++0x07 line.long 0x00 "RUART_STET,Shadow TX Empty Trigger" bitfld.long 0x00 0.--1. " BUART_STET ,Shadow Transmit Empty Trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/2 full" line.long 0x04 "RUART_HTX,Halt TX" bitfld.long 0x04 0. " BUART_HTX ,Halt Transmission" "Disabled,Enabled" group.long (0x0+0x100)++0x07 line.long 0x00 "RUART_TO,Time-Out Counter Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " BUART_TO3 ,Time-Out delay 3" hexmask.long.byte 0x00 16.--23. 1. " BUART_TO2 ,Time-Out delay 2" textline " " hexmask.long.byte 0x00 8.--15. 1. " BUART_TO1 ,Time-Out delay 1" hexmask.long.byte 0x00 0.--7. 1. " BUART_TO0 ,Time-Out delay 0" line.long 0x04 "RUART_CTRLTO,Time-Out Control Register" hexmask.long.byte 0x04 16.--23. 1. " BUART_TG ,Time-Guard value" textline " " bitfld.long 0x04 9. " BUART_ENABLEFILTERINGRXD ,Allows the filtering of UART_RXD in Half-Duplex mode" "Transparent,Filtering" bitfld.long 0x04 8. " BUART_ENABLEDE , Allows the multiplexing of iUART_DE on external pin UART_RTS_N" "Normal mode,Data enable mode" textline " " bitfld.long 0x04 7. " BUART_REARMTO3 ,Rearm Time-Out 3" "No effect,Restart" bitfld.long 0x04 6. " BUART_REARMTO2 ,Rearm Time-Out 2" "No effect,Restart" textline " " bitfld.long 0x04 5. " BUART_REARMTO1 ,Rearm Time-Out 1" "No effect,Restart" bitfld.long 0x04 4. " BUART_REARMTO0 ,Rearm Time-Out 0" "No effect,Restart" textline " " bitfld.long 0x04 3. " BUART_STARTTO3 ,Start Time-Out 3" "No effect,Started" bitfld.long 0x04 2. " BUART_STARTTO2 ,Start Time-Out 2" "No effect,Started" textline " " bitfld.long 0x04 1. " BUART_STARTTO1 ,Start Time-Out 1" "No effect,Started" bitfld.long 0x04 0. " BUART_STARTTO0 ,Start Time-Out 0" "No effect,Started" rgroup.long (0x0+0x108)++0x03 line.long 0x00 "RUART_STATUSTO,Time-Out Counter Status Register" bitfld.long 0x00 8. " BUART_DE ,Data enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BUART_TIMEOUTSTATUS3 ,Time-out 3 detection status" "Different,Egual" bitfld.long 0x00 6. " BUART_TIMEOUTSTATUS2 ,Time-out 2 detection status" "Different,Egual" textline " " bitfld.long 0x00 5. " BUART_TIMEOUTSTATUS1 ,Time-out 1 detection status" "Different,Egual" bitfld.long 0x00 4. " BUART_TIMEOUTSTATUS0 ,Time-out 0 detection status" "Different,Egual" textline " " bitfld.long 0x00 3. " BUART_TIMEOUTINT3 ,Time-out 3 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 2. " BUART_TIMEOUTINT2 , Time-out 2 detection interruption" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " BUART_TIMEOUTINT1 , Time-out 1 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 0. " BUART_TIMEOUTINT0 , Time-out 0 detection interruption" "No interrupt,Interrupt" tree.end tree "UART_2" if (((per.l(ad:0x40060000+0x0C+0x1000))&0x80)==0x80) group.long 0x1000++0x07 line.long 0x00 "RUART_DLL,Divisor Latch (Low)" hexmask.long.byte 0x00 0.--7. 1. " BUART_DLL ,Divisor latch low register" line.long 0x04 "RUART_DLH,Divisor Latch (High)" hexmask.long.byte 0x04 0.--7. 1. " BUART_DLH ,Divisor latch high register" else group.long 0x1000++0x07 line.long 0x00 "RUART_RBR_THR,Receive Buffer/Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_RBR_THR ,Receive Buffer Register (rUart_RBR)" line.long 0x04 "RUART_IER,Interrupt Enable Register" bitfld.long 0x04 11. " BUART_ETIMEOUT3 ,Enable transceiver time-out with n=3 interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " BUART_ETIMEOUT2 ,Enable transceiver time-out with n=2 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " BUART_ETIMEOUT1 ,Enable receiver time-out with n=1 interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " BUART_ETIMEOUT0 ,Enable receiver time-out with n=0 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " BUART_PTIME ,Programmable THRE interrupt mode enable" "Disabled,Enabled" bitfld.long 0x04 3. " BUART_EDSSI ,Enable modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " BUART_ELSI ,Enable receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " BUART_ETBEI ,Enable transmit holding register empty interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " BUART_ERBFI ,Enable received data available interrupt" "Disabled,Enabled" endif rgroup.long (0x1000+0x08)++0x03 line.long 0x00 "RUART_IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " BUART_FIFOSE ,FIFOs enabled" "Disabled,,,Enabled" bitfld.long 0x00 0.--3. " BUART_IID ,Interrupt ID" "Modem status,No interrupt pending,THR empty,,Received data available,Receiver time out,Receiver line status,Busy detect,,,,,Character timeout,?..." wgroup.long (0x1000+0x08)++0x03 line.long 0x00 "RUART_FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " BUART_RCVR ,Receive FIFOs trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" bitfld.long 0x00 4.--5. " BUART_TET ,Transmit FIFOs Empty trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/4 full" textline " " bitfld.long 0x00 2. " BUART_XFIFOR ,Transmit FIFO Reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFIFOR ,Receive FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_FIFOE ,FIFO transmit and receive enable" "Disabled,Enabled" if (((per.l(ad:0x40060000+0x7C+0x1000))&0x01)==0x00) if (((per.l(ad:0x40060000+0x0C+0x1000))&0x08)==0x08) group.long (0x1000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x1000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif else if (((per.l(ad:0x40060000+0x0C+0x1000))&0x08)==0x08) group.long (0x1000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x1000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif endif group.long (0x1000+0x10)++0x03 line.long 0x00 "RUART_MCR,Modem Control Register" bitfld.long 0x00 5. " BUART_AFCE ,Auto flow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_LB ,LoopBack bit" "0,1" textline " " bitfld.long 0x00 3. " BUART_OUT2 ,Control the user-designated Output2" "De-asserted,Asserted" bitfld.long 0x00 2. " BUART_OUT1 ,Control the user-designated Output1" "De-asserted,Asserted" textline " " bitfld.long 0x00 1. " BUART_RTS ,Request to send" "0,1" bitfld.long 0x00 0. " BUART_DTR ,Data Terminal Ready" "De-asserted,Asserted" hgroup.long (0x1000+0x14)++0x03 hide.long 0x00 "RUART_LSR,Line Status Register" in newline rgroup.long (0x1000+0x18)++0x03 line.long 0x00 "RUART_MSR,Modem Status Register" bitfld.long 0x00 7. " BUART_DCD ,Data carrier detect" "De-asserted,Asserted" bitfld.long 0x00 6. " BUART_RI ,Ring indicator" "De-asserted,Asserted" textline " " bitfld.long 0x00 5. " BUART_DSR ,Data set ready" "De-asserted,Asserted" bitfld.long 0x00 4. " BUART_CTS ,Clear to send" "De-asserted,Asserted" textline " " bitfld.long 0x00 3. " BUART_DDCD ,Delta data carrier detect" "Not changed,Changed" bitfld.long 0x00 2. " BUART_TERI ,Trailing edge of ring indicator" "Not changed,Changed" textline " " bitfld.long 0x00 1. " BUART_DDSR ,Delta data set ready" "Not changed,Changed" bitfld.long 0x00 0. " BUART_DCTS ,Delta clear to send" "Not changed,Changed" group.long (0x1000+0x1C)++0x03 line.long 0x00 "RUART_SCR,Scratchpad Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SCR ,Scratchpad register" if (((per.l(ad:0x40060000+0x0C+0x1000))&0x80)==0x00) rgroup.long (0x1000+0x30)++0x03 line.long 0x00 "RUART_SRBR,Shadow Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SRBR ,Shadow receive buffer register" wgroup.long (0x1000+0x30)++0x03 line.long 0x00 "RUART_STHR,Shadow Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_STHR ,Shadow transmit holding register" endif group.long (0x1000+0x70)++0x03 line.long 0x00 "RUART_FAR,FIFO Access Register" bitfld.long 0x00 0. " BUART_FAR ,FIFO access register" "Disabled,Enabled" if (((per.l(ad:0x40060000+0x070+0x1000))&0x01)==0x01) rgroup.long (0x1000+0x74)++0x03 line.long 0x00 "RUART_TFR,Transmit FIFO Read" hexmask.long.byte 0x00 0.--7. 1. " BUART_TFR ,Transmit FIFO read" wgroup.long (0x1000+0x78)++0x03 line.long 0x00 "RUART_RFW,Receive FIFO Write" bitfld.long 0x00 9. " BUART_RFFE ,Receive FIFO framing error" "No error,Error" bitfld.long 0x00 8. " BUART_RFPE ,Receive FIFO parity error" "No error,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " BUART_RFWD ,Receive FIFO write data" endif rgroup.long (0x1000+0x7C)++0x03 line.long 0x00 "RUART_USR,UART Status Register" bitfld.long 0x00 4. " BUART_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BUART_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BUART_TFE ,Transmit FIFO empty" "No empty,Empty" bitfld.long 0x00 1. " BUART_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BUART_BUSY ,UART Busy" "Idle,Busy" rgroup.long (0x1000+0x80)++0x07 line.long 0x00 "RUART_TFL,Transmit FIFO Level" bitfld.long 0x00 0.--4. " BUART_TFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RUART_RFL,Receive FIFO Level" bitfld.long 0x04 0.--4. " BUART_RFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.long (0x1000+0x88)++0x03 line.long 0x00 "RUART_SRR,Software Reset Register" bitfld.long 0x00 2. " BUART_XFR ,Transmit FIFO reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFR ,Receive FIFO reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_UR ,UART reset" "No reset,Reset" group.long (0x1000+0x8C)++0x07 line.long 0x00 "RUART_SRTS,Shadow Request to Send" bitfld.long 0x00 0. " BUART_SRTS ,Shadow request to send" "0,1" line.long 0x04 "RUART_SBCR,Shadow Break Control Register" bitfld.long 0x04 0. " BUART_SBCR ,Shadow break control bit" "0,1" group.long (0x1000+0x98)++0x07 line.long 0x00 "RUART_SFE,Shadow FIFO Enable" bitfld.long 0x00 0. " BUART_SFE ,Shadow FIFO enable" "Disabled,Enabled" line.long 0x04 "RUART_SRT,Shadow RCVR Trigger" bitfld.long 0x04 0.--1. " BUART_SRCVR ,Shadow receive FIFO trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" group.long (0x1000+0xA0)++0x07 line.long 0x00 "RUART_STET,Shadow TX Empty Trigger" bitfld.long 0x00 0.--1. " BUART_STET ,Shadow Transmit Empty Trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/2 full" line.long 0x04 "RUART_HTX,Halt TX" bitfld.long 0x04 0. " BUART_HTX ,Halt Transmission" "Disabled,Enabled" group.long (0x1000+0x100)++0x07 line.long 0x00 "RUART_TO,Time-Out Counter Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " BUART_TO3 ,Time-Out delay 3" hexmask.long.byte 0x00 16.--23. 1. " BUART_TO2 ,Time-Out delay 2" textline " " hexmask.long.byte 0x00 8.--15. 1. " BUART_TO1 ,Time-Out delay 1" hexmask.long.byte 0x00 0.--7. 1. " BUART_TO0 ,Time-Out delay 0" line.long 0x04 "RUART_CTRLTO,Time-Out Control Register" hexmask.long.byte 0x04 16.--23. 1. " BUART_TG ,Time-Guard value" textline " " bitfld.long 0x04 9. " BUART_ENABLEFILTERINGRXD ,Allows the filtering of UART_RXD in Half-Duplex mode" "Transparent,Filtering" bitfld.long 0x04 8. " BUART_ENABLEDE , Allows the multiplexing of iUART_DE on external pin UART_RTS_N" "Normal mode,Data enable mode" textline " " bitfld.long 0x04 7. " BUART_REARMTO3 ,Rearm Time-Out 3" "No effect,Restart" bitfld.long 0x04 6. " BUART_REARMTO2 ,Rearm Time-Out 2" "No effect,Restart" textline " " bitfld.long 0x04 5. " BUART_REARMTO1 ,Rearm Time-Out 1" "No effect,Restart" bitfld.long 0x04 4. " BUART_REARMTO0 ,Rearm Time-Out 0" "No effect,Restart" textline " " bitfld.long 0x04 3. " BUART_STARTTO3 ,Start Time-Out 3" "No effect,Started" bitfld.long 0x04 2. " BUART_STARTTO2 ,Start Time-Out 2" "No effect,Started" textline " " bitfld.long 0x04 1. " BUART_STARTTO1 ,Start Time-Out 1" "No effect,Started" bitfld.long 0x04 0. " BUART_STARTTO0 ,Start Time-Out 0" "No effect,Started" rgroup.long (0x1000+0x108)++0x03 line.long 0x00 "RUART_STATUSTO,Time-Out Counter Status Register" bitfld.long 0x00 8. " BUART_DE ,Data enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BUART_TIMEOUTSTATUS3 ,Time-out 3 detection status" "Different,Egual" bitfld.long 0x00 6. " BUART_TIMEOUTSTATUS2 ,Time-out 2 detection status" "Different,Egual" textline " " bitfld.long 0x00 5. " BUART_TIMEOUTSTATUS1 ,Time-out 1 detection status" "Different,Egual" bitfld.long 0x00 4. " BUART_TIMEOUTSTATUS0 ,Time-out 0 detection status" "Different,Egual" textline " " bitfld.long 0x00 3. " BUART_TIMEOUTINT3 ,Time-out 3 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 2. " BUART_TIMEOUTINT2 , Time-out 2 detection interruption" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " BUART_TIMEOUTINT1 , Time-out 1 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 0. " BUART_TIMEOUTINT0 , Time-out 0 detection interruption" "No interrupt,Interrupt" tree.end tree "UART_3" if (((per.l(ad:0x40060000+0x0C+0x2000))&0x80)==0x80) group.long 0x2000++0x07 line.long 0x00 "RUART_DLL,Divisor Latch (Low)" hexmask.long.byte 0x00 0.--7. 1. " BUART_DLL ,Divisor latch low register" line.long 0x04 "RUART_DLH,Divisor Latch (High)" hexmask.long.byte 0x04 0.--7. 1. " BUART_DLH ,Divisor latch high register" else group.long 0x2000++0x07 line.long 0x00 "RUART_RBR_THR,Receive Buffer/Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_RBR_THR ,Receive Buffer Register (rUart_RBR)" line.long 0x04 "RUART_IER,Interrupt Enable Register" bitfld.long 0x04 11. " BUART_ETIMEOUT3 ,Enable transceiver time-out with n=3 interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " BUART_ETIMEOUT2 ,Enable transceiver time-out with n=2 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " BUART_ETIMEOUT1 ,Enable receiver time-out with n=1 interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " BUART_ETIMEOUT0 ,Enable receiver time-out with n=0 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " BUART_PTIME ,Programmable THRE interrupt mode enable" "Disabled,Enabled" bitfld.long 0x04 3. " BUART_EDSSI ,Enable modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " BUART_ELSI ,Enable receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " BUART_ETBEI ,Enable transmit holding register empty interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " BUART_ERBFI ,Enable received data available interrupt" "Disabled,Enabled" endif rgroup.long (0x2000+0x08)++0x03 line.long 0x00 "RUART_IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " BUART_FIFOSE ,FIFOs enabled" "Disabled,,,Enabled" bitfld.long 0x00 0.--3. " BUART_IID ,Interrupt ID" "Modem status,No interrupt pending,THR empty,,Received data available,Receiver time out,Receiver line status,Busy detect,,,,,Character timeout,?..." wgroup.long (0x2000+0x08)++0x03 line.long 0x00 "RUART_FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " BUART_RCVR ,Receive FIFOs trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" bitfld.long 0x00 4.--5. " BUART_TET ,Transmit FIFOs Empty trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/4 full" textline " " bitfld.long 0x00 2. " BUART_XFIFOR ,Transmit FIFO Reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFIFOR ,Receive FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_FIFOE ,FIFO transmit and receive enable" "Disabled,Enabled" if (((per.l(ad:0x40060000+0x7C+0x2000))&0x01)==0x00) if (((per.l(ad:0x40060000+0x0C+0x2000))&0x08)==0x08) group.long (0x2000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x2000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif else if (((per.l(ad:0x40060000+0x0C+0x2000))&0x08)==0x08) group.long (0x2000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x2000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif endif group.long (0x2000+0x10)++0x03 line.long 0x00 "RUART_MCR,Modem Control Register" bitfld.long 0x00 5. " BUART_AFCE ,Auto flow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_LB ,LoopBack bit" "0,1" textline " " bitfld.long 0x00 3. " BUART_OUT2 ,Control the user-designated Output2" "De-asserted,Asserted" bitfld.long 0x00 2. " BUART_OUT1 ,Control the user-designated Output1" "De-asserted,Asserted" textline " " bitfld.long 0x00 1. " BUART_RTS ,Request to send" "0,1" bitfld.long 0x00 0. " BUART_DTR ,Data Terminal Ready" "De-asserted,Asserted" hgroup.long (0x2000+0x14)++0x03 hide.long 0x00 "RUART_LSR,Line Status Register" in newline rgroup.long (0x2000+0x18)++0x03 line.long 0x00 "RUART_MSR,Modem Status Register" bitfld.long 0x00 7. " BUART_DCD ,Data carrier detect" "De-asserted,Asserted" bitfld.long 0x00 6. " BUART_RI ,Ring indicator" "De-asserted,Asserted" textline " " bitfld.long 0x00 5. " BUART_DSR ,Data set ready" "De-asserted,Asserted" bitfld.long 0x00 4. " BUART_CTS ,Clear to send" "De-asserted,Asserted" textline " " bitfld.long 0x00 3. " BUART_DDCD ,Delta data carrier detect" "Not changed,Changed" bitfld.long 0x00 2. " BUART_TERI ,Trailing edge of ring indicator" "Not changed,Changed" textline " " bitfld.long 0x00 1. " BUART_DDSR ,Delta data set ready" "Not changed,Changed" bitfld.long 0x00 0. " BUART_DCTS ,Delta clear to send" "Not changed,Changed" group.long (0x2000+0x1C)++0x03 line.long 0x00 "RUART_SCR,Scratchpad Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SCR ,Scratchpad register" if (((per.l(ad:0x40060000+0x0C+0x2000))&0x80)==0x00) rgroup.long (0x2000+0x30)++0x03 line.long 0x00 "RUART_SRBR,Shadow Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SRBR ,Shadow receive buffer register" wgroup.long (0x2000+0x30)++0x03 line.long 0x00 "RUART_STHR,Shadow Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_STHR ,Shadow transmit holding register" endif group.long (0x2000+0x70)++0x03 line.long 0x00 "RUART_FAR,FIFO Access Register" bitfld.long 0x00 0. " BUART_FAR ,FIFO access register" "Disabled,Enabled" if (((per.l(ad:0x40060000+0x070+0x2000))&0x01)==0x01) rgroup.long (0x2000+0x74)++0x03 line.long 0x00 "RUART_TFR,Transmit FIFO Read" hexmask.long.byte 0x00 0.--7. 1. " BUART_TFR ,Transmit FIFO read" wgroup.long (0x2000+0x78)++0x03 line.long 0x00 "RUART_RFW,Receive FIFO Write" bitfld.long 0x00 9. " BUART_RFFE ,Receive FIFO framing error" "No error,Error" bitfld.long 0x00 8. " BUART_RFPE ,Receive FIFO parity error" "No error,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " BUART_RFWD ,Receive FIFO write data" endif rgroup.long (0x2000+0x7C)++0x03 line.long 0x00 "RUART_USR,UART Status Register" bitfld.long 0x00 4. " BUART_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BUART_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BUART_TFE ,Transmit FIFO empty" "No empty,Empty" bitfld.long 0x00 1. " BUART_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BUART_BUSY ,UART Busy" "Idle,Busy" rgroup.long (0x2000+0x80)++0x07 line.long 0x00 "RUART_TFL,Transmit FIFO Level" bitfld.long 0x00 0.--4. " BUART_TFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RUART_RFL,Receive FIFO Level" bitfld.long 0x04 0.--4. " BUART_RFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.long (0x2000+0x88)++0x03 line.long 0x00 "RUART_SRR,Software Reset Register" bitfld.long 0x00 2. " BUART_XFR ,Transmit FIFO reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFR ,Receive FIFO reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_UR ,UART reset" "No reset,Reset" group.long (0x2000+0x8C)++0x07 line.long 0x00 "RUART_SRTS,Shadow Request to Send" bitfld.long 0x00 0. " BUART_SRTS ,Shadow request to send" "0,1" line.long 0x04 "RUART_SBCR,Shadow Break Control Register" bitfld.long 0x04 0. " BUART_SBCR ,Shadow break control bit" "0,1" group.long (0x2000+0x98)++0x07 line.long 0x00 "RUART_SFE,Shadow FIFO Enable" bitfld.long 0x00 0. " BUART_SFE ,Shadow FIFO enable" "Disabled,Enabled" line.long 0x04 "RUART_SRT,Shadow RCVR Trigger" bitfld.long 0x04 0.--1. " BUART_SRCVR ,Shadow receive FIFO trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" group.long (0x2000+0xA0)++0x07 line.long 0x00 "RUART_STET,Shadow TX Empty Trigger" bitfld.long 0x00 0.--1. " BUART_STET ,Shadow Transmit Empty Trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/2 full" line.long 0x04 "RUART_HTX,Halt TX" bitfld.long 0x04 0. " BUART_HTX ,Halt Transmission" "Disabled,Enabled" group.long (0x2000+0x100)++0x07 line.long 0x00 "RUART_TO,Time-Out Counter Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " BUART_TO3 ,Time-Out delay 3" hexmask.long.byte 0x00 16.--23. 1. " BUART_TO2 ,Time-Out delay 2" textline " " hexmask.long.byte 0x00 8.--15. 1. " BUART_TO1 ,Time-Out delay 1" hexmask.long.byte 0x00 0.--7. 1. " BUART_TO0 ,Time-Out delay 0" line.long 0x04 "RUART_CTRLTO,Time-Out Control Register" hexmask.long.byte 0x04 16.--23. 1. " BUART_TG ,Time-Guard value" textline " " bitfld.long 0x04 9. " BUART_ENABLEFILTERINGRXD ,Allows the filtering of UART_RXD in Half-Duplex mode" "Transparent,Filtering" bitfld.long 0x04 8. " BUART_ENABLEDE , Allows the multiplexing of iUART_DE on external pin UART_RTS_N" "Normal mode,Data enable mode" textline " " bitfld.long 0x04 7. " BUART_REARMTO3 ,Rearm Time-Out 3" "No effect,Restart" bitfld.long 0x04 6. " BUART_REARMTO2 ,Rearm Time-Out 2" "No effect,Restart" textline " " bitfld.long 0x04 5. " BUART_REARMTO1 ,Rearm Time-Out 1" "No effect,Restart" bitfld.long 0x04 4. " BUART_REARMTO0 ,Rearm Time-Out 0" "No effect,Restart" textline " " bitfld.long 0x04 3. " BUART_STARTTO3 ,Start Time-Out 3" "No effect,Started" bitfld.long 0x04 2. " BUART_STARTTO2 ,Start Time-Out 2" "No effect,Started" textline " " bitfld.long 0x04 1. " BUART_STARTTO1 ,Start Time-Out 1" "No effect,Started" bitfld.long 0x04 0. " BUART_STARTTO0 ,Start Time-Out 0" "No effect,Started" rgroup.long (0x2000+0x108)++0x03 line.long 0x00 "RUART_STATUSTO,Time-Out Counter Status Register" bitfld.long 0x00 8. " BUART_DE ,Data enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BUART_TIMEOUTSTATUS3 ,Time-out 3 detection status" "Different,Egual" bitfld.long 0x00 6. " BUART_TIMEOUTSTATUS2 ,Time-out 2 detection status" "Different,Egual" textline " " bitfld.long 0x00 5. " BUART_TIMEOUTSTATUS1 ,Time-out 1 detection status" "Different,Egual" bitfld.long 0x00 4. " BUART_TIMEOUTSTATUS0 ,Time-out 0 detection status" "Different,Egual" textline " " bitfld.long 0x00 3. " BUART_TIMEOUTINT3 ,Time-out 3 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 2. " BUART_TIMEOUTINT2 , Time-out 2 detection interruption" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " BUART_TIMEOUTINT1 , Time-out 1 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 0. " BUART_TIMEOUTINT0 , Time-out 0 detection interruption" "No interrupt,Interrupt" tree.end base ad:0x50000000 tree "UART_4" if (((per.l(ad:0x50000000+0x0C+0x0))&0x80)==0x80) group.long 0x0++0x07 line.long 0x00 "RUART_DLL,Divisor Latch (Low)" hexmask.long.byte 0x00 0.--7. 1. " BUART_DLL ,Divisor latch low register" line.long 0x04 "RUART_DLH,Divisor Latch (High)" hexmask.long.byte 0x04 0.--7. 1. " BUART_DLH ,Divisor latch high register" else group.long 0x0++0x07 line.long 0x00 "RUART_RBR_THR,Receive Buffer/Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_RBR_THR ,Receive Buffer Register (rUart_RBR)" line.long 0x04 "RUART_IER,Interrupt Enable Register" bitfld.long 0x04 11. " BUART_ETIMEOUT3 ,Enable transceiver time-out with n=3 interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " BUART_ETIMEOUT2 ,Enable transceiver time-out with n=2 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " BUART_ETIMEOUT1 ,Enable receiver time-out with n=1 interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " BUART_ETIMEOUT0 ,Enable receiver time-out with n=0 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " BUART_PTIME ,Programmable THRE interrupt mode enable" "Disabled,Enabled" bitfld.long 0x04 3. " BUART_EDSSI ,Enable modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " BUART_ELSI ,Enable receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " BUART_ETBEI ,Enable transmit holding register empty interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " BUART_ERBFI ,Enable received data available interrupt" "Disabled,Enabled" endif rgroup.long (0x0+0x08)++0x03 line.long 0x00 "RUART_IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " BUART_FIFOSE ,FIFOs enabled" "Disabled,,,Enabled" bitfld.long 0x00 0.--3. " BUART_IID ,Interrupt ID" "Modem status,No interrupt pending,THR empty,,Received data available,Receiver time out,Receiver line status,Busy detect,,,,,Character timeout,?..." wgroup.long (0x0+0x08)++0x03 line.long 0x00 "RUART_FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " BUART_RCVR ,Receive FIFOs trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" bitfld.long 0x00 4.--5. " BUART_TET ,Transmit FIFOs Empty trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/4 full" textline " " bitfld.long 0x00 2. " BUART_XFIFOR ,Transmit FIFO Reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFIFOR ,Receive FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_FIFOE ,FIFO transmit and receive enable" "Disabled,Enabled" if (((per.l(ad:0x50000000+0x7C+0x0))&0x01)==0x00) if (((per.l(ad:0x50000000+0x0C+0x0))&0x08)==0x08) group.long (0x0+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x0+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif else if (((per.l(ad:0x50000000+0x0C+0x0))&0x08)==0x08) group.long (0x0+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x0+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif endif group.long (0x0+0x10)++0x03 line.long 0x00 "RUART_MCR,Modem Control Register" bitfld.long 0x00 5. " BUART_AFCE ,Auto flow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_LB ,LoopBack bit" "0,1" textline " " bitfld.long 0x00 3. " BUART_OUT2 ,Control the user-designated Output2" "De-asserted,Asserted" bitfld.long 0x00 2. " BUART_OUT1 ,Control the user-designated Output1" "De-asserted,Asserted" textline " " bitfld.long 0x00 1. " BUART_RTS ,Request to send" "0,1" bitfld.long 0x00 0. " BUART_DTR ,Data Terminal Ready" "De-asserted,Asserted" hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "RUART_LSR,Line Status Register" in newline rgroup.long (0x0+0x18)++0x03 line.long 0x00 "RUART_MSR,Modem Status Register" bitfld.long 0x00 7. " BUART_DCD ,Data carrier detect" "De-asserted,Asserted" bitfld.long 0x00 6. " BUART_RI ,Ring indicator" "De-asserted,Asserted" textline " " bitfld.long 0x00 5. " BUART_DSR ,Data set ready" "De-asserted,Asserted" bitfld.long 0x00 4. " BUART_CTS ,Clear to send" "De-asserted,Asserted" textline " " bitfld.long 0x00 3. " BUART_DDCD ,Delta data carrier detect" "Not changed,Changed" bitfld.long 0x00 2. " BUART_TERI ,Trailing edge of ring indicator" "Not changed,Changed" textline " " bitfld.long 0x00 1. " BUART_DDSR ,Delta data set ready" "Not changed,Changed" bitfld.long 0x00 0. " BUART_DCTS ,Delta clear to send" "Not changed,Changed" group.long (0x0+0x1C)++0x03 line.long 0x00 "RUART_SCR,Scratchpad Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SCR ,Scratchpad register" if (((per.l(ad:0x50000000+0x0C+0x0))&0x80)==0x00) rgroup.long (0x0+0x30)++0x03 line.long 0x00 "RUART_SRBR,Shadow Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SRBR ,Shadow receive buffer register" wgroup.long (0x0+0x30)++0x03 line.long 0x00 "RUART_STHR,Shadow Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_STHR ,Shadow transmit holding register" endif group.long (0x0+0x70)++0x03 line.long 0x00 "RUART_FAR,FIFO Access Register" bitfld.long 0x00 0. " BUART_FAR ,FIFO access register" "Disabled,Enabled" if (((per.l(ad:0x50000000+0x070+0x0))&0x01)==0x01) rgroup.long (0x0+0x74)++0x03 line.long 0x00 "RUART_TFR,Transmit FIFO Read" hexmask.long.byte 0x00 0.--7. 1. " BUART_TFR ,Transmit FIFO read" wgroup.long (0x0+0x78)++0x03 line.long 0x00 "RUART_RFW,Receive FIFO Write" bitfld.long 0x00 9. " BUART_RFFE ,Receive FIFO framing error" "No error,Error" bitfld.long 0x00 8. " BUART_RFPE ,Receive FIFO parity error" "No error,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " BUART_RFWD ,Receive FIFO write data" endif rgroup.long (0x0+0x7C)++0x03 line.long 0x00 "RUART_USR,UART Status Register" bitfld.long 0x00 4. " BUART_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BUART_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BUART_TFE ,Transmit FIFO empty" "No empty,Empty" bitfld.long 0x00 1. " BUART_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BUART_BUSY ,UART Busy" "Idle,Busy" rgroup.long (0x0+0x80)++0x07 line.long 0x00 "RUART_TFL,Transmit FIFO Level" bitfld.long 0x00 0.--4. " BUART_TFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RUART_RFL,Receive FIFO Level" bitfld.long 0x04 0.--4. " BUART_RFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.long (0x0+0x88)++0x03 line.long 0x00 "RUART_SRR,Software Reset Register" bitfld.long 0x00 2. " BUART_XFR ,Transmit FIFO reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFR ,Receive FIFO reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_UR ,UART reset" "No reset,Reset" group.long (0x0+0x8C)++0x07 line.long 0x00 "RUART_SRTS,Shadow Request to Send" bitfld.long 0x00 0. " BUART_SRTS ,Shadow request to send" "0,1" line.long 0x04 "RUART_SBCR,Shadow Break Control Register" bitfld.long 0x04 0. " BUART_SBCR ,Shadow break control bit" "0,1" group.long (0x0+0x98)++0x07 line.long 0x00 "RUART_SFE,Shadow FIFO Enable" bitfld.long 0x00 0. " BUART_SFE ,Shadow FIFO enable" "Disabled,Enabled" line.long 0x04 "RUART_SRT,Shadow RCVR Trigger" bitfld.long 0x04 0.--1. " BUART_SRCVR ,Shadow receive FIFO trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" group.long (0x0+0xA0)++0x07 line.long 0x00 "RUART_STET,Shadow TX Empty Trigger" bitfld.long 0x00 0.--1. " BUART_STET ,Shadow Transmit Empty Trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/2 full" line.long 0x04 "RUART_HTX,Halt TX" bitfld.long 0x04 0. " BUART_HTX ,Halt Transmission" "Disabled,Enabled" wgroup.long (0x0+0xA8)++0x03 line.long 0x00 "RUART_DMASA,DMA Software Acknowledge" bitfld.long 0x00 0. " BUART_DMASA ,DMA software acknowledge" "0,1" group.long (0x0+0x100)++0x07 line.long 0x00 "RUART_TO,Time-Out Counter Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " BUART_TO3 ,Time-Out delay 3" hexmask.long.byte 0x00 16.--23. 1. " BUART_TO2 ,Time-Out delay 2" textline " " hexmask.long.byte 0x00 8.--15. 1. " BUART_TO1 ,Time-Out delay 1" hexmask.long.byte 0x00 0.--7. 1. " BUART_TO0 ,Time-Out delay 0" line.long 0x04 "RUART_CTRLTO,Time-Out Control Register" hexmask.long.byte 0x04 16.--23. 1. " BUART_TG ,Time-Guard value" textline " " bitfld.long 0x04 9. " BUART_ENABLEFILTERINGRXD ,Allows the filtering of UART_RXD in Half-Duplex mode" "Transparent,Filtering" bitfld.long 0x04 8. " BUART_ENABLEDE ,Allows the multiplexing of iUART_DE on external pin UART_RTS_N" "Normal mode,Data enable mode" textline " " bitfld.long 0x04 7. " BUART_REARMTO3 ,Rearm Time-Out 3" "No effect,Restart" bitfld.long 0x04 6. " BUART_REARMTO2 ,Rearm Time-Out 2" "No effect,Restart" textline " " bitfld.long 0x04 5. " BUART_REARMTO1 ,Rearm Time-Out 1" "No effect,Restart" bitfld.long 0x04 4. " BUART_REARMTO0 ,Rearm Time-Out 0" "No effect,Restart" textline " " bitfld.long 0x04 3. " BUART_STARTTO3 ,Start Time-Out 3" "No effect,Started" bitfld.long 0x04 2. " BUART_STARTTO2 ,Start Time-Out 2" "No effect,Started" textline " " bitfld.long 0x04 1. " BUART_STARTTO1 ,Start Time-Out 1" "No effect,Started" bitfld.long 0x04 0. " BUART_STARTTO0 ,Start Time-Out 0" "No effect,Started" rgroup.long (0x0+0x108)++0x03 line.long 0x00 "RUART_STATUSTO,Time-Out Counter Status Register" bitfld.long 0x00 8. " BUART_DE ,Data enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BUART_TIMEOUTSTATUS3 ,Time-out 3 detection status" "Different,Egual" bitfld.long 0x00 6. " BUART_TIMEOUTSTATUS2 ,Time-out 2 detection status" "Different,Egual" textline " " bitfld.long 0x00 5. " BUART_TIMEOUTSTATUS1 ,Time-out 1 detection status" "Different,Egual" bitfld.long 0x00 4. " BUART_TIMEOUTSTATUS0 ,Time-out 0 detection status" "Different,Egual" textline " " bitfld.long 0x00 3. " BUART_TIMEOUTINT3 , Time-out 3 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 2. " BUART_TIMEOUTINT2 , Time-out 2 detection interruption" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " BUART_TIMEOUTINT1 , Time-out 1 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 0. " BUART_TIMEOUTINT0 , Time-out 0 detection interruption" "No interrupt,Interrupt" group.long (0x0+0x10C)++0x07 line.long 0x00 "RUART_TDMACR,DMA Control Register in Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BUART_CURRENT_DEST_BLOCK_SIZE ,Current remaining after decremented each time the block transfer ends" hexmask.long.word 0x00 3.--15. 1. " BUART_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BUART_DEST_BURST_SIZE ,Destination Burst Transaction Size in Transmit FIFO" "1 byte,4 byte,8 byte,?..." bitfld.long 0x00 0. " BUART_TDMAE ,Transmit DMA enable" "Disabled,Enabled" line.long 0x04 "RUART_RDMACR,DMA Control Register in Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BUART_CURRENT_SRC_BLOCK_SIZE ,Current remaining after decremented each time the block transfer ends" hexmask.long.word 0x04 3.--15. 1. " BUART_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BUART_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 byte,4 byte,8 byte,?..." bitfld.long 0x04 0. " BUART_RDMAE ,Receive DMA enable" "Disabled,Enabled" tree.end tree "UART_5" if (((per.l(ad:0x50000000+0x0C+0x1000))&0x80)==0x80) group.long 0x1000++0x07 line.long 0x00 "RUART_DLL,Divisor Latch (Low)" hexmask.long.byte 0x00 0.--7. 1. " BUART_DLL ,Divisor latch low register" line.long 0x04 "RUART_DLH,Divisor Latch (High)" hexmask.long.byte 0x04 0.--7. 1. " BUART_DLH ,Divisor latch high register" else group.long 0x1000++0x07 line.long 0x00 "RUART_RBR_THR,Receive Buffer/Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_RBR_THR ,Receive Buffer Register (rUart_RBR)" line.long 0x04 "RUART_IER,Interrupt Enable Register" bitfld.long 0x04 11. " BUART_ETIMEOUT3 ,Enable transceiver time-out with n=3 interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " BUART_ETIMEOUT2 ,Enable transceiver time-out with n=2 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " BUART_ETIMEOUT1 ,Enable receiver time-out with n=1 interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " BUART_ETIMEOUT0 ,Enable receiver time-out with n=0 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " BUART_PTIME ,Programmable THRE interrupt mode enable" "Disabled,Enabled" bitfld.long 0x04 3. " BUART_EDSSI ,Enable modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " BUART_ELSI ,Enable receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " BUART_ETBEI ,Enable transmit holding register empty interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " BUART_ERBFI ,Enable received data available interrupt" "Disabled,Enabled" endif rgroup.long (0x1000+0x08)++0x03 line.long 0x00 "RUART_IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " BUART_FIFOSE ,FIFOs enabled" "Disabled,,,Enabled" bitfld.long 0x00 0.--3. " BUART_IID ,Interrupt ID" "Modem status,No interrupt pending,THR empty,,Received data available,Receiver time out,Receiver line status,Busy detect,,,,,Character timeout,?..." wgroup.long (0x1000+0x08)++0x03 line.long 0x00 "RUART_FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " BUART_RCVR ,Receive FIFOs trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" bitfld.long 0x00 4.--5. " BUART_TET ,Transmit FIFOs Empty trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/4 full" textline " " bitfld.long 0x00 2. " BUART_XFIFOR ,Transmit FIFO Reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFIFOR ,Receive FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_FIFOE ,FIFO transmit and receive enable" "Disabled,Enabled" if (((per.l(ad:0x50000000+0x7C+0x1000))&0x01)==0x00) if (((per.l(ad:0x50000000+0x0C+0x1000))&0x08)==0x08) group.long (0x1000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x1000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif else if (((per.l(ad:0x50000000+0x0C+0x1000))&0x08)==0x08) group.long (0x1000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x1000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif endif group.long (0x1000+0x10)++0x03 line.long 0x00 "RUART_MCR,Modem Control Register" bitfld.long 0x00 5. " BUART_AFCE ,Auto flow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_LB ,LoopBack bit" "0,1" textline " " bitfld.long 0x00 3. " BUART_OUT2 ,Control the user-designated Output2" "De-asserted,Asserted" bitfld.long 0x00 2. " BUART_OUT1 ,Control the user-designated Output1" "De-asserted,Asserted" textline " " bitfld.long 0x00 1. " BUART_RTS ,Request to send" "0,1" bitfld.long 0x00 0. " BUART_DTR ,Data Terminal Ready" "De-asserted,Asserted" hgroup.long (0x1000+0x14)++0x03 hide.long 0x00 "RUART_LSR,Line Status Register" in newline rgroup.long (0x1000+0x18)++0x03 line.long 0x00 "RUART_MSR,Modem Status Register" bitfld.long 0x00 7. " BUART_DCD ,Data carrier detect" "De-asserted,Asserted" bitfld.long 0x00 6. " BUART_RI ,Ring indicator" "De-asserted,Asserted" textline " " bitfld.long 0x00 5. " BUART_DSR ,Data set ready" "De-asserted,Asserted" bitfld.long 0x00 4. " BUART_CTS ,Clear to send" "De-asserted,Asserted" textline " " bitfld.long 0x00 3. " BUART_DDCD ,Delta data carrier detect" "Not changed,Changed" bitfld.long 0x00 2. " BUART_TERI ,Trailing edge of ring indicator" "Not changed,Changed" textline " " bitfld.long 0x00 1. " BUART_DDSR ,Delta data set ready" "Not changed,Changed" bitfld.long 0x00 0. " BUART_DCTS ,Delta clear to send" "Not changed,Changed" group.long (0x1000+0x1C)++0x03 line.long 0x00 "RUART_SCR,Scratchpad Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SCR ,Scratchpad register" if (((per.l(ad:0x50000000+0x0C+0x1000))&0x80)==0x00) rgroup.long (0x1000+0x30)++0x03 line.long 0x00 "RUART_SRBR,Shadow Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SRBR ,Shadow receive buffer register" wgroup.long (0x1000+0x30)++0x03 line.long 0x00 "RUART_STHR,Shadow Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_STHR ,Shadow transmit holding register" endif group.long (0x1000+0x70)++0x03 line.long 0x00 "RUART_FAR,FIFO Access Register" bitfld.long 0x00 0. " BUART_FAR ,FIFO access register" "Disabled,Enabled" if (((per.l(ad:0x50000000+0x070+0x1000))&0x01)==0x01) rgroup.long (0x1000+0x74)++0x03 line.long 0x00 "RUART_TFR,Transmit FIFO Read" hexmask.long.byte 0x00 0.--7. 1. " BUART_TFR ,Transmit FIFO read" wgroup.long (0x1000+0x78)++0x03 line.long 0x00 "RUART_RFW,Receive FIFO Write" bitfld.long 0x00 9. " BUART_RFFE ,Receive FIFO framing error" "No error,Error" bitfld.long 0x00 8. " BUART_RFPE ,Receive FIFO parity error" "No error,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " BUART_RFWD ,Receive FIFO write data" endif rgroup.long (0x1000+0x7C)++0x03 line.long 0x00 "RUART_USR,UART Status Register" bitfld.long 0x00 4. " BUART_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BUART_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BUART_TFE ,Transmit FIFO empty" "No empty,Empty" bitfld.long 0x00 1. " BUART_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BUART_BUSY ,UART Busy" "Idle,Busy" rgroup.long (0x1000+0x80)++0x07 line.long 0x00 "RUART_TFL,Transmit FIFO Level" bitfld.long 0x00 0.--4. " BUART_TFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RUART_RFL,Receive FIFO Level" bitfld.long 0x04 0.--4. " BUART_RFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.long (0x1000+0x88)++0x03 line.long 0x00 "RUART_SRR,Software Reset Register" bitfld.long 0x00 2. " BUART_XFR ,Transmit FIFO reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFR ,Receive FIFO reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_UR ,UART reset" "No reset,Reset" group.long (0x1000+0x8C)++0x07 line.long 0x00 "RUART_SRTS,Shadow Request to Send" bitfld.long 0x00 0. " BUART_SRTS ,Shadow request to send" "0,1" line.long 0x04 "RUART_SBCR,Shadow Break Control Register" bitfld.long 0x04 0. " BUART_SBCR ,Shadow break control bit" "0,1" group.long (0x1000+0x98)++0x07 line.long 0x00 "RUART_SFE,Shadow FIFO Enable" bitfld.long 0x00 0. " BUART_SFE ,Shadow FIFO enable" "Disabled,Enabled" line.long 0x04 "RUART_SRT,Shadow RCVR Trigger" bitfld.long 0x04 0.--1. " BUART_SRCVR ,Shadow receive FIFO trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" group.long (0x1000+0xA0)++0x07 line.long 0x00 "RUART_STET,Shadow TX Empty Trigger" bitfld.long 0x00 0.--1. " BUART_STET ,Shadow Transmit Empty Trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/2 full" line.long 0x04 "RUART_HTX,Halt TX" bitfld.long 0x04 0. " BUART_HTX ,Halt Transmission" "Disabled,Enabled" wgroup.long (0x1000+0xA8)++0x03 line.long 0x00 "RUART_DMASA,DMA Software Acknowledge" bitfld.long 0x00 0. " BUART_DMASA ,DMA software acknowledge" "0,1" group.long (0x1000+0x100)++0x07 line.long 0x00 "RUART_TO,Time-Out Counter Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " BUART_TO3 ,Time-Out delay 3" hexmask.long.byte 0x00 16.--23. 1. " BUART_TO2 ,Time-Out delay 2" textline " " hexmask.long.byte 0x00 8.--15. 1. " BUART_TO1 ,Time-Out delay 1" hexmask.long.byte 0x00 0.--7. 1. " BUART_TO0 ,Time-Out delay 0" line.long 0x04 "RUART_CTRLTO,Time-Out Control Register" hexmask.long.byte 0x04 16.--23. 1. " BUART_TG ,Time-Guard value" textline " " bitfld.long 0x04 9. " BUART_ENABLEFILTERINGRXD ,Allows the filtering of UART_RXD in Half-Duplex mode" "Transparent,Filtering" bitfld.long 0x04 8. " BUART_ENABLEDE ,Allows the multiplexing of iUART_DE on external pin UART_RTS_N" "Normal mode,Data enable mode" textline " " bitfld.long 0x04 7. " BUART_REARMTO3 ,Rearm Time-Out 3" "No effect,Restart" bitfld.long 0x04 6. " BUART_REARMTO2 ,Rearm Time-Out 2" "No effect,Restart" textline " " bitfld.long 0x04 5. " BUART_REARMTO1 ,Rearm Time-Out 1" "No effect,Restart" bitfld.long 0x04 4. " BUART_REARMTO0 ,Rearm Time-Out 0" "No effect,Restart" textline " " bitfld.long 0x04 3. " BUART_STARTTO3 ,Start Time-Out 3" "No effect,Started" bitfld.long 0x04 2. " BUART_STARTTO2 ,Start Time-Out 2" "No effect,Started" textline " " bitfld.long 0x04 1. " BUART_STARTTO1 ,Start Time-Out 1" "No effect,Started" bitfld.long 0x04 0. " BUART_STARTTO0 ,Start Time-Out 0" "No effect,Started" rgroup.long (0x1000+0x108)++0x03 line.long 0x00 "RUART_STATUSTO,Time-Out Counter Status Register" bitfld.long 0x00 8. " BUART_DE ,Data enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BUART_TIMEOUTSTATUS3 ,Time-out 3 detection status" "Different,Egual" bitfld.long 0x00 6. " BUART_TIMEOUTSTATUS2 ,Time-out 2 detection status" "Different,Egual" textline " " bitfld.long 0x00 5. " BUART_TIMEOUTSTATUS1 ,Time-out 1 detection status" "Different,Egual" bitfld.long 0x00 4. " BUART_TIMEOUTSTATUS0 ,Time-out 0 detection status" "Different,Egual" textline " " bitfld.long 0x00 3. " BUART_TIMEOUTINT3 , Time-out 3 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 2. " BUART_TIMEOUTINT2 , Time-out 2 detection interruption" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " BUART_TIMEOUTINT1 , Time-out 1 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 0. " BUART_TIMEOUTINT0 , Time-out 0 detection interruption" "No interrupt,Interrupt" group.long (0x1000+0x10C)++0x07 line.long 0x00 "RUART_TDMACR,DMA Control Register in Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BUART_CURRENT_DEST_BLOCK_SIZE ,Current remaining after decremented each time the block transfer ends" hexmask.long.word 0x00 3.--15. 1. " BUART_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BUART_DEST_BURST_SIZE ,Destination Burst Transaction Size in Transmit FIFO" "1 byte,4 byte,8 byte,?..." bitfld.long 0x00 0. " BUART_TDMAE ,Transmit DMA enable" "Disabled,Enabled" line.long 0x04 "RUART_RDMACR,DMA Control Register in Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BUART_CURRENT_SRC_BLOCK_SIZE ,Current remaining after decremented each time the block transfer ends" hexmask.long.word 0x04 3.--15. 1. " BUART_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BUART_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 byte,4 byte,8 byte,?..." bitfld.long 0x04 0. " BUART_RDMAE ,Receive DMA enable" "Disabled,Enabled" tree.end tree "UART_6" if (((per.l(ad:0x50000000+0x0C+0x2000))&0x80)==0x80) group.long 0x2000++0x07 line.long 0x00 "RUART_DLL,Divisor Latch (Low)" hexmask.long.byte 0x00 0.--7. 1. " BUART_DLL ,Divisor latch low register" line.long 0x04 "RUART_DLH,Divisor Latch (High)" hexmask.long.byte 0x04 0.--7. 1. " BUART_DLH ,Divisor latch high register" else group.long 0x2000++0x07 line.long 0x00 "RUART_RBR_THR,Receive Buffer/Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_RBR_THR ,Receive Buffer Register (rUart_RBR)" line.long 0x04 "RUART_IER,Interrupt Enable Register" bitfld.long 0x04 11. " BUART_ETIMEOUT3 ,Enable transceiver time-out with n=3 interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " BUART_ETIMEOUT2 ,Enable transceiver time-out with n=2 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " BUART_ETIMEOUT1 ,Enable receiver time-out with n=1 interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " BUART_ETIMEOUT0 ,Enable receiver time-out with n=0 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " BUART_PTIME ,Programmable THRE interrupt mode enable" "Disabled,Enabled" bitfld.long 0x04 3. " BUART_EDSSI ,Enable modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " BUART_ELSI ,Enable receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " BUART_ETBEI ,Enable transmit holding register empty interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " BUART_ERBFI ,Enable received data available interrupt" "Disabled,Enabled" endif rgroup.long (0x2000+0x08)++0x03 line.long 0x00 "RUART_IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " BUART_FIFOSE ,FIFOs enabled" "Disabled,,,Enabled" bitfld.long 0x00 0.--3. " BUART_IID ,Interrupt ID" "Modem status,No interrupt pending,THR empty,,Received data available,Receiver time out,Receiver line status,Busy detect,,,,,Character timeout,?..." wgroup.long (0x2000+0x08)++0x03 line.long 0x00 "RUART_FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " BUART_RCVR ,Receive FIFOs trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" bitfld.long 0x00 4.--5. " BUART_TET ,Transmit FIFOs Empty trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/4 full" textline " " bitfld.long 0x00 2. " BUART_XFIFOR ,Transmit FIFO Reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFIFOR ,Receive FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_FIFOE ,FIFO transmit and receive enable" "Disabled,Enabled" if (((per.l(ad:0x50000000+0x7C+0x2000))&0x01)==0x00) if (((per.l(ad:0x50000000+0x0C+0x2000))&0x08)==0x08) group.long (0x2000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x2000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif else if (((per.l(ad:0x50000000+0x0C+0x2000))&0x08)==0x08) group.long (0x2000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x2000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif endif group.long (0x2000+0x10)++0x03 line.long 0x00 "RUART_MCR,Modem Control Register" bitfld.long 0x00 5. " BUART_AFCE ,Auto flow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_LB ,LoopBack bit" "0,1" textline " " bitfld.long 0x00 3. " BUART_OUT2 ,Control the user-designated Output2" "De-asserted,Asserted" bitfld.long 0x00 2. " BUART_OUT1 ,Control the user-designated Output1" "De-asserted,Asserted" textline " " bitfld.long 0x00 1. " BUART_RTS ,Request to send" "0,1" bitfld.long 0x00 0. " BUART_DTR ,Data Terminal Ready" "De-asserted,Asserted" hgroup.long (0x2000+0x14)++0x03 hide.long 0x00 "RUART_LSR,Line Status Register" in newline rgroup.long (0x2000+0x18)++0x03 line.long 0x00 "RUART_MSR,Modem Status Register" bitfld.long 0x00 7. " BUART_DCD ,Data carrier detect" "De-asserted,Asserted" bitfld.long 0x00 6. " BUART_RI ,Ring indicator" "De-asserted,Asserted" textline " " bitfld.long 0x00 5. " BUART_DSR ,Data set ready" "De-asserted,Asserted" bitfld.long 0x00 4. " BUART_CTS ,Clear to send" "De-asserted,Asserted" textline " " bitfld.long 0x00 3. " BUART_DDCD ,Delta data carrier detect" "Not changed,Changed" bitfld.long 0x00 2. " BUART_TERI ,Trailing edge of ring indicator" "Not changed,Changed" textline " " bitfld.long 0x00 1. " BUART_DDSR ,Delta data set ready" "Not changed,Changed" bitfld.long 0x00 0. " BUART_DCTS ,Delta clear to send" "Not changed,Changed" group.long (0x2000+0x1C)++0x03 line.long 0x00 "RUART_SCR,Scratchpad Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SCR ,Scratchpad register" if (((per.l(ad:0x50000000+0x0C+0x2000))&0x80)==0x00) rgroup.long (0x2000+0x30)++0x03 line.long 0x00 "RUART_SRBR,Shadow Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SRBR ,Shadow receive buffer register" wgroup.long (0x2000+0x30)++0x03 line.long 0x00 "RUART_STHR,Shadow Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_STHR ,Shadow transmit holding register" endif group.long (0x2000+0x70)++0x03 line.long 0x00 "RUART_FAR,FIFO Access Register" bitfld.long 0x00 0. " BUART_FAR ,FIFO access register" "Disabled,Enabled" if (((per.l(ad:0x50000000+0x070+0x2000))&0x01)==0x01) rgroup.long (0x2000+0x74)++0x03 line.long 0x00 "RUART_TFR,Transmit FIFO Read" hexmask.long.byte 0x00 0.--7. 1. " BUART_TFR ,Transmit FIFO read" wgroup.long (0x2000+0x78)++0x03 line.long 0x00 "RUART_RFW,Receive FIFO Write" bitfld.long 0x00 9. " BUART_RFFE ,Receive FIFO framing error" "No error,Error" bitfld.long 0x00 8. " BUART_RFPE ,Receive FIFO parity error" "No error,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " BUART_RFWD ,Receive FIFO write data" endif rgroup.long (0x2000+0x7C)++0x03 line.long 0x00 "RUART_USR,UART Status Register" bitfld.long 0x00 4. " BUART_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BUART_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BUART_TFE ,Transmit FIFO empty" "No empty,Empty" bitfld.long 0x00 1. " BUART_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BUART_BUSY ,UART Busy" "Idle,Busy" rgroup.long (0x2000+0x80)++0x07 line.long 0x00 "RUART_TFL,Transmit FIFO Level" bitfld.long 0x00 0.--4. " BUART_TFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RUART_RFL,Receive FIFO Level" bitfld.long 0x04 0.--4. " BUART_RFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.long (0x2000+0x88)++0x03 line.long 0x00 "RUART_SRR,Software Reset Register" bitfld.long 0x00 2. " BUART_XFR ,Transmit FIFO reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFR ,Receive FIFO reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_UR ,UART reset" "No reset,Reset" group.long (0x2000+0x8C)++0x07 line.long 0x00 "RUART_SRTS,Shadow Request to Send" bitfld.long 0x00 0. " BUART_SRTS ,Shadow request to send" "0,1" line.long 0x04 "RUART_SBCR,Shadow Break Control Register" bitfld.long 0x04 0. " BUART_SBCR ,Shadow break control bit" "0,1" group.long (0x2000+0x98)++0x07 line.long 0x00 "RUART_SFE,Shadow FIFO Enable" bitfld.long 0x00 0. " BUART_SFE ,Shadow FIFO enable" "Disabled,Enabled" line.long 0x04 "RUART_SRT,Shadow RCVR Trigger" bitfld.long 0x04 0.--1. " BUART_SRCVR ,Shadow receive FIFO trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" group.long (0x2000+0xA0)++0x07 line.long 0x00 "RUART_STET,Shadow TX Empty Trigger" bitfld.long 0x00 0.--1. " BUART_STET ,Shadow Transmit Empty Trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/2 full" line.long 0x04 "RUART_HTX,Halt TX" bitfld.long 0x04 0. " BUART_HTX ,Halt Transmission" "Disabled,Enabled" wgroup.long (0x2000+0xA8)++0x03 line.long 0x00 "RUART_DMASA,DMA Software Acknowledge" bitfld.long 0x00 0. " BUART_DMASA ,DMA software acknowledge" "0,1" group.long (0x2000+0x100)++0x07 line.long 0x00 "RUART_TO,Time-Out Counter Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " BUART_TO3 ,Time-Out delay 3" hexmask.long.byte 0x00 16.--23. 1. " BUART_TO2 ,Time-Out delay 2" textline " " hexmask.long.byte 0x00 8.--15. 1. " BUART_TO1 ,Time-Out delay 1" hexmask.long.byte 0x00 0.--7. 1. " BUART_TO0 ,Time-Out delay 0" line.long 0x04 "RUART_CTRLTO,Time-Out Control Register" hexmask.long.byte 0x04 16.--23. 1. " BUART_TG ,Time-Guard value" textline " " bitfld.long 0x04 9. " BUART_ENABLEFILTERINGRXD ,Allows the filtering of UART_RXD in Half-Duplex mode" "Transparent,Filtering" bitfld.long 0x04 8. " BUART_ENABLEDE ,Allows the multiplexing of iUART_DE on external pin UART_RTS_N" "Normal mode,Data enable mode" textline " " bitfld.long 0x04 7. " BUART_REARMTO3 ,Rearm Time-Out 3" "No effect,Restart" bitfld.long 0x04 6. " BUART_REARMTO2 ,Rearm Time-Out 2" "No effect,Restart" textline " " bitfld.long 0x04 5. " BUART_REARMTO1 ,Rearm Time-Out 1" "No effect,Restart" bitfld.long 0x04 4. " BUART_REARMTO0 ,Rearm Time-Out 0" "No effect,Restart" textline " " bitfld.long 0x04 3. " BUART_STARTTO3 ,Start Time-Out 3" "No effect,Started" bitfld.long 0x04 2. " BUART_STARTTO2 ,Start Time-Out 2" "No effect,Started" textline " " bitfld.long 0x04 1. " BUART_STARTTO1 ,Start Time-Out 1" "No effect,Started" bitfld.long 0x04 0. " BUART_STARTTO0 ,Start Time-Out 0" "No effect,Started" rgroup.long (0x2000+0x108)++0x03 line.long 0x00 "RUART_STATUSTO,Time-Out Counter Status Register" bitfld.long 0x00 8. " BUART_DE ,Data enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BUART_TIMEOUTSTATUS3 ,Time-out 3 detection status" "Different,Egual" bitfld.long 0x00 6. " BUART_TIMEOUTSTATUS2 ,Time-out 2 detection status" "Different,Egual" textline " " bitfld.long 0x00 5. " BUART_TIMEOUTSTATUS1 ,Time-out 1 detection status" "Different,Egual" bitfld.long 0x00 4. " BUART_TIMEOUTSTATUS0 ,Time-out 0 detection status" "Different,Egual" textline " " bitfld.long 0x00 3. " BUART_TIMEOUTINT3 , Time-out 3 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 2. " BUART_TIMEOUTINT2 , Time-out 2 detection interruption" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " BUART_TIMEOUTINT1 , Time-out 1 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 0. " BUART_TIMEOUTINT0 , Time-out 0 detection interruption" "No interrupt,Interrupt" group.long (0x2000+0x10C)++0x07 line.long 0x00 "RUART_TDMACR,DMA Control Register in Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BUART_CURRENT_DEST_BLOCK_SIZE ,Current remaining after decremented each time the block transfer ends" hexmask.long.word 0x00 3.--15. 1. " BUART_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BUART_DEST_BURST_SIZE ,Destination Burst Transaction Size in Transmit FIFO" "1 byte,4 byte,8 byte,?..." bitfld.long 0x00 0. " BUART_TDMAE ,Transmit DMA enable" "Disabled,Enabled" line.long 0x04 "RUART_RDMACR,DMA Control Register in Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BUART_CURRENT_SRC_BLOCK_SIZE ,Current remaining after decremented each time the block transfer ends" hexmask.long.word 0x04 3.--15. 1. " BUART_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BUART_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 byte,4 byte,8 byte,?..." bitfld.long 0x04 0. " BUART_RDMAE ,Receive DMA enable" "Disabled,Enabled" tree.end tree "UART_7" if (((per.l(ad:0x50000000+0x0C+0x3000))&0x80)==0x80) group.long 0x3000++0x07 line.long 0x00 "RUART_DLL,Divisor Latch (Low)" hexmask.long.byte 0x00 0.--7. 1. " BUART_DLL ,Divisor latch low register" line.long 0x04 "RUART_DLH,Divisor Latch (High)" hexmask.long.byte 0x04 0.--7. 1. " BUART_DLH ,Divisor latch high register" else group.long 0x3000++0x07 line.long 0x00 "RUART_RBR_THR,Receive Buffer/Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_RBR_THR ,Receive Buffer Register (rUart_RBR)" line.long 0x04 "RUART_IER,Interrupt Enable Register" bitfld.long 0x04 11. " BUART_ETIMEOUT3 ,Enable transceiver time-out with n=3 interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " BUART_ETIMEOUT2 ,Enable transceiver time-out with n=2 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " BUART_ETIMEOUT1 ,Enable receiver time-out with n=1 interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " BUART_ETIMEOUT0 ,Enable receiver time-out with n=0 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " BUART_PTIME ,Programmable THRE interrupt mode enable" "Disabled,Enabled" bitfld.long 0x04 3. " BUART_EDSSI ,Enable modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " BUART_ELSI ,Enable receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " BUART_ETBEI ,Enable transmit holding register empty interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " BUART_ERBFI ,Enable received data available interrupt" "Disabled,Enabled" endif rgroup.long (0x3000+0x08)++0x03 line.long 0x00 "RUART_IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " BUART_FIFOSE ,FIFOs enabled" "Disabled,,,Enabled" bitfld.long 0x00 0.--3. " BUART_IID ,Interrupt ID" "Modem status,No interrupt pending,THR empty,,Received data available,Receiver time out,Receiver line status,Busy detect,,,,,Character timeout,?..." wgroup.long (0x3000+0x08)++0x03 line.long 0x00 "RUART_FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " BUART_RCVR ,Receive FIFOs trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" bitfld.long 0x00 4.--5. " BUART_TET ,Transmit FIFOs Empty trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/4 full" textline " " bitfld.long 0x00 2. " BUART_XFIFOR ,Transmit FIFO Reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFIFOR ,Receive FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_FIFOE ,FIFO transmit and receive enable" "Disabled,Enabled" if (((per.l(ad:0x50000000+0x7C+0x3000))&0x01)==0x00) if (((per.l(ad:0x50000000+0x0C+0x3000))&0x08)==0x08) group.long (0x3000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x3000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif else if (((per.l(ad:0x50000000+0x0C+0x3000))&0x08)==0x08) group.long (0x3000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x3000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif endif group.long (0x3000+0x10)++0x03 line.long 0x00 "RUART_MCR,Modem Control Register" bitfld.long 0x00 5. " BUART_AFCE ,Auto flow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_LB ,LoopBack bit" "0,1" textline " " bitfld.long 0x00 3. " BUART_OUT2 ,Control the user-designated Output2" "De-asserted,Asserted" bitfld.long 0x00 2. " BUART_OUT1 ,Control the user-designated Output1" "De-asserted,Asserted" textline " " bitfld.long 0x00 1. " BUART_RTS ,Request to send" "0,1" bitfld.long 0x00 0. " BUART_DTR ,Data Terminal Ready" "De-asserted,Asserted" hgroup.long (0x3000+0x14)++0x03 hide.long 0x00 "RUART_LSR,Line Status Register" in newline rgroup.long (0x3000+0x18)++0x03 line.long 0x00 "RUART_MSR,Modem Status Register" bitfld.long 0x00 7. " BUART_DCD ,Data carrier detect" "De-asserted,Asserted" bitfld.long 0x00 6. " BUART_RI ,Ring indicator" "De-asserted,Asserted" textline " " bitfld.long 0x00 5. " BUART_DSR ,Data set ready" "De-asserted,Asserted" bitfld.long 0x00 4. " BUART_CTS ,Clear to send" "De-asserted,Asserted" textline " " bitfld.long 0x00 3. " BUART_DDCD ,Delta data carrier detect" "Not changed,Changed" bitfld.long 0x00 2. " BUART_TERI ,Trailing edge of ring indicator" "Not changed,Changed" textline " " bitfld.long 0x00 1. " BUART_DDSR ,Delta data set ready" "Not changed,Changed" bitfld.long 0x00 0. " BUART_DCTS ,Delta clear to send" "Not changed,Changed" group.long (0x3000+0x1C)++0x03 line.long 0x00 "RUART_SCR,Scratchpad Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SCR ,Scratchpad register" if (((per.l(ad:0x50000000+0x0C+0x3000))&0x80)==0x00) rgroup.long (0x3000+0x30)++0x03 line.long 0x00 "RUART_SRBR,Shadow Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SRBR ,Shadow receive buffer register" wgroup.long (0x3000+0x30)++0x03 line.long 0x00 "RUART_STHR,Shadow Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_STHR ,Shadow transmit holding register" endif group.long (0x3000+0x70)++0x03 line.long 0x00 "RUART_FAR,FIFO Access Register" bitfld.long 0x00 0. " BUART_FAR ,FIFO access register" "Disabled,Enabled" if (((per.l(ad:0x50000000+0x070+0x3000))&0x01)==0x01) rgroup.long (0x3000+0x74)++0x03 line.long 0x00 "RUART_TFR,Transmit FIFO Read" hexmask.long.byte 0x00 0.--7. 1. " BUART_TFR ,Transmit FIFO read" wgroup.long (0x3000+0x78)++0x03 line.long 0x00 "RUART_RFW,Receive FIFO Write" bitfld.long 0x00 9. " BUART_RFFE ,Receive FIFO framing error" "No error,Error" bitfld.long 0x00 8. " BUART_RFPE ,Receive FIFO parity error" "No error,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " BUART_RFWD ,Receive FIFO write data" endif rgroup.long (0x3000+0x7C)++0x03 line.long 0x00 "RUART_USR,UART Status Register" bitfld.long 0x00 4. " BUART_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BUART_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BUART_TFE ,Transmit FIFO empty" "No empty,Empty" bitfld.long 0x00 1. " BUART_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BUART_BUSY ,UART Busy" "Idle,Busy" rgroup.long (0x3000+0x80)++0x07 line.long 0x00 "RUART_TFL,Transmit FIFO Level" bitfld.long 0x00 0.--4. " BUART_TFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RUART_RFL,Receive FIFO Level" bitfld.long 0x04 0.--4. " BUART_RFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.long (0x3000+0x88)++0x03 line.long 0x00 "RUART_SRR,Software Reset Register" bitfld.long 0x00 2. " BUART_XFR ,Transmit FIFO reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFR ,Receive FIFO reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_UR ,UART reset" "No reset,Reset" group.long (0x3000+0x8C)++0x07 line.long 0x00 "RUART_SRTS,Shadow Request to Send" bitfld.long 0x00 0. " BUART_SRTS ,Shadow request to send" "0,1" line.long 0x04 "RUART_SBCR,Shadow Break Control Register" bitfld.long 0x04 0. " BUART_SBCR ,Shadow break control bit" "0,1" group.long (0x3000+0x98)++0x07 line.long 0x00 "RUART_SFE,Shadow FIFO Enable" bitfld.long 0x00 0. " BUART_SFE ,Shadow FIFO enable" "Disabled,Enabled" line.long 0x04 "RUART_SRT,Shadow RCVR Trigger" bitfld.long 0x04 0.--1. " BUART_SRCVR ,Shadow receive FIFO trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" group.long (0x3000+0xA0)++0x07 line.long 0x00 "RUART_STET,Shadow TX Empty Trigger" bitfld.long 0x00 0.--1. " BUART_STET ,Shadow Transmit Empty Trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/2 full" line.long 0x04 "RUART_HTX,Halt TX" bitfld.long 0x04 0. " BUART_HTX ,Halt Transmission" "Disabled,Enabled" wgroup.long (0x3000+0xA8)++0x03 line.long 0x00 "RUART_DMASA,DMA Software Acknowledge" bitfld.long 0x00 0. " BUART_DMASA ,DMA software acknowledge" "0,1" group.long (0x3000+0x100)++0x07 line.long 0x00 "RUART_TO,Time-Out Counter Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " BUART_TO3 ,Time-Out delay 3" hexmask.long.byte 0x00 16.--23. 1. " BUART_TO2 ,Time-Out delay 2" textline " " hexmask.long.byte 0x00 8.--15. 1. " BUART_TO1 ,Time-Out delay 1" hexmask.long.byte 0x00 0.--7. 1. " BUART_TO0 ,Time-Out delay 0" line.long 0x04 "RUART_CTRLTO,Time-Out Control Register" hexmask.long.byte 0x04 16.--23. 1. " BUART_TG ,Time-Guard value" textline " " bitfld.long 0x04 9. " BUART_ENABLEFILTERINGRXD ,Allows the filtering of UART_RXD in Half-Duplex mode" "Transparent,Filtering" bitfld.long 0x04 8. " BUART_ENABLEDE ,Allows the multiplexing of iUART_DE on external pin UART_RTS_N" "Normal mode,Data enable mode" textline " " bitfld.long 0x04 7. " BUART_REARMTO3 ,Rearm Time-Out 3" "No effect,Restart" bitfld.long 0x04 6. " BUART_REARMTO2 ,Rearm Time-Out 2" "No effect,Restart" textline " " bitfld.long 0x04 5. " BUART_REARMTO1 ,Rearm Time-Out 1" "No effect,Restart" bitfld.long 0x04 4. " BUART_REARMTO0 ,Rearm Time-Out 0" "No effect,Restart" textline " " bitfld.long 0x04 3. " BUART_STARTTO3 ,Start Time-Out 3" "No effect,Started" bitfld.long 0x04 2. " BUART_STARTTO2 ,Start Time-Out 2" "No effect,Started" textline " " bitfld.long 0x04 1. " BUART_STARTTO1 ,Start Time-Out 1" "No effect,Started" bitfld.long 0x04 0. " BUART_STARTTO0 ,Start Time-Out 0" "No effect,Started" rgroup.long (0x3000+0x108)++0x03 line.long 0x00 "RUART_STATUSTO,Time-Out Counter Status Register" bitfld.long 0x00 8. " BUART_DE ,Data enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BUART_TIMEOUTSTATUS3 ,Time-out 3 detection status" "Different,Egual" bitfld.long 0x00 6. " BUART_TIMEOUTSTATUS2 ,Time-out 2 detection status" "Different,Egual" textline " " bitfld.long 0x00 5. " BUART_TIMEOUTSTATUS1 ,Time-out 1 detection status" "Different,Egual" bitfld.long 0x00 4. " BUART_TIMEOUTSTATUS0 ,Time-out 0 detection status" "Different,Egual" textline " " bitfld.long 0x00 3. " BUART_TIMEOUTINT3 , Time-out 3 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 2. " BUART_TIMEOUTINT2 , Time-out 2 detection interruption" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " BUART_TIMEOUTINT1 , Time-out 1 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 0. " BUART_TIMEOUTINT0 , Time-out 0 detection interruption" "No interrupt,Interrupt" group.long (0x3000+0x10C)++0x07 line.long 0x00 "RUART_TDMACR,DMA Control Register in Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BUART_CURRENT_DEST_BLOCK_SIZE ,Current remaining after decremented each time the block transfer ends" hexmask.long.word 0x00 3.--15. 1. " BUART_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BUART_DEST_BURST_SIZE ,Destination Burst Transaction Size in Transmit FIFO" "1 byte,4 byte,8 byte,?..." bitfld.long 0x00 0. " BUART_TDMAE ,Transmit DMA enable" "Disabled,Enabled" line.long 0x04 "RUART_RDMACR,DMA Control Register in Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BUART_CURRENT_SRC_BLOCK_SIZE ,Current remaining after decremented each time the block transfer ends" hexmask.long.word 0x04 3.--15. 1. " BUART_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BUART_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 byte,4 byte,8 byte,?..." bitfld.long 0x04 0. " BUART_RDMAE ,Receive DMA enable" "Disabled,Enabled" tree.end tree "UART_8" if (((per.l(ad:0x50000000+0x0C+0x4000))&0x80)==0x80) group.long 0x4000++0x07 line.long 0x00 "RUART_DLL,Divisor Latch (Low)" hexmask.long.byte 0x00 0.--7. 1. " BUART_DLL ,Divisor latch low register" line.long 0x04 "RUART_DLH,Divisor Latch (High)" hexmask.long.byte 0x04 0.--7. 1. " BUART_DLH ,Divisor latch high register" else group.long 0x4000++0x07 line.long 0x00 "RUART_RBR_THR,Receive Buffer/Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_RBR_THR ,Receive Buffer Register (rUart_RBR)" line.long 0x04 "RUART_IER,Interrupt Enable Register" bitfld.long 0x04 11. " BUART_ETIMEOUT3 ,Enable transceiver time-out with n=3 interrupt" "Disabled,Enabled" bitfld.long 0x04 10. " BUART_ETIMEOUT2 ,Enable transceiver time-out with n=2 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " BUART_ETIMEOUT1 ,Enable receiver time-out with n=1 interrupt" "Disabled,Enabled" bitfld.long 0x04 8. " BUART_ETIMEOUT0 ,Enable receiver time-out with n=0 interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " BUART_PTIME ,Programmable THRE interrupt mode enable" "Disabled,Enabled" bitfld.long 0x04 3. " BUART_EDSSI ,Enable modem status interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " BUART_ELSI ,Enable receiver line status interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " BUART_ETBEI ,Enable transmit holding register empty interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " BUART_ERBFI ,Enable received data available interrupt" "Disabled,Enabled" endif rgroup.long (0x4000+0x08)++0x03 line.long 0x00 "RUART_IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " BUART_FIFOSE ,FIFOs enabled" "Disabled,,,Enabled" bitfld.long 0x00 0.--3. " BUART_IID ,Interrupt ID" "Modem status,No interrupt pending,THR empty,,Received data available,Receiver time out,Receiver line status,Busy detect,,,,,Character timeout,?..." wgroup.long (0x4000+0x08)++0x03 line.long 0x00 "RUART_FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " BUART_RCVR ,Receive FIFOs trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" bitfld.long 0x00 4.--5. " BUART_TET ,Transmit FIFOs Empty trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/4 full" textline " " bitfld.long 0x00 2. " BUART_XFIFOR ,Transmit FIFO Reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFIFOR ,Receive FIFO Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_FIFOE ,FIFO transmit and receive enable" "Disabled,Enabled" if (((per.l(ad:0x50000000+0x7C+0x4000))&0x01)==0x00) if (((per.l(ad:0x50000000+0x0C+0x4000))&0x08)==0x08) group.long (0x4000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x4000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" bitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " bitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " bitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif else if (((per.l(ad:0x50000000+0x0C+0x4000))&0x08)==0x08) group.long (0x4000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,Enabled" rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,1.5 bits" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" else group.long (0x4000+0x0C)++0x03 line.long 0x00 "RUART_LCR,Line Control Register" rbitfld.long 0x00 7. " BUART_DLAB ,Divisor latch access bit" "Disabled,Enabled" bitfld.long 0x00 6. " BUART_BC ,Break control bit" "Disabled,Enabled" textline " " rbitfld.long 0x00 5. " BUART_STICKPARITY ,Stick parity bit" "Disabled,?..." rbitfld.long 0x00 4. " BUART_EPS ,Even parity select" "Even parity,Odd parity" textline " " rbitfld.long 0x00 3. " BUART_PEN ,Parity enable" "Disabled,Enabled" rbitfld.long 0x00 2. " BUART_STOP ,Number of stop bits" "1 bit,2 bit" textline " " rbitfld.long 0x00 0.--1. " BUART_DLS ,Data length select" "5 bits,6 bits,7 bits,8 bits" endif endif group.long (0x4000+0x10)++0x03 line.long 0x00 "RUART_MCR,Modem Control Register" bitfld.long 0x00 5. " BUART_AFCE ,Auto flow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " BUART_LB ,LoopBack bit" "0,1" textline " " bitfld.long 0x00 3. " BUART_OUT2 ,Control the user-designated Output2" "De-asserted,Asserted" bitfld.long 0x00 2. " BUART_OUT1 ,Control the user-designated Output1" "De-asserted,Asserted" textline " " bitfld.long 0x00 1. " BUART_RTS ,Request to send" "0,1" bitfld.long 0x00 0. " BUART_DTR ,Data Terminal Ready" "De-asserted,Asserted" hgroup.long (0x4000+0x14)++0x03 hide.long 0x00 "RUART_LSR,Line Status Register" in newline rgroup.long (0x4000+0x18)++0x03 line.long 0x00 "RUART_MSR,Modem Status Register" bitfld.long 0x00 7. " BUART_DCD ,Data carrier detect" "De-asserted,Asserted" bitfld.long 0x00 6. " BUART_RI ,Ring indicator" "De-asserted,Asserted" textline " " bitfld.long 0x00 5. " BUART_DSR ,Data set ready" "De-asserted,Asserted" bitfld.long 0x00 4. " BUART_CTS ,Clear to send" "De-asserted,Asserted" textline " " bitfld.long 0x00 3. " BUART_DDCD ,Delta data carrier detect" "Not changed,Changed" bitfld.long 0x00 2. " BUART_TERI ,Trailing edge of ring indicator" "Not changed,Changed" textline " " bitfld.long 0x00 1. " BUART_DDSR ,Delta data set ready" "Not changed,Changed" bitfld.long 0x00 0. " BUART_DCTS ,Delta clear to send" "Not changed,Changed" group.long (0x4000+0x1C)++0x03 line.long 0x00 "RUART_SCR,Scratchpad Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SCR ,Scratchpad register" if (((per.l(ad:0x50000000+0x0C+0x4000))&0x80)==0x00) rgroup.long (0x4000+0x30)++0x03 line.long 0x00 "RUART_SRBR,Shadow Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_SRBR ,Shadow receive buffer register" wgroup.long (0x4000+0x30)++0x03 line.long 0x00 "RUART_STHR,Shadow Transmit Holding Register" hexmask.long.byte 0x00 0.--7. 1. " BUART_STHR ,Shadow transmit holding register" endif group.long (0x4000+0x70)++0x03 line.long 0x00 "RUART_FAR,FIFO Access Register" bitfld.long 0x00 0. " BUART_FAR ,FIFO access register" "Disabled,Enabled" if (((per.l(ad:0x50000000+0x070+0x4000))&0x01)==0x01) rgroup.long (0x4000+0x74)++0x03 line.long 0x00 "RUART_TFR,Transmit FIFO Read" hexmask.long.byte 0x00 0.--7. 1. " BUART_TFR ,Transmit FIFO read" wgroup.long (0x4000+0x78)++0x03 line.long 0x00 "RUART_RFW,Receive FIFO Write" bitfld.long 0x00 9. " BUART_RFFE ,Receive FIFO framing error" "No error,Error" bitfld.long 0x00 8. " BUART_RFPE ,Receive FIFO parity error" "No error,Error" textline " " hexmask.long.byte 0x00 0.--7. 1. " BUART_RFWD ,Receive FIFO write data" endif rgroup.long (0x4000+0x7C)++0x03 line.long 0x00 "RUART_USR,UART Status Register" bitfld.long 0x00 4. " BUART_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BUART_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BUART_TFE ,Transmit FIFO empty" "No empty,Empty" bitfld.long 0x00 1. " BUART_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BUART_BUSY ,UART Busy" "Idle,Busy" rgroup.long (0x4000+0x80)++0x07 line.long 0x00 "RUART_TFL,Transmit FIFO Level" bitfld.long 0x00 0.--4. " BUART_TFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RUART_RFL,Receive FIFO Level" bitfld.long 0x04 0.--4. " BUART_RFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.long (0x4000+0x88)++0x03 line.long 0x00 "RUART_SRR,Software Reset Register" bitfld.long 0x00 2. " BUART_XFR ,Transmit FIFO reset" "No reset,Reset" bitfld.long 0x00 1. " BUART_RFR ,Receive FIFO reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUART_UR ,UART reset" "No reset,Reset" group.long (0x4000+0x8C)++0x07 line.long 0x00 "RUART_SRTS,Shadow Request to Send" bitfld.long 0x00 0. " BUART_SRTS ,Shadow request to send" "0,1" line.long 0x04 "RUART_SBCR,Shadow Break Control Register" bitfld.long 0x04 0. " BUART_SBCR ,Shadow break control bit" "0,1" group.long (0x4000+0x98)++0x07 line.long 0x00 "RUART_SFE,Shadow FIFO Enable" bitfld.long 0x00 0. " BUART_SFE ,Shadow FIFO enable" "Disabled,Enabled" line.long 0x04 "RUART_SRT,Shadow RCVR Trigger" bitfld.long 0x04 0.--1. " BUART_SRCVR ,Shadow receive FIFO trigger" "1 character in the FIFO,FIFO 1/4 full,FIFO 1/2 full,FIFO 2 less than full" group.long (0x4000+0xA0)++0x07 line.long 0x00 "RUART_STET,Shadow TX Empty Trigger" bitfld.long 0x00 0.--1. " BUART_STET ,Shadow Transmit Empty Trigger" "FIFO empty,2 characters in the FIFO,FIFO 1/4 full,FIFO 1/2 full" line.long 0x04 "RUART_HTX,Halt TX" bitfld.long 0x04 0. " BUART_HTX ,Halt Transmission" "Disabled,Enabled" wgroup.long (0x4000+0xA8)++0x03 line.long 0x00 "RUART_DMASA,DMA Software Acknowledge" bitfld.long 0x00 0. " BUART_DMASA ,DMA software acknowledge" "0,1" group.long (0x4000+0x100)++0x07 line.long 0x00 "RUART_TO,Time-Out Counter Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " BUART_TO3 ,Time-Out delay 3" hexmask.long.byte 0x00 16.--23. 1. " BUART_TO2 ,Time-Out delay 2" textline " " hexmask.long.byte 0x00 8.--15. 1. " BUART_TO1 ,Time-Out delay 1" hexmask.long.byte 0x00 0.--7. 1. " BUART_TO0 ,Time-Out delay 0" line.long 0x04 "RUART_CTRLTO,Time-Out Control Register" hexmask.long.byte 0x04 16.--23. 1. " BUART_TG ,Time-Guard value" textline " " bitfld.long 0x04 9. " BUART_ENABLEFILTERINGRXD ,Allows the filtering of UART_RXD in Half-Duplex mode" "Transparent,Filtering" bitfld.long 0x04 8. " BUART_ENABLEDE ,Allows the multiplexing of iUART_DE on external pin UART_RTS_N" "Normal mode,Data enable mode" textline " " bitfld.long 0x04 7. " BUART_REARMTO3 ,Rearm Time-Out 3" "No effect,Restart" bitfld.long 0x04 6. " BUART_REARMTO2 ,Rearm Time-Out 2" "No effect,Restart" textline " " bitfld.long 0x04 5. " BUART_REARMTO1 ,Rearm Time-Out 1" "No effect,Restart" bitfld.long 0x04 4. " BUART_REARMTO0 ,Rearm Time-Out 0" "No effect,Restart" textline " " bitfld.long 0x04 3. " BUART_STARTTO3 ,Start Time-Out 3" "No effect,Started" bitfld.long 0x04 2. " BUART_STARTTO2 ,Start Time-Out 2" "No effect,Started" textline " " bitfld.long 0x04 1. " BUART_STARTTO1 ,Start Time-Out 1" "No effect,Started" bitfld.long 0x04 0. " BUART_STARTTO0 ,Start Time-Out 0" "No effect,Started" rgroup.long (0x4000+0x108)++0x03 line.long 0x00 "RUART_STATUSTO,Time-Out Counter Status Register" bitfld.long 0x00 8. " BUART_DE ,Data enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " BUART_TIMEOUTSTATUS3 ,Time-out 3 detection status" "Different,Egual" bitfld.long 0x00 6. " BUART_TIMEOUTSTATUS2 ,Time-out 2 detection status" "Different,Egual" textline " " bitfld.long 0x00 5. " BUART_TIMEOUTSTATUS1 ,Time-out 1 detection status" "Different,Egual" bitfld.long 0x00 4. " BUART_TIMEOUTSTATUS0 ,Time-out 0 detection status" "Different,Egual" textline " " bitfld.long 0x00 3. " BUART_TIMEOUTINT3 , Time-out 3 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 2. " BUART_TIMEOUTINT2 , Time-out 2 detection interruption" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " BUART_TIMEOUTINT1 , Time-out 1 detection interruption" "No interrupt,Interrupt" bitfld.long 0x00 0. " BUART_TIMEOUTINT0 , Time-out 0 detection interruption" "No interrupt,Interrupt" group.long (0x4000+0x10C)++0x07 line.long 0x00 "RUART_TDMACR,DMA Control Register in Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BUART_CURRENT_DEST_BLOCK_SIZE ,Current remaining after decremented each time the block transfer ends" hexmask.long.word 0x00 3.--15. 1. " BUART_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BUART_DEST_BURST_SIZE ,Destination Burst Transaction Size in Transmit FIFO" "1 byte,4 byte,8 byte,?..." bitfld.long 0x00 0. " BUART_TDMAE ,Transmit DMA enable" "Disabled,Enabled" line.long 0x04 "RUART_RDMACR,DMA Control Register in Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BUART_CURRENT_SRC_BLOCK_SIZE ,Current remaining after decremented each time the block transfer ends" hexmask.long.word 0x04 3.--15. 1. " BUART_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BUART_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 byte,4 byte,8 byte,?..." bitfld.long 0x04 0. " BUART_RDMAE ,Receive DMA enable" "Disabled,Enabled" tree.end width 0x0B tree.end tree "SPI" base ad:0x50005000 width 20. tree "SPI1 Master" if (((per.l(ad:0x50005000)+0x08+0x0)&0x01)==0x00) group.long 0x0++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" line.long 0x04 "RSPI_CTRLR1,Control Register 1" hexmask.long.word 0x04 0.--15. 1. " BSPI_NDF ,Number of data frames" else rgroup.long 0x0++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" line.long 0x04 "RSPI_CTRLR1,Control Register 1" hexmask.long.word 0x04 0.--15. 1. " BSPI_NDF ,Number of data frames" endif group.long (0x0+0x08)++0x03 line.long 0x00 "RSPI_SSIENR,Enable Register" bitfld.long 0x00 0. " BSPI_SSIENR ,SPI controller enable" "Disabled,Enabled" if (((per.l(ad:0x50005000)+0x08+0x0)&0x01)==0x00) group.long (0x0+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 2. " BSPI_MWHS ,Microwire handshaking (Spi master only)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" else rgroup.long (0x0+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 2. " BSPI_MWHS ,Microwire handshaking (Spi master only)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" endif if (((per.l(ad:0x50005000+0x08+0x0))&0x01)==0x00) if (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x000) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x800) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x900) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xA00) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xB00) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xC00) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xD00) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xE00) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xF00) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x100) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x200) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x300) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x400) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x500) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x600) group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" else group.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline endif group.long (0x0+0x14)++0x03 line.long 0x00 "RSPI_BAUDR,Baud Rate Select" hexmask.long.word 0x00 0.--15. 1. " BSPI_SCKDV ,SPI clock divider" else if (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x000) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x800) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x900) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xA00) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xB00) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xC00) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xD00) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xE00) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0xF00) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x100) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x200) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x300) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x400) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x500) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x0))&0xF00)==0x600) rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" else rgroup.long (0x0+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline endif rgroup.long (0x0+0x14)++0x03 line.long 0x00 "RSPI_BAUDR,Baud Rate Select" hexmask.long.word 0x00 0.--15. 1. " BSPI_SCKDV ,SPI clock divider" endif if (((per.l(ad:0x50005000)+0x08+0x0)&0x01)==0x00) group.long (0x0+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" else rgroup.long (0x0+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" endif rgroup.long (0x0+0x20)++0x07 line.long 0x00 "RSPI_TXFLR,Transmit FIFO Level Register" bitfld.long 0x00 0.--3. " BSPI_TXTFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSPI_RXFLR,Receive FIFO Level Register" bitfld.long 0x04 0.--3. " BSPI_RXTFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x0+0x28)++0x03 line.long 0x00 "RSPI_SR,Status Register" bitfld.long 0x00 4. " BSPI_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BSPI_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BSPI_TFE ,Transmit FIFO empty" "Empty,Not empty" bitfld.long 0x00 1. " BSPI_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BSPI_BUSY ,SPI busy flag" "Idle/Disabled,Active" group.long (0x0+0x2C)++0x03 line.long 0x00 "RSPI_IMR,Interrupt Mask Register" bitfld.long 0x00 4. " BSPI_RXFIM ,Receive FIFO full interrupt mask" "Masked,Not masked" bitfld.long 0x00 3. " BSPI_RXOIM ,Receive FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 2. " BSPI_RXUIM ,Receive FIFO underflow interrupt mask" "Masked,Not masked" bitfld.long 0x00 1. " BSPI_TXOIM ,Transmit FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 0. " BSPI_TXEIM ,Transmit FIFO empty interrupt mask" "Masked,Not masked" rgroup.long (0x0+0x30)++0x13 line.long 0x00 "RSPI_ISR,Interrupt Status Register" bitfld.long 0x00 4. " BSPI_RXFIS ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " BSPI_RXOIS ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " BSPI_RXUIS ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " BSPI_TXOIS ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " BSPI_TXEIS ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x04 "RSPI_RISR,Raw Interrupt Status Register" bitfld.long 0x04 4. " BSPI_RXFIR ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 3. " BSPI_RXOIR ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " BSPI_RXUIR ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " BSPI_TXOIR ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " BSPI_TXEIR ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x08 "RSPI_TXOICR,Transmit FIFO Overflow Interrupt Clear Register" bitfld.long 0x08 0. " BSPI_TXOICR ,Clear transmit FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x0C "RSPI_RXOICR,Receive FIFO Overflow Interrupt Clear Register" bitfld.long 0x0C 0. " BSPI_RXOICR ,Clear receive FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x10 "RSPI_RXUICR,Receive FIFO Underflow Interrupt Clear Register" bitfld.long 0x10 0. " BSPI_RXUICR ,Clear receive FIFO underflow interrupt" "No interrupt,Interrupt" rgroup.long (0x0+0x48)++0x03 line.long 0x00 "RSPI_ICR,Interrupt Clear Register" bitfld.long 0x00 0. " BSPI_ICR ,Clear interrupts" "No interrupt,Interrupt" group.long (0x0+0x4C)++0x0B line.long 0x00 "RSPI_DMACR,DMA Control Register" bitfld.long 0x00 1. " BSPI_TDMAE ,Transmit DMA enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSPI_RDMAE ,Receive DMA enable" "Disabled,Enabled" line.long 0x04 "RSPI_DMATDLR,DMA Transmit Data Level" bitfld.long 0x04 0.--3. " BSPI_DMATDLR ,Transmit data level" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x08 "RSPI_DMARDLR,DMA Receive Data Level" bitfld.long 0x08 0.--3. " BSPI_DMARDLR ,Receive data level" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" if (((per.l(ad:0x50005000)+0x08+0x0)&0x01)==0x01) wgroup.long (0x0+0x60)++0x03 line.long 0x00 "RSPI_DR,Data Register" hexmask.long.word 0x00 0.--15. 1. " BSPI_DR ,Transmit FIFO buffer" else hgroup.long (0x0+0x60)++0x03 hide.long 0x00 "RSPI_DR,Data Register" in newline endif group.long 0xF0++0x03 line.long 0x00 "RSPI_RX_SAMPLE_DLY,RXD Sample Delay Register" hexmask.long.byte 0x00 0.--7. 1. " BSPI_RX_SAMPLE_DELAY ,Receive data (SPI_MISO) sample delay" group.long (0x0+0x100)++0x07 line.long 0x00 "RSPI_TDMACR,DMA Control Register In Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BSPI_CURRENT_DEST_BLOCK_SIZE ,Current remaining of DEST_BLOCK_SIZE" hexmask.long.word 0x00 3.--15. 1. " BSPI_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BSPI_DEST_BURST_SIZE ,Destination burst transaction size in transmit FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x00 0. " BSPI_TDMAE1 ,Transmit DMA enables/disables" "Disabled,Enabled" line.long 0x04 "RSPI_RDMACR,DMA Control Register In Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BSPI_CURRENT_SRC_BLOCK_SIZE ,Current remaining of SRC_BLOCK_SIZE" hexmask.long.word 0x04 3.--15. 1. " BSPI_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BSPI_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x04 0. " BSPI_RDMAE1 ,Receive DMA enables/disables" "Disabled,Enabled" tree.end tree "SPI2 Master" if (((per.l(ad:0x50005000)+0x08+0x1000)&0x01)==0x00) group.long 0x1000++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" line.long 0x04 "RSPI_CTRLR1,Control Register 1" hexmask.long.word 0x04 0.--15. 1. " BSPI_NDF ,Number of data frames" else rgroup.long 0x1000++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" line.long 0x04 "RSPI_CTRLR1,Control Register 1" hexmask.long.word 0x04 0.--15. 1. " BSPI_NDF ,Number of data frames" endif group.long (0x1000+0x08)++0x03 line.long 0x00 "RSPI_SSIENR,Enable Register" bitfld.long 0x00 0. " BSPI_SSIENR ,SPI controller enable" "Disabled,Enabled" if (((per.l(ad:0x50005000)+0x08+0x1000)&0x01)==0x00) group.long (0x1000+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 2. " BSPI_MWHS ,Microwire handshaking (Spi master only)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" else rgroup.long (0x1000+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 2. " BSPI_MWHS ,Microwire handshaking (Spi master only)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" endif if (((per.l(ad:0x50005000+0x08+0x1000))&0x01)==0x00) if (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x000) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x800) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x900) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xA00) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xB00) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xC00) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xD00) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xE00) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xF00) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x100) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x200) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x300) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x400) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x500) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x600) group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" else group.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline endif group.long (0x1000+0x14)++0x03 line.long 0x00 "RSPI_BAUDR,Baud Rate Select" hexmask.long.word 0x00 0.--15. 1. " BSPI_SCKDV ,SPI clock divider" else if (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x000) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x800) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x900) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xA00) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xB00) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xC00) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xD00) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xE00) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0xF00) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x100) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x200) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x300) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x400) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x500) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x1000))&0xF00)==0x600) rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" else rgroup.long (0x1000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline endif rgroup.long (0x1000+0x14)++0x03 line.long 0x00 "RSPI_BAUDR,Baud Rate Select" hexmask.long.word 0x00 0.--15. 1. " BSPI_SCKDV ,SPI clock divider" endif if (((per.l(ad:0x50005000)+0x08+0x1000)&0x01)==0x00) group.long (0x1000+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" else rgroup.long (0x1000+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" endif rgroup.long (0x1000+0x20)++0x07 line.long 0x00 "RSPI_TXFLR,Transmit FIFO Level Register" bitfld.long 0x00 0.--3. " BSPI_TXTFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSPI_RXFLR,Receive FIFO Level Register" bitfld.long 0x04 0.--3. " BSPI_RXTFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x1000+0x28)++0x03 line.long 0x00 "RSPI_SR,Status Register" bitfld.long 0x00 4. " BSPI_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BSPI_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BSPI_TFE ,Transmit FIFO empty" "Empty,Not empty" bitfld.long 0x00 1. " BSPI_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BSPI_BUSY ,SPI busy flag" "Idle/Disabled,Active" group.long (0x1000+0x2C)++0x03 line.long 0x00 "RSPI_IMR,Interrupt Mask Register" bitfld.long 0x00 4. " BSPI_RXFIM ,Receive FIFO full interrupt mask" "Masked,Not masked" bitfld.long 0x00 3. " BSPI_RXOIM ,Receive FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 2. " BSPI_RXUIM ,Receive FIFO underflow interrupt mask" "Masked,Not masked" bitfld.long 0x00 1. " BSPI_TXOIM ,Transmit FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 0. " BSPI_TXEIM ,Transmit FIFO empty interrupt mask" "Masked,Not masked" rgroup.long (0x1000+0x30)++0x13 line.long 0x00 "RSPI_ISR,Interrupt Status Register" bitfld.long 0x00 4. " BSPI_RXFIS ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " BSPI_RXOIS ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " BSPI_RXUIS ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " BSPI_TXOIS ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " BSPI_TXEIS ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x04 "RSPI_RISR,Raw Interrupt Status Register" bitfld.long 0x04 4. " BSPI_RXFIR ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 3. " BSPI_RXOIR ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " BSPI_RXUIR ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " BSPI_TXOIR ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " BSPI_TXEIR ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x08 "RSPI_TXOICR,Transmit FIFO Overflow Interrupt Clear Register" bitfld.long 0x08 0. " BSPI_TXOICR ,Clear transmit FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x0C "RSPI_RXOICR,Receive FIFO Overflow Interrupt Clear Register" bitfld.long 0x0C 0. " BSPI_RXOICR ,Clear receive FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x10 "RSPI_RXUICR,Receive FIFO Underflow Interrupt Clear Register" bitfld.long 0x10 0. " BSPI_RXUICR ,Clear receive FIFO underflow interrupt" "No interrupt,Interrupt" rgroup.long (0x1000+0x48)++0x03 line.long 0x00 "RSPI_ICR,Interrupt Clear Register" bitfld.long 0x00 0. " BSPI_ICR ,Clear interrupts" "No interrupt,Interrupt" group.long (0x1000+0x4C)++0x0B line.long 0x00 "RSPI_DMACR,DMA Control Register" bitfld.long 0x00 1. " BSPI_TDMAE ,Transmit DMA enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSPI_RDMAE ,Receive DMA enable" "Disabled,Enabled" line.long 0x04 "RSPI_DMATDLR,DMA Transmit Data Level" bitfld.long 0x04 0.--3. " BSPI_DMATDLR ,Transmit data level" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x08 "RSPI_DMARDLR,DMA Receive Data Level" bitfld.long 0x08 0.--3. " BSPI_DMARDLR ,Receive data level" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" if (((per.l(ad:0x50005000)+0x08+0x1000)&0x01)==0x01) wgroup.long (0x1000+0x60)++0x03 line.long 0x00 "RSPI_DR,Data Register" hexmask.long.word 0x00 0.--15. 1. " BSPI_DR ,Transmit FIFO buffer" else hgroup.long (0x1000+0x60)++0x03 hide.long 0x00 "RSPI_DR,Data Register" in newline endif group.long 0xF0++0x03 line.long 0x00 "RSPI_RX_SAMPLE_DLY,RXD Sample Delay Register" hexmask.long.byte 0x00 0.--7. 1. " BSPI_RX_SAMPLE_DELAY ,Receive data (SPI_MISO) sample delay" group.long (0x1000+0x100)++0x07 line.long 0x00 "RSPI_TDMACR,DMA Control Register In Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BSPI_CURRENT_DEST_BLOCK_SIZE ,Current remaining of DEST_BLOCK_SIZE" hexmask.long.word 0x00 3.--15. 1. " BSPI_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BSPI_DEST_BURST_SIZE ,Destination burst transaction size in transmit FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x00 0. " BSPI_TDMAE1 ,Transmit DMA enables/disables" "Disabled,Enabled" line.long 0x04 "RSPI_RDMACR,DMA Control Register In Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BSPI_CURRENT_SRC_BLOCK_SIZE ,Current remaining of SRC_BLOCK_SIZE" hexmask.long.word 0x04 3.--15. 1. " BSPI_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BSPI_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x04 0. " BSPI_RDMAE1 ,Receive DMA enables/disables" "Disabled,Enabled" tree.end tree "SPI3 Master" if (((per.l(ad:0x50005000)+0x08+0x2000)&0x01)==0x00) group.long 0x2000++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" line.long 0x04 "RSPI_CTRLR1,Control Register 1" hexmask.long.word 0x04 0.--15. 1. " BSPI_NDF ,Number of data frames" else rgroup.long 0x2000++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" line.long 0x04 "RSPI_CTRLR1,Control Register 1" hexmask.long.word 0x04 0.--15. 1. " BSPI_NDF ,Number of data frames" endif group.long (0x2000+0x08)++0x03 line.long 0x00 "RSPI_SSIENR,Enable Register" bitfld.long 0x00 0. " BSPI_SSIENR ,SPI controller enable" "Disabled,Enabled" if (((per.l(ad:0x50005000)+0x08+0x2000)&0x01)==0x00) group.long (0x2000+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 2. " BSPI_MWHS ,Microwire handshaking (Spi master only)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" else rgroup.long (0x2000+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 2. " BSPI_MWHS ,Microwire handshaking (Spi master only)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" endif if (((per.l(ad:0x50005000+0x08+0x2000))&0x01)==0x00) if (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x000) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x800) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x900) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xA00) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xB00) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xC00) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xD00) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xE00) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xF00) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x100) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x200) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x300) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x400) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x500) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x600) group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" else group.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline endif group.long (0x2000+0x14)++0x03 line.long 0x00 "RSPI_BAUDR,Baud Rate Select" hexmask.long.word 0x00 0.--15. 1. " BSPI_SCKDV ,SPI clock divider" else if (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x000) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x800) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x900) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xA00) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xB00) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xC00) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xD00) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xE00) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0xF00) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x100) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x200) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x300) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x400) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x500) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x2000))&0xF00)==0x600) rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" else rgroup.long (0x2000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline endif rgroup.long (0x2000+0x14)++0x03 line.long 0x00 "RSPI_BAUDR,Baud Rate Select" hexmask.long.word 0x00 0.--15. 1. " BSPI_SCKDV ,SPI clock divider" endif if (((per.l(ad:0x50005000)+0x08+0x2000)&0x01)==0x00) group.long (0x2000+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" else rgroup.long (0x2000+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" endif rgroup.long (0x2000+0x20)++0x07 line.long 0x00 "RSPI_TXFLR,Transmit FIFO Level Register" bitfld.long 0x00 0.--3. " BSPI_TXTFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSPI_RXFLR,Receive FIFO Level Register" bitfld.long 0x04 0.--3. " BSPI_RXTFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x2000+0x28)++0x03 line.long 0x00 "RSPI_SR,Status Register" bitfld.long 0x00 4. " BSPI_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BSPI_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BSPI_TFE ,Transmit FIFO empty" "Empty,Not empty" bitfld.long 0x00 1. " BSPI_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BSPI_BUSY ,SPI busy flag" "Idle/Disabled,Active" group.long (0x2000+0x2C)++0x03 line.long 0x00 "RSPI_IMR,Interrupt Mask Register" bitfld.long 0x00 4. " BSPI_RXFIM ,Receive FIFO full interrupt mask" "Masked,Not masked" bitfld.long 0x00 3. " BSPI_RXOIM ,Receive FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 2. " BSPI_RXUIM ,Receive FIFO underflow interrupt mask" "Masked,Not masked" bitfld.long 0x00 1. " BSPI_TXOIM ,Transmit FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 0. " BSPI_TXEIM ,Transmit FIFO empty interrupt mask" "Masked,Not masked" rgroup.long (0x2000+0x30)++0x13 line.long 0x00 "RSPI_ISR,Interrupt Status Register" bitfld.long 0x00 4. " BSPI_RXFIS ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " BSPI_RXOIS ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " BSPI_RXUIS ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " BSPI_TXOIS ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " BSPI_TXEIS ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x04 "RSPI_RISR,Raw Interrupt Status Register" bitfld.long 0x04 4. " BSPI_RXFIR ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 3. " BSPI_RXOIR ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " BSPI_RXUIR ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " BSPI_TXOIR ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " BSPI_TXEIR ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x08 "RSPI_TXOICR,Transmit FIFO Overflow Interrupt Clear Register" bitfld.long 0x08 0. " BSPI_TXOICR ,Clear transmit FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x0C "RSPI_RXOICR,Receive FIFO Overflow Interrupt Clear Register" bitfld.long 0x0C 0. " BSPI_RXOICR ,Clear receive FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x10 "RSPI_RXUICR,Receive FIFO Underflow Interrupt Clear Register" bitfld.long 0x10 0. " BSPI_RXUICR ,Clear receive FIFO underflow interrupt" "No interrupt,Interrupt" rgroup.long (0x2000+0x48)++0x03 line.long 0x00 "RSPI_ICR,Interrupt Clear Register" bitfld.long 0x00 0. " BSPI_ICR ,Clear interrupts" "No interrupt,Interrupt" group.long (0x2000+0x4C)++0x0B line.long 0x00 "RSPI_DMACR,DMA Control Register" bitfld.long 0x00 1. " BSPI_TDMAE ,Transmit DMA enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSPI_RDMAE ,Receive DMA enable" "Disabled,Enabled" line.long 0x04 "RSPI_DMATDLR,DMA Transmit Data Level" bitfld.long 0x04 0.--3. " BSPI_DMATDLR ,Transmit data level" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x08 "RSPI_DMARDLR,DMA Receive Data Level" bitfld.long 0x08 0.--3. " BSPI_DMARDLR ,Receive data level" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" if (((per.l(ad:0x50005000)+0x08+0x2000)&0x01)==0x01) wgroup.long (0x2000+0x60)++0x03 line.long 0x00 "RSPI_DR,Data Register" hexmask.long.word 0x00 0.--15. 1. " BSPI_DR ,Transmit FIFO buffer" else hgroup.long (0x2000+0x60)++0x03 hide.long 0x00 "RSPI_DR,Data Register" in newline endif group.long 0xF0++0x03 line.long 0x00 "RSPI_RX_SAMPLE_DLY,RXD Sample Delay Register" hexmask.long.byte 0x00 0.--7. 1. " BSPI_RX_SAMPLE_DELAY ,Receive data (SPI_MISO) sample delay" group.long (0x2000+0x100)++0x07 line.long 0x00 "RSPI_TDMACR,DMA Control Register In Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BSPI_CURRENT_DEST_BLOCK_SIZE ,Current remaining of DEST_BLOCK_SIZE" hexmask.long.word 0x00 3.--15. 1. " BSPI_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BSPI_DEST_BURST_SIZE ,Destination burst transaction size in transmit FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x00 0. " BSPI_TDMAE1 ,Transmit DMA enables/disables" "Disabled,Enabled" line.long 0x04 "RSPI_RDMACR,DMA Control Register In Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BSPI_CURRENT_SRC_BLOCK_SIZE ,Current remaining of SRC_BLOCK_SIZE" hexmask.long.word 0x04 3.--15. 1. " BSPI_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BSPI_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x04 0. " BSPI_RDMAE1 ,Receive DMA enables/disables" "Disabled,Enabled" tree.end tree "SPI4 Master" if (((per.l(ad:0x50005000)+0x08+0x3000)&0x01)==0x00) group.long 0x3000++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" line.long 0x04 "RSPI_CTRLR1,Control Register 1" hexmask.long.word 0x04 0.--15. 1. " BSPI_NDF ,Number of data frames" else rgroup.long 0x3000++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" line.long 0x04 "RSPI_CTRLR1,Control Register 1" hexmask.long.word 0x04 0.--15. 1. " BSPI_NDF ,Number of data frames" endif group.long (0x3000+0x08)++0x03 line.long 0x00 "RSPI_SSIENR,Enable Register" bitfld.long 0x00 0. " BSPI_SSIENR ,SPI controller enable" "Disabled,Enabled" if (((per.l(ad:0x50005000)+0x08+0x3000)&0x01)==0x00) group.long (0x3000+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 2. " BSPI_MWHS ,Microwire handshaking (Spi master only)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" else rgroup.long (0x3000+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 2. " BSPI_MWHS ,Microwire handshaking (Spi master only)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" endif if (((per.l(ad:0x50005000+0x08+0x3000))&0x01)==0x00) if (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x000) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x800) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x900) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xA00) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xB00) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xC00) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xD00) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xE00) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xF00) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x100) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x200) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x300) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x400) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x500) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x600) group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" else group.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline endif group.long (0x3000+0x14)++0x03 line.long 0x00 "RSPI_BAUDR,Baud Rate Select" hexmask.long.word 0x00 0.--15. 1. " BSPI_SCKDV ,SPI clock divider" else if (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x000) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x800) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x900) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xA00) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xB00) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xC00) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xD00) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xE00) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0xF00) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 7. " BSPI_SOFTWARESS[3] ,Software mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline newline elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x100) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x200) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x300) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" bitfld.long 0x00 2. " BSPI_HARDWARESS[2] ,Hardware mode: slave 2 select enable flag" "Not selected,Selected" newline elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x400) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x500) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 1. " BSPI_HARDWARESS[1] ,Hardware mode: slave 1 select enable flag" "Not selected,Selected" elif (((per.l(ad:0x50005000+0x10+0x3000))&0xF00)==0x600) rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline textfld " " bitfld.long 0x00 0. " BSPI_HARDWARESS[0] ,Hardware mode: slave 0 select enable flag" "Not selected,Selected" else rgroup.long (0x3000+0x10)++0x03 line.long 0x00 "RSPI_SER,Slave Enable Register" bitfld.long 0x00 11. " BSPI_CTRLSS[3] ,Slave 3 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 10. " BSPI_CTRLSS[2] ,Slave 2 select mode enable" "Hardware mode,Software mode" newline bitfld.long 0x00 9. " BSPI_CTRLSS[1] ,Slave 1 select mode enable" "Hardware mode,Software mode" bitfld.long 0x00 8. " BSPI_CTRLSS[0] ,Slave 0 select mode enable" "Hardware mode,Software mode" newline textfld " " bitfld.long 0x00 6. " BSPI_SOFTWARESS[2] ,Software mode: slave 2 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 5. " BSPI_SOFTWARESS[1] ,Software mode: slave 0 select enable flag" "Not selected,Selected" bitfld.long 0x00 4. " BSPI_SOFTWARESS[0] ,Software mode: slave 0 select enable flag" "Not selected,Selected" newline bitfld.long 0x00 3. " BSPI_HARDWARESS[3] ,Hardware mode: slave 3 select enable flag" "Not selected,Selected" newline endif rgroup.long (0x3000+0x14)++0x03 line.long 0x00 "RSPI_BAUDR,Baud Rate Select" hexmask.long.word 0x00 0.--15. 1. " BSPI_SCKDV ,SPI clock divider" endif if (((per.l(ad:0x50005000)+0x08+0x3000)&0x01)==0x00) group.long (0x3000+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" else rgroup.long (0x3000+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" endif rgroup.long (0x3000+0x20)++0x07 line.long 0x00 "RSPI_TXFLR,Transmit FIFO Level Register" bitfld.long 0x00 0.--3. " BSPI_TXTFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSPI_RXFLR,Receive FIFO Level Register" bitfld.long 0x04 0.--3. " BSPI_RXTFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x3000+0x28)++0x03 line.long 0x00 "RSPI_SR,Status Register" bitfld.long 0x00 4. " BSPI_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BSPI_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BSPI_TFE ,Transmit FIFO empty" "Empty,Not empty" bitfld.long 0x00 1. " BSPI_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BSPI_BUSY ,SPI busy flag" "Idle/Disabled,Active" group.long (0x3000+0x2C)++0x03 line.long 0x00 "RSPI_IMR,Interrupt Mask Register" bitfld.long 0x00 4. " BSPI_RXFIM ,Receive FIFO full interrupt mask" "Masked,Not masked" bitfld.long 0x00 3. " BSPI_RXOIM ,Receive FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 2. " BSPI_RXUIM ,Receive FIFO underflow interrupt mask" "Masked,Not masked" bitfld.long 0x00 1. " BSPI_TXOIM ,Transmit FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 0. " BSPI_TXEIM ,Transmit FIFO empty interrupt mask" "Masked,Not masked" rgroup.long (0x3000+0x30)++0x13 line.long 0x00 "RSPI_ISR,Interrupt Status Register" bitfld.long 0x00 4. " BSPI_RXFIS ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " BSPI_RXOIS ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " BSPI_RXUIS ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " BSPI_TXOIS ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " BSPI_TXEIS ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x04 "RSPI_RISR,Raw Interrupt Status Register" bitfld.long 0x04 4. " BSPI_RXFIR ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 3. " BSPI_RXOIR ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " BSPI_RXUIR ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " BSPI_TXOIR ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " BSPI_TXEIR ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x08 "RSPI_TXOICR,Transmit FIFO Overflow Interrupt Clear Register" bitfld.long 0x08 0. " BSPI_TXOICR ,Clear transmit FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x0C "RSPI_RXOICR,Receive FIFO Overflow Interrupt Clear Register" bitfld.long 0x0C 0. " BSPI_RXOICR ,Clear receive FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x10 "RSPI_RXUICR,Receive FIFO Underflow Interrupt Clear Register" bitfld.long 0x10 0. " BSPI_RXUICR ,Clear receive FIFO underflow interrupt" "No interrupt,Interrupt" rgroup.long (0x3000+0x48)++0x03 line.long 0x00 "RSPI_ICR,Interrupt Clear Register" bitfld.long 0x00 0. " BSPI_ICR ,Clear interrupts" "No interrupt,Interrupt" group.long (0x3000+0x4C)++0x0B line.long 0x00 "RSPI_DMACR,DMA Control Register" bitfld.long 0x00 1. " BSPI_TDMAE ,Transmit DMA enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSPI_RDMAE ,Receive DMA enable" "Disabled,Enabled" line.long 0x04 "RSPI_DMATDLR,DMA Transmit Data Level" bitfld.long 0x04 0.--3. " BSPI_DMATDLR ,Transmit data level" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x08 "RSPI_DMARDLR,DMA Receive Data Level" bitfld.long 0x08 0.--3. " BSPI_DMARDLR ,Receive data level" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" if (((per.l(ad:0x50005000)+0x08+0x3000)&0x01)==0x01) wgroup.long (0x3000+0x60)++0x03 line.long 0x00 "RSPI_DR,Data Register" hexmask.long.word 0x00 0.--15. 1. " BSPI_DR ,Transmit FIFO buffer" else hgroup.long (0x3000+0x60)++0x03 hide.long 0x00 "RSPI_DR,Data Register" in newline endif group.long 0xF0++0x03 line.long 0x00 "RSPI_RX_SAMPLE_DLY,RXD Sample Delay Register" hexmask.long.byte 0x00 0.--7. 1. " BSPI_RX_SAMPLE_DELAY ,Receive data (SPI_MISO) sample delay" group.long (0x3000+0x100)++0x07 line.long 0x00 "RSPI_TDMACR,DMA Control Register In Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BSPI_CURRENT_DEST_BLOCK_SIZE ,Current remaining of DEST_BLOCK_SIZE" hexmask.long.word 0x00 3.--15. 1. " BSPI_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BSPI_DEST_BURST_SIZE ,Destination burst transaction size in transmit FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x00 0. " BSPI_TDMAE1 ,Transmit DMA enables/disables" "Disabled,Enabled" line.long 0x04 "RSPI_RDMACR,DMA Control Register In Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BSPI_CURRENT_SRC_BLOCK_SIZE ,Current remaining of SRC_BLOCK_SIZE" hexmask.long.word 0x04 3.--15. 1. " BSPI_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BSPI_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x04 0. " BSPI_RDMAE1 ,Receive DMA enables/disables" "Disabled,Enabled" tree.end tree "SPI5 Slave" if (((per.l(ad:0x50005000)+0x08+0x4000)&0x01)==0x00) group.long 0x4000++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 10. " BSPI_SLV_OE ,Slave output enable (Spi slave only)" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" else rgroup.long 0x4000++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 10. " BSPI_SLV_OE ,Slave output enable (Spi slave only)" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" endif group.long (0x4000+0x08)++0x03 line.long 0x00 "RSPI_SSIENR,Enable Register" bitfld.long 0x00 0. " BSPI_SSIENR ,SPI controller enable" "Disabled,Enabled" if (((per.l(ad:0x50005000)+0x08+0x4000)&0x01)==0x00) group.long (0x4000+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" else rgroup.long (0x4000+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" endif hgroup.long (0x4000+0x10)++0x03 hide.long 0x00 "RSPI_SER,Slave Enable Register" hgroup.long (0x4000+0x14)++0x03 hide.long 0x00 "RSPI_BAUDR,Baud Rate Select" if (((per.l(ad:0x50005000)+0x08+0x4000)&0x01)==0x00) group.long (0x4000+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" else rgroup.long (0x4000+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" endif rgroup.long (0x4000+0x20)++0x07 line.long 0x00 "RSPI_TXFLR,Transmit FIFO Level Register" bitfld.long 0x00 0.--3. " BSPI_TXTFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSPI_RXFLR,Receive FIFO Level Register" bitfld.long 0x04 0.--3. " BSPI_RXTFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x4000+0x28)++0x03 line.long 0x00 "RSPI_SR,Status Register" bitfld.long 0x00 5. " BSPI_TXE ,Transmission error" "No error,Error" textline " " bitfld.long 0x00 4. " BSPI_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BSPI_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BSPI_TFE ,Transmit FIFO empty" "Empty,Not empty" bitfld.long 0x00 1. " BSPI_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BSPI_BUSY ,SPI busy flag" "Idle/Disabled,Active" group.long (0x4000+0x2C)++0x03 line.long 0x00 "RSPI_IMR,Interrupt Mask Register" bitfld.long 0x00 4. " BSPI_RXFIM ,Receive FIFO full interrupt mask" "Masked,Not masked" bitfld.long 0x00 3. " BSPI_RXOIM ,Receive FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 2. " BSPI_RXUIM ,Receive FIFO underflow interrupt mask" "Masked,Not masked" bitfld.long 0x00 1. " BSPI_TXOIM ,Transmit FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 0. " BSPI_TXEIM ,Transmit FIFO empty interrupt mask" "Masked,Not masked" rgroup.long (0x4000+0x30)++0x13 line.long 0x00 "RSPI_ISR,Interrupt Status Register" bitfld.long 0x00 4. " BSPI_RXFIS ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " BSPI_RXOIS ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " BSPI_RXUIS ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " BSPI_TXOIS ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " BSPI_TXEIS ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x04 "RSPI_RISR,Raw Interrupt Status Register" bitfld.long 0x04 4. " BSPI_RXFIR ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 3. " BSPI_RXOIR ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " BSPI_RXUIR ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " BSPI_TXOIR ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " BSPI_TXEIR ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x08 "RSPI_TXOICR,Transmit FIFO Overflow Interrupt Clear Register" bitfld.long 0x08 0. " BSPI_TXOICR ,Clear transmit FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x0C "RSPI_RXOICR,Receive FIFO Overflow Interrupt Clear Register" bitfld.long 0x0C 0. " BSPI_RXOICR ,Clear receive FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x10 "RSPI_RXUICR,Receive FIFO Underflow Interrupt Clear Register" bitfld.long 0x10 0. " BSPI_RXUICR ,Clear receive FIFO underflow interrupt" "No interrupt,Interrupt" rgroup.long (0x4000+0x48)++0x03 line.long 0x00 "RSPI_ICR,Interrupt Clear Register" bitfld.long 0x00 0. " BSPI_ICR ,Clear interrupts" "No interrupt,Interrupt" group.long (0x4000+0x4C)++0x0B line.long 0x00 "RSPI_DMACR,DMA Control Register" bitfld.long 0x00 1. " BSPI_TDMAE ,Transmit DMA enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSPI_RDMAE ,Receive DMA enable" "Disabled,Enabled" line.long 0x04 "RSPI_DMATDLR,DMA Transmit Data Level" bitfld.long 0x04 0.--3. " BSPI_DMATDLR ,Transmit data level" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x08 "RSPI_DMARDLR,DMA Receive Data Level" bitfld.long 0x08 0.--3. " BSPI_DMARDLR ,Receive data level" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" if (((per.l(ad:0x50005000)+0x08+0x4000)&0x01)==0x01) wgroup.long (0x4000+0x60)++0x03 line.long 0x00 "RSPI_DR,Data Register" hexmask.long.word 0x00 0.--15. 1. " BSPI_DR ,Transmit FIFO buffer" else hgroup.long (0x4000+0x60)++0x03 hide.long 0x00 "RSPI_DR,Data Register" in newline endif group.long (0x4000+0x100)++0x07 line.long 0x00 "RSPI_TDMACR,DMA Control Register In Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BSPI_CURRENT_DEST_BLOCK_SIZE ,Current remaining of DEST_BLOCK_SIZE" hexmask.long.word 0x00 3.--15. 1. " BSPI_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BSPI_DEST_BURST_SIZE ,Destination burst transaction size in transmit FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x00 0. " BSPI_TDMAE1 ,Transmit DMA enables/disables" "Disabled,Enabled" line.long 0x04 "RSPI_RDMACR,DMA Control Register In Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BSPI_CURRENT_SRC_BLOCK_SIZE ,Current remaining of SRC_BLOCK_SIZE" hexmask.long.word 0x04 3.--15. 1. " BSPI_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BSPI_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x04 0. " BSPI_RDMAE1 ,Receive DMA enables/disables" "Disabled,Enabled" tree.end tree "SPI6 Slave" if (((per.l(ad:0x50005000)+0x08+0x5000)&0x01)==0x00) group.long 0x5000++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 10. " BSPI_SLV_OE ,Slave output enable (Spi slave only)" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" else rgroup.long 0x5000++0x07 line.long 0x00 "RSPI_CTRLR0,Control Register 0" bitfld.long 0x00 12.--15. " BSPI_CFS ,Control frame size" "1-bit control word,2-bit control word,3-bit control word,4-bit control word,5-bit control word,6-bit control word,7-bit control word,8-bit control word,9-bit control word,10-bit control word,11-bit control word,12-bit control word,13-bit control word,14-bit control word,15-bit control word,16-bit control word" bitfld.long 0x00 11. " BSPI_SRL ,Shift register loop" "Normal mode,Test mode operation" textline " " bitfld.long 0x00 10. " BSPI_SLV_OE ,Slave output enable (Spi slave only)" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " BSPI_TMOD ,Transfer mode" "Transmit and receive,Transmit only,Receive only,EEPROM read" bitfld.long 0x00 7. " BSPI_SCPOL ,Serial clock polarity" "Low,High" textline " " bitfld.long 0x00 6. " BSPI_SCPH ,Serial clock phase" "In middle,At start" bitfld.long 0x00 4.--5. " BSPI_FRF ,Frame format" "Motorola Serial Peripheral Interface,Texas Instruments Synchronous Serial Protocol,National Semiconductor Microwire,?..." textline " " bitfld.long 0x00 0.--3. " BSPI_DFS ,Data frame size" ",,,4 bit,5 bit,6 bit,7 bit,8 bit,9 bit,10 bit,11 bit,12 bit,13 bit,14 bit,15 bit,16 bit" endif group.long (0x5000+0x08)++0x03 line.long 0x00 "RSPI_SSIENR,Enable Register" bitfld.long 0x00 0. " BSPI_SSIENR ,SPI controller enable" "Disabled,Enabled" if (((per.l(ad:0x50005000)+0x08+0x5000)&0x01)==0x00) group.long (0x5000+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" else rgroup.long (0x5000+0x0C)++0x03 line.long 0x00 "RSPI_MWCR,Microwire Control Register" bitfld.long 0x00 1. " BSPI_MDD ,Microwire control" "Received,Transmitted" bitfld.long 0x00 0. " BSPI_MWMOD ,Microwire transfer mode" "Non-sequential,Sequential" endif hgroup.long (0x5000+0x10)++0x03 hide.long 0x00 "RSPI_SER,Slave Enable Register" hgroup.long (0x5000+0x14)++0x03 hide.long 0x00 "RSPI_BAUDR,Baud Rate Select" if (((per.l(ad:0x50005000)+0x08+0x5000)&0x01)==0x00) group.long (0x5000+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" else rgroup.long (0x5000+0x18)++0x07 line.long 0x00 "RSPI_TXFTLR,Transmit FIFO Threshold Level" bitfld.long 0x00 0.--3. " BSPI_TFT ,Transmit FIFO threshold" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x04 "RSPI_RXFTLR,Receive FIFO Threshold Level" bitfld.long 0x04 0.--3. " BSPI_RFT ,Receive FIFO threshold" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" endif rgroup.long (0x5000+0x20)++0x07 line.long 0x00 "RSPI_TXFLR,Transmit FIFO Level Register" bitfld.long 0x00 0.--3. " BSPI_TXTFL ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSPI_RXFLR,Receive FIFO Level Register" bitfld.long 0x04 0.--3. " BSPI_RXTFL ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0x5000+0x28)++0x03 line.long 0x00 "RSPI_SR,Status Register" bitfld.long 0x00 5. " BSPI_TXE ,Transmission error" "No error,Error" textline " " bitfld.long 0x00 4. " BSPI_RFF ,Receive FIFO full" "Not full,Full" bitfld.long 0x00 3. " BSPI_RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " BSPI_TFE ,Transmit FIFO empty" "Empty,Not empty" bitfld.long 0x00 1. " BSPI_TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " BSPI_BUSY ,SPI busy flag" "Idle/Disabled,Active" group.long (0x5000+0x2C)++0x03 line.long 0x00 "RSPI_IMR,Interrupt Mask Register" bitfld.long 0x00 4. " BSPI_RXFIM ,Receive FIFO full interrupt mask" "Masked,Not masked" bitfld.long 0x00 3. " BSPI_RXOIM ,Receive FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 2. " BSPI_RXUIM ,Receive FIFO underflow interrupt mask" "Masked,Not masked" bitfld.long 0x00 1. " BSPI_TXOIM ,Transmit FIFO overflow interrupt mask" "Masked,Not masked" textline " " bitfld.long 0x00 0. " BSPI_TXEIM ,Transmit FIFO empty interrupt mask" "Masked,Not masked" rgroup.long (0x5000+0x30)++0x13 line.long 0x00 "RSPI_ISR,Interrupt Status Register" bitfld.long 0x00 4. " BSPI_RXFIS ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " BSPI_RXOIS ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " BSPI_RXUIS ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " BSPI_TXOIS ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " BSPI_TXEIS ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x04 "RSPI_RISR,Raw Interrupt Status Register" bitfld.long 0x04 4. " BSPI_RXFIR ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 3. " BSPI_RXOIR ,Receive FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " BSPI_RXUIR ,Receive FIFO underflow interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " BSPI_TXOIR ,Transmit FIFO overflow interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " BSPI_TXEIR ,Transmit FIFO empty interrupt status" "No interrupt,Interrupt" line.long 0x08 "RSPI_TXOICR,Transmit FIFO Overflow Interrupt Clear Register" bitfld.long 0x08 0. " BSPI_TXOICR ,Clear transmit FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x0C "RSPI_RXOICR,Receive FIFO Overflow Interrupt Clear Register" bitfld.long 0x0C 0. " BSPI_RXOICR ,Clear receive FIFO overflow interrupt" "No interrupt,Interrupt" line.long 0x10 "RSPI_RXUICR,Receive FIFO Underflow Interrupt Clear Register" bitfld.long 0x10 0. " BSPI_RXUICR ,Clear receive FIFO underflow interrupt" "No interrupt,Interrupt" rgroup.long (0x5000+0x48)++0x03 line.long 0x00 "RSPI_ICR,Interrupt Clear Register" bitfld.long 0x00 0. " BSPI_ICR ,Clear interrupts" "No interrupt,Interrupt" group.long (0x5000+0x4C)++0x0B line.long 0x00 "RSPI_DMACR,DMA Control Register" bitfld.long 0x00 1. " BSPI_TDMAE ,Transmit DMA enable" "Disabled,Enabled" bitfld.long 0x00 0. " BSPI_RDMAE ,Receive DMA enable" "Disabled,Enabled" line.long 0x04 "RSPI_DMATDLR,DMA Transmit Data Level" bitfld.long 0x04 0.--3. " BSPI_DMATDLR ,Transmit data level" "0 data,1 or less data,2 or less data,3 or less data,4 or less data,5 or less data,6 or less data,7 or less data,8 or less data,9 or less data,10 or less data,11 or less data,12 or less data,13 or less data,14 or less data,15 or less data" line.long 0x08 "RSPI_DMARDLR,DMA Receive Data Level" bitfld.long 0x08 0.--3. " BSPI_DMARDLR ,Receive data level" "0 data,1 or more data,2 or more data,3 or more data,4 or more data,5 or more data,6 or more data,7 or more data,8 or more data,9 or more data,10 or more data,11 or more data,12 or more data,13 or more data,14 or more data,15 or more data" if (((per.l(ad:0x50005000)+0x08+0x5000)&0x01)==0x01) wgroup.long (0x5000+0x60)++0x03 line.long 0x00 "RSPI_DR,Data Register" hexmask.long.word 0x00 0.--15. 1. " BSPI_DR ,Transmit FIFO buffer" else hgroup.long (0x5000+0x60)++0x03 hide.long 0x00 "RSPI_DR,Data Register" in newline endif group.long (0x5000+0x100)++0x07 line.long 0x00 "RSPI_TDMACR,DMA Control Register In Transmit Mode" hexmask.long.word 0x00 16.--28. 1. " BSPI_CURRENT_DEST_BLOCK_SIZE ,Current remaining of DEST_BLOCK_SIZE" hexmask.long.word 0x00 3.--15. 1. " BSPI_DEST_BLOCK_SIZE ,Destination block transfer size in transmit FIFO" textline " " bitfld.long 0x00 1.--2. " BSPI_DEST_BURST_SIZE ,Destination burst transaction size in transmit FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x00 0. " BSPI_TDMAE1 ,Transmit DMA enables/disables" "Disabled,Enabled" line.long 0x04 "RSPI_RDMACR,DMA Control Register In Receive Mode" hexmask.long.word 0x04 16.--28. 1. " BSPI_CURRENT_SRC_BLOCK_SIZE ,Current remaining of SRC_BLOCK_SIZE" hexmask.long.word 0x04 3.--15. 1. " BSPI_SRC_BLOCK_SIZE ,Source block transfer size in receive FIFO" textline " " bitfld.long 0x04 1.--2. " BSPI_SRC_BURST_SIZE ,Source burst transaction size in receive FIFO" "1 word,4 words,8 words,?..." bitfld.long 0x04 0. " BSPI_RDMAE1 ,Receive DMA enables/disables" "Disabled,Enabled" tree.end width 0x0B tree.end tree.open "I2C" tree "I2C1" base ad:0x40063000 width 23. if (((per.l(ad:0x40063000))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "IC_CON,I2C Control Register" bitfld.long 0x00 9. " RX_FIFO_FULL_HLD_CTRL , RX FIFO full hold control bit" "0,1" bitfld.long 0x00 8. " TX_EMPTY_CTRL ,This bit controls the generation of the TX_EMPTY interrupt" "0,1" textline " " bitfld.long 0x00 6. " IC_SLAVE_DISABLE ,This bit controls whether I2C has its slave disabled" "No,Yes" textline " " bitfld.long 0x00 5. " IC_RESTART_EN ,IC restart enable" "Disabled,Enabled" rbitfld.long 0x00 4. " IC_10BITADDR_MASTER_RD_ONLY ,Bit showing the bit addressing mode" "7-bit,10-bit" textline " " bitfld.long 0x00 1.--2. " SPEED ,These bits control at which speed the I2C controller operates" ",Standard mode (100 kb/s),Fast mode (<=400 kb/s),?..." textline " " bitfld.long 0x00 0. " MASTER_MODE ,This bit controls whether the I2C controller master is enabled" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "IC_CON,I2C Control Register" bitfld.long 0x00 9. " RX_FIFO_FULL_HLD_CTRL , RX FIFO full hold control bit" "0,1" bitfld.long 0x00 8. " TX_EMPTY_CTRL ,This bit controls the generation of the TX_EMPTY interrupt" "0,1" textline " " bitfld.long 0x00 7. " STOP_DET_IFADDRESSED ,STOP_DET if addressed select" "Only addressed,Both" bitfld.long 0x00 6. " IC_SLAVE_DISABLE ,This bit controls whether I2C has its slave disabled" "No,Yes" textline " " bitfld.long 0x00 5. " IC_RESTART_EN ,IC restart enable" "Disabled,Enabled" rbitfld.long 0x00 4. " IC_10BITADDR_MASTER_RD_ONLY ,Bit showing the bit addressing mode" "7-bit,10-bit" textline " " bitfld.long 0x00 3. " IC_10BITADDR_SLAVE , Controls whether the I2C controller responds to 7- or 10-bit addresses" "7-bit,10-bit" bitfld.long 0x00 1.--2. " SPEED ,These bits control at which speed the I2C controller operates" ",Standard mode (100 kb/s),Fast mode (<=400 kb/s),?..." textline " " bitfld.long 0x00 0. " MASTER_MODE ,This bit controls whether the I2C controller master is enabled" "Disabled,Enabled" endif if (((per.l(ad:0x40063000+0x04))&0x800)==0x800) group.long 0x04++0x03 line.long 0x00 "IC_TAR,I2C Target Address Register" bitfld.long 0x00 12. " IC_10BITADDR_MASTER ,Controls whether the I2C controller starts its transfers in 7- or 10-bit addressing mode" "7-bit,10-bit" bitfld.long 0x00 11. " SPECIAL ,Indicates whether software performs a General Call or START BYTE command" "Use IC_TAR normally,Special I2C command" textline " " bitfld.long 0x00 10. " GC_OR_START , Indicates whether a General Call or START byte command is to be performed by I2C" ",START BYTE" hexmask.long.word 0x00 0.--9. 1. " IC_TAR ,This is the target address for any master transaction" else group.long 0x04++0x03 line.long 0x00 "IC_TAR,I2C Target Address Register" bitfld.long 0x00 12. " IC_10BITADDR_MASTER , Controls whether the I2C controller starts its transfers in 7- or 10-bit addressing mode" "7-bit,10-bit" bitfld.long 0x00 11. " SPECIAL ,Indicates whether software performs a General Call or START BYTE command" "Use IC_TAR normally,Special I2C command" textline " " bitfld.long 0x00 10. " GC_OR_START ,Indicates whether a General Call or START byte command is to be performed by I2C" "General call address,?..." hexmask.long.word 0x00 0.--9. 1. " IC_TAR ,This is the target address for any master transaction" endif if (((per.l(ad:0x40063000+0x6C))&0x01)==0x01) rgroup.long 0x08++0x03 line.long 0x00 "IC_SAR,I2C Slave Address Register" hexmask.long.word 0x00 0.--9. 1. " IC_SAR ,The IC_SAR holds the slave address when the I2C is operating as a slave" else group.long 0x08++0x03 line.long 0x00 "IC_SAR,I2C Slave Address Register" hexmask.long.word 0x00 0.--9. 1. " IC_SAR ,The IC_SAR holds the slave address when the I2C is operating as a slave" endif if (((per.l(ad:0x40063000))&0x20)==0x20) group.long 0x10++0x03 line.long 0x00 "IC_DATA_CMD,I2C Rx/tx Data Buffer And Command Register" bitfld.long 0x00 10. " RESTART ,This bit controls whether a RESTART is issued before the byte is sent or received" "RESTART,RESTART according to the value of CMD" bitfld.long 0x00 9. " STOP ,This bit controls whether a STOP is issued after the byte is sent or received" "Not issued,Issued" textline " " bitfld.long 0x00 8. " CMD ,This bit controls whether a read or a write is performed" "Read,Write" hexmask.long.byte 0x00 0.--7. 1. " DAT ,This register contains the data to be transmitted or received on the I2C bus" else group.long 0x10++0x03 line.long 0x00 "IC_DATA_CMD,I2C Rx/tx Data Buffer And Command Register" bitfld.long 0x00 10. " RESTART ,This bit controls whether a RESTART is issued before the byte is sent or received" "STOP,STOP START" bitfld.long 0x00 9. " STOP ,This bit controls whether a STOP is issued after the byte is sent or received" "Not issued,Issued" textline " " bitfld.long 0x00 8. " CMD ,This bit controls whether a read or a write is performed" "Read,Write" hexmask.long.byte 0x00 0.--7. 1. " DAT ,This register contains the data to be transmitted or received on the I2C bus" endif if (((per.l(ad:0x40063000+0x6C))&0x01)==0x01) rgroup.long 0x14++0x0F line.long 0x00 "IC_SS_SCL_HCNT,Standard Mode I2C Clock SCL High Count Register" hexmask.long.word 0x00 0.--15. 1. " IC_SS_SCL_HCNT ,This register sets the SCL clock high-period count for standard mode" line.long 0x04 "IC_SS_SCL_LCNT,Standard Mode I2C Clock SCL Low Count Register" hexmask.long.word 0x04 0.--15. 1. " IC_SS_SCL_LCNT ,This register sets the SCL clock low period count for standard mode" line.long 0x08 "IC_FS_SCL_HCNT,Fast Mode I2C Clock SCL High Count Register" hexmask.long.word 0x08 0.--15. 1. " IC_FS_SCL_HCNT ,This register sets the SCL clock high-period count for fast mode" line.long 0x0C "IC_FS_SCL_LCNT,Fast Mode I2C Clock SCL Low Count Register" hexmask.long.word 0x0C 0.--15. 1. " IC_FS_SCL_LCNT ,This register sets the SCL clock low period count for fast mode" else group.long 0x14++0x0F line.long 0x00 "IC_SS_SCL_HCNT,Standard Mode I2C Clock SCL High Count Register" hexmask.long.word 0x00 0.--15. 1. " IC_SS_SCL_HCNT ,This register sets the SCL clock high-period count for standard mode" line.long 0x04 "IC_SS_SCL_LCNT,Standard Mode I2C Clock SCL Low Count Register" hexmask.long.word 0x04 0.--15. 1. " IC_SS_SCL_LCNT ,This register sets the SCL clock low period count for standard mode" line.long 0x08 "IC_FS_SCL_HCNT,Fast Mode I2C Clock SCL High Count Register" hexmask.long.word 0x08 0.--15. 1. " IC_FS_SCL_HCNT ,This register sets the SCL clock high-period count for fast mode" line.long 0x0C "IC_FS_SCL_LCNT,Fast Mode I2C Clock SCL Low Count Register" hexmask.long.word 0x0C 0.--15. 1. " IC_FS_SCL_LCNT ,This register sets the SCL clock low period count for fast mode" endif rgroup.long 0x2C++0x03 line.long 0x00 "IC_INTR_STAT,I2C Interrupt Status Register" bitfld.long 0x00 13. " R_MASTER_ON_HOLD ,Indicates whether master is holding the bus and TX FIFO is empty" "No empty,Empty" bitfld.long 0x00 12. " R_RESTART_DET ,Indicates a RESTART condition has occurred when I2C controller is operating in slave mode and addressed" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " R_GEN_CALL ,Set only when a general call address is received and it is acknowledged" "No interrupt,Interrupt" bitfld.long 0x00 10. " R_START_DET ,Indicates whether a START or RESTART condition has occurred on the I2C interface" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " R_STOP_DET ,Indicates a STOP condition has occurred on the I2C interface" "No interrupt,Interrupt" bitfld.long 0x00 8. " R_ACTIVITY ,Captures I2C controller activity" "0,1" textline " " bitfld.long 0x00 7. " R_RX_DONE ,Indicating that the transmission is done" "0,1" bitfld.long 0x00 6. " R_TX_ABRT ,Indicates unable to complete the intended actions on the contents of the transmit FIFO" "0,1" textline " " bitfld.long 0x00 5. " R_RD_REQ ,Controller is acting as a slave and another I2C master is attempting to read data fromi2c controller" "0,1" bitfld.long 0x00 4. " R_TX_EMPTY ,The transmit buffer is at or below the threshold value set" "0,1" textline " " bitfld.long 0x00 3. " R_TX_OVER ,Set when the receive buffer reaches or goes above the RX_TL threshold" "0,1" bitfld.long 0x00 2. " R_RX_FULL ,Receive buffer reaches or goes above the RX_TL threshold" "0,1" textline " " bitfld.long 0x00 1. " R_RX_OVER ,Receive buffer is completely filled to its depth of 8 and an additional byte is received from an external I2C device" "0,1" bitfld.long 0x00 0. " R_RX_UNDER ,Processor attempts to read the receive buffer when it is empty" "0,1" group.long 0x30++0x03 line.long 0x00 "IC_INTR_MASK,I2C Interrupt Mask Register" bitfld.long 0x00 13. " M_MASTER_ON_HOLD ,This bit masks the R_MASTER_ON_HOLD interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 12. " R_RESTART_DET ,This bit masks the R_RESTART_DET interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 11. " R_GEN_CALL ,This bit masks the R_GEN_CALL interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 10. " R_START_DET ,This bit masks the R_START_DET interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 9. " R_STOP_DET ,This bit masks the R_STOP_DET interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 8. " R_ACTIVITY ,This bit masks the R_ACTIVITY interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 7. " R_RX_DONE ,This bit masks the R_RX_DONE interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 6. " R_TX_ABRT ,This bit masks the R_TX_ABRT interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 5. " R_RD_REQ ,This bit masks the R_RD_REQ interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 4. " R_TX_EMPTY ,This bit masks the R_TX_EMPTY interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 3. " R_TX_OVER ,This bit masks the R_TX_OVER interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 2. " R_RX_FULL ,This bit masks the R_RX_FULL interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 1. " R_RX_OVER ,This bit masks the R_RX_OVER interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 0. " R_RX_UNDER ,This bit masks the R_RX_UNDER interrupt in IC_INTR_STAT register" "Not masked,Masked" rgroup.long 0x34++0x03 line.long 0x00 "IC_RAW_INTR_STAT,I2C Raw Interrupt Status Register" bitfld.long 0x00 13. " MASTER_ON_HOLD ,Indicates whether master is holding the bus and TX FIFO is empty" "No interrupt,Interrupt" bitfld.long 0x00 12. " RESTART_DET ,Indicates whether a RESTART condition has occurred on the I2C interface" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " GEN_CALL ,Set only when a general call address is received and it is acknowledged" "No interrupt,Interrupt" bitfld.long 0x00 10. " START_DET ,Indicates whether a START or RESTART condition has occurred on the I2C interface" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " STOP_DET ,Indicates whether a STOP condition has occurred on the I2C interface" "No interrupt,Interrupt" bitfld.long 0x00 8. " RAW_INTR_ACTIVITY ,This bit captures I2C controller activity and stays set until it is cleared" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " RX_DONE ,When the I2C controller is acting as a slave-transmitter" "No interrupt,Interrupt" bitfld.long 0x00 6. " TX_ABRT ,This bit indicates if I2C controller as an I2C transmitter is unable to complete the intended actions on the contents of the transmit FIFO" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " RD_REQ ,This bit is set to 1 when I2C controller is acting as a slave and another I2C master is attempting to read data from I2C controller." "No interrupt,Interrupt" bitfld.long 0x00 4. " TX_EMPTY ,The transmit buffer is at or below the threshold value set" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " TX_OVER ,Set during transmit if the transmit buffer is filled to its depth" "No interrupt,Interrupt" bitfld.long 0x00 2. " RX_FULL ,Set when the receive buffer reaches or goes above the RX_TL threshold" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " RX_OVER ,Set if the receive buffer is completely filled" "No interrupt,Interrupt" bitfld.long 0x00 0. " RX_UNDER ,Set if the processor attempts to read the receive buffer when it is empty by reading from the IC_DATA_CMD register" "No interrupt,Interrupt" group.long 0x38++0x07 line.long 0x00 "IC_RX_TL,I2C Receive FIFO Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " RX_TL ,Receive FIFO threshold level" line.long 0x04 "IC_TX_TL,I2C Transmit FIFO Threshold Register" hexmask.long.byte 0x04 0.--7. 1. " TX_TL ,Transmit FIFO threshold level" textline " " hgroup.long 0x40++0x03 hide.long 0x00 "IC_CLR_INTR,Clear Combined And Individual Interrupt Register" in hgroup.long 0x44++0x03 hide.long 0x00 "IC_CLR_RX_UNDER,Clear RX_UNDER Interrupt Register" in hgroup.long 0x48++0x03 hide.long 0x00 "IC_CLR_RX_OVER,Clear RX_OVER Interrupt Registerr" in hgroup.long 0x4C++0x03 hide.long 0x00 "IC_CLR_TX_OVER,Clear TX_OVER Interrupt Register" in hgroup.long 0x50++0x03 hide.long 0x00 "IC_CLR_RD_REQ,Clear RD_REQ Interrupt Register" in hgroup.long 0x54++0x03 hide.long 0x00 "IC_CLR_TX_ABRT,Clear TX_ABRT Interrupt Register" in hgroup.long 0x58++0x03 hide.long 0x00 "IC_CLR_RX_DONE,Clear RX_DONE Interrupt Register" in hgroup.long 0x5C++0x03 hide.long 0x00 "IC_CLR_ACTIVITY,Clear ACTIVITY Interrupt Register" in hgroup.long 0x60++0x03 hide.long 0x00 "IC_CLR_STOP_DET,Clear STOP_DET Interrupt Register" in hgroup.long 0x64++0x03 hide.long 0x00 "IC_CLR_START_DET,Clear START_DET Interrupt Register" in hgroup.long 0x68++0x03 hide.long 0x00 "IC_CLR_GEN_CALL,Clear GEN_CALL Interrupt Register" in textline " " group.long 0x6C++0x03 line.long 0x00 "IC_ENABLE,I2C Enable Register" bitfld.long 0x00 1. " ABORT ,The controller initiates the transfer abort" "Not initiated/done,In progress" bitfld.long 0x00 0. " ENABLE ,Controls whether the I2C controller is enabled" "Disabled,Enabled" rgroup.long 0x70++0x0B line.long 0x00 "IC_STATUS,I2C Status Register" bitfld.long 0x00 6. " SLV_ACTIVITY ,Slave FSM activity status" "Idle,Active" bitfld.long 0x00 5. " MST_ACTIVITY ,Master FSM activity status" "Idle,Active" textline " " bitfld.long 0x00 4. " RFF ,Receive FIFO completely full" "Not full,Full" bitfld.long 0x00 3. " RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " TFE ,Transmit FIFO completely empty" "Not empty,Empty" bitfld.long 0x00 1. " TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " IC_STATUS_ACTIVITY ,I2C activity status" "Disabled,Enabled" line.long 0x04 "IC_TXFLR,I2C Transmit FIFO Level Register" bitfld.long 0x04 0.--3. " TXFLR ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "IC_RXFLR,Receive FIFO Level Register" bitfld.long 0x08 0.--3. " RXFLR ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.l(ad:0x40063000+0x6C))&0x01)==0x00) group.long 0x7C++0x03 line.long 0x00 "IC_SDA_HOLD,I2C SDA Hold Time Length Register" hexmask.long.byte 0x00 16.--23. 1. " IC_SDA_RX_HOLD ,Sets the required SDA hold time in units of I2C_SCLK period when I2C controller acts as a receiver" hexmask.long.word 0x00 0.--15. 1. " IC_SDA_TX_HOLD ,Sets the required SDA hold time in units of I2C_SCLK period when I2C controller acts as a transmitter" else rgroup.long 0x7C++0x03 line.long 0x00 "IC_SDA_HOLD,I2C SDA Hold Time Length Register" hexmask.long.byte 0x00 16.--23. 1. " IC_SDA_RX_HOLD ,Sets the required SDA hold time in units of I2C_SCLK period when I2C controller acts as a receiver" hexmask.long.word 0x00 0.--15. 1. " IC_SDA_TX_HOLD ,Sets the required SDA hold time in units of I2C_SCLK period when I2C controller acts as a transmitter" endif if (((per.l(ad:0x40063000))&0x01)==0x01) rgroup.long 0x80++0x03 line.long 0x00 "IC_TX_ABRT_SOURCE,I2C Transmit Abort Source Register" hexmask.long.word 0x00 23.--31. 1. " TX_FLUSH_CNT ,This field indicates the number of tx FIFO data commands which are flushed due to TX_ABRT interrupt" bitfld.long 0x00 16. " ABRT_USER_ABRT ,Master has detected the transfer abort" "Start,Abort" textline " " bitfld.long 0x00 15. " ABRT_SLVRD_INTX ,When the processor side responds to a slave mode request for data to be transmitted to a remote master and user writes" "0,1" bitfld.long 0x00 14. " ABRT_SLV_ARBLOST ,Slave lost the bus while transmitting data to a remote master" "0,1" textline " " bitfld.long 0x00 13. " ABRT_SLVFLUSH_TXFIFO ,Slave has received a read command and some data exists in the TX FIFO so the slave issues a TX_ABRT interrupt to flush old data in TX FIFO" "0,1" bitfld.long 0x00 12. " ARB_LOST ,Master has lost arbitration" "0,1" textline " " bitfld.long 0x00 11. " ABRT_MASTER_DIS ,User tries to initiate a master operation with the master mode disabled" "No,Yes" bitfld.long 0x00 10. " ABRT_10B_RD_NORSTRT ,The restart is disabled and the master sends a read command in 10-bit addressing mode" "No,Yes" textline " " bitfld.long 0x00 9. " ABRT_SBYTE_NORSTRT ,The restart is disabled and the user is trying to send a START byte" "No,Yes" bitfld.long 0x00 7. " ABRT_SBYTE_ACKDET ,Master has sent a START byte and the START byte was acknowledged (Wrong behavior)" "0,1" textline " " bitfld.long 0x00 5. " ABRT_GCALL_READ ,I2C controller in master mode sent the general call to be a read from the bus" "0,1" bitfld.long 0x00 4. " ABRT_GCALL_NOACK ,I2C controller in master mode sent a general call and no slave on the bus acknowledged the general call" "0,1" textline " " bitfld.long 0x00 3. " ABRT_TXDATA_NOACK ,Master has received an acknowledgement for the address" "0,1" bitfld.long 0x00 2. " ABRT_10ADDR2_NOACK ,Master is in 10-bit address mode and the second address byte of the 10-bit address was not acknowledged by any slave" "0,1" textline " " bitfld.long 0x00 1. " ABRT_10ADDR1_NOACK ,Master is in 10-bit address mode and the first 10-bit address byte was not acknowledged by any slave" "0,1" bitfld.long 0x00 0. " ABRT_7B_ADDR_NOACK ,Master is in 7-bit addressing mode and the address sent was not acknowledged by any slave" "0,1" else rgroup.long 0x80++0x03 line.long 0x00 "IC_TX_ABRT_SOURCE,I2C Transmit Abort Source Register" hexmask.long.word 0x00 23.--31. 1. " TX_FLUSH_CNT ,This field indicates the number of tx FIFO data commands which are flushed due to TX_ABRT interrupt" bitfld.long 0x00 15. " ABRT_SLVRD_INTX ,When the processor side responds to a slave mode request for data to be transmitted to a remote master and user writes" "0,1" textline " " bitfld.long 0x00 14. " ABRT_SLV_ARBLOST ,Slave lost the bus while transmitting data to a remote master" "0,1" bitfld.long 0x00 13. " ABRT_SLVFLUSH_TXFIFO ,Slave has received a read command and some data exists in the TX FIFO so the slave issues a TX_ABRT interrupt to flush old data in TX FIFO" "0,1" textline " " bitfld.long 0x00 12. " ARB_LOST ,Master has lost arbitration" "0,1" bitfld.long 0x00 11. " ABRT_MASTER_DIS ,User tries to initiate a master operation with the master mode disabled" "No,Yes" textline " " bitfld.long 0x00 10. " ABRT_10B_RD_NORSTRT ,The restart is disabled and the master sends a read command in 10-bit addressing mode" "No,Yes" bitfld.long 0x00 9. " ABRT_SBYTE_NORSTRT ,The restart is disabled and the user is trying to send a START byte" "No,Yes" textline " " bitfld.long 0x00 7. " ABRT_SBYTE_ACKDET ,Master has sent a START byte and the START byte was acknowledged (Wrong behavior)" "0,1" bitfld.long 0x00 5. " ABRT_GCALL_READ ,I2C controller in master mode sent the general call to be a read from the bus" "0,1" textline " " bitfld.long 0x00 4. " ABRT_GCALL_NOACK ,I2C controller in master mode sent a general call and no slave on the bus acknowledged the general call" "0,1" bitfld.long 0x00 2. " ABRT_10ADDR2_NOACK ,Master is in 10-bit address mode and the second address byte of the 10-bit address was not acknowledged by any slave" "0,1" textline " " bitfld.long 0x00 1. " ABRT_10ADDR1_NOACK ,Master is in 10-bit address mode and the first 10-bit address byte was not acknowledged by any slave" "0,1" bitfld.long 0x00 0. " ABRT_7B_ADDR_NOACK ,Master is in 7-bit addressing mode and the address sent was not acknowledged by any slave" "0,1" endif if (((per.l(ad:0x40063000+0x6C))&0x01)==0x00)&&(((per.l(ad:0x40063000+0x70))&0x40)==0x00) group.long 0x84++0x03 line.long 0x00 "IC_SLV_DATA_NACK_ONLY,Generate Slave Data NACK Register" bitfld.long 0x00 0. " NACK ,Generate NACK" "After data byte received,Normally" else rgroup.long 0x84++0x03 line.long 0x00 "IC_SLV_DATA_NACK_ONLY,Generate Slave Data NACK Register" bitfld.long 0x00 0. " NACK ,Generate NACK" "After data byte received,Normally" endif if (((per.l(ad:0x40063000+0x6C))&0x01)==0x00) group.long 0x94++0x03 line.long 0x00 "IC_SDA_SETUP,I2C SDA Setup Register" hexmask.long.byte 0x00 0.--7. 1. " SDA_SETUP ,SDA setup" else rgroup.long 0x94++0x03 line.long 0x00 "IC_SDA_SETUP,I2C SDA Setup Register" hexmask.long.byte 0x00 0.--7. 1. " SDA_SETUP ,SDA setup" endif if (((per.l(ad:0x40063000))&0x41)==0x00) group.long 0x98++0x03 line.long 0x00 "IC_ACK_GENERAL_CALL,I2C ACK General Call Register" bitfld.long 0x00 0. " ACK_GEN_CALL ,ACK general call" "NACK,ACK" else hgroup.long 0x98++0x03 hide.long 0x00 "IC_ACK_GENERAL_CALL,I2C ACK General Call Register" endif rgroup.long 0x9C++0x03 line.long 0x00 "IC_ENABLE_STATUS,I2C Enable Status Register" bitfld.long 0x00 2. " SLV_RX_DATA_LOST ,Slave received data lost" "0,1" bitfld.long 0x00 1. " SLV_DISABLED_WHILE_BUSY ,Slave disabled while busy (Transmit/receive)" "0,1" textline " " bitfld.long 0x00 0. " IC_EN ,I2C interface status" "Completely inactive,Enabled state" if (((per.l(ad:0x40063000+0x6C))&0x01)==0x00) group.long 0xA0++0x03 line.long 0x00 "IC_FS_SPKLEN,I2C Sm, Fm Spike Suppression Limit" hexmask.long.byte 0x00 0.--7. 1. " IC_FS_SPKLEN ,This register must be set before any I2C bus transaction can take place to ensure stable operation" newline else rgroup.long 0xA0++0x03 line.long 0x00 "IC_FS_SPKLEN,I2C Sm, Fm Spike Suppression Limit" hexmask.long.byte 0x00 0.--7. 1. " IC_FS_SPKLEN ,This register must be set before any I2C bus transaction can take place to ensure stable operation" newline endif hgroup.long 0xA8++0x03 hide.long 0x00 "IC_CLR_RESTART_DET,Clear RESTART_DET Interrupt Register" in newline rgroup.long 0xF4++0x03 line.long 0x00 "IC_COMP_PARAM_1,Component Parameter Register 1" hexmask.long.byte 0x00 16.--23. 1. " TX_BUFFER_DEPTH ,The value of this register is derived from the depth of transmit buffer" hexmask.long.byte 0x00 8.--15. 1. " RX_BUFFER_DEPTH ,The value of this register is derived from the depth of receive buffer" textline " " bitfld.long 0x00 7. " ADD_ENCODED_PARAMS ,The value of this register shows if encoded information has been added" ",Included" bitfld.long 0x00 6. " HAS_DMA ,The value of this register shows if the DMA handshaking interface signals is available" "Not available,?..." textline " " bitfld.long 0x00 5. " INTR_IO ,The value of this register shows if the interrupts are individual or combined to a single one" ",Combined" bitfld.long 0x00 4. " HC_COUNT_VALUES ,The value of this register shows if the CNT registers are writable or read-only" "Writable," textline " " bitfld.long 0x00 2.--3. " MAX_SPEED_MODE ,The value of this register shows the maximum I2C mode supported by the I2C controller" ",,Fast mode,?..." bitfld.long 0x00 0.--1. " APB_DATA_WIDTH ,The value of this register shows the width of the APB data bus to which the I2C controller is attached" ",,32 bits,?..." width 0x0B tree.end tree "I2C2" base ad:0x40064000 width 23. if (((per.l(ad:0x40064000))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "IC_CON,I2C Control Register" bitfld.long 0x00 9. " RX_FIFO_FULL_HLD_CTRL , RX FIFO full hold control bit" "0,1" bitfld.long 0x00 8. " TX_EMPTY_CTRL ,This bit controls the generation of the TX_EMPTY interrupt" "0,1" textline " " bitfld.long 0x00 6. " IC_SLAVE_DISABLE ,This bit controls whether I2C has its slave disabled" "No,Yes" textline " " bitfld.long 0x00 5. " IC_RESTART_EN ,IC restart enable" "Disabled,Enabled" rbitfld.long 0x00 4. " IC_10BITADDR_MASTER_RD_ONLY ,Bit showing the bit addressing mode" "7-bit,10-bit" textline " " bitfld.long 0x00 1.--2. " SPEED ,These bits control at which speed the I2C controller operates" ",Standard mode (100 kb/s),Fast mode (<=400 kb/s),?..." textline " " bitfld.long 0x00 0. " MASTER_MODE ,This bit controls whether the I2C controller master is enabled" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "IC_CON,I2C Control Register" bitfld.long 0x00 9. " RX_FIFO_FULL_HLD_CTRL , RX FIFO full hold control bit" "0,1" bitfld.long 0x00 8. " TX_EMPTY_CTRL ,This bit controls the generation of the TX_EMPTY interrupt" "0,1" textline " " bitfld.long 0x00 7. " STOP_DET_IFADDRESSED ,STOP_DET if addressed select" "Only addressed,Both" bitfld.long 0x00 6. " IC_SLAVE_DISABLE ,This bit controls whether I2C has its slave disabled" "No,Yes" textline " " bitfld.long 0x00 5. " IC_RESTART_EN ,IC restart enable" "Disabled,Enabled" rbitfld.long 0x00 4. " IC_10BITADDR_MASTER_RD_ONLY ,Bit showing the bit addressing mode" "7-bit,10-bit" textline " " bitfld.long 0x00 3. " IC_10BITADDR_SLAVE , Controls whether the I2C controller responds to 7- or 10-bit addresses" "7-bit,10-bit" bitfld.long 0x00 1.--2. " SPEED ,These bits control at which speed the I2C controller operates" ",Standard mode (100 kb/s),Fast mode (<=400 kb/s),?..." textline " " bitfld.long 0x00 0. " MASTER_MODE ,This bit controls whether the I2C controller master is enabled" "Disabled,Enabled" endif if (((per.l(ad:0x40064000+0x04))&0x800)==0x800) group.long 0x04++0x03 line.long 0x00 "IC_TAR,I2C Target Address Register" bitfld.long 0x00 12. " IC_10BITADDR_MASTER ,Controls whether the I2C controller starts its transfers in 7- or 10-bit addressing mode" "7-bit,10-bit" bitfld.long 0x00 11. " SPECIAL ,Indicates whether software performs a General Call or START BYTE command" "Use IC_TAR normally,Special I2C command" textline " " bitfld.long 0x00 10. " GC_OR_START , Indicates whether a General Call or START byte command is to be performed by I2C" ",START BYTE" hexmask.long.word 0x00 0.--9. 1. " IC_TAR ,This is the target address for any master transaction" else group.long 0x04++0x03 line.long 0x00 "IC_TAR,I2C Target Address Register" bitfld.long 0x00 12. " IC_10BITADDR_MASTER , Controls whether the I2C controller starts its transfers in 7- or 10-bit addressing mode" "7-bit,10-bit" bitfld.long 0x00 11. " SPECIAL ,Indicates whether software performs a General Call or START BYTE command" "Use IC_TAR normally,Special I2C command" textline " " bitfld.long 0x00 10. " GC_OR_START ,Indicates whether a General Call or START byte command is to be performed by I2C" "General call address,?..." hexmask.long.word 0x00 0.--9. 1. " IC_TAR ,This is the target address for any master transaction" endif if (((per.l(ad:0x40064000+0x6C))&0x01)==0x01) rgroup.long 0x08++0x03 line.long 0x00 "IC_SAR,I2C Slave Address Register" hexmask.long.word 0x00 0.--9. 1. " IC_SAR ,The IC_SAR holds the slave address when the I2C is operating as a slave" else group.long 0x08++0x03 line.long 0x00 "IC_SAR,I2C Slave Address Register" hexmask.long.word 0x00 0.--9. 1. " IC_SAR ,The IC_SAR holds the slave address when the I2C is operating as a slave" endif if (((per.l(ad:0x40064000))&0x20)==0x20) group.long 0x10++0x03 line.long 0x00 "IC_DATA_CMD,I2C Rx/tx Data Buffer And Command Register" bitfld.long 0x00 10. " RESTART ,This bit controls whether a RESTART is issued before the byte is sent or received" "RESTART,RESTART according to the value of CMD" bitfld.long 0x00 9. " STOP ,This bit controls whether a STOP is issued after the byte is sent or received" "Not issued,Issued" textline " " bitfld.long 0x00 8. " CMD ,This bit controls whether a read or a write is performed" "Read,Write" hexmask.long.byte 0x00 0.--7. 1. " DAT ,This register contains the data to be transmitted or received on the I2C bus" else group.long 0x10++0x03 line.long 0x00 "IC_DATA_CMD,I2C Rx/tx Data Buffer And Command Register" bitfld.long 0x00 10. " RESTART ,This bit controls whether a RESTART is issued before the byte is sent or received" "STOP,STOP START" bitfld.long 0x00 9. " STOP ,This bit controls whether a STOP is issued after the byte is sent or received" "Not issued,Issued" textline " " bitfld.long 0x00 8. " CMD ,This bit controls whether a read or a write is performed" "Read,Write" hexmask.long.byte 0x00 0.--7. 1. " DAT ,This register contains the data to be transmitted or received on the I2C bus" endif if (((per.l(ad:0x40064000+0x6C))&0x01)==0x01) rgroup.long 0x14++0x0F line.long 0x00 "IC_SS_SCL_HCNT,Standard Mode I2C Clock SCL High Count Register" hexmask.long.word 0x00 0.--15. 1. " IC_SS_SCL_HCNT ,This register sets the SCL clock high-period count for standard mode" line.long 0x04 "IC_SS_SCL_LCNT,Standard Mode I2C Clock SCL Low Count Register" hexmask.long.word 0x04 0.--15. 1. " IC_SS_SCL_LCNT ,This register sets the SCL clock low period count for standard mode" line.long 0x08 "IC_FS_SCL_HCNT,Fast Mode I2C Clock SCL High Count Register" hexmask.long.word 0x08 0.--15. 1. " IC_FS_SCL_HCNT ,This register sets the SCL clock high-period count for fast mode" line.long 0x0C "IC_FS_SCL_LCNT,Fast Mode I2C Clock SCL Low Count Register" hexmask.long.word 0x0C 0.--15. 1. " IC_FS_SCL_LCNT ,This register sets the SCL clock low period count for fast mode" else group.long 0x14++0x0F line.long 0x00 "IC_SS_SCL_HCNT,Standard Mode I2C Clock SCL High Count Register" hexmask.long.word 0x00 0.--15. 1. " IC_SS_SCL_HCNT ,This register sets the SCL clock high-period count for standard mode" line.long 0x04 "IC_SS_SCL_LCNT,Standard Mode I2C Clock SCL Low Count Register" hexmask.long.word 0x04 0.--15. 1. " IC_SS_SCL_LCNT ,This register sets the SCL clock low period count for standard mode" line.long 0x08 "IC_FS_SCL_HCNT,Fast Mode I2C Clock SCL High Count Register" hexmask.long.word 0x08 0.--15. 1. " IC_FS_SCL_HCNT ,This register sets the SCL clock high-period count for fast mode" line.long 0x0C "IC_FS_SCL_LCNT,Fast Mode I2C Clock SCL Low Count Register" hexmask.long.word 0x0C 0.--15. 1. " IC_FS_SCL_LCNT ,This register sets the SCL clock low period count for fast mode" endif rgroup.long 0x2C++0x03 line.long 0x00 "IC_INTR_STAT,I2C Interrupt Status Register" bitfld.long 0x00 13. " R_MASTER_ON_HOLD ,Indicates whether master is holding the bus and TX FIFO is empty" "No empty,Empty" bitfld.long 0x00 12. " R_RESTART_DET ,Indicates a RESTART condition has occurred when I2C controller is operating in slave mode and addressed" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " R_GEN_CALL ,Set only when a general call address is received and it is acknowledged" "No interrupt,Interrupt" bitfld.long 0x00 10. " R_START_DET ,Indicates whether a START or RESTART condition has occurred on the I2C interface" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " R_STOP_DET ,Indicates a STOP condition has occurred on the I2C interface" "No interrupt,Interrupt" bitfld.long 0x00 8. " R_ACTIVITY ,Captures I2C controller activity" "0,1" textline " " bitfld.long 0x00 7. " R_RX_DONE ,Indicating that the transmission is done" "0,1" bitfld.long 0x00 6. " R_TX_ABRT ,Indicates unable to complete the intended actions on the contents of the transmit FIFO" "0,1" textline " " bitfld.long 0x00 5. " R_RD_REQ ,Controller is acting as a slave and another I2C master is attempting to read data fromi2c controller" "0,1" bitfld.long 0x00 4. " R_TX_EMPTY ,The transmit buffer is at or below the threshold value set" "0,1" textline " " bitfld.long 0x00 3. " R_TX_OVER ,Set when the receive buffer reaches or goes above the RX_TL threshold" "0,1" bitfld.long 0x00 2. " R_RX_FULL ,Receive buffer reaches or goes above the RX_TL threshold" "0,1" textline " " bitfld.long 0x00 1. " R_RX_OVER ,Receive buffer is completely filled to its depth of 8 and an additional byte is received from an external I2C device" "0,1" bitfld.long 0x00 0. " R_RX_UNDER ,Processor attempts to read the receive buffer when it is empty" "0,1" group.long 0x30++0x03 line.long 0x00 "IC_INTR_MASK,I2C Interrupt Mask Register" bitfld.long 0x00 13. " M_MASTER_ON_HOLD ,This bit masks the R_MASTER_ON_HOLD interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 12. " R_RESTART_DET ,This bit masks the R_RESTART_DET interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 11. " R_GEN_CALL ,This bit masks the R_GEN_CALL interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 10. " R_START_DET ,This bit masks the R_START_DET interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 9. " R_STOP_DET ,This bit masks the R_STOP_DET interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 8. " R_ACTIVITY ,This bit masks the R_ACTIVITY interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 7. " R_RX_DONE ,This bit masks the R_RX_DONE interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 6. " R_TX_ABRT ,This bit masks the R_TX_ABRT interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 5. " R_RD_REQ ,This bit masks the R_RD_REQ interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 4. " R_TX_EMPTY ,This bit masks the R_TX_EMPTY interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 3. " R_TX_OVER ,This bit masks the R_TX_OVER interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 2. " R_RX_FULL ,This bit masks the R_RX_FULL interrupt in IC_INTR_STAT register" "Not masked,Masked" textline " " bitfld.long 0x00 1. " R_RX_OVER ,This bit masks the R_RX_OVER interrupt in IC_INTR_STAT register" "Not masked,Masked" bitfld.long 0x00 0. " R_RX_UNDER ,This bit masks the R_RX_UNDER interrupt in IC_INTR_STAT register" "Not masked,Masked" rgroup.long 0x34++0x03 line.long 0x00 "IC_RAW_INTR_STAT,I2C Raw Interrupt Status Register" bitfld.long 0x00 13. " MASTER_ON_HOLD ,Indicates whether master is holding the bus and TX FIFO is empty" "No interrupt,Interrupt" bitfld.long 0x00 12. " RESTART_DET ,Indicates whether a RESTART condition has occurred on the I2C interface" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " GEN_CALL ,Set only when a general call address is received and it is acknowledged" "No interrupt,Interrupt" bitfld.long 0x00 10. " START_DET ,Indicates whether a START or RESTART condition has occurred on the I2C interface" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " STOP_DET ,Indicates whether a STOP condition has occurred on the I2C interface" "No interrupt,Interrupt" bitfld.long 0x00 8. " RAW_INTR_ACTIVITY ,This bit captures I2C controller activity and stays set until it is cleared" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " RX_DONE ,When the I2C controller is acting as a slave-transmitter" "No interrupt,Interrupt" bitfld.long 0x00 6. " TX_ABRT ,This bit indicates if I2C controller as an I2C transmitter is unable to complete the intended actions on the contents of the transmit FIFO" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " RD_REQ ,This bit is set to 1 when I2C controller is acting as a slave and another I2C master is attempting to read data from I2C controller." "No interrupt,Interrupt" bitfld.long 0x00 4. " TX_EMPTY ,The transmit buffer is at or below the threshold value set" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " TX_OVER ,Set during transmit if the transmit buffer is filled to its depth" "No interrupt,Interrupt" bitfld.long 0x00 2. " RX_FULL ,Set when the receive buffer reaches or goes above the RX_TL threshold" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " RX_OVER ,Set if the receive buffer is completely filled" "No interrupt,Interrupt" bitfld.long 0x00 0. " RX_UNDER ,Set if the processor attempts to read the receive buffer when it is empty by reading from the IC_DATA_CMD register" "No interrupt,Interrupt" group.long 0x38++0x07 line.long 0x00 "IC_RX_TL,I2C Receive FIFO Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " RX_TL ,Receive FIFO threshold level" line.long 0x04 "IC_TX_TL,I2C Transmit FIFO Threshold Register" hexmask.long.byte 0x04 0.--7. 1. " TX_TL ,Transmit FIFO threshold level" textline " " hgroup.long 0x40++0x03 hide.long 0x00 "IC_CLR_INTR,Clear Combined And Individual Interrupt Register" in hgroup.long 0x44++0x03 hide.long 0x00 "IC_CLR_RX_UNDER,Clear RX_UNDER Interrupt Register" in hgroup.long 0x48++0x03 hide.long 0x00 "IC_CLR_RX_OVER,Clear RX_OVER Interrupt Registerr" in hgroup.long 0x4C++0x03 hide.long 0x00 "IC_CLR_TX_OVER,Clear TX_OVER Interrupt Register" in hgroup.long 0x50++0x03 hide.long 0x00 "IC_CLR_RD_REQ,Clear RD_REQ Interrupt Register" in hgroup.long 0x54++0x03 hide.long 0x00 "IC_CLR_TX_ABRT,Clear TX_ABRT Interrupt Register" in hgroup.long 0x58++0x03 hide.long 0x00 "IC_CLR_RX_DONE,Clear RX_DONE Interrupt Register" in hgroup.long 0x5C++0x03 hide.long 0x00 "IC_CLR_ACTIVITY,Clear ACTIVITY Interrupt Register" in hgroup.long 0x60++0x03 hide.long 0x00 "IC_CLR_STOP_DET,Clear STOP_DET Interrupt Register" in hgroup.long 0x64++0x03 hide.long 0x00 "IC_CLR_START_DET,Clear START_DET Interrupt Register" in hgroup.long 0x68++0x03 hide.long 0x00 "IC_CLR_GEN_CALL,Clear GEN_CALL Interrupt Register" in textline " " group.long 0x6C++0x03 line.long 0x00 "IC_ENABLE,I2C Enable Register" bitfld.long 0x00 1. " ABORT ,The controller initiates the transfer abort" "Not initiated/done,In progress" bitfld.long 0x00 0. " ENABLE ,Controls whether the I2C controller is enabled" "Disabled,Enabled" rgroup.long 0x70++0x0B line.long 0x00 "IC_STATUS,I2C Status Register" bitfld.long 0x00 6. " SLV_ACTIVITY ,Slave FSM activity status" "Idle,Active" bitfld.long 0x00 5. " MST_ACTIVITY ,Master FSM activity status" "Idle,Active" textline " " bitfld.long 0x00 4. " RFF ,Receive FIFO completely full" "Not full,Full" bitfld.long 0x00 3. " RFNE ,Receive FIFO not empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " TFE ,Transmit FIFO completely empty" "Not empty,Empty" bitfld.long 0x00 1. " TFNF ,Transmit FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 0. " IC_STATUS_ACTIVITY ,I2C activity status" "Disabled,Enabled" line.long 0x04 "IC_TXFLR,I2C Transmit FIFO Level Register" bitfld.long 0x04 0.--3. " TXFLR ,Transmit FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "IC_RXFLR,Receive FIFO Level Register" bitfld.long 0x08 0.--3. " RXFLR ,Receive FIFO level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.l(ad:0x40064000+0x6C))&0x01)==0x00) group.long 0x7C++0x03 line.long 0x00 "IC_SDA_HOLD,I2C SDA Hold Time Length Register" hexmask.long.byte 0x00 16.--23. 1. " IC_SDA_RX_HOLD ,Sets the required SDA hold time in units of I2C_SCLK period when I2C controller acts as a receiver" hexmask.long.word 0x00 0.--15. 1. " IC_SDA_TX_HOLD ,Sets the required SDA hold time in units of I2C_SCLK period when I2C controller acts as a transmitter" else rgroup.long 0x7C++0x03 line.long 0x00 "IC_SDA_HOLD,I2C SDA Hold Time Length Register" hexmask.long.byte 0x00 16.--23. 1. " IC_SDA_RX_HOLD ,Sets the required SDA hold time in units of I2C_SCLK period when I2C controller acts as a receiver" hexmask.long.word 0x00 0.--15. 1. " IC_SDA_TX_HOLD ,Sets the required SDA hold time in units of I2C_SCLK period when I2C controller acts as a transmitter" endif if (((per.l(ad:0x40064000))&0x01)==0x01) rgroup.long 0x80++0x03 line.long 0x00 "IC_TX_ABRT_SOURCE,I2C Transmit Abort Source Register" hexmask.long.word 0x00 23.--31. 1. " TX_FLUSH_CNT ,This field indicates the number of tx FIFO data commands which are flushed due to TX_ABRT interrupt" bitfld.long 0x00 16. " ABRT_USER_ABRT ,Master has detected the transfer abort" "Start,Abort" textline " " bitfld.long 0x00 15. " ABRT_SLVRD_INTX ,When the processor side responds to a slave mode request for data to be transmitted to a remote master and user writes" "0,1" bitfld.long 0x00 14. " ABRT_SLV_ARBLOST ,Slave lost the bus while transmitting data to a remote master" "0,1" textline " " bitfld.long 0x00 13. " ABRT_SLVFLUSH_TXFIFO ,Slave has received a read command and some data exists in the TX FIFO so the slave issues a TX_ABRT interrupt to flush old data in TX FIFO" "0,1" bitfld.long 0x00 12. " ARB_LOST ,Master has lost arbitration" "0,1" textline " " bitfld.long 0x00 11. " ABRT_MASTER_DIS ,User tries to initiate a master operation with the master mode disabled" "No,Yes" bitfld.long 0x00 10. " ABRT_10B_RD_NORSTRT ,The restart is disabled and the master sends a read command in 10-bit addressing mode" "No,Yes" textline " " bitfld.long 0x00 9. " ABRT_SBYTE_NORSTRT ,The restart is disabled and the user is trying to send a START byte" "No,Yes" bitfld.long 0x00 7. " ABRT_SBYTE_ACKDET ,Master has sent a START byte and the START byte was acknowledged (Wrong behavior)" "0,1" textline " " bitfld.long 0x00 5. " ABRT_GCALL_READ ,I2C controller in master mode sent the general call to be a read from the bus" "0,1" bitfld.long 0x00 4. " ABRT_GCALL_NOACK ,I2C controller in master mode sent a general call and no slave on the bus acknowledged the general call" "0,1" textline " " bitfld.long 0x00 3. " ABRT_TXDATA_NOACK ,Master has received an acknowledgement for the address" "0,1" bitfld.long 0x00 2. " ABRT_10ADDR2_NOACK ,Master is in 10-bit address mode and the second address byte of the 10-bit address was not acknowledged by any slave" "0,1" textline " " bitfld.long 0x00 1. " ABRT_10ADDR1_NOACK ,Master is in 10-bit address mode and the first 10-bit address byte was not acknowledged by any slave" "0,1" bitfld.long 0x00 0. " ABRT_7B_ADDR_NOACK ,Master is in 7-bit addressing mode and the address sent was not acknowledged by any slave" "0,1" else rgroup.long 0x80++0x03 line.long 0x00 "IC_TX_ABRT_SOURCE,I2C Transmit Abort Source Register" hexmask.long.word 0x00 23.--31. 1. " TX_FLUSH_CNT ,This field indicates the number of tx FIFO data commands which are flushed due to TX_ABRT interrupt" bitfld.long 0x00 15. " ABRT_SLVRD_INTX ,When the processor side responds to a slave mode request for data to be transmitted to a remote master and user writes" "0,1" textline " " bitfld.long 0x00 14. " ABRT_SLV_ARBLOST ,Slave lost the bus while transmitting data to a remote master" "0,1" bitfld.long 0x00 13. " ABRT_SLVFLUSH_TXFIFO ,Slave has received a read command and some data exists in the TX FIFO so the slave issues a TX_ABRT interrupt to flush old data in TX FIFO" "0,1" textline " " bitfld.long 0x00 12. " ARB_LOST ,Master has lost arbitration" "0,1" bitfld.long 0x00 11. " ABRT_MASTER_DIS ,User tries to initiate a master operation with the master mode disabled" "No,Yes" textline " " bitfld.long 0x00 10. " ABRT_10B_RD_NORSTRT ,The restart is disabled and the master sends a read command in 10-bit addressing mode" "No,Yes" bitfld.long 0x00 9. " ABRT_SBYTE_NORSTRT ,The restart is disabled and the user is trying to send a START byte" "No,Yes" textline " " bitfld.long 0x00 7. " ABRT_SBYTE_ACKDET ,Master has sent a START byte and the START byte was acknowledged (Wrong behavior)" "0,1" bitfld.long 0x00 5. " ABRT_GCALL_READ ,I2C controller in master mode sent the general call to be a read from the bus" "0,1" textline " " bitfld.long 0x00 4. " ABRT_GCALL_NOACK ,I2C controller in master mode sent a general call and no slave on the bus acknowledged the general call" "0,1" bitfld.long 0x00 2. " ABRT_10ADDR2_NOACK ,Master is in 10-bit address mode and the second address byte of the 10-bit address was not acknowledged by any slave" "0,1" textline " " bitfld.long 0x00 1. " ABRT_10ADDR1_NOACK ,Master is in 10-bit address mode and the first 10-bit address byte was not acknowledged by any slave" "0,1" bitfld.long 0x00 0. " ABRT_7B_ADDR_NOACK ,Master is in 7-bit addressing mode and the address sent was not acknowledged by any slave" "0,1" endif if (((per.l(ad:0x40064000+0x6C))&0x01)==0x00)&&(((per.l(ad:0x40064000+0x70))&0x40)==0x00) group.long 0x84++0x03 line.long 0x00 "IC_SLV_DATA_NACK_ONLY,Generate Slave Data NACK Register" bitfld.long 0x00 0. " NACK ,Generate NACK" "After data byte received,Normally" else rgroup.long 0x84++0x03 line.long 0x00 "IC_SLV_DATA_NACK_ONLY,Generate Slave Data NACK Register" bitfld.long 0x00 0. " NACK ,Generate NACK" "After data byte received,Normally" endif if (((per.l(ad:0x40064000+0x6C))&0x01)==0x00) group.long 0x94++0x03 line.long 0x00 "IC_SDA_SETUP,I2C SDA Setup Register" hexmask.long.byte 0x00 0.--7. 1. " SDA_SETUP ,SDA setup" else rgroup.long 0x94++0x03 line.long 0x00 "IC_SDA_SETUP,I2C SDA Setup Register" hexmask.long.byte 0x00 0.--7. 1. " SDA_SETUP ,SDA setup" endif if (((per.l(ad:0x40064000))&0x41)==0x00) group.long 0x98++0x03 line.long 0x00 "IC_ACK_GENERAL_CALL,I2C ACK General Call Register" bitfld.long 0x00 0. " ACK_GEN_CALL ,ACK general call" "NACK,ACK" else hgroup.long 0x98++0x03 hide.long 0x00 "IC_ACK_GENERAL_CALL,I2C ACK General Call Register" endif rgroup.long 0x9C++0x03 line.long 0x00 "IC_ENABLE_STATUS,I2C Enable Status Register" bitfld.long 0x00 2. " SLV_RX_DATA_LOST ,Slave received data lost" "0,1" bitfld.long 0x00 1. " SLV_DISABLED_WHILE_BUSY ,Slave disabled while busy (Transmit/receive)" "0,1" textline " " bitfld.long 0x00 0. " IC_EN ,I2C interface status" "Completely inactive,Enabled state" if (((per.l(ad:0x40064000+0x6C))&0x01)==0x00) group.long 0xA0++0x03 line.long 0x00 "IC_FS_SPKLEN,I2C Sm, Fm Spike Suppression Limit" hexmask.long.byte 0x00 0.--7. 1. " IC_FS_SPKLEN ,This register must be set before any I2C bus transaction can take place to ensure stable operation" newline else rgroup.long 0xA0++0x03 line.long 0x00 "IC_FS_SPKLEN,I2C Sm, Fm Spike Suppression Limit" hexmask.long.byte 0x00 0.--7. 1. " IC_FS_SPKLEN ,This register must be set before any I2C bus transaction can take place to ensure stable operation" newline endif hgroup.long 0xA8++0x03 hide.long 0x00 "IC_CLR_RESTART_DET,Clear RESTART_DET Interrupt Register" in newline rgroup.long 0xF4++0x03 line.long 0x00 "IC_COMP_PARAM_1,Component Parameter Register 1" hexmask.long.byte 0x00 16.--23. 1. " TX_BUFFER_DEPTH ,The value of this register is derived from the depth of transmit buffer" hexmask.long.byte 0x00 8.--15. 1. " RX_BUFFER_DEPTH ,The value of this register is derived from the depth of receive buffer" textline " " bitfld.long 0x00 7. " ADD_ENCODED_PARAMS ,The value of this register shows if encoded information has been added" ",Included" bitfld.long 0x00 6. " HAS_DMA ,The value of this register shows if the DMA handshaking interface signals is available" "Not available,?..." textline " " bitfld.long 0x00 5. " INTR_IO ,The value of this register shows if the interrupts are individual or combined to a single one" ",Combined" bitfld.long 0x00 4. " HC_COUNT_VALUES ,The value of this register shows if the CNT registers are writable or read-only" "Writable," textline " " bitfld.long 0x00 2.--3. " MAX_SPEED_MODE ,The value of this register shows the maximum I2C mode supported by the I2C controller" ",,Fast mode,?..." bitfld.long 0x00 0.--1. " APB_DATA_WIDTH ,The value of this register shows the width of the APB data bus to which the I2C controller is attached" ",,32 bits,?..." width 0x0B tree.end tree.end tree.open "Basic GPIO" tree "BGPIO1" base ad:0x5000B000 width 21. group.long 0x00++0x07 line.long 0x00 "RGPIO_SWPORTA_DR,GPIO Port A Data Output Register" bitfld.long 0x00 31. " BGPIO_A_DR_[31] ,Data output GPIO_1 port A pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Data output GPIO_1 port A pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Data output GPIO_1 port A pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Data output GPIO_1 port A pin 28" "Low,High" textline " " bitfld.long 0x00 27. " [27] ,Data output GPIO_1 port A pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Data output GPIO_1 port A pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Data output GPIO_1 port A pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Data output GPIO_1 port A pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Data output GPIO_1 port A pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Data output GPIO_1 port A pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Data output GPIO_1 port A pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Data output GPIO_1 port A pin 20" "Low,High" textline " " bitfld.long 0x00 19. " [19] ,Data output GPIO_1 port A pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Data output GPIO_1 port A pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Data output GPIO_1 port A pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Data output GPIO_1 port A pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Data output GPIO_1 port A pin 15" "Low,High" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 14. " [14] ,Data output GPIO_1 port A pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Data output GPIO_1 port A pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Data output GPIO_1 port A pin 12" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Data output GPIO_1 port A pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Data output GPIO_1 port A pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Data output GPIO_1 port A pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Data output GPIO_1 port A pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Data output GPIO_1 port A pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Data output GPIO_1 port A pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Data output GPIO_1 port A pin 5" "Low,High" endif textline " " bitfld.long 0x00 4. " [4] ,Data output GPIO_1 port A pin 4" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Data output GPIO_1 port A pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Data output GPIO_1 port A pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Data output GPIO_1 port A pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Data output GPIO_1 port A pin 0" "Low,High" line.long 0x04 "RGPIO_SWPORTA_DDR,GPIO Port A Data Direction Register" bitfld.long 0x04 31. " BGPIO_A_DDR_[31] ,Data direction of GPIO_1 port A pin 31" "Input,Output" bitfld.long 0x04 30. " [30] ,Data direction of GPIO_1 port A pin 30" "Input,Output" bitfld.long 0x04 29. " [29] ,Data direction of GPIO_1 port A pin 29" "Input,Output" bitfld.long 0x04 28. " [28] ,Data direction of GPIO_1 port A pin 28" "Input,Output" textline " " bitfld.long 0x04 27. " [27] ,Data direction of GPIO_1 port A pin 27" "Input,Output" bitfld.long 0x04 26. " [26] ,Data direction of GPIO_1 port A pin 26" "Input,Output" bitfld.long 0x04 25. " [25] ,Data direction of GPIO_1 port A pin 25" "Input,Output" bitfld.long 0x04 24. " [24] ,Data direction of GPIO_1 port A pin 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,Data direction of GPIO_1 port A pin 23" "Input,Output" bitfld.long 0x04 22. " [22] ,Data direction of GPIO_1 port A pin 22" "Input,Output" bitfld.long 0x04 21. " [21] ,Data direction of GPIO_1 port A pin 21" "Input,Output" bitfld.long 0x04 20. " [20] ,Data direction of GPIO_1 port A pin 20" "Input,Output" textline " " bitfld.long 0x04 19. " [19] ,Data direction of GPIO_1 port A pin 19" "Input,Output" bitfld.long 0x04 18. " [18] ,Data direction of GPIO_1 port A pin 18" "Input,Output" bitfld.long 0x04 17. " [17] ,Data direction of GPIO_1 port A pin 17" "Input,Output" bitfld.long 0x04 16. " [16] ,Data direction of GPIO_1 port A pin 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,Data direction of GPIO_1 port A pin 15" "Input,Output" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x04 14. " [14] ,Data direction of GPIO_1 port A pin 14" "Input,Output" bitfld.long 0x04 13. " [13] ,Data direction of GPIO_1 port A pin 13" "Input,Output" bitfld.long 0x04 12. " [12] ,Data direction of GPIO_1 port A pin 12" "Input,Output" textline " " bitfld.long 0x04 11. " [11] ,Data direction of GPIO_1 port A pin 11" "Input,Output" bitfld.long 0x04 10. " [10] ,Data direction of GPIO_1 port A pin 10" "Input,Output" bitfld.long 0x04 9. " [9] ,Data direction of GPIO_1 port A pin 9" "Input,Output" bitfld.long 0x04 8. " [8] ,Data direction of GPIO_1 port A pin 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,Data direction of GPIO_1 port A pin 7" "Input,Output" bitfld.long 0x04 6. " [6] ,Data direction of GPIO_1 port A pin 6" "Input,Output" bitfld.long 0x04 5. " [5] ,Data direction of GPIO_1 port A pin 5" "Input,Output" endif textline " " bitfld.long 0x04 4. " [4] ,Data direction of GPIO_1 port A pin 4" "Input,Output" textline " " bitfld.long 0x04 3. " [3] ,Data direction of GPIO_1 port A pin 3" "Input,Output" bitfld.long 0x04 2. " [2] ,Data direction of GPIO_1 port A pin 2" "Input,Output" bitfld.long 0x04 1. " [1] ,Data direction of GPIO_1 port A pin 1" "Input,Output" bitfld.long 0x04 0. " [0] ,Data direction of GPIO_1 port A pin 0" "Input,Output" group.long 0x0C++0x07 line.long 0x00 "RGPIO_SWPORTB_DR,GPIO Port B Data Output Register" bitfld.long 0x00 31. " BGPIO_B_DR_[31] ,Data output GPIO_1 port B pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Data output GPIO_1 port B pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Data output GPIO_1 port B pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Data output GPIO_1 port B pin 28" "Low,High" textline " " bitfld.long 0x00 27. " [27] ,Data output GPIO_1 port B pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Data output GPIO_1 port B pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Data output GPIO_1 port B pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Data output GPIO_1 port B pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Data output GPIO_1 port B pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Data output GPIO_1 port B pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Data output GPIO_1 port B pin 21" "Low,High" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 20. " [20] ,Data output GPIO_1 port B pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Data output GPIO_1 port B pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Data output GPIO_1 port B pin 18" "Low,High" textline " " bitfld.long 0x00 17. " [17] ,Data output GPIO_1 port B pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Data output GPIO_1 port B pin 16" "Low,High" bitfld.long 0x00 15. " [15] ,Data output GPIO_1 port B pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Data output GPIO_1 port B pin 14" "Low,High" textline " " bitfld.long 0x00 13. " [13] ,Data output GPIO_1 port B pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Data output GPIO_1 port B pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Data output GPIO_1 port B pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Data output GPIO_1 port B pin 10" "Low,High" textline " " bitfld.long 0x00 9. " [9] ,Data output GPIO_1 port B pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Data output GPIO_1 port B pin 8" "Low,High" bitfld.long 0x00 7. " [7] ,Data output GPIO_1 port B pin 7" "Low,High" endif textline " " bitfld.long 0x00 6. " [6] ,Data output GPIO_1 port B pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Data output GPIO_1 port B pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Data output GPIO_1 port B pin 4" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Data output GPIO_1 port B pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Data output GPIO_1 port B pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Data output GPIO_1 port B pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Data output GPIO_1 port B pin 0" "Low,High" line.long 0x04 "RGPIO_SWPORTB_DRR,GPIO Port B Data Direction Register" bitfld.long 0x04 31. " BGPIO_B_DRR_[31] ,Data direction of GPIO_1 port B pin 31" "Input,Output" bitfld.long 0x04 30. " [30] ,Data direction of GPIO_1 port B pin 30" "Input,Output" bitfld.long 0x04 29. " [29] ,Data direction of GPIO_1 port B pin 29" "Input,Output" bitfld.long 0x04 28. " [28] ,Data direction of GPIO_1 port B pin 28" "Input,Output" textline " " bitfld.long 0x04 27. " [27] ,Data direction of GPIO_1 port B pin 27" "Input,Output" bitfld.long 0x04 26. " [26] ,Data direction of GPIO_1 port B pin 26" "Input,Output" bitfld.long 0x04 25. " [25] ,Data direction of GPIO_1 port B pin 25" "Input,Output" bitfld.long 0x04 24. " [24] ,Data direction of GPIO_1 port B pin 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,Data direction of GPIO_1 port B pin 23" "Input,Output" bitfld.long 0x04 22. " [22] ,Data direction of GPIO_1 port B pin 22" "Input,Output" bitfld.long 0x04 21. " [21] ,Data direction of GPIO_1 port B pin 21" "Input,Output" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x04 20. " [20] ,Data direction of GPIO_1 port B pin 20" "Input,Output" bitfld.long 0x04 19. " [19] ,Data direction of GPIO_1 port B pin 19" "Input,Output" bitfld.long 0x04 18. " [18] ,Data direction of GPIO_1 port B pin 18" "Input,Output" textline " " bitfld.long 0x04 17. " [17] ,Data direction of GPIO_1 port B pin 17" "Input,Output" bitfld.long 0x04 16. " [16] ,Data direction of GPIO_1 port B pin 16" "Input,Output" bitfld.long 0x04 15. " [15] ,Data direction of GPIO_1 port B pin 15" "Input,Output" bitfld.long 0x04 14. " [14] ,Data direction of GPIO_1 port B pin 14" "Input,Output" textline " " bitfld.long 0x04 13. " [13] ,Data direction of GPIO_1 port B pin 13" "Input,Output" bitfld.long 0x04 12. " [12] ,Data direction of GPIO_1 port B pin 12" "Input,Output" bitfld.long 0x04 11. " [11] ,Data direction of GPIO_1 port B pin 11" "Input,Output" bitfld.long 0x04 10. " [10] ,Data direction of GPIO_1 port B pin 10" "Input,Output" textline " " bitfld.long 0x04 9. " [9] ,Data direction of GPIO_1 port B pin 9" "Input,Output" bitfld.long 0x04 8. " [8] ,Data direction of GPIO_1 port B pin 8" "Input,Output" bitfld.long 0x04 7. " [7] ,Data direction of GPIO_1 port B pin 7" "Input,Output" endif textline " " bitfld.long 0x04 6. " [6] ,Data direction of GPIO_1 port B pin 6" "Input,Output" bitfld.long 0x04 5. " [5] ,Data direction of GPIO_1 port B pin 5" "Input,Output" bitfld.long 0x04 4. " [4] ,Data direction of GPIO_1 port B pin 4" "Input,Output" textline " " bitfld.long 0x04 3. " [3] ,Data direction of GPIO_1 port B pin 3" "Input,Output" bitfld.long 0x04 2. " [2] ,Data direction of GPIO_1 port B pin 2" "Input,Output" bitfld.long 0x04 1. " [1] ,Data direction of GPIO_1 port B pin 1" "Input,Output" bitfld.long 0x04 0. " [0] ,Data direction of GPIO_1 port B pin 0" "Input,Output" group.long 0x30++0x0F line.long 0x00 "RGPIO_INTEN,GPIO Port A Interrupt Enable Register" bitfld.long 0x00 31. " BGPIO_INTEN_[31] ,GPIO_1 port A pin 31 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,GPIO_1 port A pin 30 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,GPIO_1 port A pin 29 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,GPIO_1 port A pin 28 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " [27] ,GPIO_1 port A pin 27 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,GPIO_1 port A pin 26 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,GPIO_1 port A pin 25 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,GPIO_1 port A pin 24 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " [23] ,GPIO_1 port A pin 23 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,GPIO_1 port A pin 22 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,GPIO_1 port A pin 21 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,GPIO_1 port A pin 20 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,GPIO_1 port A pin 19 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,GPIO_1 port A pin 18 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,GPIO_1 port A pin 17 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,GPIO_1 port A pin 16 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " [15] ,GPIO_1 port A pin 15 interrupt enable" "Disabled,Enabled" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 14. " [14] ,GPIO_1 port A pin 14 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,GPIO_1 port A pin 13 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,GPIO_1 port A pin 12 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,GPIO_1 port A pin 11 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,GPIO_1 port A pin 10 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,GPIO_1 port A pin 9 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,GPIO_1 port A pin 8 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,GPIO_1 port A pin 7 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,GPIO_1 port A pin 6 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,GPIO_1 port A pin 5 interrupt enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 4. " [4] ,GPIO_1 port A pin 4 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,GPIO_1 port A pin 3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,GPIO_1 port A pin 2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,GPIO_1 port A pin 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,GPIO_1 port A pin 0 interrupt enable" "Disabled,Enabled" line.long 0x04 "RGPIO_INTMASK,GPIO Port A Interrupt Mask Register" bitfld.long 0x04 31. " BGPIO_INTMASK_[31] ,GPIO_1 port A pin 31 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 30. " [30] ,GPIO_1 port A pin 30 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 29. " [29] ,GPIO_1 port A pin 29 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 28. " [28] ,GPIO_1 port A pin 28 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [27] ,GPIO_1 port A pin 27 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 26. " [26] ,GPIO_1 port A pin 26 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 25. " [25] ,GPIO_1 port A pin 25 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 24. " [24] ,GPIO_1 port A pin 24 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [23] ,GPIO_1 port A pin 23 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 22. " [22] ,GPIO_1 port A pin 22 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 21. " [21] ,GPIO_1 port A pin 21 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 20. " [20] ,GPIO_1 port A pin 20 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 19. " [19] ,GPIO_1 port A pin 19 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 18. " [18] ,GPIO_1 port A pin 18 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 17. " [17] ,GPIO_1 port A pin 17 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 16. " [16] ,GPIO_1 port A pin 16 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 15. " [15] ,GPIO_1 port A pin 15 interrupt mask" "Unmasked,Masked" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x04 14. " [14] ,GPIO_1 port A pin 14 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 13. " [13] ,GPIO_1 port A pin 13 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 12. " [12] ,GPIO_1 port A pin 12 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 11. " [11] ,GPIO_1 port A pin 11 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 10. " [10 ,GPIO_1 port A pin 10 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 9. " [9] ,GPIO_1 port A pin 9 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 8. " [8] ,GPIO_1 port A pin 8 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 7. " [7] ,GPIO_1 port A pin 7 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 6. " [6] ,GPIO_1 port A pin 6 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 5. " [5] ,GPIO_1 port A pin 5 interrupt mask" "Unmasked,Masked" endif textline " " bitfld.long 0x04 4. " [4] ,GPIO_1 port A pin 4 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 3. " [3] ,GPIO_1 port A pin 3 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 2. " [2] ,GPIO_1 port A pin 2 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 1. " [1] ,GPIO_1 port A pin 1 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 0. " [0] ,GPIO_1 port A pin 0 interrupt mask" "Unmasked,Masked" line.long 0x08 "RGPIO_INTTYPE_LEVEL,GPIO Port A Interrupt Level Register" bitfld.long 0x08 31. " BGPIO_INTTYPE_LEVELL_[31] ,GPIO_1 port A pin 31 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 30. " [30] ,GPIO_1 port A pin 30 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 29. " [29] ,GPIO_1 port A pin 29 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 28. " [28] ,GPIO_1 port A pin 28 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 27. " [27] ,GPIO_1 port A pin 27 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 26. " [26] ,GPIO_1 port A pin 26 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 25. " [25] ,GPIO_1 port A pin 25 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 24. " [24] ,GPIO_1 port A pin 24 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 23. " [23] ,GPIO_1 port A pin 23 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 22. " [22] ,GPIO_1 port A pin 22 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 21. " [21] ,GPIO_1 port A pin 21 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 20. " [20] ,GPIO_1 port A pin 20 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 19. " [19] ,GPIO_1 port A pin 19 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 18. " [18] ,GPIO_1 port A pin 18 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 17. " [17] ,GPIO_1 port A pin 17 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 16. " [16] ,GPIO_1 port A pin 16 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 15. " [15] ,GPIO_1 port A pin 15 interrupt type" "Level-sensitive,Edge-sensitive" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x08 14. " [14] ,GPIO_1 port A pin 14 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 13. " [13] ,GPIO_1 port A pin 13 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 12. " [12] ,GPIO_1 port A pin 12 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 11. " [11] ,GPIO_1 port A pin 11 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 10. " [10] ,GPIO_1 port A pin 10 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 9. " [9] ,GPIO_1 port A pin 9 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 8. " [8] ,GPIO_1 port A pin 8 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 7. " [7] ,GPIO_1 port A pin 7 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 6. " [6] ,GPIO_1 port A pin 6 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 5. " [5] ,GPIO_1 port A pin 5 interrupt type" "Level-sensitive,Edge-sensitive" endif textline " " bitfld.long 0x08 4. " [4] ,GPIO_1 port A pin 4 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 3. " [3] ,GPIO_1 port A pin 3 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 2. " [2] ,GPIO_1 port A pin 2 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 1. " [1] ,GPIO_1 port A pin 1 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 0. " [0] ,GPIO_1 port A pin 0 interrupt type" "Level-sensitive,Edge-sensitive" line.long 0x0C "RGPIO_INT_POLARITY,GPIO Port A Interrupt Polarity Register" bitfld.long 0x0C 31. " BGPIO_INT_POLARITY[31] , GPIO_1 port A pin 31 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 30. " [30] , GPIO_1 port A pin 30 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 29. " [29] , GPIO_1 port A pin 29 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 28. " [28] , GPIO_1 port A pin 28 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 27. " [27] , GPIO_1 port A pin 27 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 26. " [26] , GPIO_1 port A pin 26 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 25. " [25] , GPIO_1 port A pin 25 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 24. " [24] , GPIO_1 port A pin 24 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 23. " [23] , GPIO_1 port A pin 23 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 22. " [22] , GPIO_1 port A pin 22 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 21. " [21] , GPIO_1 port A pin 21 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 20. " [20] , GPIO_1 port A pin 20 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 19. " [19] , GPIO_1 port A pin 19 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 18. " [18] , GPIO_1 port A pin 18 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 17. " [17] , GPIO_1 port A pin 17 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 16. " [16] , GPIO_1 port A pin 16 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 15. " [15] , GPIO_1 port A pin 15 interrupt polarity" "Active-low,Active-high" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x0C 14. " [14] , GPIO_1 port A pin 14 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 13. " [13] , GPIO_1 port A pin 13 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 12. " [12] , GPIO_1 port A pin 12 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 11. " [11] , GPIO_1 port A pin 11 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 10. " [10] , GPIO_1 port A pin 10 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 9. " [9] , GPIO_1 port A pin 9 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 8. " [8] , GPIO_1 port A pin 8 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 7. " [7] , GPIO_1 port A pin 7 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 6. " [6] , GPIO_1 port A pin 6 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 5. " [5] , GPIO_1 port A pin 5 interrupt polarity" "Active-low,Active-high" endif textline " " bitfld.long 0x0C 4. " [4] , GPIO_1 port A pin 4 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 3. " [3] , GPIO_1 port A pin 3 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 2. " [2] , GPIO_1 port A pin 2 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 1. " [1] , GPIO_1 port A pin 1 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 0. " [0] , GPIO_1 port A pin 0 interrupt polarity" "Active-low,Active-high" rgroup.long 0x40++0x07 line.long 0x00 "RGPIO_INTSTATUS,GPIO Port A Interrupt Status" bitfld.long 0x00 31. " BGPIO_INTSTATUS_[31] ,GPIO_1 port A bit 31 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 30. " [30] ,GPIO_1 port A bit 30 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 29. " [29] ,GPIO_1 port A bit 29 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 28. " [28] ,GPIO_1 port A bit 28 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " [27] ,GPIO_1 port A bit 27 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " [26] ,GPIO_1 port A bit 26 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " [25] ,GPIO_1 port A bit 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " [24] ,GPIO_1 port A bit 24 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,GPIO_1 port A bit 23 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 22. " [22] ,GPIO_1 port A bit 22 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 21. " [21] ,GPIO_1 port A bit 21 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 20. " [20] ,GPIO_1 port A bit 20 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " [19] ,GPIO_1 port A bit 19 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " [18] ,GPIO_1 port A bit 18 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " [17] ,GPIO_1 port A bit 17 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " [16] ,GPIO_1 port A bit 16 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,GPIO_1 port A bit 15 interrupt status" "No interrupt,Interrupt" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 14. " [14] ,GPIO_1 port A bit 14 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " [13] ,GPIO_1 port A bit 13 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " [12] ,GPIO_1 port A bit 12 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " [11] ,GPIO_1 port A bit 11 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " [10] ,GPIO_1 port A bit 10 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " [9] ,GPIO_1 port A bit 9 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " [8] ,GPIO_1 port A bit 8 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,GPIO_1 port A bit 7 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " [6] ,GPIO_1 port A bit 6 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " [5] ,GPIO_1 port A bit 5 interrupt status" "No interrupt,Interrupt" endif textline " " bitfld.long 0x00 4. " [4] ,GPIO_1 port A bit 4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " [3] ,GPIO_1 port A bit 3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " [2] ,GPIO_1 port A bit 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " [1] ,GPIO_1 port A bit 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " [0] ,GPIO_1 port A bit 0 interrupt status" "No interrupt,Interrupt" line.long 0x04 "RGPIO_RAW_INTSTATUS,GPIO Port A Raw Interrupt Status" bitfld.long 0x04 31. " BGPIO_RAW_INTSTATUS_[31] ,GPIO_1 port A pin 31 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,GPIO_1 port A pin 30 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,GPIO_1 port A pin 29 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,GPIO_1 port A pin 28 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " [27] ,GPIO_1 port A pin 3 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,GPIO_1 port A pin 26 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,GPIO_1 port A pin 25 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 24. " [24] ,GPIO_1 port A pin 24 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " [23] ,GPIO_1 port A pin 23 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,GPIO_1 port A pin 22 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,GPIO_1 port A pin 21 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,GPIO_1 port A pin 20 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " [19] ,GPIO_1 port A pin 19 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,GPIO_1 port A pin 18 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 17. " [17] ,GPIO_1 port A pin 17 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,GPIO_1 port A pin 16 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " [15] ,GPIO_1 port A pin 15 raw interrupt status" "No interrupt,Interrupt" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x04 14. " [14] ,GPIO_1 port A pin 14 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,GPIO_1 port A pin 13 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,GPIO_1 port A pin 12 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " [11] ,GPIO_1 port A pin 11 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 10. " [10] ,GPIO_1 port A pin 10 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,GPIO_1 port A pin 9 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,GPIO_1 port A pin 8 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " [7] ,GPIO_1 port A pin 7 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,GPIO_1 port A pin 6 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,GPIO_1 port A pin 5 raw interrupt status" "No interrupt,Interrupt" endif textline " " bitfld.long 0x04 4. " [4] ,GPIO_1 port A pin 4 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,GPIO_1 port A pin 3 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,GPIO_1 port A pin 2 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,GPIO_1 port A pin 1 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,GPIO_1 port A pin 0 raw interrupt status" "No interrupt,Interrupt" wgroup.long 0x4C++0x03 line.long 0x00 "RGPIO_PORTA_EOI,GPIO Port A Clear Interrupt Register" bitfld.long 0x00 31. " BGPIO_PORTA_EOI_[31] ,GPIO_1 port A pin 31 clear interrupt" "Not clear,Clear" bitfld.long 0x00 30. " [30] ,GPIO_1 port A pin 30 clear interrupt" "Not clear,Clear" bitfld.long 0x00 29. " [29] ,GPIO_1 port A pin 29 clear interrupt" "Not clear,Clear" bitfld.long 0x00 28. " [28] ,GPIO_1 port A pin 28 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 27. " [27] ,GPIO_1 port A pin 27 clear interrupt" "Not clear,Clear" bitfld.long 0x00 26. " [26] ,GPIO_1 port A pin 26 clear interrupt" "Not clear,Clear" bitfld.long 0x00 25. " [25] ,GPIO_1 port A pin 25 clear interrupt" "Not clear,Clear" bitfld.long 0x00 24. " [24] ,GPIO_1 port A pin 24 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 23. " [23] ,GPIO_1 port A pin 23 clear interrupt" "Not clear,Clear" bitfld.long 0x00 22. " [22] ,GPIO_1 port A pin 22 clear interrupt" "Not clear,Clear" bitfld.long 0x00 21. " [21] ,GPIO_1 port A pin 21 clear interrupt" "Not clear,Clear" bitfld.long 0x00 20. " [20] ,GPIO_1 port A pin 20 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 19. " [19] ,GPIO_1 port A pin 19 clear interrupt" "Not clear,Clear" bitfld.long 0x00 18. " [18] ,GPIO_1 port A pin 18 clear interrupt" "Not clear,Clear" bitfld.long 0x00 17. " [17] ,GPIO_1 port A pin 17 clear interrupt" "Not clear,Clear" bitfld.long 0x00 16. " [16] ,GPIO_1 port A pin 16 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 15. " [15] ,GPIO_1 port A pin 15 clear interrupt" "Not clear,Clear" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 14. " [14] ,GPIO_1 port A pin 14 clear interrupt" "Not clear,Clear" bitfld.long 0x00 13. " [13] ,GPIO_1 port A pin 13 clear interrupt" "Not clear,Clear" bitfld.long 0x00 12. " [12] ,GPIO_1 port A pin 12 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 11. " [11] ,GPIO_1 port A pin 11 clear interrupt" "Not clear,Clear" bitfld.long 0x00 10. " [10] ,GPIO_1 port A pin 10 clear interrupt" "Not clear,Clear" bitfld.long 0x00 9. " [9] ,GPIO_1 port A pin 9 clear interrupt" "Not clear,Clear" bitfld.long 0x00 8. " [8] ,GPIO_1 port A pin 8 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 7. " [7] ,GPIO_1 port A pin 7 clear interrupt" "Not clear,Clear" bitfld.long 0x00 6. " [6] ,GPIO_1 port A pin 6 clear interrupt" "Not clear,Clear" bitfld.long 0x00 5. " [5] ,GPIO_1 port A pin 5 clear interrupt" "Not clear,Clear" endif textline " " bitfld.long 0x00 4. " [4] ,GPIO_1 port A pin 4 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 3. " [3] ,GPIO_1 port A pin 3 clear interrupt" "Not clear,Clear" bitfld.long 0x00 2. " [2] ,GPIO_1 port A pin 2 clear interrupt" "Not clear,Clear" bitfld.long 0x00 1. " [1] ,GPIO_1 port A pin 1 clear interrupt" "Not clear,Clear" bitfld.long 0x00 0. " [0] ,GPIO_1 port A pin 0 clear interrupt" "Not clear,Clear" rgroup.long 0x50++0x07 line.long 0x00 "RGPIO_EXT_PORTA,GPIO Port A Data Input Register" bitfld.long 0x00 31. " BGPIO_EXT_PORT_[31] ,GPIO_1 port A pin 31 data input" "Low,High" bitfld.long 0x00 30. " [30] ,GPIO_1 port A pin 30 data input" "Low,High" bitfld.long 0x00 29. " [29] ,GPIO_1 port A pin 29 data input" "Low,High" bitfld.long 0x00 28. " [28] ,GPIO_1 port A pin 28 data input" "Low,High" textline " " bitfld.long 0x00 27. " [27] ,GPIO_1 port A pin 27 data input" "Low,High" bitfld.long 0x00 26. " [26] ,GPIO_1 port A pin 26 data input" "Low,High" bitfld.long 0x00 25. " [25] ,GPIO_1 port A pin 25 data input" "Low,High" bitfld.long 0x00 24. " [24] ,GPIO_1 port A pin 24 data input" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,GPIO_1 port A pin 23 data input" "Low,High" bitfld.long 0x00 22. " [22] ,GPIO_1 port A pin 22 data input" "Low,High" bitfld.long 0x00 21. " [21] ,GPIO_1 port A pin 21 data input" "Low,High" bitfld.long 0x00 20. " [20] ,GPIO_1 port A pin 20 data input" "Low,High" textline " " bitfld.long 0x00 19. " [19] ,GPIO_1 port A pin 19 data input" "Low,High" bitfld.long 0x00 18. " [18] ,GPIO_1 port A pin 18 data input" "Low,High" bitfld.long 0x00 17. " [17] ,GPIO_1 port A pin 17 data input" "Low,High" bitfld.long 0x00 16. " [16] ,GPIO_1 port A pin 16 data input" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,GPIO_1 port A pin 15 data input" "Low,High" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 14. " [14] ,GPIO_1 port A pin 14 data input" "Low,High" bitfld.long 0x00 13. " [13] ,GPIO_1 port A pin 13 data input" "Low,High" bitfld.long 0x00 12. " [12] ,GPIO_1 port A pin 12 data input" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,GPIO_1 port A pin 11 data input" "Low,High" bitfld.long 0x00 10. " [10] ,GPIO_1 port A pin 10 data input" "Low,High" bitfld.long 0x00 9. " [9] ,GPIO_1 port A pin 9 data input" "Low,High" bitfld.long 0x00 8. " [8] ,GPIO_1 port A pin 8 data input" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,GPIO_1 port A pin 7 data input" "Low,High" bitfld.long 0x00 6. " [6] ,GPIO_1 port A pin 6 data input" "Low,High" bitfld.long 0x00 5. " [5] ,GPIO_1 port A pin 5 data input" "Low,High" endif textline " " bitfld.long 0x00 4. " [4] ,GPIO_1 port A pin 4 data input" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,GPIO_1 port A pin 3 data input" "Low,High" bitfld.long 0x00 2. " [2] ,GPIO_1 port A pin 2 data input" "Low,High" bitfld.long 0x00 1. " [1] ,GPIO_1 port A pin 1 data input" "Low,High" bitfld.long 0x00 0. " [0] ,GPIO_1 port A pin 0 data input" "Low,High" line.long 0x04 "RGPIO_EXT_PORTB,GPIO Port B Data Input Register" bitfld.long 0x04 31. " BGPIO_EXT_PORT_[31] ,GPIO_1 port B pin 31 data input" "0,1" bitfld.long 0x04 30. " [30] ,GPIO_1 port B pin 30 data input" "0,1" bitfld.long 0x04 29. " [29] ,GPIO_1 port B pin 29 data input" "0,1" bitfld.long 0x04 28. " [28] ,GPIO_1 port B pin 28 data input" "0,1" textline " " bitfld.long 0x04 27. " [27] ,GPIO_1 port B pin 27 data input" "0,1" bitfld.long 0x04 26. " [26] ,GPIO_1 port B pin 26 data input" "0,1" bitfld.long 0x04 25. " [25] ,GPIO_1 port B pin 25 data input" "0,1" bitfld.long 0x04 24. " [24] ,GPIO_1 port B pin 24 data input" "0,1" textline " " bitfld.long 0x04 23. " [23] ,GPIO_1 port B pin 23 data input" "0,1" bitfld.long 0x04 22. " [22] ,GPIO_1 port B pin 22 data input" "0,1" bitfld.long 0x04 21. " [21] ,GPIO_1 port B pin 21 data input" "0,1" sif !cpuis("R9A06G034-CM3") textline " " bitfld.long 0x04 20. " [20] ,GPIO_1 port B pin 20 data input" "0,1" bitfld.long 0x04 19. " [19] ,GPIO_1 port B pin 19 data input" "0,1" bitfld.long 0x04 18. " [18] ,GPIO_1 port B pin 18 data input" "0,1" bitfld.long 0x04 17. " [17] ,GPIO_1 port B pin 17 data input" "0,1" textline " " bitfld.long 0x04 16. " [16] ,GPIO_1 port B pin 16 data input" "0,1" bitfld.long 0x04 15. " [15] ,GPIO_1 port B pin 15 data input" "0,1" bitfld.long 0x04 14. " [14] ,GPIO_1 port B pin 14 data input" "0,1" bitfld.long 0x04 13. " [13] ,GPIO_1 port B pin 13 data input" "0,1" textline " " bitfld.long 0x04 12. " [12] ,GPIO_1 port B pin 12 data input" "0,1" bitfld.long 0x04 11. " [11] ,GPIO_1 port B pin 11 data input" "0,1" bitfld.long 0x04 10. " [10] ,GPIO_1 port B pin 10 data input" "0,1" bitfld.long 0x04 9. " [9] ,GPIO_1 port B pin 9 data input" "0,1" textline " " bitfld.long 0x04 8. " [8] ,GPIO_1 port B pin 8 data input" "0,1" bitfld.long 0x04 7. " [7] ,GPIO_1 port B pin 7 data input" "0,1" bitfld.long 0x04 6. " [6] ,GPIO_1 port B pin 6 data input" "0,1" bitfld.long 0x04 5. " [5] ,GPIO_1 port B pin 5 data input" "0,1" endif textline " " bitfld.long 0x04 4. " [4] ,GPIO_1 port B pin 4 data input" "0,1" textline " " bitfld.long 0x04 3. " [3] ,GPIO_1 port B pin 3 data input" "0,1" bitfld.long 0x04 2. " [2] ,GPIO_1 port B pin 2 data input" "0,1" bitfld.long 0x04 1. " [1] ,GPIO_1 port B pin 1 data input" "0,1" bitfld.long 0x04 0. " [0] ,GPIO_1 port B pin 0 data input" "0,1" group.long 0x60++0x03 line.long 0x00 "RGPIO_LS_SYNC,GPIO_1 port A Level-Sensitive Synchronization Enable Register" bitfld.long 0x00 0. " BGPIO_LS_SYNC , GPIO_1 port A level-sensitive synchronization enable" "Disabled,Enabled" width 0x0B tree.end tree "BGPIO2" base ad:0x5000C000 width 21. group.long 0x00++0x07 line.long 0x00 "RGPIO_SWPORTA_DR,GPIO Port A Data Output Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 31. " BGPIO_A_DR_[31] ,Data output GPIO_2 port A pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Data output GPIO_2 port A pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Data output GPIO_2 port A pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Data output GPIO_2 port A pin 28" "Low,High" textline " " else bitfld.long 0x00 28. " BGPIO_A_DR_[28] ,Data output GPIO_2 port A pin 28" "Low,High" textline " " endif bitfld.long 0x00 27. " [27] ,Data output GPIO_2 port A pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Data output GPIO_2 port A pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Data output GPIO_2 port A pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Data output GPIO_2 port A pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Data output GPIO_2 port A pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Data output GPIO_2 port A pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Data output GPIO_2 port A pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Data output GPIO_2 port A pin 20" "Low,High" textline " " bitfld.long 0x00 19. " [19] ,Data output GPIO_2 port A pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Data output GPIO_2 port A pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Data output GPIO_2 port A pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Data output GPIO_2 port A pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Data output GPIO_2 port A pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Data output GPIO_2 port A pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Data output GPIO_2 port A pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Data output GPIO_2 port A pin 12" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Data output GPIO_2 port A pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Data output GPIO_2 port A pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Data output GPIO_2 port A pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Data output GPIO_2 port A pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Data output GPIO_2 port A pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Data output GPIO_2 port A pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Data output GPIO_2 port A pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Data output GPIO_2 port A pin 4" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Data output GPIO_2 port A pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Data output GPIO_2 port A pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Data output GPIO_2 port A pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Data output GPIO_2 port A pin 0" "Low,High" line.long 0x04 "RGPIO_SWPORTA_DDR,GPIO Port A Data Direction Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 31. " BGPIO_A_DDR_[31] ,Data direction of GPIO_2 port A pin 31" "Input,Output" bitfld.long 0x04 30. " [30] ,Data direction of GPIO_2 port A pin 30" "Input,Output" bitfld.long 0x04 29. " [29] ,Data direction of GPIO_2 port A pin 29" "Input,Output" bitfld.long 0x04 28. " [28] ,Data direction of GPIO_2 port A pin 28" "Input,Output" textline " " else bitfld.long 0x04 28. " BGPIO_A_DDR_[28] ,Data direction of GPIO_2 port A pin 28" "Input,Output" textline " " endif bitfld.long 0x04 27. " [27] ,Data direction of GPIO_2 port A pin 27" "Input,Output" bitfld.long 0x04 26. " [26] ,Data direction of GPIO_2 port A pin 26" "Input,Output" bitfld.long 0x04 25. " [25] ,Data direction of GPIO_2 port A pin 25" "Input,Output" bitfld.long 0x04 24. " [24] ,Data direction of GPIO_2 port A pin 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,Data direction of GPIO_2 port A pin 23" "Input,Output" bitfld.long 0x04 22. " [22] ,Data direction of GPIO_2 port A pin 22" "Input,Output" bitfld.long 0x04 21. " [21] ,Data direction of GPIO_2 port A pin 21" "Input,Output" bitfld.long 0x04 20. " [20] ,Data direction of GPIO_2 port A pin 20" "Input,Output" textline " " bitfld.long 0x04 19. " [19] ,Data direction of GPIO_2 port A pin 19" "Input,Output" bitfld.long 0x04 18. " [18] ,Data direction of GPIO_2 port A pin 18" "Input,Output" bitfld.long 0x04 17. " [17] ,Data direction of GPIO_2 port A pin 17" "Input,Output" bitfld.long 0x04 16. " [16] ,Data direction of GPIO_2 port A pin 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,Data direction of GPIO_2 port A pin 15" "Input,Output" bitfld.long 0x04 14. " [14] ,Data direction of GPIO_2 port A pin 14" "Input,Output" bitfld.long 0x04 13. " [13] ,Data direction of GPIO_2 port A pin 13" "Input,Output" bitfld.long 0x04 12. " [12] ,Data direction of GPIO_2 port A pin 12" "Input,Output" textline " " bitfld.long 0x04 11. " [11] ,Data direction of GPIO_2 port A pin 11" "Input,Output" bitfld.long 0x04 10. " [10] ,Data direction of GPIO_2 port A pin 10" "Input,Output" bitfld.long 0x04 9. " [9] ,Data direction of GPIO_2 port A pin 9" "Input,Output" bitfld.long 0x04 8. " [8] ,Data direction of GPIO_2 port A pin 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,Data direction of GPIO_2 port A pin 7" "Input,Output" bitfld.long 0x04 6. " [6] ,Data direction of GPIO_2 port A pin 6" "Input,Output" bitfld.long 0x04 5. " [5] ,Data direction of GPIO_2 port A pin 5" "Input,Output" bitfld.long 0x04 4. " [4] ,Data direction of GPIO_2 port A pin 4" "Input,Output" textline " " bitfld.long 0x04 3. " [3] ,Data direction of GPIO_2 port A pin 3" "Input,Output" bitfld.long 0x04 2. " [2] ,Data direction of GPIO_2 port A pin 2" "Input,Output" bitfld.long 0x04 1. " [1] ,Data direction of GPIO_2 port A pin 1" "Input,Output" bitfld.long 0x04 0. " [0] ,Data direction of GPIO_2 port A pin 0" "Input,Output" group.long 0x0C++0x07 line.long 0x00 "RGPIO_SWPORTB_DR,GPIO Port B Data Output Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 31. " BGPIO_B_DR_[31] ,Data output GPIO_2 port B pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Data output GPIO_2 port B pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Data output GPIO_2 port B pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Data output GPIO_2 port B pin 28" "Low,High" textline " " bitfld.long 0x00 27. " [27] ,Data output GPIO_2 port B pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Data output GPIO_2 port B pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Data output GPIO_2 port B pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Data output GPIO_2 port B pin 24" "Low,High" textline " " else bitfld.long 0x00 25. " BGPIO_B_DR_[25] ,Data output GPIO_2 port B pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Data output GPIO_2 port B pin 24" "Low,High" textline " " endif bitfld.long 0x00 23. " [23] ,Data output GPIO_2 port B pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Data output GPIO_2 port B pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Data output GPIO_2 port B pin 21" "Low,High" textline " " bitfld.long 0x00 20. " [20] ,Data output GPIO_2 port B pin 20" "Low,High" bitfld.long 0x00 19. " [19] ,Data output GPIO_2 port B pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Data output GPIO_2 port B pin 18" "Low,High" textline " " bitfld.long 0x00 17. " [17] ,Data output GPIO_2 port B pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Data output GPIO_2 port B pin 16" "Low,High" bitfld.long 0x00 15. " [15] ,Data output GPIO_2 port B pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Data output GPIO_2 port B pin 14" "Low,High" textline " " bitfld.long 0x00 13. " [13] ,Data output GPIO_2 port B pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Data output GPIO_2 port B pin 12" "Low,High" bitfld.long 0x00 11. " [11] ,Data output GPIO_2 port B pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Data output GPIO_2 port B pin 10" "Low,High" textline " " bitfld.long 0x00 9. " [9] ,Data output GPIO_2 port B pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Data output GPIO_2 port B pin 8" "Low,High" bitfld.long 0x00 7. " [7] ,Data output GPIO_2 port B pin 7" "Low,High" textline " " bitfld.long 0x00 6. " [6] ,Data output GPIO_2 port B pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Data output GPIO_2 port B pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Data output GPIO_2 port B pin 4" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Data output GPIO_2 port B pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Data output GPIO_2 port B pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Data output GPIO_2 port B pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Data output GPIO_2 port B pin 0" "Low,High" line.long 0x04 "RGPIO_SWPORTB_DRR,GPIO Port B Data Direction Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 31. " BGPIO_B_DRR_[31] ,Data direction of GPIO_2 port B pin 31" "Input,Output" bitfld.long 0x04 30. " [30] ,Data direction of GPIO_2 port B pin 30" "Input,Output" bitfld.long 0x04 29. " [29] ,Data direction of GPIO_2 port B pin 29" "Input,Output" bitfld.long 0x04 28. " [28] ,Data direction of GPIO_2 port B pin 28" "Input,Output" textline " " bitfld.long 0x04 27. " [27] ,Data direction of GPIO_2 port B pin 27" "Input,Output" bitfld.long 0x04 26. " [26] ,Data direction of GPIO_2 port B pin 26" "Input,Output" bitfld.long 0x04 25. " [25] ,Data direction of GPIO_2 port B pin 25" "Input,Output" bitfld.long 0x04 24. " [24] ,Data direction of GPIO_2 port B pin 24" "Input,Output" textline " " else bitfld.long 0x04 25. " BGPIO_B_DRR_[25] ,Data direction of GPIO_2 port B pin 25" "Input,Output" bitfld.long 0x04 24. " [24] ,Data direction of GPIO_2 port B pin 24" "Input,Output" textline " " endif bitfld.long 0x04 23. " [23] ,Data direction of GPIO_2 port B pin 23" "Input,Output" bitfld.long 0x04 22. " [22] ,Data direction of GPIO_2 port B pin 22" "Input,Output" bitfld.long 0x04 21. " [21] ,Data direction of GPIO_2 port B pin 21" "Input,Output" textline " " bitfld.long 0x04 20. " [20] ,Data direction of GPIO_2 port B pin 20" "Input,Output" bitfld.long 0x04 19. " [19] ,Data direction of GPIO_2 port B pin 19" "Input,Output" bitfld.long 0x04 18. " [18] ,Data direction of GPIO_2 port B pin 18" "Input,Output" textline " " bitfld.long 0x04 17. " [17] ,Data direction of GPIO_2 port B pin 17" "Input,Output" bitfld.long 0x04 16. " [16] ,Data direction of GPIO_2 port B pin 16" "Input,Output" bitfld.long 0x04 15. " [15] ,Data direction of GPIO_2 port B pin 15" "Input,Output" bitfld.long 0x04 14. " [14] ,Data direction of GPIO_2 port B pin 14" "Input,Output" textline " " bitfld.long 0x04 13. " [13] ,Data direction of GPIO_2 port B pin 13" "Input,Output" bitfld.long 0x04 12. " [12] ,Data direction of GPIO_2 port B pin 12" "Input,Output" bitfld.long 0x04 11. " [11] ,Data direction of GPIO_2 port B pin 11" "Input,Output" bitfld.long 0x04 10. " [10] ,Data direction of GPIO_2 port B pin 10" "Input,Output" textline " " bitfld.long 0x04 9. " [9] ,Data direction of GPIO_2 port B pin 9" "Input,Output" bitfld.long 0x04 8. " [8] ,Data direction of GPIO_2 port B pin 8" "Input,Output" bitfld.long 0x04 7. " [7] ,Data direction of GPIO_2 port B pin 7" "Input,Output" textline " " bitfld.long 0x04 6. " [6] ,Data direction of GPIO_2 port B pin 6" "Input,Output" bitfld.long 0x04 5. " [5] ,Data direction of GPIO_2 port B pin 5" "Input,Output" bitfld.long 0x04 4. " [4] ,Data direction of GPIO_2 port B pin 4" "Input,Output" bitfld.long 0x04 3. " [3] ,Data direction of GPIO_2 port B pin 3" "Input,Output" textline " " bitfld.long 0x04 2. " [2] ,Data direction of GPIO_2 port B pin 2" "Input,Output" bitfld.long 0x04 1. " [1] ,Data direction of GPIO_2 port B pin 1" "Input,Output" bitfld.long 0x04 0. " [0] ,Data direction of GPIO_2 port B pin 0" "Input,Output" group.long 0x30++0x0F line.long 0x00 "RGPIO_INTEN,GPIO Port A Interrupt Enable Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 31. " BGPIO_INTEN_[31] ,GPIO_2 port A pin 31 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,GPIO_2 port A pin 30 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,GPIO_2 port A pin 29 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,GPIO_2 port A pin 28 interrupt enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 28. " BGPIO_INTEN_[28] ,GPIO_2 port A pin 28 interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " [27] ,GPIO_2 port A pin 27 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,GPIO_2 port A pin 26 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,GPIO_2 port A pin 25 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,GPIO_2 port A pin 24 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " [23] ,GPIO_2 port A pin 23 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,GPIO_2 port A pin 22 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,GPIO_2 port A pin 21 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,GPIO_2 port A pin 20 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,GPIO_2 port A pin 19 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,GPIO_2 port A pin 18 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,GPIO_2 port A pin 17 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,GPIO_2 port A pin 16 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " [15] ,GPIO_2 port A pin 15 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,GPIO_2 port A pin 14 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,GPIO_2 port A pin 13 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,GPIO_2 port A pin 12 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,GPIO_2 port A pin 11 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,GPIO_2 port A pin 10 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,GPIO_2 port A pin 9 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,GPIO_2 port A pin 8 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,GPIO_2 port A pin 7 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,GPIO_2 port A pin 6 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,GPIO_2 port A pin 5 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,GPIO_2 port A pin 4 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,GPIO_2 port A pin 3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,GPIO_2 port A pin 2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,GPIO_2 port A pin 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,GPIO_2 port A pin 0 interrupt enable" "Disabled,Enabled" line.long 0x04 "RGPIO_INTMASK,GPIO Port A Interrupt Mask Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 31. " BGPIO_INTMASK_[31] ,GPIO_2 port A pin 31 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 30. " [30] ,GPIO_2 port A pin 30 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 29. " [29] ,GPIO_2 port A pin 29 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 28. " [28] ,GPIO_2 port A pin 28 interrupt mask" "Unmasked,Masked" textline " " else bitfld.long 0x04 28. " BGPIO_INTMASK_[28] ,GPIO_2 port A pin 28 interrupt mask" "Unmasked,Masked" textline " " endif bitfld.long 0x04 27. " [27] ,GPIO_2 port A pin 27 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 26. " [26] ,GPIO_2 port A pin 26 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 25. " [25] ,GPIO_2 port A pin 25 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 24. " [24] ,GPIO_2 port A pin 24 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [23] ,GPIO_2 port A pin 23 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 22. " [22] ,GPIO_2 port A pin 22 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 21. " [21] ,GPIO_2 port A pin 21 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 20. " [20] ,GPIO_2 port A pin 20 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 19. " [19] ,GPIO_2 port A pin 19 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 18. " [18] ,GPIO_2 port A pin 18 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 17. " [17] ,GPIO_2 port A pin 17 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 16. " [16] ,GPIO_2 port A pin 16 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 15. " [15] ,GPIO_2 port A pin 15 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 14. " [14] ,GPIO_2 port A pin 14 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 13. " [13] ,GPIO_2 port A pin 13 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 12. " [12] ,GPIO_2 port A pin 12 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 11. " [11] ,GPIO_2 port A pin 11 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 10. " [10 ,GPIO_2 port A pin 10 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 9. " [9] ,GPIO_2 port A pin 9 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 8. " [8] ,GPIO_2 port A pin 8 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 7. " [7] ,GPIO_2 port A pin 7 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 6. " [6] ,GPIO_2 port A pin 6 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 5. " [5] ,GPIO_2 port A pin 5 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 4. " [4] ,GPIO_2 port A pin 4 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 3. " [3] ,GPIO_2 port A pin 3 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 2. " [2] ,GPIO_2 port A pin 2 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 1. " [1] ,GPIO_2 port A pin 1 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 0. " [0] ,GPIO_2 port A pin 0 interrupt mask" "Unmasked,Masked" line.long 0x08 "RGPIO_INTTYPE_LEVEL,GPIO Port A Interrupt Level Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x08 31. " BGPIO_INTTYPE_LEVELL_[31] ,GPIO_2 port A pin 31 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 30. " [30] ,GPIO_2 port A pin 30 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 29. " [29] ,GPIO_2 port A pin 29 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 28. " [28] ,GPIO_2 port A pin 28 interrupt type" "Level-sensitive,Edge-sensitive" textline " " else bitfld.long 0x08 28. " BGPIO_INTTYPE_LEVELL_[28] ,GPIO_2 port A pin 28 interrupt type" "Level-sensitive,Edge-sensitive" textline " " endif bitfld.long 0x08 27. " [27] ,GPIO_2 port A pin 27 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 26. " [26] ,GPIO_2 port A pin 26 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 25. " [25] ,GPIO_2 port A pin 25 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 24. " [24] ,GPIO_2 port A pin 24 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 23. " [23] ,GPIO_2 port A pin 23 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 22. " [22] ,GPIO_2 port A pin 22 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 21. " [21] ,GPIO_2 port A pin 21 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 20. " [20] ,GPIO_2 port A pin 20 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 19. " [19] ,GPIO_2 port A pin 19 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 18. " [18] ,GPIO_2 port A pin 18 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 17. " [17] ,GPIO_2 port A pin 17 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 16. " [16] ,GPIO_2 port A pin 16 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 15. " [15] ,GPIO_2 port A pin 15 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 14. " [14] ,GPIO_2 port A pin 14 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 13. " [13] ,GPIO_2 port A pin 13 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 12. " [12] ,GPIO_2 port A pin 12 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 11. " [11] ,GPIO_2 port A pin 11 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 10. " [10] ,GPIO_2 port A pin 10 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 9. " [9] ,GPIO_2 port A pin 9 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 8. " [8] ,GPIO_2 port A pin 8 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 7. " [7] ,GPIO_2 port A pin 7 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 6. " [6] ,GPIO_2 port A pin 6 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 5. " [5] ,GPIO_2 port A pin 5 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 4. " [4] ,GPIO_2 port A pin 4 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 3. " [3] ,GPIO_2 port A pin 3 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 2. " [2] ,GPIO_2 port A pin 2 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 1. " [1] ,GPIO_2 port A pin 1 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 0. " [0] ,GPIO_2 port A pin 0 interrupt type" "Level-sensitive,Edge-sensitive" line.long 0x0C "RGPIO_INT_POLARITY,GPIO Port A Interrupt Polarity Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x0C 31. " BGPIO_INT_POLARITY[31] , GPIO_2 port A pin 31 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 30. " [30] , GPIO_2 port A pin 30 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 29. " [29] , GPIO_2 port A pin 29 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 28. " [28] , GPIO_2 port A pin 28 interrupt polarity" "Active-low,Active-high" textline " " else bitfld.long 0x0C 28. " BGPIO_INT_POLARITY[28] , GPIO_2 port A pin 28 interrupt polarity" "Active-low,Active-high" textline " " endif bitfld.long 0x0C 27. " [27] , GPIO_2 port A pin 27 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 26. " [26] , GPIO_2 port A pin 26 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 25. " [25] , GPIO_2 port A pin 25 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 24. " [24] , GPIO_2 port A pin 24 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 23. " [23] , GPIO_2 port A pin 23 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 22. " [22] , GPIO_2 port A pin 22 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 21. " [21] , GPIO_2 port A pin 21 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 20. " [20] , GPIO_2 port A pin 20 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 19. " [19] , GPIO_2 port A pin 19 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 18. " [18] , GPIO_2 port A pin 18 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 17. " [17] , GPIO_2 port A pin 17 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 16. " [16] , GPIO_2 port A pin 16 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 15. " [15] , GPIO_2 port A pin 15 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 14. " [14] , GPIO_2 port A pin 14 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 13. " [13] , GPIO_2 port A pin 13 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 12. " [12] , GPIO_2 port A pin 12 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 11. " [11] , GPIO_2 port A pin 11 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 10. " [10] , GPIO_2 port A pin 10 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 9. " [9] , GPIO_2 port A pin 9 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 8. " [8] , GPIO_2 port A pin 8 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 7. " [7] , GPIO_2 port A pin 7 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 6. " [6] , GPIO_2 port A pin 6 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 5. " [5] , GPIO_2 port A pin 5 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 4. " [4] , GPIO_2 port A pin 4 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 3. " [3] , GPIO_2 port A pin 3 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 2. " [2] , GPIO_2 port A pin 2 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 1. " [1] , GPIO_2 port A pin 1 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 0. " [0] , GPIO_2 port A pin 0 interrupt polarity" "Active-low,Active-high" rgroup.long 0x40++0x07 line.long 0x00 "RGPIO_INTSTATUS,GPIO Port A Interrupt Status" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 31. " BGPIO_INTSTATUS_[31] ,GPIO_2 port A bit 31 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 30. " [30] ,GPIO_2 port A bit 30 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 29. " [29] ,GPIO_2 port A bit 29 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 28. " [28] ,GPIO_2 port A bit 28 interrupt status" "No interrupt,Interrupt" textline " " else bitfld.long 0x00 28. " BGPIO_INTSTATUS_[28] ,GPIO_2 port A bit 28 interrupt status" "No interrupt,Interrupt" textline " " endif bitfld.long 0x00 27. " [27] ,GPIO_2 port A bit 27 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " [26] ,GPIO_2 port A bit 26 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " [25] ,GPIO_2 port A bit 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " [24] ,GPIO_2 port A bit 24 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,GPIO_2 port A bit 23 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 22. " [22] ,GPIO_2 port A bit 22 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 21. " [21] ,GPIO_2 port A bit 21 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 20. " [20] ,GPIO_2 port A bit 20 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " [19] ,GPIO_2 port A bit 19 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " [18] ,GPIO_2 port A bit 18 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " [17] ,GPIO_2 port A bit 17 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " [16] ,GPIO_2 port A bit 16 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,GPIO_2 port A bit 15 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 14. " [14] ,GPIO_2 port A bit 14 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " [13] ,GPIO_2 port A bit 13 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " [12] ,GPIO_2 port A bit 12 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " [11] ,GPIO_2 port A bit 11 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " [10] ,GPIO_2 port A bit 10 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " [9] ,GPIO_2 port A bit 9 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " [8] ,GPIO_2 port A bit 8 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,GPIO_2 port A bit 7 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " [6] ,GPIO_2 port A bit 6 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " [5] ,GPIO_2 port A bit 5 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " [4] ,GPIO_2 port A bit 4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " [3] ,GPIO_2 port A bit 3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " [2] ,GPIO_2 port A bit 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " [1] ,GPIO_2 port A bit 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " [0] ,GPIO_2 port A bit 0 interrupt status" "No interrupt,Interrupt" line.long 0x04 "RGPIO_RAW_INTSTATUS,GPIO Port A Raw Interrupt Status" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 31. " BGPIO_RAW_INTSTATUS_[31] ,GPIO_2 port A pin 31 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,GPIO_2 port A pin 30 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,GPIO_2 port A pin 29 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,GPIO_2 port A pin 28 raw interrupt status" "No interrupt,Interrupt" textline " " else bitfld.long 0x04 28. " BGPIO_RAW_INTSTATUS_[28] ,GPIO_2 port A pin 28 raw interrupt status" "No interrupt,Interrupt" textline " " endif bitfld.long 0x04 27. " [27] ,GPIO_2 port A pin 3 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,GPIO_2 port A pin 26 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,GPIO_2 port A pin 25 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 24. " [24] ,GPIO_2 port A pin 24 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " [23] ,GPIO_2 port A pin 23 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,GPIO_2 port A pin 22 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,GPIO_2 port A pin 21 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,GPIO_2 port A pin 20 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " [19] ,GPIO_2 port A pin 19 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,GPIO_2 port A pin 18 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 17. " [17] ,GPIO_2 port A pin 17 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,GPIO_2 port A pin 16 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " [15] ,GPIO_2 port A pin 15 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,GPIO_2 port A pin 14 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,GPIO_2 port A pin 13 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,GPIO_2 port A pin 12 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " [11] ,GPIO_2 port A pin 11 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 10. " [10] ,GPIO_2 port A pin 10 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,GPIO_2 port A pin 9 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,GPIO_2 port A pin 8 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " [7] ,GPIO_2 port A pin 7 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,GPIO_2 port A pin 6 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,GPIO_2 port A pin 5 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,GPIO_2 port A pin 4 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,GPIO_2 port A pin 3 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,GPIO_2 port A pin 2 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,GPIO_2 port A pin 1 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,GPIO_2 port A pin 0 raw interrupt status" "No interrupt,Interrupt" wgroup.long 0x4C++0x03 line.long 0x00 "RGPIO_PORTA_EOI,GPIO Port A Clear Interrupt Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 31. " BGPIO_PORTA_EOI_[31] ,GPIO_2 port A pin 31 clear interrupt" "Not clear,Clear" bitfld.long 0x00 30. " [30] ,GPIO_2 port A pin 30 clear interrupt" "Not clear,Clear" bitfld.long 0x00 29. " [29] ,GPIO_2 port A pin 29 clear interrupt" "Not clear,Clear" bitfld.long 0x00 28. " [28] ,GPIO_2 port A pin 28 clear interrupt" "Not clear,Clear" textline " " else bitfld.long 0x00 28. " BGPIO_PORTA_EOI_[28] ,GPIO_2 port A pin 28 clear interrupt" "Not clear,Clear" textline " " endif bitfld.long 0x00 27. " [27] ,GPIO_2 port A pin 27 clear interrupt" "Not clear,Clear" bitfld.long 0x00 26. " [26] ,GPIO_2 port A pin 26 clear interrupt" "Not clear,Clear" bitfld.long 0x00 25. " [25] ,GPIO_2 port A pin 25 clear interrupt" "Not clear,Clear" bitfld.long 0x00 24. " [24] ,GPIO_2 port A pin 24 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 23. " [23] ,GPIO_2 port A pin 23 clear interrupt" "Not clear,Clear" bitfld.long 0x00 22. " [22] ,GPIO_2 port A pin 22 clear interrupt" "Not clear,Clear" bitfld.long 0x00 21. " [21] ,GPIO_2 port A pin 21 clear interrupt" "Not clear,Clear" bitfld.long 0x00 20. " [20] ,GPIO_2 port A pin 20 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 19. " [19] ,GPIO_2 port A pin 19 clear interrupt" "Not clear,Clear" bitfld.long 0x00 18. " [18] ,GPIO_2 port A pin 18 clear interrupt" "Not clear,Clear" bitfld.long 0x00 17. " [17] ,GPIO_2 port A pin 17 clear interrupt" "Not clear,Clear" bitfld.long 0x00 16. " [16] ,GPIO_2 port A pin 16 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 15. " [15] ,GPIO_2 port A pin 15 clear interrupt" "Not clear,Clear" bitfld.long 0x00 14. " [14] ,GPIO_2 port A pin 14 clear interrupt" "Not clear,Clear" bitfld.long 0x00 13. " [13] ,GPIO_2 port A pin 13 clear interrupt" "Not clear,Clear" bitfld.long 0x00 12. " [12] ,GPIO_2 port A pin 12 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 11. " [11] ,GPIO_2 port A pin 11 clear interrupt" "Not clear,Clear" bitfld.long 0x00 10. " [10] ,GPIO_2 port A pin 10 clear interrupt" "Not clear,Clear" bitfld.long 0x00 9. " [9] ,GPIO_2 port A pin 9 clear interrupt" "Not clear,Clear" bitfld.long 0x00 8. " [8] ,GPIO_2 port A pin 8 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 7. " [7] ,GPIO_2 port A pin 7 clear interrupt" "Not clear,Clear" bitfld.long 0x00 6. " [6] ,GPIO_2 port A pin 6 clear interrupt" "Not clear,Clear" bitfld.long 0x00 5. " [5] ,GPIO_2 port A pin 5 clear interrupt" "Not clear,Clear" bitfld.long 0x00 4. " [4] ,GPIO_2 port A pin 4 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 3. " [3] ,GPIO_2 port A pin 3 clear interrupt" "Not clear,Clear" bitfld.long 0x00 2. " [2] ,GPIO_2 port A pin 2 clear interrupt" "Not clear,Clear" bitfld.long 0x00 1. " [1] ,GPIO_2 port A pin 1 clear interrupt" "Not clear,Clear" bitfld.long 0x00 0. " [0] ,GPIO_2 port A pin 0 clear interrupt" "Not clear,Clear" rgroup.long 0x50++0x07 line.long 0x00 "RGPIO_EXT_PORTA,GPIO Port A Data Input Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 31. " BGPIO_EXT_PORT_[31] ,GPIO_2 port A pin 31 data input" "Low,High" bitfld.long 0x00 30. " [30] ,GPIO_2 port A pin 30 data input" "Low,High" bitfld.long 0x00 29. " [29] ,GPIO_2 port A pin 29 data input" "Low,High" bitfld.long 0x00 28. " [28] ,GPIO_2 port A pin 28 data input" "Low,High" textline " " else bitfld.long 0x00 28. " BGPIO_EXT_PORT_[28] ,GPIO_2 port A pin 28 data input" "Low,High" textline " " endif bitfld.long 0x00 27. " [27] ,GPIO_2 port A pin 27 data input" "Low,High" bitfld.long 0x00 26. " [26] ,GPIO_2 port A pin 26 data input" "Low,High" bitfld.long 0x00 25. " [25] ,GPIO_2 port A pin 25 data input" "Low,High" bitfld.long 0x00 24. " [24] ,GPIO_2 port A pin 24 data input" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,GPIO_2 port A pin 23 data input" "Low,High" bitfld.long 0x00 22. " [22] ,GPIO_2 port A pin 22 data input" "Low,High" bitfld.long 0x00 21. " [21] ,GPIO_2 port A pin 21 data input" "Low,High" bitfld.long 0x00 20. " [20] ,GPIO_2 port A pin 20 data input" "Low,High" textline " " bitfld.long 0x00 19. " [19] ,GPIO_2 port A pin 19 data input" "Low,High" bitfld.long 0x00 18. " [18] ,GPIO_2 port A pin 18 data input" "Low,High" bitfld.long 0x00 17. " [17] ,GPIO_2 port A pin 17 data input" "Low,High" bitfld.long 0x00 16. " [16] ,GPIO_2 port A pin 16 data input" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,GPIO_2 port A pin 15 data input" "Low,High" bitfld.long 0x00 14. " [14] ,GPIO_2 port A pin 14 data input" "Low,High" bitfld.long 0x00 13. " [13] ,GPIO_2 port A pin 13 data input" "Low,High" bitfld.long 0x00 12. " [12] ,GPIO_2 port A pin 12 data input" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,GPIO_2 port A pin 11 data input" "Low,High" bitfld.long 0x00 10. " [10] ,GPIO_2 port A pin 10 data input" "Low,High" bitfld.long 0x00 9. " [9] ,GPIO_2 port A pin 9 data input" "Low,High" bitfld.long 0x00 8. " [8] ,GPIO_2 port A pin 8 data input" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,GPIO_2 port A pin 7 data input" "Low,High" bitfld.long 0x00 6. " [6] ,GPIO_2 port A pin 6 data input" "Low,High" bitfld.long 0x00 5. " [5] ,GPIO_2 port A pin 5 data input" "Low,High" bitfld.long 0x00 4. " [4] ,GPIO_2 port A pin 4 data input" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,GPIO_2 port A pin 3 data input" "Low,High" bitfld.long 0x00 2. " [2] ,GPIO_2 port A pin 2 data input" "Low,High" bitfld.long 0x00 1. " [1] ,GPIO_2 port A pin 1 data input" "Low,High" bitfld.long 0x00 0. " [0] ,GPIO_2 port A pin 0 data input" "Low,High" line.long 0x04 "RGPIO_EXT_PORTB,GPIO Port B Data Input Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 31. " BGPIO_EXT_PORT_[31] ,GPIO_2 port B pin 31 data input" "0,1" bitfld.long 0x04 30. " [30] ,GPIO_2 port B pin 30 data input" "0,1" bitfld.long 0x04 29. " [29] ,GPIO_2 port B pin 29 data input" "0,1" bitfld.long 0x04 28. " [28] ,GPIO_2 port B pin 28 data input" "0,1" textline " " bitfld.long 0x04 27. " [27] ,GPIO_2 port B pin 27 data input" "0,1" bitfld.long 0x04 26. " [26] ,GPIO_2 port B pin 26 data input" "0,1" bitfld.long 0x04 25. " [25] ,GPIO_2 port B pin 25 data input" "0,1" bitfld.long 0x04 24. " [24] ,GPIO_2 port B pin 24 data input" "0,1" textline " " else bitfld.long 0x04 25. " BGPIO_EXT_PORT_[25] ,GPIO_2 port B pin 25 data input" "0,1" bitfld.long 0x04 24. " [24] ,GPIO_2 port B pin 24 data input" "0,1" textline " " endif bitfld.long 0x04 23. " [23] ,GPIO_2 port B pin 23 data input" "0,1" bitfld.long 0x04 22. " [22] ,GPIO_2 port B pin 22 data input" "0,1" bitfld.long 0x04 21. " [21] ,GPIO_2 port B pin 21 data input" "0,1" textline " " bitfld.long 0x04 20. " [20] ,GPIO_2 port B pin 20 data input" "0,1" bitfld.long 0x04 19. " [19] ,GPIO_2 port B pin 19 data input" "0,1" bitfld.long 0x04 18. " [18] ,GPIO_2 port B pin 18 data input" "0,1" textline " " bitfld.long 0x04 17. " [17] ,GPIO_2 port B pin 17 data input" "0,1" bitfld.long 0x04 16. " [16] ,GPIO_2 port B pin 16 data input" "0,1" bitfld.long 0x04 15. " [15] ,GPIO_2 port B pin 15 data input" "0,1" bitfld.long 0x04 14. " [14] ,GPIO_2 port B pin 14 data input" "0,1" textline " " bitfld.long 0x04 13. " [13] ,GPIO_2 port B pin 13 data input" "0,1" bitfld.long 0x04 12. " [12] ,GPIO_2 port B pin 12 data input" "0,1" bitfld.long 0x04 11. " [11] ,GPIO_2 port B pin 11 data input" "0,1" bitfld.long 0x04 10. " [10] ,GPIO_2 port B pin 10 data input" "0,1" textline " " bitfld.long 0x04 9. " [9] ,GPIO_2 port B pin 9 data input" "0,1" bitfld.long 0x04 8. " [8] ,GPIO_2 port B pin 8 data input" "0,1" bitfld.long 0x04 7. " [7] ,GPIO_2 port B pin 7 data input" "0,1" textline " " bitfld.long 0x04 6. " [6] ,GPIO_2 port B pin 6 data input" "0,1" bitfld.long 0x04 5. " [5] ,GPIO_2 port B pin 5 data input" "0,1" bitfld.long 0x04 4. " [4] ,GPIO_2 port B pin 4 data input" "0,1" bitfld.long 0x04 3. " [3] ,GPIO_2 port B pin 3 data input" "0,1" textline " " bitfld.long 0x04 2. " [2] ,GPIO_2 port B pin 2 data input" "0,1" bitfld.long 0x04 1. " [1] ,GPIO_2 port B pin 1 data input" "0,1" bitfld.long 0x04 0. " [0] ,GPIO_2 port B pin 0 data input" "0,1" group.long 0x60++0x03 line.long 0x00 "RGPIO_LS_SYNC,GPIO_2 port A Level-Sensitive Synchronization Enable Register" bitfld.long 0x00 0. " BGPIO_LS_SYNC , GPIO_2 port A level-sensitive synchronization enable" "Disabled,Enabled" width 0x0B tree.end sif (CPU()!="R9A06G034-CM3") tree "BGPIO3" base ad:0x5000D000 width 21. group.long 0x00++0x07 line.long 0x00 "RGPIO_SWPORTA_DR,GPIO Port A Data Output Register" bitfld.long 0x00 31. " BGPIO_A_DR_[31] ,Data output GPIO_3 port A pin 31" "Low,High" bitfld.long 0x00 30. " [30] ,Data output GPIO_3 port A pin 30" "Low,High" bitfld.long 0x00 29. " [29] ,Data output GPIO_3 port A pin 29" "Low,High" bitfld.long 0x00 28. " [28] ,Data output GPIO_3 port A pin 28" "Low,High" textline " " bitfld.long 0x00 27. " [27] ,Data output GPIO_3 port A pin 27" "Low,High" bitfld.long 0x00 26. " [26] ,Data output GPIO_3 port A pin 26" "Low,High" bitfld.long 0x00 25. " [25] ,Data output GPIO_3 port A pin 25" "Low,High" bitfld.long 0x00 24. " [24] ,Data output GPIO_3 port A pin 24" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,Data output GPIO_3 port A pin 23" "Low,High" bitfld.long 0x00 22. " [22] ,Data output GPIO_3 port A pin 22" "Low,High" bitfld.long 0x00 21. " [21] ,Data output GPIO_3 port A pin 21" "Low,High" bitfld.long 0x00 20. " [20] ,Data output GPIO_3 port A pin 20" "Low,High" textline " " bitfld.long 0x00 19. " [19] ,Data output GPIO_3 port A pin 19" "Low,High" bitfld.long 0x00 18. " [18] ,Data output GPIO_3 port A pin 18" "Low,High" bitfld.long 0x00 17. " [17] ,Data output GPIO_3 port A pin 17" "Low,High" bitfld.long 0x00 16. " [16] ,Data output GPIO_3 port A pin 16" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,Data output GPIO_3 port A pin 15" "Low,High" bitfld.long 0x00 14. " [14] ,Data output GPIO_3 port A pin 14" "Low,High" bitfld.long 0x00 13. " [13] ,Data output GPIO_3 port A pin 13" "Low,High" bitfld.long 0x00 12. " [12] ,Data output GPIO_3 port A pin 12" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,Data output GPIO_3 port A pin 11" "Low,High" bitfld.long 0x00 10. " [10] ,Data output GPIO_3 port A pin 10" "Low,High" bitfld.long 0x00 9. " [9] ,Data output GPIO_3 port A pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Data output GPIO_3 port A pin 8" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,Data output GPIO_3 port A pin 7" "Low,High" bitfld.long 0x00 6. " [6] ,Data output GPIO_3 port A pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Data output GPIO_3 port A pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Data output GPIO_3 port A pin 4" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Data output GPIO_3 port A pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Data output GPIO_3 port A pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Data output GPIO_3 port A pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Data output GPIO_3 port A pin 0" "Low,High" line.long 0x04 "RGPIO_SWPORTA_DDR,GPIO Port A Data Direction Register" bitfld.long 0x04 31. " BGPIO_A_DDR_[31] ,Data direction of GPIO_3 port A pin 31" "Input,Output" bitfld.long 0x04 30. " [30] ,Data direction of GPIO_3 port A pin 30" "Input,Output" bitfld.long 0x04 29. " [29] ,Data direction of GPIO_3 port A pin 29" "Input,Output" bitfld.long 0x04 28. " [28] ,Data direction of GPIO_3 port A pin 28" "Input,Output" textline " " bitfld.long 0x04 27. " [27] ,Data direction of GPIO_3 port A pin 27" "Input,Output" bitfld.long 0x04 26. " [26] ,Data direction of GPIO_3 port A pin 26" "Input,Output" bitfld.long 0x04 25. " [25] ,Data direction of GPIO_3 port A pin 25" "Input,Output" bitfld.long 0x04 24. " [24] ,Data direction of GPIO_3 port A pin 24" "Input,Output" textline " " bitfld.long 0x04 23. " [23] ,Data direction of GPIO_3 port A pin 23" "Input,Output" bitfld.long 0x04 22. " [22] ,Data direction of GPIO_3 port A pin 22" "Input,Output" bitfld.long 0x04 21. " [21] ,Data direction of GPIO_3 port A pin 21" "Input,Output" bitfld.long 0x04 20. " [20] ,Data direction of GPIO_3 port A pin 20" "Input,Output" textline " " bitfld.long 0x04 19. " [19] ,Data direction of GPIO_3 port A pin 19" "Input,Output" bitfld.long 0x04 18. " [18] ,Data direction of GPIO_3 port A pin 18" "Input,Output" bitfld.long 0x04 17. " [17] ,Data direction of GPIO_3 port A pin 17" "Input,Output" bitfld.long 0x04 16. " [16] ,Data direction of GPIO_3 port A pin 16" "Input,Output" textline " " bitfld.long 0x04 15. " [15] ,Data direction of GPIO_3 port A pin 15" "Input,Output" bitfld.long 0x04 14. " [14] ,Data direction of GPIO_3 port A pin 14" "Input,Output" bitfld.long 0x04 13. " [13] ,Data direction of GPIO_3 port A pin 13" "Input,Output" bitfld.long 0x04 12. " [12] ,Data direction of GPIO_3 port A pin 12" "Input,Output" textline " " bitfld.long 0x04 11. " [11] ,Data direction of GPIO_3 port A pin 11" "Input,Output" bitfld.long 0x04 10. " [10] ,Data direction of GPIO_3 port A pin 10" "Input,Output" bitfld.long 0x04 9. " [9] ,Data direction of GPIO_3 port A pin 9" "Input,Output" bitfld.long 0x04 8. " [8] ,Data direction of GPIO_3 port A pin 8" "Input,Output" textline " " bitfld.long 0x04 7. " [7] ,Data direction of GPIO_3 port A pin 7" "Input,Output" bitfld.long 0x04 6. " [6] ,Data direction of GPIO_3 port A pin 6" "Input,Output" bitfld.long 0x04 5. " [5] ,Data direction of GPIO_3 port A pin 5" "Input,Output" bitfld.long 0x04 4. " [4] ,Data direction of GPIO_3 port A pin 4" "Input,Output" textline " " bitfld.long 0x04 3. " [3] ,Data direction of GPIO_3 port A pin 3" "Input,Output" bitfld.long 0x04 2. " [2] ,Data direction of GPIO_3 port A pin 2" "Input,Output" bitfld.long 0x04 1. " [1] ,Data direction of GPIO_3 port A pin 1" "Input,Output" bitfld.long 0x04 0. " [0] ,Data direction of GPIO_3 port A pin 0" "Input,Output" sif cpuis("R9A06G032*") group.long 0x0C++0x07 line.long 0x00 "RGPIO_SWPORTB_DR,GPIO Port B Data Output Register" bitfld.long 0x00 9. " BGPIO_B_DR_[9] ,Data output GPIO_3 port B pin 9" "Low,High" bitfld.long 0x00 8. " [8] ,Data output GPIO_3 port B pin 8" "Low,High" bitfld.long 0x00 7. " [7] ,Data output GPIO_3 port B pin 7" "Low,High" textline " " bitfld.long 0x00 6. " [6] ,Data output GPIO_3 port B pin 6" "Low,High" bitfld.long 0x00 5. " [5] ,Data output GPIO_3 port B pin 5" "Low,High" bitfld.long 0x00 4. " [4] ,Data output GPIO_3 port B pin 4" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,Data output GPIO_3 port B pin 3" "Low,High" bitfld.long 0x00 2. " [2] ,Data output GPIO_3 port B pin 2" "Low,High" bitfld.long 0x00 1. " [1] ,Data output GPIO_3 port B pin 1" "Low,High" bitfld.long 0x00 0. " [0] ,Data output GPIO_3 port B pin 0" "Low,High" line.long 0x04 "RGPIO_SWPORTB_DRR,GPIO Port B Data Direction Register" bitfld.long 0x04 9. " BGPIO_B_DRR_[9] ,Data direction of GPIO_3 port B pin 9" "Input,Output" bitfld.long 0x04 8. " [8] ,Data direction of GPIO_3 port B pin 8" "Input,Output" bitfld.long 0x04 7. " [7] ,Data direction of GPIO_3 port B pin 7" "Input,Output" textline " " bitfld.long 0x04 6. " [6] ,Data direction of GPIO_3 port B pin 6" "Input,Output" bitfld.long 0x04 5. " [5] ,Data direction of GPIO_3 port B pin 5" "Input,Output" bitfld.long 0x04 4. " [4] ,Data direction of GPIO_3 port B pin 4" "Input,Output" bitfld.long 0x04 3. " [3] ,Data direction of GPIO_3 port B pin 3" "Input,Output" textline " " bitfld.long 0x04 2. " [2] ,Data direction of GPIO_3 port B pin 2" "Input,Output" bitfld.long 0x04 1. " [1] ,Data direction of GPIO_3 port B pin 1" "Input,Output" bitfld.long 0x04 0. " [0] ,Data direction of GPIO_3 port B pin 0" "Input,Output" endif group.long 0x30++0x0F line.long 0x00 "RGPIO_INTEN,GPIO Port A Interrupt Enable Register" bitfld.long 0x00 31. " BGPIO_INTEN_[31] ,GPIO_3 port A pin 31 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 30. " [30] ,GPIO_3 port A pin 30 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 29. " [29] ,GPIO_3 port A pin 29 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " [28] ,GPIO_3 port A pin 28 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " [27] ,GPIO_3 port A pin 27 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " [26] ,GPIO_3 port A pin 26 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " [25] ,GPIO_3 port A pin 25 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " [24] ,GPIO_3 port A pin 24 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " [23] ,GPIO_3 port A pin 23 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 22. " [22] ,GPIO_3 port A pin 22 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 21. " [21] ,GPIO_3 port A pin 21 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " [20] ,GPIO_3 port A pin 20 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " [19] ,GPIO_3 port A pin 19 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 18. " [18] ,GPIO_3 port A pin 18 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " [17] ,GPIO_3 port A pin 17 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 16. " [16] ,GPIO_3 port A pin 16 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " [15] ,GPIO_3 port A pin 15 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,GPIO_3 port A pin 14 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,GPIO_3 port A pin 13 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,GPIO_3 port A pin 12 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,GPIO_3 port A pin 11 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,GPIO_3 port A pin 10 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,GPIO_3 port A pin 9 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,GPIO_3 port A pin 8 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,GPIO_3 port A pin 7 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,GPIO_3 port A pin 6 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,GPIO_3 port A pin 5 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,GPIO_3 port A pin 4 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,GPIO_3 port A pin 3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,GPIO_3 port A pin 2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,GPIO_3 port A pin 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,GPIO_3 port A pin 0 interrupt enable" "Disabled,Enabled" line.long 0x04 "RGPIO_INTMASK,GPIO Port A Interrupt Mask Register" bitfld.long 0x04 31. " BGPIO_INTMASK_[31] ,GPIO_3 port A pin 31 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 30. " [30] ,GPIO_3 port A pin 30 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 29. " [29] ,GPIO_3 port A pin 29 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 28. " [28] ,GPIO_3 port A pin 28 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [27] ,GPIO_3 port A pin 27 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 26. " [26] ,GPIO_3 port A pin 26 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 25. " [25] ,GPIO_3 port A pin 25 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 24. " [24] ,GPIO_3 port A pin 24 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [23] ,GPIO_3 port A pin 23 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 22. " [22] ,GPIO_3 port A pin 22 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 21. " [21] ,GPIO_3 port A pin 21 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 20. " [20] ,GPIO_3 port A pin 20 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 19. " [19] ,GPIO_3 port A pin 19 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 18. " [18] ,GPIO_3 port A pin 18 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 17. " [17] ,GPIO_3 port A pin 17 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 16. " [16] ,GPIO_3 port A pin 16 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 15. " [15] ,GPIO_3 port A pin 15 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 14. " [14] ,GPIO_3 port A pin 14 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 13. " [13] ,GPIO_3 port A pin 13 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 12. " [12] ,GPIO_3 port A pin 12 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 11. " [11] ,GPIO_3 port A pin 11 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 10. " [10 ,GPIO_3 port A pin 10 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 9. " [9] ,GPIO_3 port A pin 9 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 8. " [8] ,GPIO_3 port A pin 8 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 7. " [7] ,GPIO_3 port A pin 7 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 6. " [6] ,GPIO_3 port A pin 6 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 5. " [5] ,GPIO_3 port A pin 5 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 4. " [4] ,GPIO_3 port A pin 4 interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 3. " [3] ,GPIO_3 port A pin 3 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 2. " [2] ,GPIO_3 port A pin 2 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 1. " [1] ,GPIO_3 port A pin 1 interrupt mask" "Unmasked,Masked" bitfld.long 0x04 0. " [0] ,GPIO_3 port A pin 0 interrupt mask" "Unmasked,Masked" line.long 0x08 "RGPIO_INTTYPE_LEVEL,GPIO Port A Interrupt Level Register" bitfld.long 0x08 31. " BGPIO_INTTYPE_LEVELL_[31] ,GPIO_3 port A pin 31 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 30. " [30] ,GPIO_3 port A pin 30 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 29. " [29] ,GPIO_3 port A pin 29 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 28. " [28] ,GPIO_3 port A pin 28 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 27. " [27] ,GPIO_3 port A pin 27 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 26. " [26] ,GPIO_3 port A pin 26 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 25. " [25] ,GPIO_3 port A pin 25 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 24. " [24] ,GPIO_3 port A pin 24 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 23. " [23] ,GPIO_3 port A pin 23 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 22. " [22] ,GPIO_3 port A pin 22 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 21. " [21] ,GPIO_3 port A pin 21 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 20. " [20] ,GPIO_3 port A pin 20 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 19. " [19] ,GPIO_3 port A pin 19 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 18. " [18] ,GPIO_3 port A pin 18 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 17. " [17] ,GPIO_3 port A pin 17 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 16. " [16] ,GPIO_3 port A pin 16 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 15. " [15] ,GPIO_3 port A pin 15 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 14. " [14] ,GPIO_3 port A pin 14 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 13. " [13] ,GPIO_3 port A pin 13 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 12. " [12] ,GPIO_3 port A pin 12 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 11. " [11] ,GPIO_3 port A pin 11 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 10. " [10] ,GPIO_3 port A pin 10 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 9. " [9] ,GPIO_3 port A pin 9 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 8. " [8] ,GPIO_3 port A pin 8 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 7. " [7] ,GPIO_3 port A pin 7 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 6. " [6] ,GPIO_3 port A pin 6 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 5. " [5] ,GPIO_3 port A pin 5 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 4. " [4] ,GPIO_3 port A pin 4 interrupt type" "Level-sensitive,Edge-sensitive" textline " " bitfld.long 0x08 3. " [3] ,GPIO_3 port A pin 3 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 2. " [2] ,GPIO_3 port A pin 2 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 1. " [1] ,GPIO_3 port A pin 1 interrupt type" "Level-sensitive,Edge-sensitive" bitfld.long 0x08 0. " [0] ,GPIO_3 port A pin 0 interrupt type" "Level-sensitive,Edge-sensitive" line.long 0x0C "RGPIO_INT_POLARITY,GPIO Port A Interrupt Polarity Register" bitfld.long 0x0C 31. " BGPIO_INT_POLARITY[31] , GPIO_3 port A pin 31 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 30. " [30] , GPIO_3 port A pin 30 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 29. " [29] , GPIO_3 port A pin 29 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 28. " [28] , GPIO_3 port A pin 28 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 27. " [27] , GPIO_3 port A pin 27 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 26. " [26] , GPIO_3 port A pin 26 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 25. " [25] , GPIO_3 port A pin 25 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 24. " [24] , GPIO_3 port A pin 24 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 23. " [23] , GPIO_3 port A pin 23 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 22. " [22] , GPIO_3 port A pin 22 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 21. " [21] , GPIO_3 port A pin 21 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 20. " [20] , GPIO_3 port A pin 20 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 19. " [19] , GPIO_3 port A pin 19 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 18. " [18] , GPIO_3 port A pin 18 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 17. " [17] , GPIO_3 port A pin 17 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 16. " [16] , GPIO_3 port A pin 16 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 15. " [15] , GPIO_3 port A pin 15 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 14. " [14] , GPIO_3 port A pin 14 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 13. " [13] , GPIO_3 port A pin 13 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 12. " [12] , GPIO_3 port A pin 12 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 11. " [11] , GPIO_3 port A pin 11 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 10. " [10] , GPIO_3 port A pin 10 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 9. " [9] , GPIO_3 port A pin 9 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 8. " [8] , GPIO_3 port A pin 8 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 7. " [7] , GPIO_3 port A pin 7 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 6. " [6] , GPIO_3 port A pin 6 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 5. " [5] , GPIO_3 port A pin 5 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 4. " [4] , GPIO_3 port A pin 4 interrupt polarity" "Active-low,Active-high" textline " " bitfld.long 0x0C 3. " [3] , GPIO_3 port A pin 3 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 2. " [2] , GPIO_3 port A pin 2 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 1. " [1] , GPIO_3 port A pin 1 interrupt polarity" "Active-low,Active-high" bitfld.long 0x0C 0. " [0] , GPIO_3 port A pin 0 interrupt polarity" "Active-low,Active-high" rgroup.long 0x40++0x07 line.long 0x00 "RGPIO_INTSTATUS,GPIO Port A Interrupt Status" bitfld.long 0x00 31. " BGPIO_INTSTATUS_[31] ,GPIO_3 port A bit 31 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 30. " [30] ,GPIO_3 port A bit 30 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 29. " [29] ,GPIO_3 port A bit 29 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 28. " [28] ,GPIO_3 port A bit 28 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 27. " [27] ,GPIO_3 port A bit 27 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 26. " [26] ,GPIO_3 port A bit 26 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 25. " [25] ,GPIO_3 port A bit 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " [24] ,GPIO_3 port A bit 24 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 23. " [23] ,GPIO_3 port A bit 23 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 22. " [22] ,GPIO_3 port A bit 22 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 21. " [21] ,GPIO_3 port A bit 21 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 20. " [20] ,GPIO_3 port A bit 20 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " [19] ,GPIO_3 port A bit 19 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " [18] ,GPIO_3 port A bit 18 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " [17] ,GPIO_3 port A bit 17 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 16. " [16] ,GPIO_3 port A bit 16 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " [15] ,GPIO_3 port A bit 15 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 14. " [14] ,GPIO_3 port A bit 14 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " [13] ,GPIO_3 port A bit 13 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " [12] ,GPIO_3 port A bit 12 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " [11] ,GPIO_3 port A bit 11 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " [10] ,GPIO_3 port A bit 10 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " [9] ,GPIO_3 port A bit 9 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " [8] ,GPIO_3 port A bit 8 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,GPIO_3 port A bit 7 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " [6] ,GPIO_3 port A bit 6 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " [5] ,GPIO_3 port A bit 5 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " [4] ,GPIO_3 port A bit 4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " [3] ,GPIO_3 port A bit 3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " [2] ,GPIO_3 port A bit 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " [1] ,GPIO_3 port A bit 1 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " [0] ,GPIO_3 port A bit 0 interrupt status" "No interrupt,Interrupt" line.long 0x04 "RGPIO_RAW_INTSTATUS,GPIO Port A Raw Interrupt Status" bitfld.long 0x04 31. " BGPIO_RAW_INTSTATUS_[31] ,GPIO_3 port A pin 31 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 30. " [30] ,GPIO_3 port A pin 30 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 29. " [29] ,GPIO_3 port A pin 29 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 28. " [28] ,GPIO_3 port A pin 28 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " [27] ,GPIO_3 port A pin 3 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 26. " [26] ,GPIO_3 port A pin 26 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 25. " [25] ,GPIO_3 port A pin 25 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 24. " [24] ,GPIO_3 port A pin 24 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 23. " [23] ,GPIO_3 port A pin 23 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,GPIO_3 port A pin 22 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,GPIO_3 port A pin 21 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 20. " [20] ,GPIO_3 port A pin 20 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " [19] ,GPIO_3 port A pin 19 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,GPIO_3 port A pin 18 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 17. " [17] ,GPIO_3 port A pin 17 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,GPIO_3 port A pin 16 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 15. " [15] ,GPIO_3 port A pin 15 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,GPIO_3 port A pin 14 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,GPIO_3 port A pin 13 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,GPIO_3 port A pin 12 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " [11] ,GPIO_3 port A pin 11 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 10. " [10] ,GPIO_3 port A pin 10 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,GPIO_3 port A pin 9 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,GPIO_3 port A pin 8 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " [7] ,GPIO_3 port A pin 7 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,GPIO_3 port A pin 6 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,GPIO_3 port A pin 5 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,GPIO_3 port A pin 4 raw interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,GPIO_3 port A pin 3 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,GPIO_3 port A pin 2 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,GPIO_3 port A pin 1 raw interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,GPIO_3 port A pin 0 raw interrupt status" "No interrupt,Interrupt" wgroup.long 0x4C++0x03 line.long 0x00 "RGPIO_PORTA_EOI,GPIO Port A Clear Interrupt Register" bitfld.long 0x00 31. " BGPIO_PORTA_EOI_[31] ,GPIO_3 port A pin 31 clear interrupt" "Not clear,Clear" bitfld.long 0x00 30. " [30] ,GPIO_3 port A pin 30 clear interrupt" "Not clear,Clear" bitfld.long 0x00 29. " [29] ,GPIO_3 port A pin 29 clear interrupt" "Not clear,Clear" bitfld.long 0x00 28. " [28] ,GPIO_3 port A pin 28 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 27. " [27] ,GPIO_3 port A pin 27 clear interrupt" "Not clear,Clear" bitfld.long 0x00 26. " [26] ,GPIO_3 port A pin 26 clear interrupt" "Not clear,Clear" bitfld.long 0x00 25. " [25] ,GPIO_3 port A pin 25 clear interrupt" "Not clear,Clear" bitfld.long 0x00 24. " [24] ,GPIO_3 port A pin 24 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 23. " [23] ,GPIO_3 port A pin 23 clear interrupt" "Not clear,Clear" bitfld.long 0x00 22. " [22] ,GPIO_3 port A pin 22 clear interrupt" "Not clear,Clear" bitfld.long 0x00 21. " [21] ,GPIO_3 port A pin 21 clear interrupt" "Not clear,Clear" bitfld.long 0x00 20. " [20] ,GPIO_3 port A pin 20 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 19. " [19] ,GPIO_3 port A pin 19 clear interrupt" "Not clear,Clear" bitfld.long 0x00 18. " [18] ,GPIO_3 port A pin 18 clear interrupt" "Not clear,Clear" bitfld.long 0x00 17. " [17] ,GPIO_3 port A pin 17 clear interrupt" "Not clear,Clear" bitfld.long 0x00 16. " [16] ,GPIO_3 port A pin 16 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 15. " [15] ,GPIO_3 port A pin 15 clear interrupt" "Not clear,Clear" bitfld.long 0x00 14. " [14] ,GPIO_3 port A pin 14 clear interrupt" "Not clear,Clear" bitfld.long 0x00 13. " [13] ,GPIO_3 port A pin 13 clear interrupt" "Not clear,Clear" bitfld.long 0x00 12. " [12] ,GPIO_3 port A pin 12 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 11. " [11] ,GPIO_3 port A pin 11 clear interrupt" "Not clear,Clear" bitfld.long 0x00 10. " [10] ,GPIO_3 port A pin 10 clear interrupt" "Not clear,Clear" bitfld.long 0x00 9. " [9] ,GPIO_3 port A pin 9 clear interrupt" "Not clear,Clear" bitfld.long 0x00 8. " [8] ,GPIO_3 port A pin 8 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 7. " [7] ,GPIO_3 port A pin 7 clear interrupt" "Not clear,Clear" bitfld.long 0x00 6. " [6] ,GPIO_3 port A pin 6 clear interrupt" "Not clear,Clear" bitfld.long 0x00 5. " [5] ,GPIO_3 port A pin 5 clear interrupt" "Not clear,Clear" bitfld.long 0x00 4. " [4] ,GPIO_3 port A pin 4 clear interrupt" "Not clear,Clear" textline " " bitfld.long 0x00 3. " [3] ,GPIO_3 port A pin 3 clear interrupt" "Not clear,Clear" bitfld.long 0x00 2. " [2] ,GPIO_3 port A pin 2 clear interrupt" "Not clear,Clear" bitfld.long 0x00 1. " [1] ,GPIO_3 port A pin 1 clear interrupt" "Not clear,Clear" bitfld.long 0x00 0. " [0] ,GPIO_3 port A pin 0 clear interrupt" "Not clear,Clear" rgroup.long 0x50++0x03 line.long 0x00 "RGPIO_EXT_PORTA,GPIO Port A Data Input Register" bitfld.long 0x00 31. " BGPIO_EXT_PORT_[31] ,GPIO_3 port A pin 31 data input" "Low,High" bitfld.long 0x00 30. " [30] ,GPIO_3 port A pin 30 data input" "Low,High" bitfld.long 0x00 29. " [29] ,GPIO_3 port A pin 29 data input" "Low,High" bitfld.long 0x00 28. " [28] ,GPIO_3 port A pin 28 data input" "Low,High" textline " " bitfld.long 0x00 27. " [27] ,GPIO_3 port A pin 27 data input" "Low,High" bitfld.long 0x00 26. " [26] ,GPIO_3 port A pin 26 data input" "Low,High" bitfld.long 0x00 25. " [25] ,GPIO_3 port A pin 25 data input" "Low,High" bitfld.long 0x00 24. " [24] ,GPIO_3 port A pin 24 data input" "Low,High" textline " " bitfld.long 0x00 23. " [23] ,GPIO_3 port A pin 23 data input" "Low,High" bitfld.long 0x00 22. " [22] ,GPIO_3 port A pin 22 data input" "Low,High" bitfld.long 0x00 21. " [21] ,GPIO_3 port A pin 21 data input" "Low,High" bitfld.long 0x00 20. " [20] ,GPIO_3 port A pin 20 data input" "Low,High" textline " " bitfld.long 0x00 19. " [19] ,GPIO_3 port A pin 19 data input" "Low,High" bitfld.long 0x00 18. " [18] ,GPIO_3 port A pin 18 data input" "Low,High" bitfld.long 0x00 17. " [17] ,GPIO_3 port A pin 17 data input" "Low,High" bitfld.long 0x00 16. " [16] ,GPIO_3 port A pin 16 data input" "Low,High" textline " " bitfld.long 0x00 15. " [15] ,GPIO_3 port A pin 15 data input" "Low,High" bitfld.long 0x00 14. " [14] ,GPIO_3 port A pin 14 data input" "Low,High" bitfld.long 0x00 13. " [13] ,GPIO_3 port A pin 13 data input" "Low,High" bitfld.long 0x00 12. " [12] ,GPIO_3 port A pin 12 data input" "Low,High" textline " " bitfld.long 0x00 11. " [11] ,GPIO_3 port A pin 11 data input" "Low,High" bitfld.long 0x00 10. " [10] ,GPIO_3 port A pin 10 data input" "Low,High" bitfld.long 0x00 9. " [9] ,GPIO_3 port A pin 9 data input" "Low,High" bitfld.long 0x00 8. " [8] ,GPIO_3 port A pin 8 data input" "Low,High" textline " " bitfld.long 0x00 7. " [7] ,GPIO_3 port A pin 7 data input" "Low,High" bitfld.long 0x00 6. " [6] ,GPIO_3 port A pin 6 data input" "Low,High" bitfld.long 0x00 5. " [5] ,GPIO_3 port A pin 5 data input" "Low,High" bitfld.long 0x00 4. " [4] ,GPIO_3 port A pin 4 data input" "Low,High" textline " " bitfld.long 0x00 3. " [3] ,GPIO_3 port A pin 3 data input" "Low,High" bitfld.long 0x00 2. " [2] ,GPIO_3 port A pin 2 data input" "Low,High" bitfld.long 0x00 1. " [1] ,GPIO_3 port A pin 1 data input" "Low,High" bitfld.long 0x00 0. " [0] ,GPIO_3 port A pin 0 data input" "Low,High" sif cpuis("R9A06G032-*") rgroup.long 0x54++0x03 line.long 0x00 "RGPIO_EXT_PORTB,GPIO Port B Data Input Register" bitfld.long 0x00 9. " BGPIO_EXT_PORT_[9] ,GPIO_3 port B pin 9 data input" "0,1" bitfld.long 0x00 8. " [8] ,GPIO_3 port B pin 8 data input" "0,1" bitfld.long 0x00 7. " [7] ,GPIO_3 port B pin 7 data input" "0,1" textline " " bitfld.long 0x00 6. " [6] ,GPIO_3 port B pin 6 data input" "0,1" bitfld.long 0x00 5. " [5] ,GPIO_3 port B pin 5 data input" "0,1" bitfld.long 0x00 4. " [4] ,GPIO_3 port B pin 4 data input" "0,1" bitfld.long 0x00 3. " [3] ,GPIO_3 port B pin 3 data input" "0,1" textline " " bitfld.long 0x00 2. " [2] ,GPIO_3 port B pin 2 data input" "0,1" bitfld.long 0x00 1. " [1] ,GPIO_3 port B pin 1 data input" "0,1" bitfld.long 0x00 0. " [0] ,GPIO_3 port B pin 0 data input" "0,1" endif group.long 0x60++0x03 line.long 0x00 "RGPIO_LS_SYNC,GPIO_3 port A Level-Sensitive Synchronization Enable Register" bitfld.long 0x00 0. " BGPIO_LS_SYNC , GPIO_3 port A level-sensitive synchronization enable" "Disabled,Enabled" width 0x0B tree.end endif tree.end tree.open "Timer Block" tree "TIMER1" base ad:0x51001000 width 26. group.long 0x0++0x03 line.long 0x00 "RTIMERLOADCOUNT_0,Preset Value Of Sub-timer0" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0x0+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_0,Current Value Of Sub-timer0" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0x20++0x03 line.long 0x00 "RTIMERLOADCOUNT_1,Preset Value Of Sub-timer1" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0x20+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_1,Current Value Of Sub-timer1" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0x40++0x03 line.long 0x00 "RTIMERLOADCOUNT_2,Preset Value Of Sub-timer2" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0x40+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_2,Current Value Of Sub-timer2" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0x60++0x03 line.long 0x00 "RTIMERLOADCOUNT_3,Preset Value Of Sub-timer3" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0x60+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_3,Current Value Of Sub-timer3" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0x80++0x03 line.long 0x00 "RTIMERLOADCOUNT_4,Preset Value Of Sub-timer4" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0x80+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_4,Current Value Of Sub-timer4" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0xA0++0x03 line.long 0x00 "RTIMERLOADCOUNT_5,Preset Value Of Sub-timer5" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0xA0+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_5,Current Value Of Sub-timer5" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0xC0++0x03 line.long 0x00 "RTIMERLOADCOUNT_6,Preset Value Of Sub-timer6" rgroup.long (0xC0+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_6,Current Value Of Sub-timer6" group.long 0xE0++0x03 line.long 0x00 "RTIMERLOADCOUNT_7,Preset Value Of Sub-timer7" rgroup.long (0xE0+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_7,Current Value Of Sub-timer7" group.long 0x8++0x03 line.long 0x00 "RTIMERCONTROL_0,Control Mode Of Sub-timer0" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0x8+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_0,Clears The Interruption Of Sub-timer0" in newline rgroup.long (0x8+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_0,Interruption Status Before Masking Of Sub-timer0" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int0" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_0,Interruption Status After Masking Of Sub-timer 0" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int0" "Not active,Active" group.long 0x28++0x03 line.long 0x00 "RTIMERCONTROL_1,Control Mode Of Sub-timer1" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0x28+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_1,Clears The Interruption Of Sub-timer1" in newline rgroup.long (0x28+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_1,Interruption Status Before Masking Of Sub-timer1" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int1" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_1,Interruption Status After Masking Of Sub-timer 1" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int1" "Not active,Active" group.long 0x48++0x03 line.long 0x00 "RTIMERCONTROL_2,Control Mode Of Sub-timer2" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0x48+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_2,Clears The Interruption Of Sub-timer2" in newline rgroup.long (0x48+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_2,Interruption Status Before Masking Of Sub-timer2" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int2" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_2,Interruption Status After Masking Of Sub-timer 2" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int2" "Not active,Active" group.long 0x68++0x03 line.long 0x00 "RTIMERCONTROL_3,Control Mode Of Sub-timer3" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0x68+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_3,Clears The Interruption Of Sub-timer3" in newline rgroup.long (0x68+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_3,Interruption Status Before Masking Of Sub-timer3" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int3" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_3,Interruption Status After Masking Of Sub-timer 3" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int3" "Not active,Active" group.long 0x88++0x03 line.long 0x00 "RTIMERCONTROL_4,Control Mode Of Sub-timer4" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0x88+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_4,Clears The Interruption Of Sub-timer4" in newline rgroup.long (0x88+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_4,Interruption Status Before Masking Of Sub-timer4" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int4" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_4,Interruption Status After Masking Of Sub-timer 4" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int4" "Not active,Active" group.long 0xA8++0x03 line.long 0x00 "RTIMERCONTROL_5,Control Mode Of Sub-timer5" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0xA8+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_5,Clears The Interruption Of Sub-timer5" in newline rgroup.long (0xA8+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_5,Interruption Status Before Masking Of Sub-timer5" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int5" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_5,Interruption Status After Masking Of Sub-timer 5" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int5" "Not active,Active" group.long 0xC8++0x03 line.long 0x00 "RTIMERCONTROL_6,Control Mode Of Sub-timer6" bitfld.long 0x00 4. " BTIMERDMAENABLE ,DMA channel enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0xC8+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_6,Clears The Interruption Of Sub-timer6" in newline rgroup.long (0xC8+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_6,Interruption Status Before Masking Of Sub-timer6" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int6" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_6,Interruption Status After Masking Of Sub-timer 6" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int6" "Not active,Active" group.long 0xE8++0x03 line.long 0x00 "RTIMERCONTROL_7,Control Mode Of Sub-timer7" bitfld.long 0x00 4. " BTIMERDMAENABLE ,DMA channel enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0xE8+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_7,Clears The Interruption Of Sub-timer7" in newline rgroup.long (0xE8+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_7,Interruption Status Before Masking Of Sub-timer7" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int7" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_7,Interruption Status After Masking Of Sub-timer 7" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int7" "Not active,Active" hgroup.long 0x100++0x03 hide.long 0x00 "RTIMERALLCLEARINT,Clear All Interrupt" in newline rgroup.long 0x104++0x0F line.long 0x00 "RTIMERALLSTATUSINT0,All Interrupts Status Before Masking" bitfld.long 0x00 7. " BTIMERALLSTATUSINT[7] ,Interruption status before masking of all Sub-timer 7" "Not active,Active" bitfld.long 0x00 6. " [6] ,Interruption status before masking of all Sub-timer 6" "Not active,Active" textline " " bitfld.long 0x00 5. " [5] ,Interruption status before masking of all Sub-timer 5" "Not active,Active" bitfld.long 0x00 4. " [4] ,Interruption status before masking of all Sub-timer 4" "Not active,Active" textline " " bitfld.long 0x00 3. " [3] ,Interruption status before masking of all Sub-timer 3" "Not active,Active" bitfld.long 0x00 2. " [2} ,Interruption status before masking of all Sub-timer 2" "Not active,Active" textline " " bitfld.long 0x00 1. " [1] ,Interruption status before masking of all Sub-timer 1" "Not active,Active" bitfld.long 0x00 0. " [0] ,Interruption status before masking of all Sub-timer 0" "Not active,Active" line.long 0x04 "RTIMERALLSTATUSINT1,All Interrupts Status After Masking" bitfld.long 0x04 7. " BTIMERALLSTATUSINT[7] ,Interruption status after masking of all Sub-timer 7" "Not active,Active" bitfld.long 0x04 6. " [6] ,Interruption status after masking of all Sub-timer 6" "Not active,Active" textline " " bitfld.long 0x04 5. " [5] ,Interruption status after masking of all Sub-timer 5" "Not active,Active" bitfld.long 0x04 4. " [4] ,Interruption status after masking of all Sub-timer 4" "Not active,Active" textline " " bitfld.long 0x04 3. " [3] ,Interruption status after masking of all Sub-timer 3" "Not active,Active" bitfld.long 0x04 2. " [2] ,Interruption status after masking of all Sub-timer 2" "Not active,Active" textline " " bitfld.long 0x04 1. " [1] ,Interruption status after masking of all Sub-timer 1" "Not active,Active" bitfld.long 0x04 0. " [0] ,Interruption status after masking of all Sub-timer 0" "Not active,Active" line.long 0x08 "RTIMER_DMA_PENDING,TIMER DMA Requests Status" bitfld.long 0x08 7. " BTIMER_DMA_RUNNING_7 ,DMA running status of Sub-timer7" "Not running,Running" bitfld.long 0x08 6. " BTIMER_DMA_RUNNING_6 ,DMA running status of Sub-timer6" "Not running,Running" line.long 0x0C "RTIMER_DMA_PENDINGOVF,TIMER DMA Overflow Status" bitfld.long 0x0C 7. " BTIMER_DMA_RUNNINGOVF_7 ,Overflow with TIMER DMA is running on DMA requests of Sub-timer7" "No overflow,Overflow" bitfld.long 0x0C 6. " BTIMER_DMA_RUNNINGOVF_6 ,Overflow with TIMER DMA is running on DMA requests of Sub-timer6" "No overflow,Overflow" group.long 0x114++0x03 line.long 0x00 "RTIMER_DMA_PENDINGCLROVF,TIMER DMA Overflow Clear" bitfld.long 0x00 7. " BTIMER_DMA_RUNNINGCLROVF_7 ,Clear overflow with TIMER DMA is running on DMA requests of Sub-timer7" "No action,Clear" bitfld.long 0x00 6. " BTIMER_DMA_RUNNINGCLROVF_6 ,Clear overflow with TIMER DMA is running on DMA requests of Sub-timer6" "No action,Clear" width 0x0B tree.end tree "TIMER2" base ad:0x51002000 width 26. group.long 0x0++0x03 line.long 0x00 "RTIMERLOADCOUNT_0,Preset Value Of Sub-timer0" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0x0+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_0,Current Value Of Sub-timer0" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0x20++0x03 line.long 0x00 "RTIMERLOADCOUNT_1,Preset Value Of Sub-timer1" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0x20+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_1,Current Value Of Sub-timer1" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0x40++0x03 line.long 0x00 "RTIMERLOADCOUNT_2,Preset Value Of Sub-timer2" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0x40+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_2,Current Value Of Sub-timer2" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0x60++0x03 line.long 0x00 "RTIMERLOADCOUNT_3,Preset Value Of Sub-timer3" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0x60+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_3,Current Value Of Sub-timer3" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0x80++0x03 line.long 0x00 "RTIMERLOADCOUNT_4,Preset Value Of Sub-timer4" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0x80+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_4,Current Value Of Sub-timer4" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0xA0++0x03 line.long 0x00 "RTIMERLOADCOUNT_5,Preset Value Of Sub-timer5" hexmask.long.word 0x00 0.--15. 1. " BTIMERLOADCOUNT ,Preset value" rgroup.long (0xA0+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_5,Current Value Of Sub-timer5" hexmask.long.word 0x00 0.--15. 1. " BTIMERCURRENTCOUNT ,Current value of timer" group.long 0xC0++0x03 line.long 0x00 "RTIMERLOADCOUNT_6,Preset Value Of Sub-timer6" rgroup.long (0xC0+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_6,Current Value Of Sub-timer6" group.long 0xE0++0x03 line.long 0x00 "RTIMERLOADCOUNT_7,Preset Value Of Sub-timer7" rgroup.long (0xE0+0x04)++0x03 line.long 0x00 "RTIMERCURRENTCOUNT_7,Current Value Of Sub-timer7" group.long 0x8++0x03 line.long 0x00 "RTIMERCONTROL_0,Control Mode Of Sub-timer0" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0x8+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_0,Clears The Interruption Of Sub-timer0" in newline rgroup.long (0x8+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_0,Interruption Status Before Masking Of Sub-timer0" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int0" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_0,Interruption Status After Masking Of Sub-timer 0" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int0" "Not active,Active" group.long 0x28++0x03 line.long 0x00 "RTIMERCONTROL_1,Control Mode Of Sub-timer1" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0x28+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_1,Clears The Interruption Of Sub-timer1" in newline rgroup.long (0x28+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_1,Interruption Status Before Masking Of Sub-timer1" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int1" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_1,Interruption Status After Masking Of Sub-timer 1" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int1" "Not active,Active" group.long 0x48++0x03 line.long 0x00 "RTIMERCONTROL_2,Control Mode Of Sub-timer2" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0x48+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_2,Clears The Interruption Of Sub-timer2" in newline rgroup.long (0x48+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_2,Interruption Status Before Masking Of Sub-timer2" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int2" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_2,Interruption Status After Masking Of Sub-timer 2" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int2" "Not active,Active" group.long 0x68++0x03 line.long 0x00 "RTIMERCONTROL_3,Control Mode Of Sub-timer3" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0x68+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_3,Clears The Interruption Of Sub-timer3" in newline rgroup.long (0x68+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_3,Interruption Status Before Masking Of Sub-timer3" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int3" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_3,Interruption Status After Masking Of Sub-timer 3" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int3" "Not active,Active" group.long 0x88++0x03 line.long 0x00 "RTIMERCONTROL_4,Control Mode Of Sub-timer4" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0x88+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_4,Clears The Interruption Of Sub-timer4" in newline rgroup.long (0x88+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_4,Interruption Status Before Masking Of Sub-timer4" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int4" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_4,Interruption Status After Masking Of Sub-timer 4" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int4" "Not active,Active" group.long 0xA8++0x03 line.long 0x00 "RTIMERCONTROL_5,Control Mode Of Sub-timer5" bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0xA8+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_5,Clears The Interruption Of Sub-timer5" in newline rgroup.long (0xA8+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_5,Interruption Status Before Masking Of Sub-timer5" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int5" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_5,Interruption Status After Masking Of Sub-timer 5" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int5" "Not active,Active" group.long 0xC8++0x03 line.long 0x00 "RTIMERCONTROL_6,Control Mode Of Sub-timer6" bitfld.long 0x00 4. " BTIMERDMAENABLE ,DMA channel enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0xC8+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_6,Clears The Interruption Of Sub-timer6" in newline rgroup.long (0xC8+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_6,Interruption Status Before Masking Of Sub-timer6" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int6" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_6,Interruption Status After Masking Of Sub-timer 6" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int6" "Not active,Active" group.long 0xE8++0x03 line.long 0x00 "RTIMERCONTROL_7,Control Mode Of Sub-timer7" bitfld.long 0x00 4. " BTIMERDMAENABLE ,DMA channel enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " BTIMERMASKINT ,Interruption mask of Sub-timer" "Masked,Not masked" bitfld.long 0x00 2. " BTIMERENABLE ,Disable timer and keep a current value or reset and start timer" "Disabled,Reset" textline " " bitfld.long 0x00 1. " BTIMERMODE ,This bit allows to select the operation mode of the timer" "Single-shot,Auto-reload" bitfld.long 0x00 0. " BTIMERPRESCALER ,This bit controls the prescaler configuration" "25 MHz,1 MHz" hgroup.long (0xE8+0x04)++0x03 hide.long 0x00 "RTIMERCLEARINT_7,Clears The Interruption Of Sub-timer7" in newline rgroup.long (0xE8+0x08)++0x07 line.long 0x00 "RTIMERSTATUSINT0_7,Interruption Status Before Masking Of Sub-timer7" bitfld.long 0x00 0. " BTIMERSTATUSINT0 ,An interruption is generated on rising edge of timer_int7" "Not active,Active" line.long 0x04 "RTIMERSTATUSINT1_7,Interruption Status After Masking Of Sub-timer 7" bitfld.long 0x04 0. " BTIMERSTATUSINT1 ,An interruption is generated on rising edge of timer_int7" "Not active,Active" hgroup.long 0x100++0x03 hide.long 0x00 "RTIMERALLCLEARINT,Clear All Interrupt" in newline rgroup.long 0x104++0x0F line.long 0x00 "RTIMERALLSTATUSINT0,All Interrupts Status Before Masking" bitfld.long 0x00 7. " BTIMERALLSTATUSINT[7] ,Interruption status before masking of all Sub-timer 7" "Not active,Active" bitfld.long 0x00 6. " [6] ,Interruption status before masking of all Sub-timer 6" "Not active,Active" textline " " bitfld.long 0x00 5. " [5] ,Interruption status before masking of all Sub-timer 5" "Not active,Active" bitfld.long 0x00 4. " [4] ,Interruption status before masking of all Sub-timer 4" "Not active,Active" textline " " bitfld.long 0x00 3. " [3] ,Interruption status before masking of all Sub-timer 3" "Not active,Active" bitfld.long 0x00 2. " [2} ,Interruption status before masking of all Sub-timer 2" "Not active,Active" textline " " bitfld.long 0x00 1. " [1] ,Interruption status before masking of all Sub-timer 1" "Not active,Active" bitfld.long 0x00 0. " [0] ,Interruption status before masking of all Sub-timer 0" "Not active,Active" line.long 0x04 "RTIMERALLSTATUSINT1,All Interrupts Status After Masking" bitfld.long 0x04 7. " BTIMERALLSTATUSINT[7] ,Interruption status after masking of all Sub-timer 7" "Not active,Active" bitfld.long 0x04 6. " [6] ,Interruption status after masking of all Sub-timer 6" "Not active,Active" textline " " bitfld.long 0x04 5. " [5] ,Interruption status after masking of all Sub-timer 5" "Not active,Active" bitfld.long 0x04 4. " [4] ,Interruption status after masking of all Sub-timer 4" "Not active,Active" textline " " bitfld.long 0x04 3. " [3] ,Interruption status after masking of all Sub-timer 3" "Not active,Active" bitfld.long 0x04 2. " [2] ,Interruption status after masking of all Sub-timer 2" "Not active,Active" textline " " bitfld.long 0x04 1. " [1] ,Interruption status after masking of all Sub-timer 1" "Not active,Active" bitfld.long 0x04 0. " [0] ,Interruption status after masking of all Sub-timer 0" "Not active,Active" line.long 0x08 "RTIMER_DMA_PENDING,TIMER DMA Requests Status" bitfld.long 0x08 7. " BTIMER_DMA_RUNNING_7 ,DMA running status of Sub-timer7" "Not running,Running" bitfld.long 0x08 6. " BTIMER_DMA_RUNNING_6 ,DMA running status of Sub-timer6" "Not running,Running" line.long 0x0C "RTIMER_DMA_PENDINGOVF,TIMER DMA Overflow Status" bitfld.long 0x0C 7. " BTIMER_DMA_RUNNINGOVF_7 ,Overflow with TIMER DMA is running on DMA requests of Sub-timer7" "No overflow,Overflow" bitfld.long 0x0C 6. " BTIMER_DMA_RUNNINGOVF_6 ,Overflow with TIMER DMA is running on DMA requests of Sub-timer6" "No overflow,Overflow" group.long 0x114++0x03 line.long 0x00 "RTIMER_DMA_PENDINGCLROVF,TIMER DMA Overflow Clear" bitfld.long 0x00 7. " BTIMER_DMA_RUNNINGCLROVF_7 ,Clear overflow with TIMER DMA is running on DMA requests of Sub-timer7" "No action,Clear" bitfld.long 0x00 6. " BTIMER_DMA_RUNNINGCLROVF_6 ,Clear overflow with TIMER DMA is running on DMA requests of Sub-timer6" "No action,Clear" width 0x0B tree.end tree.end tree.open "CAN" tree "CAN1" base ad:0x52104000 width 26. if (((per.l((ad:0x52104000)))&0x01)==0x00) group.long 0x00++0x03 line.long 0x00 "RCAN_MOD,Configuration Mode Register" bitfld.long 0x00 4. " BCAN_SM ,Sleep mode" "Disabled,Enabled" bitfld.long 0x00 3. " BCAN_AFM ,Acceptance filter mode" "Single filter,Dual filter" bitfld.long 0x00 2. " BCAN_STM ,Self test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BCAN_LOM ,Listen only mode" "Disabled,Enabled" bitfld.long 0x00 0. " BCAN_RM ,Reset mode" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "RCAN_MOD,Configuration Mode Register" rbitfld.long 0x00 4. " BCAN_SM ,Sleep mode" "Disabled,Enabled" bitfld.long 0x00 3. " BCAN_AFM ,Acceptance filter mode" "Single filter,Dual filter" bitfld.long 0x00 2. " BCAN_STM ,Self test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BCAN_LOM ,Listen only mode" "Disabled,Enabled" bitfld.long 0x00 0. " BCAN_RM ,Reset mode" "Disabled,Enabled" endif wgroup.long 0x04++0x03 line.long 0x00 "RCAN_CMR,Command Register" bitfld.long 0x00 4. " BCAN_SRR ,Self reception request" "Not Set,Set" bitfld.long 0x00 3. " BCAN_CDO ,Clear data overrun" "Not Set,Set" bitfld.long 0x00 2. " BCAN_RRB ,Release receive buffer" "Not Set,Set" textline " " bitfld.long 0x00 1. " BCAN_AT ,Abort transmission" "Not Set,Set" bitfld.long 0x00 0. " BCAN_TR ,Transmission request" "Not Set,Set" rgroup.long 0x08++0x07 line.long 0x00 "RCAN_SR,Controller Status Register" bitfld.long 0x00 7. " BCAN_BS ,Bus status" "Not involved,Involved" bitfld.long 0x00 6. " BCAN_ES ,Error status" "Not occurred,Occurred" bitfld.long 0x00 5. " BCAN_TS ,Transmit status" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 4. " BCAN_RS ,Receive status" "Not received,Received" bitfld.long 0x00 3. " BCAN_TCS ,Transmission complete status" "Not completed,Completed" bitfld.long 0x00 2. " BCAN_TBS ,Transmit buffer status" "Locked,Released" textline " " bitfld.long 0x00 1. " BCAN_DOS ,Data overrun status" "Not occurred,Occurred" bitfld.long 0x00 0. " BCAN_RBS ,Receive buffer status" "Empty,Full" line.long 0x04 "RCAN_IR,Interrupt Register" bitfld.long 0x04 7. " BCAN_BEI ,Bus error interrupt" "Not occurred,Occurred" bitfld.long 0x04 6. " BCAN_ALI ,Arbitration lost interrupt" "Not occurred,Occurred" bitfld.long 0x04 5. " BCAN_EPI ,Error passive interrupt" "Not occurred,Occurred" textline " " bitfld.long 0x04 4. " BCAN_WUI ,Wake-Up interrupt" "Not occurred,Occurred" bitfld.long 0x04 3. " BCAN_DOI ,Data overrun interrupt" "Not occurred,Occurred" bitfld.long 0x04 2. " BCAN_EI ,Error warning interrupt" "Not occurred,Occurred" textline " " bitfld.long 0x04 1. " BCAN_TI ,Transmit interrupt" "Not occurred,Occurred" bitfld.long 0x04 0. " BCAN_RI ,Receive interrupt" "Not occurred,Occurred" group.long 0x10++0x03 line.long 0x00 "RCAN_IER,Interrupt Event Register" bitfld.long 0x00 7. " BCAN_BEIE ,Bus error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " BCAN_ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " BCAN_EPIE ,Error passive interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BCAN_WUIE ,Wake-Up interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " BCAN_DOIE ,Data overrun interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " BCAN_EIE ,Error warning interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BCAN_TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " BCAN_RIE ,Receive interrupt enable" "Disabled,Enabled" if (((per.l((ad:0x52104000)))&0x1)==0x1) group.long 0x18++0x0B line.long 0x00 "RCAN_BTR0,Bus Timing Register 0" bitfld.long 0x00 6.--7. " BCAN_SJW ,Synchronization jump size" "0,1,2,3" bitfld.long 0x00 0.--5. " BCAN_BRP ,Baud rate prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "RCAN_BTR1,Bus Timing Register 1" bitfld.long 0x04 7. " BCAN_SAM ,Sample mode" "Sampled three times,Sampled once" bitfld.long 0x04 4.--6. " BCAN_TSEG2 ,Length of the bit period" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " BCAN_TSEG1 ,Length of the bit period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RCAN_OCR,Output Control Register" bitfld.long 0x08 0.--1. " BCAN_OCMODE ,Driver configurations" ",,Normal mode,?..." else rgroup.long 0x18++0x0B line.long 0x00 "RCAN_BTR0,Bus Timing Register 0" bitfld.long 0x00 6.--7. " BCAN_SJW ,Synchronization jump size" "0,1,2,3" bitfld.long 0x00 0.--5. " BCAN_BRP ,Baud rate prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "RCAN_BTR1,Bus Timing Register 1" bitfld.long 0x04 7. " BCAN_SAM ,Sample mode" "Sampled three times,Sampled once" bitfld.long 0x04 4.--6. " BCAN_TSEG2 ,Length of the bit period" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " BCAN_TSEG1 ,Length of the bit period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RCAN_OCR,Output Control Register" bitfld.long 0x08 0.--1. " BCAN_OCMODE ,Driver configurations" ",,Normal mode,?..." endif rgroup.long 0x2C++0x07 line.long 0x00 "RCAN_ALC,Arbitration Lost Capture Register" bitfld.long 0x00 0.--4. " BCAN_ALC ,Capture current bit position of the frame when bus arbitration lost" "1st,2nd,3rd,4th,5th,6th,7th,8th,9th,10th,11th,SRTR,IDE,12th,13th,14th,15th,16th,17th,18th,19th,20th,21st,22nd,23rd,24th,25th,26th,27th,28th,29th,RTR" line.long 0x04 "RCAN_ECC,Error Code Capture Register" bitfld.long 0x04 6.--7. " BCAN_ECC_CODE ,Capture current bit position of the frame when a bus error occurs" "Bit error,Form error,Stuff error,Other error" bitfld.long 0x04 5. " BCAN_ECC_DIRECTION ,Error direction" "During transmission,During reception" textline " " bitfld.long 0x04 0.--4. " BCAN_ECC_SEGMENT ,Error segment code" ",,ID.21 to ID.28,Start of frame,SRTR bit,IDE bit,ID.18 to ID.20,ID.13 to ID.17,CRC Sequence,Reserved bit0,Data Field,Data Length Code,RTR bit,Reserved bit1,ID.0 to ID.4,ID.5 to ID.12,,Active Error Flag,Intermission,Tolerate Dominant bits,,,Passive Error Flag,Error Delimiter,CRC Delimiter,Acknowledge,End of frame,Acknowledge Delimiter,Overload Flag,?..." if (((per.l((ad:0x52104000)))&0x1)==0x1) group.long 0x34++0x0B line.long 0x00 "RCAN_EWLR,Error Warning Limit Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_EWLR ,Error warning limit" line.long 0x04 "RCAN_RXERR,Receive Error Counter Register" hexmask.long.byte 0x04 0.--7. 1. " BCAN_RXERR ,Receive error counter" line.long 0x08 "RCAN_TXERR,Transmit Error Counter Register" hexmask.long.byte 0x08 0.--7. 1. " BCAN_TXERR ,Transmit error counter" group.long 0x40++0x03 line.long 0x00 "RCAN_ACR0,Acceptance Code Filter 0 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_ACR ,Code Filter" group.long 0x44++0x03 line.long 0x00 "RCAN_ACR1,Acceptance Code Filter 1 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_ACR ,Code Filter" group.long 0x48++0x03 line.long 0x00 "RCAN_ACR2,Acceptance Code Filter 2 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_ACR ,Code Filter" group.long 0x4C++0x03 line.long 0x00 "RCAN_ACR3,Acceptance Code Filter 3 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_ACR ,Code Filter" group.long 0x50++0x03 line.long 0x00 "RCAN_AMR0,Acceptance Mask Filter 0 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_AMR ,Acceptance Mask filter" group.long 0x54++0x03 line.long 0x00 "RCAN_AMR1,Acceptance Mask Filter 1 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_AMR ,Acceptance Mask filter" group.long 0x58++0x03 line.long 0x00 "RCAN_AMR2,Acceptance Mask Filter 2 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_AMR ,Acceptance Mask filter" group.long 0x5C++0x03 line.long 0x00 "RCAN_AMR3,Acceptance Mask Filter 3 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_AMR ,Acceptance Mask filter" else rgroup.long 0x34++0x0B line.long 0x00 "RCAN_EWLR,Error Warning Limit Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_EWLR ,Error warning limit" line.long 0x04 "RCAN_RXERR,Receive Error Counter Register" hexmask.long.byte 0x04 0.--7. 1. " BCAN_RXERR ,Receive error counter" line.long 0x08 "RCAN_TXERR,Transmit Error Counter Register" hexmask.long.byte 0x08 0.--7. 1. " BCAN_TXERR ,Transmit error counter" wgroup.long 0x40++0x03 line.long 0x00 "RCAN_WRTRANSMITBUFFER,Write Transmit Buffer Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_WRTRANSMITBUFFER ,Write Transmit buffer" textfld " " button "Transmit Buffer" "d (ad:0x52104000+0x40)--(ad:0x52104000+0x70) /long" newline rgroup.long 0x40++0x03 line.long 0x00 "RCAN_RDRECEIVEBUFFER,Read Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_WRTRANSMITBUFFER ,Write Transmit buffer" textfld " " button "Receive Buffer " "d (ad:0x52104000+0x40)--(ad:0x52104000+0x70) /long" newline endif rgroup.long 0x74++0x07 line.long 0x00 "RCAN_RMC,Receive Message Counter Register" bitfld.long 0x00 0.--4. " BCAN_RMC ,Receive message counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RCAN_RBSA,Receive Buffer Start Address Register" hexmask.long.byte 0x04 0.--5. 0x01 " BCAN_RBSA ,Receive buffer start address" newline if (((per.l((ad:0x52104000)))&0x1)==0x1) group.long 0x80++0x03 line.long 0x00 "RCAN_RECEIVEFIFO,Receive FIFO Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_RECEIVEFIFO ,Receive FIFO 64Bytes" textfld " " button "Receive FIFO" "d (ad:0x52104000+0x80)--(ad:0x52104000+0x17C) /long" newline else rgroup.long 0x80++0x03 line.long 0x00 "RCAN_RECEIVEFIFO,Receive FIFO Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_RECEIVEFIFO ,Receive FIFO 64Bytes" textfld " " button "Receive FIFO" "d (ad:0x52104000+0x80)--(ad:0x52104000+0x17C) /long" newline endif rgroup.long 0x180++0x03 line.long 0x00 "RCAN_RDTRANSMITBUFFER,Read Transmit Buffer Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_RDTRANSMITBUFFER ,Read Transmit buffer" textfld " " button "Transmit buffer" "d (ad:0x52104000+0x180)--(ad:0x52104000+0x1B0) /long" newline group.long 0x440++0x03 line.long 0x00 "RCAN_SYNCTRANSMITBUFFER,Sync Frame Transmit Buffer Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_SYNCTRANSMITBUFFER ,Sync Frame Transmit Buffer Register" textfld " " button "Transmit buffer" "d (ad:0x52104000+0x440)--(ad:0x52104000+0x470) /long" newline group.long 0x480++0x07 line.long 0x00 "RCAN_SYNCPERIOD,Time Window Sync Frame Transmission Register" hexmask.long.word 0x00 20.--29. 1. " BCAN_SYNCMASKFRAMETIME ,Time window in bit period unit dedicated for the transmission of Sync frame" hexmask.long.word 0x00 0.--15. 1. " BCAN_SYNCPERIOD ,Period of Sync frame in bit period unit" line.long 0x04 "RCAN_SYNCINT,Sync Frame Interrupt Register" setclrfld.long 0x04 1. 0x08 1. 0x0C 1. " BCAN_OVERRUNSYNCFRAMEINT_clr/set ,Enable overrun Sync frame interrupt" "Disabled,Enabled" setclrfld.long 0x04 0. 0x08 0. 0x0C 0. " BCAN_SENDSYNCFRAMEINT_clr/set ,Enable or disable of Sync frame interrupt" "Disabled,Enabled" group.long 0x494++0x03 line.long 0x00 "RCAN_SYNCSTATUS,Sync Frame Status Configuration Register" bitfld.long 0x00 6. " BCAN_TIMERONLYMODE ,Timer only mode" "Disabled,Enabled" bitfld.long 0x00 5. " BCAN_TIMERONLYIFBUSOFF ,Timer only mode if bus off condition detected" "Disabled,Enabled" bitfld.long 0x00 4. " BCAN_SYNCMODE ,Resources used to send the Sync frame" "Transmission,Self reception" textline " " rbitfld.long 0x00 3. " BCAN_SYNCMASKFRAME ,Time window reserved for emission of Sync frame" "Disabled,Enabled" rbitfld.long 0x00 0. " BCAN_SYNCRUNSTOP ,Status emission of Sync frame" "Disabled,Enabled" wgroup.long 0x498++0x03 line.long 0x00 "RCAN_SYNCCLEARSETRUNSTOP,Sync Frame Generation Register" group.long 0x4A0++0x03 line.long 0x00 "RCAN_SYNCPASSIVEERROR,Sync Passive Error Detection Register" hexmask.long.word 0x00 0.--15. 1. " BCAN_SYNCPASSIVEERROR ,Enable and configure the passive error detection system of the CAN" width 0x0B tree.end tree "CAN2" base ad:0x52105000 width 26. if (((per.l((ad:0x52105000)))&0x01)==0x00) group.long 0x00++0x03 line.long 0x00 "RCAN_MOD,Configuration Mode Register" bitfld.long 0x00 4. " BCAN_SM ,Sleep mode" "Disabled,Enabled" bitfld.long 0x00 3. " BCAN_AFM ,Acceptance filter mode" "Single filter,Dual filter" bitfld.long 0x00 2. " BCAN_STM ,Self test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BCAN_LOM ,Listen only mode" "Disabled,Enabled" bitfld.long 0x00 0. " BCAN_RM ,Reset mode" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "RCAN_MOD,Configuration Mode Register" rbitfld.long 0x00 4. " BCAN_SM ,Sleep mode" "Disabled,Enabled" bitfld.long 0x00 3. " BCAN_AFM ,Acceptance filter mode" "Single filter,Dual filter" bitfld.long 0x00 2. " BCAN_STM ,Self test mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BCAN_LOM ,Listen only mode" "Disabled,Enabled" bitfld.long 0x00 0. " BCAN_RM ,Reset mode" "Disabled,Enabled" endif wgroup.long 0x04++0x03 line.long 0x00 "RCAN_CMR,Command Register" bitfld.long 0x00 4. " BCAN_SRR ,Self reception request" "Not Set,Set" bitfld.long 0x00 3. " BCAN_CDO ,Clear data overrun" "Not Set,Set" bitfld.long 0x00 2. " BCAN_RRB ,Release receive buffer" "Not Set,Set" textline " " bitfld.long 0x00 1. " BCAN_AT ,Abort transmission" "Not Set,Set" bitfld.long 0x00 0. " BCAN_TR ,Transmission request" "Not Set,Set" rgroup.long 0x08++0x07 line.long 0x00 "RCAN_SR,Controller Status Register" bitfld.long 0x00 7. " BCAN_BS ,Bus status" "Not involved,Involved" bitfld.long 0x00 6. " BCAN_ES ,Error status" "Not occurred,Occurred" bitfld.long 0x00 5. " BCAN_TS ,Transmit status" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 4. " BCAN_RS ,Receive status" "Not received,Received" bitfld.long 0x00 3. " BCAN_TCS ,Transmission complete status" "Not completed,Completed" bitfld.long 0x00 2. " BCAN_TBS ,Transmit buffer status" "Locked,Released" textline " " bitfld.long 0x00 1. " BCAN_DOS ,Data overrun status" "Not occurred,Occurred" bitfld.long 0x00 0. " BCAN_RBS ,Receive buffer status" "Empty,Full" line.long 0x04 "RCAN_IR,Interrupt Register" bitfld.long 0x04 7. " BCAN_BEI ,Bus error interrupt" "Not occurred,Occurred" bitfld.long 0x04 6. " BCAN_ALI ,Arbitration lost interrupt" "Not occurred,Occurred" bitfld.long 0x04 5. " BCAN_EPI ,Error passive interrupt" "Not occurred,Occurred" textline " " bitfld.long 0x04 4. " BCAN_WUI ,Wake-Up interrupt" "Not occurred,Occurred" bitfld.long 0x04 3. " BCAN_DOI ,Data overrun interrupt" "Not occurred,Occurred" bitfld.long 0x04 2. " BCAN_EI ,Error warning interrupt" "Not occurred,Occurred" textline " " bitfld.long 0x04 1. " BCAN_TI ,Transmit interrupt" "Not occurred,Occurred" bitfld.long 0x04 0. " BCAN_RI ,Receive interrupt" "Not occurred,Occurred" group.long 0x10++0x03 line.long 0x00 "RCAN_IER,Interrupt Event Register" bitfld.long 0x00 7. " BCAN_BEIE ,Bus error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " BCAN_ALIE ,Arbitration lost interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " BCAN_EPIE ,Error passive interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " BCAN_WUIE ,Wake-Up interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " BCAN_DOIE ,Data overrun interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " BCAN_EIE ,Error warning interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " BCAN_TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " BCAN_RIE ,Receive interrupt enable" "Disabled,Enabled" if (((per.l((ad:0x52105000)))&0x1)==0x1) group.long 0x18++0x0B line.long 0x00 "RCAN_BTR0,Bus Timing Register 0" bitfld.long 0x00 6.--7. " BCAN_SJW ,Synchronization jump size" "0,1,2,3" bitfld.long 0x00 0.--5. " BCAN_BRP ,Baud rate prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "RCAN_BTR1,Bus Timing Register 1" bitfld.long 0x04 7. " BCAN_SAM ,Sample mode" "Sampled three times,Sampled once" bitfld.long 0x04 4.--6. " BCAN_TSEG2 ,Length of the bit period" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " BCAN_TSEG1 ,Length of the bit period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RCAN_OCR,Output Control Register" bitfld.long 0x08 0.--1. " BCAN_OCMODE ,Driver configurations" ",,Normal mode,?..." else rgroup.long 0x18++0x0B line.long 0x00 "RCAN_BTR0,Bus Timing Register 0" bitfld.long 0x00 6.--7. " BCAN_SJW ,Synchronization jump size" "0,1,2,3" bitfld.long 0x00 0.--5. " BCAN_BRP ,Baud rate prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "RCAN_BTR1,Bus Timing Register 1" bitfld.long 0x04 7. " BCAN_SAM ,Sample mode" "Sampled three times,Sampled once" bitfld.long 0x04 4.--6. " BCAN_TSEG2 ,Length of the bit period" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " BCAN_TSEG1 ,Length of the bit period" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RCAN_OCR,Output Control Register" bitfld.long 0x08 0.--1. " BCAN_OCMODE ,Driver configurations" ",,Normal mode,?..." endif rgroup.long 0x2C++0x07 line.long 0x00 "RCAN_ALC,Arbitration Lost Capture Register" bitfld.long 0x00 0.--4. " BCAN_ALC ,Capture current bit position of the frame when bus arbitration lost" "1st,2nd,3rd,4th,5th,6th,7th,8th,9th,10th,11th,SRTR,IDE,12th,13th,14th,15th,16th,17th,18th,19th,20th,21st,22nd,23rd,24th,25th,26th,27th,28th,29th,RTR" line.long 0x04 "RCAN_ECC,Error Code Capture Register" bitfld.long 0x04 6.--7. " BCAN_ECC_CODE ,Capture current bit position of the frame when a bus error occurs" "Bit error,Form error,Stuff error,Other error" bitfld.long 0x04 5. " BCAN_ECC_DIRECTION ,Error direction" "During transmission,During reception" textline " " bitfld.long 0x04 0.--4. " BCAN_ECC_SEGMENT ,Error segment code" ",,ID.21 to ID.28,Start of frame,SRTR bit,IDE bit,ID.18 to ID.20,ID.13 to ID.17,CRC Sequence,Reserved bit0,Data Field,Data Length Code,RTR bit,Reserved bit1,ID.0 to ID.4,ID.5 to ID.12,,Active Error Flag,Intermission,Tolerate Dominant bits,,,Passive Error Flag,Error Delimiter,CRC Delimiter,Acknowledge,End of frame,Acknowledge Delimiter,Overload Flag,?..." if (((per.l((ad:0x52105000)))&0x1)==0x1) group.long 0x34++0x0B line.long 0x00 "RCAN_EWLR,Error Warning Limit Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_EWLR ,Error warning limit" line.long 0x04 "RCAN_RXERR,Receive Error Counter Register" hexmask.long.byte 0x04 0.--7. 1. " BCAN_RXERR ,Receive error counter" line.long 0x08 "RCAN_TXERR,Transmit Error Counter Register" hexmask.long.byte 0x08 0.--7. 1. " BCAN_TXERR ,Transmit error counter" group.long 0x40++0x03 line.long 0x00 "RCAN_ACR0,Acceptance Code Filter 0 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_ACR ,Code Filter" group.long 0x44++0x03 line.long 0x00 "RCAN_ACR1,Acceptance Code Filter 1 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_ACR ,Code Filter" group.long 0x48++0x03 line.long 0x00 "RCAN_ACR2,Acceptance Code Filter 2 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_ACR ,Code Filter" group.long 0x4C++0x03 line.long 0x00 "RCAN_ACR3,Acceptance Code Filter 3 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_ACR ,Code Filter" group.long 0x50++0x03 line.long 0x00 "RCAN_AMR0,Acceptance Mask Filter 0 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_AMR ,Acceptance Mask filter" group.long 0x54++0x03 line.long 0x00 "RCAN_AMR1,Acceptance Mask Filter 1 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_AMR ,Acceptance Mask filter" group.long 0x58++0x03 line.long 0x00 "RCAN_AMR2,Acceptance Mask Filter 2 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_AMR ,Acceptance Mask filter" group.long 0x5C++0x03 line.long 0x00 "RCAN_AMR3,Acceptance Mask Filter 3 Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_AMR ,Acceptance Mask filter" else rgroup.long 0x34++0x0B line.long 0x00 "RCAN_EWLR,Error Warning Limit Register" hexmask.long.byte 0x00 0.--7. 1. " BCAN_EWLR ,Error warning limit" line.long 0x04 "RCAN_RXERR,Receive Error Counter Register" hexmask.long.byte 0x04 0.--7. 1. " BCAN_RXERR ,Receive error counter" line.long 0x08 "RCAN_TXERR,Transmit Error Counter Register" hexmask.long.byte 0x08 0.--7. 1. " BCAN_TXERR ,Transmit error counter" wgroup.long 0x40++0x03 line.long 0x00 "RCAN_WRTRANSMITBUFFER,Write Transmit Buffer Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_WRTRANSMITBUFFER ,Write Transmit buffer" textfld " " button "Transmit Buffer" "d (ad:0x52105000+0x40)--(ad:0x52105000+0x70) /long" newline rgroup.long 0x40++0x03 line.long 0x00 "RCAN_RDRECEIVEBUFFER,Read Receive Buffer Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_WRTRANSMITBUFFER ,Write Transmit buffer" textfld " " button "Receive Buffer " "d (ad:0x52105000+0x40)--(ad:0x52105000+0x70) /long" newline endif rgroup.long 0x74++0x07 line.long 0x00 "RCAN_RMC,Receive Message Counter Register" bitfld.long 0x00 0.--4. " BCAN_RMC ,Receive message counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "RCAN_RBSA,Receive Buffer Start Address Register" hexmask.long.byte 0x04 0.--5. 0x01 " BCAN_RBSA ,Receive buffer start address" newline if (((per.l((ad:0x52105000)))&0x1)==0x1) group.long 0x80++0x03 line.long 0x00 "RCAN_RECEIVEFIFO,Receive FIFO Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_RECEIVEFIFO ,Receive FIFO 64Bytes" textfld " " button "Receive FIFO" "d (ad:0x52105000+0x80)--(ad:0x52105000+0x17C) /long" newline else rgroup.long 0x80++0x03 line.long 0x00 "RCAN_RECEIVEFIFO,Receive FIFO Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_RECEIVEFIFO ,Receive FIFO 64Bytes" textfld " " button "Receive FIFO" "d (ad:0x52105000+0x80)--(ad:0x52105000+0x17C) /long" newline endif rgroup.long 0x180++0x03 line.long 0x00 "RCAN_RDTRANSMITBUFFER,Read Transmit Buffer Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_RDTRANSMITBUFFER ,Read Transmit buffer" textfld " " button "Transmit buffer" "d (ad:0x52105000+0x180)--(ad:0x52105000+0x1B0) /long" newline group.long 0x440++0x03 line.long 0x00 "RCAN_SYNCTRANSMITBUFFER,Sync Frame Transmit Buffer Register" hexmask.long.byte 0x00 0.--7. 0x01 " BCAN_SYNCTRANSMITBUFFER ,Sync Frame Transmit Buffer Register" textfld " " button "Transmit buffer" "d (ad:0x52105000+0x440)--(ad:0x52105000+0x470) /long" newline group.long 0x480++0x07 line.long 0x00 "RCAN_SYNCPERIOD,Time Window Sync Frame Transmission Register" hexmask.long.word 0x00 20.--29. 1. " BCAN_SYNCMASKFRAMETIME ,Time window in bit period unit dedicated for the transmission of Sync frame" hexmask.long.word 0x00 0.--15. 1. " BCAN_SYNCPERIOD ,Period of Sync frame in bit period unit" line.long 0x04 "RCAN_SYNCINT,Sync Frame Interrupt Register" setclrfld.long 0x04 1. 0x08 1. 0x0C 1. " BCAN_OVERRUNSYNCFRAMEINT_clr/set ,Enable overrun Sync frame interrupt" "Disabled,Enabled" setclrfld.long 0x04 0. 0x08 0. 0x0C 0. " BCAN_SENDSYNCFRAMEINT_clr/set ,Enable or disable of Sync frame interrupt" "Disabled,Enabled" group.long 0x494++0x03 line.long 0x00 "RCAN_SYNCSTATUS,Sync Frame Status Configuration Register" bitfld.long 0x00 6. " BCAN_TIMERONLYMODE ,Timer only mode" "Disabled,Enabled" bitfld.long 0x00 5. " BCAN_TIMERONLYIFBUSOFF ,Timer only mode if bus off condition detected" "Disabled,Enabled" bitfld.long 0x00 4. " BCAN_SYNCMODE ,Resources used to send the Sync frame" "Transmission,Self reception" textline " " rbitfld.long 0x00 3. " BCAN_SYNCMASKFRAME ,Time window reserved for emission of Sync frame" "Disabled,Enabled" rbitfld.long 0x00 0. " BCAN_SYNCRUNSTOP ,Status emission of Sync frame" "Disabled,Enabled" wgroup.long 0x498++0x03 line.long 0x00 "RCAN_SYNCCLEARSETRUNSTOP,Sync Frame Generation Register" group.long 0x4A0++0x03 line.long 0x00 "RCAN_SYNCPASSIVEERROR,Sync Passive Error Detection Register" hexmask.long.word 0x00 0.--15. 1. " BCAN_SYNCPASSIVEERROR ,Enable and configure the passive error detection system of the CAN" width 0x0B tree.end tree.end tree.open "ADC Controller and 12bit A/D Converters" tree "ADC 1" base ad:0x40065000 width 19. rgroup.long 0x00++0x07 line.long 0x00 "ADC_INTSTATUS0,Interrupt Status Before Masking" bitfld.long 0x00 15. " ADC_INTSTATUS0_VC[15] ,Interrupt status before masking on virtual channel ADC_VC 15" "No interrupt,Interrupt" bitfld.long 0x00 14. " [14] ,Interrupt status before masking on virtual channel ADC_VC 14" "No interrupt,Interrupt" bitfld.long 0x00 13. " [13] ,Interrupt status before masking on virtual channel ADC_VC 13" "No interrupt,Interrupt" bitfld.long 0x00 12. " [12] ,Interrupt status before masking on virtual channel ADC_VC 12" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " [11] ,Interrupt status before masking on virtual channel ADC_VC 11" "No interrupt,Interrupt" bitfld.long 0x00 10. " [10] ,Interrupt status before masking on virtual channel ADC_VC 10" "No interrupt,Interrupt" bitfld.long 0x00 9. " [9] ,Interrupt status before masking on virtual channel ADC_VC 9" "No interrupt,Interrupt" bitfld.long 0x00 8. " [8] ,Interrupt status before masking on virtual channel ADC_VC 8" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,Interrupt status before masking on virtual channel ADC_VC 7" "No interrupt,Interrupt" bitfld.long 0x00 6. " [6] ,Interrupt status before masking on virtual channel ADC_VC 6" "No interrupt,Interrupt" bitfld.long 0x00 5. " [5] ,Interrupt status before masking on virtual channel ADC_VC 5" "No interrupt,Interrupt" bitfld.long 0x00 4. " [4] ,Interrupt status before masking on virtual channel ADC_VC 4" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " [3] ,Interrupt status before masking on virtual channel ADC_VC 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " [2] ,Interrupt status before masking on virtual channel ADC_VC 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " [1] ,Interrupt status before masking on virtual channel ADC_VC 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " [0] ,Interrupt status before masking on virtual channel ADC_VC 0" "No interrupt,Interrupt" line.long 0x04 "ADC_INTSTATUS1,Interrupt Status After Masking" bitfld.long 0x04 15. " ADC_INTSTATUS1_VC[15] ,Interrupt status after masking on virtual channel ADC_VC 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Interrupt status after masking on virtual channel ADC_VC 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Interrupt status after masking on virtual channel ADC_VC 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Interrupt status after masking on virtual channel ADC_VC 12" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " [11] ,Interrupt status after masking on virtual channel ADC_VC 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " [10] ,Interrupt status after masking on virtual channel ADC_VC 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Interrupt status after masking on virtual channel ADC_VC 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Interrupt status after masking on virtual channel ADC_VC 8" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " [7] ,Interrupt status after masking on virtual channel ADC_VC 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Interrupt status after masking on virtual channel ADC_VC 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Interrupt status after masking on virtual channel ADC_VC 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Interrupt status after masking on virtual channel ADC_VC 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Interrupt status after masking on virtual channel ADC_VC 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Interrupt status after masking on virtual channel ADC_VC 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Interrupt status after masking on virtual channel ADC_VC 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Interrupt status after masking on virtual channel ADC_VC 0" "No interrupt,Interrupt" wgroup.long 0x08++0x03 line.long 0x00 "ADC_INTCLR,Clear Interrupt" bitfld.long 0x00 15. " ADC_INTCLR_VC[15] ,Clear interrupt status on virtual channel ADC_VC 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Clear interrupt status on virtual channel ADC_VC 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Clear interrupt status on virtual channel ADC_VC 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Clear interrupt status on virtual channel ADC_VC 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " [11] ,Clear interrupt status on virtual channel ADC_VC 11" "No effect,Clear" bitfld.long 0x00 10. " [10] ,Clear interrupt status on virtual channel ADC_VC 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Clear interrupt status on virtual channel ADC_VC 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Clear interrupt status on virtual channel ADC_VC 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " [7] ,Clear interrupt status on virtual channel ADC_VC 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Clear interrupt status on virtual channel ADC_VC 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Clear interrupt status on virtual channel ADC_VC 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Clear interrupt status on virtual channel ADC_VC 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Clear interrupt status on virtual channel ADC_VC 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Clear interrupt status on virtual channel ADC_VC 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Clear interrupt status on virtual channel ADC_VC 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Clear interrupt status on virtual channel ADC_VC 0" "No effect,Clear" group.long 0x0C++0x03 line.long 0x00 "ADC_INTMASK,Mask Interrupt" bitfld.long 0x00 15. " ADC_INTMASK_VC[15] ,Mask interrupt status on virtual channel ADC_VC 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Mask interrupt status on virtual channel ADC_VC 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Mask interrupt status on virtual channel ADC_VC 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Mask interrupt status on virtual channel ADC_VC 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " [11] ,Mask interrupt status on virtual channel ADC_VC 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Mask interrupt status on virtual channel ADC_VC 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Mask interrupt status on virtual channel ADC_VC 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Mask interrupt status on virtual channel ADC_VC 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Mask interrupt status on virtual channel ADC_VC 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Mask interrupt status on virtual channel ADC_VC 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Mask interrupt status on virtual channel ADC_VC 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Mask interrupt status on virtual channel ADC_VC 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " [3] ,Mask interrupt status on virtual channel ADC_VC 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Mask interrupt status on virtual channel ADC_VC 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Mask interrupt status on virtual channel ADC_VC 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Mask interrupt status on virtual channel ADC_VC 0" "Masked,Not masked" rgroup.long 0x10++0x07 line.long 0x00 "ADC_INTOVFSTATUS0,Interrupt Overflow Before Masking" bitfld.long 0x00 15. " ADC_INTOVFSTATUS0_VC[15] ,Interrupt overflow before masking on virtual channel ADC_VC 15" "No overflow,Overflow" bitfld.long 0x00 14. " [14] ,Interrupt overflow before masking on virtual channel ADC_VC 14" "No overflow,Overflow" bitfld.long 0x00 13. " [13] ,Interrupt overflow before masking on virtual channel ADC_VC 13" "No overflow,Overflow" bitfld.long 0x00 12. " [12] ,Interrupt overflow before masking on virtual channel ADC_VC 12" "No overflow,Overflow" textline " " bitfld.long 0x00 11. " [11] ,Interrupt overflow before masking on virtual channel ADC_VC 11" "No overflow,Overflow" bitfld.long 0x00 10. " [10] ,Interrupt overflow before masking on virtual channel ADC_VC 10" "No overflow,Overflow" bitfld.long 0x00 9. " [9] ,Interrupt overflow before masking on virtual channel ADC_VC 9" "No overflow,Overflow" bitfld.long 0x00 8. " [8] ,Interrupt overflow before masking on virtual channel ADC_VC 8" "No overflow,Overflow" textline " " bitfld.long 0x00 7. " [7] ,Interrupt overflow before masking on virtual channel ADC_VC 7" "No overflow,Overflow" bitfld.long 0x00 6. " [6] ,Interrupt overflow before masking on virtual channel ADC_VC 6" "No overflow,Overflow" bitfld.long 0x00 5. " [5] ,Interrupt overflow before masking on virtual channel ADC_VC 5" "No overflow,Overflow" bitfld.long 0x00 4. " [4] ,Interrupt overflow before masking on virtual channel ADC_VC 4" "No overflow,Overflow" textline " " bitfld.long 0x00 3. " [3] ,Interrupt overflow before masking on virtual channel ADC_VC 3" "No overflow,Overflow" bitfld.long 0x00 2. " [2] ,Interrupt overflow before masking on virtual channel ADC_VC 2" "No overflow,Overflow" bitfld.long 0x00 1. " [1] ,Interrupt overflow before masking on virtual channel ADC_VC 1" "No overflow,Overflow" bitfld.long 0x00 0. " [0] ,Interrupt overflow before masking on virtual channel ADC_VC 0" "No overflow,Overflow" line.long 0x04 "ADC_INTOVFSTATUS1,Interrupt Overflow After Masking" bitfld.long 0x04 15. " ADC_INTOVFSTATUS1_VC[15] ,Interrupt overflow after masking on virtual channel ADC_VC 15" "No overflow,Overflow" bitfld.long 0x04 14. " [14] ,Interrupt overflow after masking on virtual channel ADC_VC 14" "No overflow,Overflow" bitfld.long 0x04 13. " [13] ,Interrupt overflow after masking on virtual channel ADC_VC 13" "No overflow,Overflow" bitfld.long 0x04 12. " [12] ,Interrupt overflow after masking on virtual channel ADC_VC 12" "No overflow,Overflow" textline " " bitfld.long 0x04 11. " [11] ,Interrupt overflow after masking on virtual channel ADC_VC 11" "No overflow,Overflow" bitfld.long 0x04 10. " [10] ,Interrupt overflow after masking on virtual channel ADC_VC 10" "No overflow,Overflow" bitfld.long 0x04 9. " [9] ,Interrupt overflow after masking on virtual channel ADC_VC 9" "No overflow,Overflow" bitfld.long 0x04 8. " [8] ,Interrupt overflow after masking on virtual channel ADC_VC 8" "No overflow,Overflow" textline " " bitfld.long 0x04 7. " [7] ,Interrupt overflow after masking on virtual channel ADC_VC 7" "No overflow,Overflow" bitfld.long 0x04 6. " [6] ,Interrupt overflow after masking on virtual channel ADC_VC 6" "No overflow,Overflow" bitfld.long 0x04 5. " [5] ,Interrupt overflow after masking on virtual channel ADC_VC 5" "No overflow,Overflow" bitfld.long 0x04 4. " [4] ,Interrupt overflow after masking on virtual channel ADC_VC 4" "No overflow,Overflow" textline " " bitfld.long 0x04 3. " [3] ,Interrupt overflow after masking on virtual channel ADC_VC 3" "No overflow,Overflow" bitfld.long 0x04 2. " [2] ,Interrupt overflow after masking on virtual channel ADC_VC 2" "No overflow,Overflow" bitfld.long 0x04 1. " [1] ,Interrupt overflow after masking on virtual channel ADC_VC 1" "No overflow,Overflow" bitfld.long 0x04 0. " [0] ,Interrupt overflow after masking on virtual channel ADC_VC 0" "No overflow,Overflow" wgroup.long 0x18++0x03 line.long 0x00 "ADC_INTCLROVF,Clear Interrupt Overflow" bitfld.long 0x00 15. " ADC_INTCLROVF_VC[15] ,Clear interrupt overflow on virtual channel ADC_VC 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Clear interrupt overflow on virtual channel ADC_VC 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Clear interrupt overflow on virtual channel ADC_VC 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Clear interrupt overflow on virtual channel ADC_VC 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " [11] ,Clear interrupt overflow on virtual channel ADC_VC 11" "No effect,Clear" bitfld.long 0x00 10. " [10] ,Clear interrupt overflow on virtual channel ADC_VC 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Clear interrupt overflow on virtual channel ADC_VC 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Clear interrupt overflow on virtual channel ADC_VC 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " [7] ,Clear interrupt overflow on virtual channel ADC_VC 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Clear interrupt overflow on virtual channel ADC_VC 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Clear interrupt overflow on virtual channel ADC_VC 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Clear interrupt overflow on virtual channel ADC_VC 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Clear interrupt overflow on virtual channel ADC_VC 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Clear interrupt overflow on virtual channel ADC_VC 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Clear interrupt overflow on virtual channel ADC_VC 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Clear interrupt overflow on virtual channel ADC_VC 0" "No effect,Clear" group.long 0x1C++0x03 line.long 0x00 "ADC_INTOVFMASK,Mask Interrupt Overflow" bitfld.long 0x00 15. " ADC_INTOVFMASK_VC[15] ,Mask interrupt overflow on virtual channel ADC_VC 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Mask interrupt overflow on virtual channel ADC_VC 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Mask interrupt overflow on virtual channel ADC_VC 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Mask interrupt overflow on virtual channel ADC_VC 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " [11] ,Mask interrupt overflow on virtual channel ADC_VC 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Mask interrupt overflow on virtual channel ADC_VC 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Mask interrupt overflow on virtual channel ADC_VC 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Mask interrupt overflow on virtual channel ADC_VC 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Mask interrupt overflow on virtual channel ADC_VC 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Mask interrupt overflow on virtual channel ADC_VC 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Mask interrupt overflow on virtual channel ADC_VC 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Mask interrupt overflow on virtual channel ADC_VC 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " [3] ,Mask interrupt overflow on virtual channel ADC_VC 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Mask interrupt overflow on virtual channel ADC_VC 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Mask interrupt overflow on virtual channel ADC_VC 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Mask interrupt overflow on virtual channel ADC_VC 0" "Masked,Not masked" textline " " rgroup.long 0x20++0x07 line.long 0x00 "ADC_PENDING,Start of Operation Pending" bitfld.long 0x00 31. " ADC_DMA1_RUNNING ,ADC DMA channel1 is running" "No DMA request,DMA request" bitfld.long 0x00 30. " ADC_DMA0_RUNNING ,ADC DMA channel0 is running" "No DMA request,DMA request" textline " " bitfld.long 0x00 15. " ADC_PENDING_VC[15] ,Start of operation pending on virtual channel ADC_VC 15" "Not received,Received" bitfld.long 0x00 14. " [14] ,Start of operation pending on virtual channel ADC_VC 14" "Not received,Received" bitfld.long 0x00 13. " [13] ,Start of operation pending on virtual channel ADC_VC 13" "Not received,Received" bitfld.long 0x00 12. " [12] ,Start of operation pending on virtual channel ADC_VC 12" "Not received,Received" textline " " bitfld.long 0x00 11. " [11] ,Start of operation pending on virtual channel ADC_VC 11" "Not received,Received" bitfld.long 0x00 10. " [10] ,Start of operation pending on virtual channel ADC_VC 10" "Not received,Received" bitfld.long 0x00 9. " [9] ,Start of operation pending on virtual channel ADC_VC 9" "Not received,Received" bitfld.long 0x00 8. " [8] ,Start of operation pending on virtual channel ADC_VC 8" "Not received,Received" textline " " bitfld.long 0x00 7. " [7] ,Start of operation pending on virtual channel ADC_VC 7" "Not received,Received" bitfld.long 0x00 6. " [6] ,Start of operation pending on virtual channel ADC_VC 6" "Not received,Received" bitfld.long 0x00 5. " [5] ,Start of operation pending on virtual channel ADC_VC 5" "Not received,Received" bitfld.long 0x00 4. " [4] ,Start of operation pending on virtual channel ADC_VC 4" "Not received,Received" textline " " bitfld.long 0x00 3. " [3] ,Start of operation pending on virtual channel ADC_VC 3" "Not received,Received" bitfld.long 0x00 2. " [2] ,Start of operation pending on virtual channel ADC_VC 2" "Not received,Received" bitfld.long 0x00 1. " [1] ,Start of operation pending on virtual channel ADC_VC 1" "Not received,Received" bitfld.long 0x00 0. " [0] ,Start of operation pending on virtual channel ADC_VC 0" "Not received,Received" line.long 0x04 "ADC_PENDINGOVF,Start of Operation Pending Overflow" bitfld.long 0x04 31. " ADC_DMA1_RUNNINGOVF ,Overflow with ADC DMA channel1 is running" "No overflow,Overflow" bitfld.long 0x04 30. " ADC_DMA0_RUNNINGOVF ,Overflow with ADC DMA channel0 is running" "No overflow,Overflow" textline " " bitfld.long 0x04 15. " ADC_PENDINGOVF_VC[15] ,Start of operation pending overflow on virtual channel ADC_VC 15" "No event overflow,Event overflow" bitfld.long 0x04 14. " [14] ,Start of operation pending overflow on virtual channel ADC_VC 14" "No event overflow,Event overflow" bitfld.long 0x04 13. " [13] ,Start of operation pending overflow on virtual channel ADC_VC 13" "No event overflow,Event overflow" bitfld.long 0x04 12. " [12] ,Start of operation pending overflow on virtual channel ADC_VC 12" "No event overflow,Event overflow" textline " " bitfld.long 0x04 11. " [11] ,Start of operation pending overflow on virtual channel ADC_VC 11" "No event overflow,Event overflow" bitfld.long 0x04 10. " [10] ,Start of operation pending overflow on virtual channel ADC_VC 10" "No event overflow,Event overflow" bitfld.long 0x04 9. " [9] ,Start of operation pending overflow on virtual channel ADC_VC 9" "No event overflow,Event overflow" bitfld.long 0x04 8. " [8] ,Start of operation pending overflow on virtual channel ADC_VC 8" "No event overflow,Event overflow" textline " " bitfld.long 0x04 7. " [7] ,Start of operation pending overflow on virtual channel ADC_VC 7" "No event overflow,Event overflow" bitfld.long 0x04 6. " [6] ,Start of operation pending overflow on virtual channel ADC_VC 6" "No event overflow,Event overflow" bitfld.long 0x04 5. " [5] ,Start of operation pending overflow on virtual channel ADC_VC 5" "No event overflow,Event overflow" bitfld.long 0x04 4. " [4] ,Start of operation pending overflow on virtual channel ADC_VC 4" "No event overflow,Event overflow" textline " " bitfld.long 0x04 3. " [3] ,Start of operation pending overflow on virtual channel ADC_VC 3" "No event overflow,Event overflow" bitfld.long 0x04 2. " [2] ,Start of operation pending overflow on virtual channel ADC_VC 2" "No event overflow,Event overflow" bitfld.long 0x04 1. " [1] ,Start of operation pending overflow on virtual channel ADC_VC 1" "No event overflow,Event overflow" bitfld.long 0x04 0. " [0] ,Start of operation pending overflow on virtual channel ADC_VC 0" "No event overflow,Event overflow" wgroup.long 0x28++0x03 line.long 0x00 "ADC_PENDINGCLROVF,Clear Start of Operation Overflow" bitfld.long 0x00 31. " ADC_DMA1_RUNNINGCLROVF ,Clear overflow with ADC DMA channel1 is running" "No clear,Clear" bitfld.long 0x00 30. " ADC_DMA0_RUNNINGCLROVF ,Clear overflow with ADC DMA channel0 is running" "No clear,Clear" textline " " bitfld.long 0x00 15. " ADC_PENDINGCLROVF_VC[15] ,Clear start of operation overflow on virtual channel ADC_VC 15" "No event overflow,Event overflow" bitfld.long 0x00 14. " [14] ,Clear start of operation overflow on virtual channel ADC_VC 14" "No event overflow,Event overflow" bitfld.long 0x00 13. " [13] ,Clear start of operation overflow on virtual channel ADC_VC 13" "No event overflow,Event overflow" bitfld.long 0x00 12. " [12] ,Clear start of operation overflow on virtual channel ADC_VC 12" "No event overflow,Event overflow" textline " " bitfld.long 0x00 11. " [11] ,Clear start of operation overflow on virtual channel ADC_VC 11" "No event overflow,Event overflow" bitfld.long 0x00 10. " [10] ,Clear start of operation overflow on virtual channel ADC_VC 10" "No event overflow,Event overflow" bitfld.long 0x00 9. " [9] ,Clear start of operation overflow on virtual channel ADC_VC 9" "No event overflow,Event overflow" bitfld.long 0x00 8. " [8] ,Clear start of operation overflow on virtual channel ADC_VC 8" "No event overflow,Event overflow" textline " " bitfld.long 0x00 7. " [7] ,Clear start of operation overflow on virtual channel ADC_VC 7" "No event overflow,Event overflow" bitfld.long 0x00 6. " [6] ,Clear start of operation overflow on virtual channel ADC_VC 6" "No event overflow,Event overflow" bitfld.long 0x00 5. " [5] ,Clear start of operation overflow on virtual channel ADC_VC 5" "No event overflow,Event overflow" bitfld.long 0x00 4. " [4] ,Clear start of operation overflow on virtual channel ADC_VC 4" "No event overflow,Event overflow" textline " " bitfld.long 0x00 3. " [3] ,Clear start of operation overflow on virtual channel ADC_VC 3" "No event overflow,Event overflow" bitfld.long 0x00 2. " [2] ,Clear start of operation overflow on virtual channel ADC_VC 2" "No event overflow,Event overflow" bitfld.long 0x00 1. " [1] ,Clear start of operation overflow on virtual channel ADC_VC 1" "No event overflow,Event overflow" bitfld.long 0x00 0. " [0] ,Clear start of operation overflow on virtual channel ADC_VC 0" "No event overflow,Event overflow" textline " " rgroup.long 0x2C++0x07 line.long 0x00 "ADC_CONTROL,ADC Control" bitfld.long 0x00 6. " ADC_BUSY ,ADC configuration change in running" "Not in progress,In progress" bitfld.long 0x00 5. " ADC_VC_BUSY ,ADC_VC busy" "Not busy,Busy" bitfld.long 0x00 0.--4. " ADC_VC_RUN ,ADC_VC channel status" "ADC_VC0,ADC_VC1,ADC_VC2,ADC_VC3,ADC_VC4,ADC_VC5,ADC_VC6,ADC_VC7,ADC_VC8,ADC_VC9,ADC_VC10,ADC_VC11,ADC_VC12,ADC_VC13,ADC_VC14,ADC_VC15,?..." textline " " line.long 0x04 "ADC_FORCE,ADC Request" bitfld.long 0x04 15. " ADC_FORCE_VC[15] ,Force start of operation on virtual channel ADC_VC 15" "Not forced,Forced" bitfld.long 0x04 14. " [14] ,Force start of operation on virtual channel ADC_VC 14" "Not forced,Forced" bitfld.long 0x04 13. " [13] ,Force start of operation on virtual channel ADC_VC 13" "Not forced,Forced" bitfld.long 0x04 12. " [12] ,Force start of operation on virtual channel ADC_VC 12" "Not forced,Forced" textline " " bitfld.long 0x04 11. " [11] ,Force start of operation on virtual channel ADC_VC 11" "Not forced,Forced" bitfld.long 0x04 10. " [10] ,Force start of operation on virtual channel ADC_VC 10" "Not forced,Forced" bitfld.long 0x04 9. " [9] ,Force start of operation on virtual channel ADC_VC 9" "Not forced,Forced" bitfld.long 0x04 8. " [8] ,Force start of operation on virtual channel ADC_VC 8" "Not forced,Forced" textline " " bitfld.long 0x04 7. " [7] ,Force start of operation on virtual channel ADC_VC 7" "Not forced,Forced" bitfld.long 0x04 6. " [6] ,Force start of operation on virtual channel ADC_VC 6" "Not forced,Forced" bitfld.long 0x04 5. " [5] ,Force start of operation on virtual channel ADC_VC 5" "Not forced,Forced" bitfld.long 0x04 4. " [4] ,Force start of operation on virtual channel ADC_VC 4" "Not forced,Forced" textline " " bitfld.long 0x04 3. " [3] ,Force start of operation on virtual channel ADC_VC 3" "Not forced,Forced" bitfld.long 0x04 2. " [2] ,Force start of operation on virtual channel ADC_VC 2" "Not forced,Forced" bitfld.long 0x04 1. " [1] ,Force start of operation on virtual channel ADC_VC 1" "Not forced,Forced" bitfld.long 0x04 0. " [0] ,Force start of operation on virtual channel ADC_VC 0" "Not forced,Forced" wgroup.long 0x34++0x07 line.long 0x00 "ADC_SETFORCE,Set ADC Request" bitfld.long 0x00 15. " ADC_SETFORCE_VC[15] ,Set force start of operation on virtual channel ADC_VC 15" "No effect,Set" bitfld.long 0x00 14. " [14] ,Set force start of operation on virtual channel ADC_VC 14" "No effect,Set" bitfld.long 0x00 13. " [13] ,Set force start of operation on virtual channel ADC_VC 13" "No effect,Set" bitfld.long 0x00 12. " [12] ,Set force start of operation on virtual channel ADC_VC 12" "No effect,Set" textline " " bitfld.long 0x00 11. " [11] ,Set force start of operation on virtual channel ADC_VC 11" "No effect,Set" bitfld.long 0x00 10. " [10] ,Set force start of operation on virtual channel ADC_VC 10" "No effect,Set" bitfld.long 0x00 9. " [9] ,Set force start of operation on virtual channel ADC_VC 9" "No effect,Set" bitfld.long 0x00 8. " [8] ,Set force start of operation on virtual channel ADC_VC 8" "No effect,Set" textline " " bitfld.long 0x00 7. " [7] ,Set force start of operation on virtual channel ADC_VC 7" "No effect,Set" bitfld.long 0x00 6. " [6] ,Set force start of operation on virtual channel ADC_VC 6" "No effect,Set" bitfld.long 0x00 5. " [5] ,Set force start of operation on virtual channel ADC_VC 5" "No effect,Set" bitfld.long 0x00 4. " [4] ,Set force start of operation on virtual channel ADC_VC 4" "No effect,Set" textline " " bitfld.long 0x00 3. " [3] ,Set force start of operation on virtual channel ADC_VC 3" "No effect,Set" bitfld.long 0x00 2. " [2] ,Set force start of operation on virtual channel ADC_VC 2" "No effect,Set" bitfld.long 0x00 1. " [1] ,Set force start of operation on virtual channel ADC_VC 1" "No effect,Set" bitfld.long 0x00 0. " [0] ,Set force start of operation on virtual channel ADC_VC 0" "No effect,Set" line.long 0x04 "ADC_CLRFORCE,Clear ADC Request" bitfld.long 0x04 15. " ADC_CLRFORCE_VC[15] ,Clear force start of operation on virtual channel ADC_VC 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Clear force start of operation on virtual channel ADC_VC 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Clear force start of operation on virtual channel ADC_VC 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Clear force start of operation on virtual channel ADC_VC 12" "No effect,Clear" textline " " bitfld.long 0x04 11. " [11] ,Clear force start of operation on virtual channel ADC_VC 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Clear force start of operation on virtual channel ADC_VC 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Clear force start of operation on virtual channel ADC_VC 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Clear force start of operation on virtual channel ADC_VC 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Clear force start of operation on virtual channel ADC_VC 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Clear force start of operation on virtual channel ADC_VC 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Clear force start of operation on virtual channel ADC_VC 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Clear force start of operation on virtual channel ADC_VC 4" "No effect,Clear" textline " " bitfld.long 0x04 3. " [3] ,Clear force start of operation on virtual channel ADC_VC 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Clear force start of operation on virtual channel ADC_VC 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Clear force start of operation on virtual channel ADC_VC 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Clear force start of operation on virtual channel ADC_VC 0" "No effect,Clear" textline " " group.long 0x3C++0x07 line.long 0x00 "ADC_PRIORITY,ADC Priority Mode" rbitfld.long 0x00 5.--9. " ADC_RR_POINTER ,ADC_VC round robin pointer" "ADC_VC0 last round robin,ADC_VC1 last round robin,ADC_VC2 last round robin,ADC_VC3 last round robin,ADC_VC4 last round robin,ADC_VC5 last round robin,ADC_VC6 last round robin,ADC_VC7 last round robin,ADC_VC8 last round robin,ADC_VC9 last round robin,ADC_VC10 last round robin,ADC_VC11 last round robin,ADC_VC12 last round robin,ADC_VC13 last round robin,ADC_VC14 last round robin,ADC_VC15 last round robin,?..." bitfld.long 0x00 0.--4. " ADC_PRIORITY ,ADC_VC priority" "Round robin all channels,ADC_VC0 high priority,ADC_VC0..1 high priority,ADC_VC0..2 high priority,ADC_VC0..3 high priority,ADC_VC0..4 high priority,ADC_VC0..5 high priority,ADC_VC0..6 high priority,ADC_VC0..7 high priority,ADC_VC0..8 high priority,ADC_VC0..9 high priority,ADC_VC0..10 high priority,ADC_VC0..11 high priority,ADC_VC0..12 high priority,ADC_VC0..13 high priority,ADC_VC0..14 high priority,All channels high,?..." line.long 0x04 "ADC_CONFIG,ADC Configuration" bitfld.long 0x04 4. " ADC_DMA ,DMA channel enable" "Disabled,Enabled" bitfld.long 0x04 3. " ADC_POWER_DOWN ,Power down mode enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " ADC_SAMPLE_HOLD_ENABLE[2] ,ADC1 and ADC2 physical channel8 sample and hold feature enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,ADC1 and ADC2 physical channel7 sample and hold feature enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " [0] ,ADC1 and ADC2 physical channel6 sample and hold feature enable" "Disabled,Enabled" group.long 0xAC++0x03 line.long 0x00 "ADC_ACQS,ADC Control Sample and Hold" bitfld.long 0x00 7.--9. " ADC_TSHOH ,ADC sample and hold SHOUT to SHCNT hold time" ",,2 cycles of ADC_CLK,3 cycles of ADC_CLK,4 cycles of ADC_CLK,5 cycles of ADC_CLK,6 cycles of ADC_CLK,?..." bitfld.long 0x00 5.--6. " ADC_TSHSET ,Delay from ADC sample and hold SHOUT to CONV setup time" ",1 cycle of ADC_CLK,2 cycles of ADC_CLK,?..." textline " " bitfld.long 0x00 0.--4. " ADC_TSHSAMP ,ADC sample and hold sampling time" ",,2 cycles of ADC_CLK,3 cycles of ADC_CLK,4 cycles of ADC_CLK,5 cycles of ADC_CLK,6 cycles of ADC_CLK,7 cycles of ADC_CLK,8 cycles of ADC_CLK,9 cycles of ADC_CLK,10 cycles of ADC_CLK,11 cycles of ADC_CLK,12 cycles of ADC_CLK,13 cycles of ADC_CLK,14 cycles of ADC_CLK,15 cycles of ADC_CLK,16 cycles of ADC_CLK,17 cycles of ADC_CLK,18 cycles of ADC_CLK,19 cycles of ADC_CLK,20 cycles of ADC_CLK,21 cycles of ADC_CLK,22 cycles of ADC_CLK,23 cycles of ADC_CLK,24 cycles of ADC_CLK,25 cycles of ADC_CLK,26 cycles of ADC_CLK,27 cycles of ADC_CLK,28 cycles of ADC_CLK,29 cycles of ADC_CLK,30 cycles of ADC_CLK,31 cycles of ADC_CLK" textline " " group.long 0xB0++0x03 line.long 0x00 "ADC_MASKLOCK0,Mask Data Locked 0" bitfld.long 0x00 15. " ADC_MASKLOCK[15] ,Mask data locked ADC_DATA 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Mask data locked ADC_DATA 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Mask data locked ADC_DATA 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Mask data locked ADC_DATA 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Mask data locked ADC_DATA 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Mask data locked ADC_DATA 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Mask data locked ADC_DATA 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Mask data locked ADC_DATA 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Mask data locked ADC_DATA 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Mask data locked ADC_DATA 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Mask data locked ADC_DATA 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Mask data locked ADC_DATA 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Mask data locked ADC_DATA 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Mask data locked ADC_DATA 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Mask data locked ADC_DATA 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Mask data locked ADC_DATA 0" "Disabled,Enabled" group.long 0xB4++0x03 line.long 0x00 "ADC_MASKLOCK1,Mask Data Locked 1" bitfld.long 0x00 15. " ADC_MASKLOCK[15] ,Mask data locked ADC_DATA 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Mask data locked ADC_DATA 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Mask data locked ADC_DATA 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Mask data locked ADC_DATA 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Mask data locked ADC_DATA 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Mask data locked ADC_DATA 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Mask data locked ADC_DATA 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Mask data locked ADC_DATA 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Mask data locked ADC_DATA 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Mask data locked ADC_DATA 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Mask data locked ADC_DATA 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Mask data locked ADC_DATA 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Mask data locked ADC_DATA 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Mask data locked ADC_DATA 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Mask data locked ADC_DATA 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Mask data locked ADC_DATA 0" "Disabled,Enabled" group.long 0xB8++0x03 line.long 0x00 "ADC_MASKLOCK2,Mask Data Locked 2" bitfld.long 0x00 15. " ADC_MASKLOCK[15] ,Mask data locked ADC_DATA 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Mask data locked ADC_DATA 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Mask data locked ADC_DATA 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Mask data locked ADC_DATA 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Mask data locked ADC_DATA 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Mask data locked ADC_DATA 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Mask data locked ADC_DATA 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Mask data locked ADC_DATA 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Mask data locked ADC_DATA 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Mask data locked ADC_DATA 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Mask data locked ADC_DATA 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Mask data locked ADC_DATA 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Mask data locked ADC_DATA 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Mask data locked ADC_DATA 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Mask data locked ADC_DATA 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Mask data locked ADC_DATA 0" "Disabled,Enabled" group.long 0xBC++0x03 line.long 0x00 "ADC_MASKLOCK3,Mask Data Locked 3" bitfld.long 0x00 15. " ADC_MASKLOCK[15] ,Mask data locked ADC_DATA 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Mask data locked ADC_DATA 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Mask data locked ADC_DATA 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Mask data locked ADC_DATA 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Mask data locked ADC_DATA 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Mask data locked ADC_DATA 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Mask data locked ADC_DATA 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Mask data locked ADC_DATA 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Mask data locked ADC_DATA 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Mask data locked ADC_DATA 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Mask data locked ADC_DATA 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Mask data locked ADC_DATA 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Mask data locked ADC_DATA 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Mask data locked ADC_DATA 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Mask data locked ADC_DATA 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Mask data locked ADC_DATA 0" "Disabled,Enabled" textline " " if (((per.l(ad:0x40065000+0xC0))&0x180C0)==0x18000) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[0] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[0] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xC0))&0x180C0)==0x10000) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[0] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xC0))&0x180C0)==0x8000) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[0] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xC0))&0x180C0)==0x18040) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xC0))&0x180C0)==0x10040) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xC0))&0x180C0)==0x8040) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xC0))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xC0))&0x18000)==0x00) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xC0))&0x180C0)==0x180C0) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xC0))&0x180C0)==0x100C0) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xC0))&0x180C0)==0x80C0) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xC4))&0x180C0)==0x18000) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[1] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[1] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xC4))&0x180C0)==0x10000) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[1] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xC4))&0x180C0)==0x8000) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[1] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xC4))&0x180C0)==0x18040) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xC4))&0x180C0)==0x10040) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xC4))&0x180C0)==0x8040) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xC4))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xC4))&0x18000)==0x00) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xC4))&0x180C0)==0x180C0) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xC4))&0x180C0)==0x100C0) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xC4))&0x180C0)==0x80C0) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xC8))&0x180C0)==0x18000) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[2] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[2] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xC8))&0x180C0)==0x10000) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[2] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xC8))&0x180C0)==0x8000) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[2] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xC8))&0x180C0)==0x18040) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xC8))&0x180C0)==0x10040) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xC8))&0x180C0)==0x8040) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xC8))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xC8))&0x18000)==0x00) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xC8))&0x180C0)==0x180C0) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xC8))&0x180C0)==0x100C0) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xC8))&0x180C0)==0x80C0) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xCC))&0x180C0)==0x18000) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[3] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[3] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xCC))&0x180C0)==0x10000) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[3] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xCC))&0x180C0)==0x8000) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[3] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xCC))&0x180C0)==0x18040) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xCC))&0x180C0)==0x10040) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xCC))&0x180C0)==0x8040) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xCC))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xCC))&0x18000)==0x00) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xCC))&0x180C0)==0x180C0) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xCC))&0x180C0)==0x100C0) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xCC))&0x180C0)==0x80C0) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xD0))&0x180C0)==0x18000) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[4] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[4] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xD0))&0x180C0)==0x10000) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[4] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xD0))&0x180C0)==0x8000) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[4] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xD0))&0x180C0)==0x18040) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xD0))&0x180C0)==0x10040) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xD0))&0x180C0)==0x8040) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xD0))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xD0))&0x18000)==0x00) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xD0))&0x180C0)==0x180C0) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xD0))&0x180C0)==0x100C0) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xD0))&0x180C0)==0x80C0) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xD4))&0x180C0)==0x18000) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[5] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[5] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xD4))&0x180C0)==0x10000) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[5] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xD4))&0x180C0)==0x8000) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[5] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xD4))&0x180C0)==0x18040) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xD4))&0x180C0)==0x10040) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xD4))&0x180C0)==0x8040) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xD4))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xD4))&0x18000)==0x00) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xD4))&0x180C0)==0x180C0) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xD4))&0x180C0)==0x100C0) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xD4))&0x180C0)==0x80C0) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xD8))&0x180C0)==0x18000) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[6] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[6] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xD8))&0x180C0)==0x10000) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[6] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xD8))&0x180C0)==0x8000) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[6] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xD8))&0x180C0)==0x18040) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xD8))&0x180C0)==0x10040) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xD8))&0x180C0)==0x8040) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xD8))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xD8))&0x18000)==0x00) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xD8))&0x180C0)==0x180C0) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xD8))&0x180C0)==0x100C0) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xD8))&0x180C0)==0x80C0) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xDC))&0x180C0)==0x18000) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[7] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[7] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xDC))&0x180C0)==0x10000) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[7] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xDC))&0x180C0)==0x8000) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[7] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xDC))&0x180C0)==0x18040) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xDC))&0x180C0)==0x10040) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xDC))&0x180C0)==0x8040) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xDC))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xDC))&0x18000)==0x00) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xDC))&0x180C0)==0x180C0) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xDC))&0x180C0)==0x100C0) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xDC))&0x180C0)==0x80C0) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xE0))&0x180C0)==0x18000) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[8] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[8] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xE0))&0x180C0)==0x10000) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[8] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xE0))&0x180C0)==0x8000) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[8] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xE0))&0x180C0)==0x18040) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xE0))&0x180C0)==0x10040) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xE0))&0x180C0)==0x8040) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xE0))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xE0))&0x18000)==0x00) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xE0))&0x180C0)==0x180C0) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xE0))&0x180C0)==0x100C0) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xE0))&0x180C0)==0x80C0) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xE4))&0x180C0)==0x18000) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[9] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[9] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xE4))&0x180C0)==0x10000) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[9] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xE4))&0x180C0)==0x8000) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[9] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xE4))&0x180C0)==0x18040) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xE4))&0x180C0)==0x10040) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xE4))&0x180C0)==0x8040) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xE4))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xE4))&0x18000)==0x00) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xE4))&0x180C0)==0x180C0) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xE4))&0x180C0)==0x100C0) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xE4))&0x180C0)==0x80C0) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xE8))&0x180C0)==0x18000) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[10] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[10] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xE8))&0x180C0)==0x10000) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[10] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xE8))&0x180C0)==0x8000) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[10] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xE8))&0x180C0)==0x18040) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xE8))&0x180C0)==0x10040) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xE8))&0x180C0)==0x8040) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xE8))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xE8))&0x18000)==0x00) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xE8))&0x180C0)==0x180C0) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xE8))&0x180C0)==0x100C0) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xE8))&0x180C0)==0x80C0) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xEC))&0x180C0)==0x18000) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[11] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[11] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xEC))&0x180C0)==0x10000) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[11] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xEC))&0x180C0)==0x8000) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[11] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xEC))&0x180C0)==0x18040) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xEC))&0x180C0)==0x10040) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xEC))&0x180C0)==0x8040) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xEC))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xEC))&0x18000)==0x00) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xEC))&0x180C0)==0x180C0) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xEC))&0x180C0)==0x100C0) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xEC))&0x180C0)==0x80C0) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xF0))&0x180C0)==0x18000) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[12] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[12] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xF0))&0x180C0)==0x10000) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[12] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xF0))&0x180C0)==0x8000) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[12] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xF0))&0x180C0)==0x18040) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xF0))&0x180C0)==0x10040) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xF0))&0x180C0)==0x8040) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xF0))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xF0))&0x18000)==0x00) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xF0))&0x180C0)==0x180C0) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xF0))&0x180C0)==0x100C0) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xF0))&0x180C0)==0x80C0) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xF4))&0x180C0)==0x18000) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[13] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[13] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xF4))&0x180C0)==0x10000) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[13] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xF4))&0x180C0)==0x8000) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[13] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xF4))&0x180C0)==0x18040) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xF4))&0x180C0)==0x10040) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xF4))&0x180C0)==0x8040) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xF4))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xF4))&0x18000)==0x00) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xF4))&0x180C0)==0x180C0) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xF4))&0x180C0)==0x100C0) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xF4))&0x180C0)==0x80C0) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xF8))&0x180C0)==0x18000) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[14] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[14] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xF8))&0x180C0)==0x10000) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[14] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xF8))&0x180C0)==0x8000) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[14] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xF8))&0x180C0)==0x18040) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xF8))&0x180C0)==0x10040) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xF8))&0x180C0)==0x8040) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xF8))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xF8))&0x18000)==0x00) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xF8))&0x180C0)==0x180C0) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xF8))&0x180C0)==0x100C0) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xF8))&0x180C0)==0x80C0) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065000+0xFC))&0x180C0)==0x18000) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[15] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[15] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xFC))&0x180C0)==0x10000) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[15] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065000+0xFC))&0x180C0)==0x8000) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[15] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065000+0xFC))&0x180C0)==0x18040) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xFC))&0x180C0)==0x10040) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065000+0xFC))&0x180C0)==0x8040) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065000+0xFC))&0xC0)==0x80)||(((per.l(ad:0x40065000+0xFC))&0x18000)==0x00) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065000+0xFC))&0x180C0)==0x180C0) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065000+0xFC))&0x180C0)==0x100C0) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065000+0xFC))&0x180C0)==0x80C0) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif textline " " rgroup.long 0x100++0x03 line.long 0x00 "ADC1_DATA0,ADC1 Conversion Data Of Virtual Channel 0" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 0" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 0 channel" rgroup.long 0x104++0x03 line.long 0x00 "ADC1_DATA1,ADC1 Conversion Data Of Virtual Channel 1" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 1" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 1 channel" rgroup.long 0x108++0x03 line.long 0x00 "ADC1_DATA2,ADC1 Conversion Data Of Virtual Channel 2" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 2" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 2 channel" rgroup.long 0x10C++0x03 line.long 0x00 "ADC1_DATA3,ADC1 Conversion Data Of Virtual Channel 3" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 3" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 3 channel" rgroup.long 0x110++0x03 line.long 0x00 "ADC1_DATA4,ADC1 Conversion Data Of Virtual Channel 4" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 4" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 4 channel" rgroup.long 0x114++0x03 line.long 0x00 "ADC1_DATA5,ADC1 Conversion Data Of Virtual Channel 5" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 5" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 5 channel" rgroup.long 0x118++0x03 line.long 0x00 "ADC1_DATA6,ADC1 Conversion Data Of Virtual Channel 6" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 6" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 6 channel" rgroup.long 0x11C++0x03 line.long 0x00 "ADC1_DATA7,ADC1 Conversion Data Of Virtual Channel 7" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 7" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 7 channel" rgroup.long 0x120++0x03 line.long 0x00 "ADC1_DATA8,ADC1 Conversion Data Of Virtual Channel 8" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 8" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 8 channel" rgroup.long 0x124++0x03 line.long 0x00 "ADC1_DATA9,ADC1 Conversion Data Of Virtual Channel 9" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 9" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 9 channel" rgroup.long 0x128++0x03 line.long 0x00 "ADC1_DATA10,ADC1 Conversion Data Of Virtual Channel 10" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 10" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 10 channel" rgroup.long 0x12C++0x03 line.long 0x00 "ADC1_DATA11,ADC1 Conversion Data Of Virtual Channel 11" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 11" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 11 channel" rgroup.long 0x130++0x03 line.long 0x00 "ADC1_DATA12,ADC1 Conversion Data Of Virtual Channel 12" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 12" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 12 channel" rgroup.long 0x134++0x03 line.long 0x00 "ADC1_DATA13,ADC1 Conversion Data Of Virtual Channel 13" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 13" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 13 channel" rgroup.long 0x138++0x03 line.long 0x00 "ADC1_DATA14,ADC1 Conversion Data Of Virtual Channel 14" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 14" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 14 channel" rgroup.long 0x13C++0x03 line.long 0x00 "ADC1_DATA15,ADC1 Conversion Data Of Virtual Channel 15" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 15" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 15 channel" rgroup.long 0x180++0x03 line.long 0x00 "ADC1_DATALOCK0,ADC1 DataLock 0 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 0 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 0 register" rgroup.long 0x184++0x03 line.long 0x00 "ADC1_DATALOCK1,ADC1 DataLock 1 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 1 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 1 register" rgroup.long 0x188++0x03 line.long 0x00 "ADC1_DATALOCK2,ADC1 DataLock 2 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 2 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 2 register" rgroup.long 0x18C++0x03 line.long 0x00 "ADC1_DATALOCK3,ADC1 DataLock 3 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 3 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 3 register" rgroup.long 0x190++0x03 line.long 0x00 "ADC1_DATALOCK4,ADC1 DataLock 4 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 4 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 4 register" rgroup.long 0x194++0x03 line.long 0x00 "ADC1_DATALOCK5,ADC1 DataLock 5 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 5 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 5 register" rgroup.long 0x198++0x03 line.long 0x00 "ADC1_DATALOCK6,ADC1 DataLock 6 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 6 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 6 register" rgroup.long 0x19C++0x03 line.long 0x00 "ADC1_DATALOCK7,ADC1 DataLock 7 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 7 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 7 register" rgroup.long 0x1A0++0x03 line.long 0x00 "ADC1_DATALOCK8,ADC1 DataLock 8 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 8 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 8 register" rgroup.long 0x1A4++0x03 line.long 0x00 "ADC1_DATALOCK9,ADC1 DataLock 9 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 9 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 9 register" rgroup.long 0x1A8++0x03 line.long 0x00 "ADC1_DATALOCK10,ADC1 DataLock 10 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 10 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 10 register" rgroup.long 0x1AC++0x03 line.long 0x00 "ADC1_DATALOCK11,ADC1 DataLock 11 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 11 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 11 register" rgroup.long 0x1B0++0x03 line.long 0x00 "ADC1_DATALOCK12,ADC1 DataLock 12 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 12 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 12 register" rgroup.long 0x1B4++0x03 line.long 0x00 "ADC1_DATALOCK13,ADC1 DataLock 13 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 13 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 13 register" rgroup.long 0x1B8++0x03 line.long 0x00 "ADC1_DATALOCK14,ADC1 DataLock 14 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 14 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 14 register" rgroup.long 0x1BC++0x03 line.long 0x00 "ADC1_DATALOCK15,ADC1 DataLock 15 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 15 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 15 register" sif cpuis("R9A06G032-CA7") rgroup.long 0x0++0x03 line.long 0x00 "ADC2_DATA0,ADC2 Conversion Data Of Virtual Channel 0" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 0" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 0 channel" rgroup.long 0x4++0x03 line.long 0x00 "ADC2_DATA1,ADC2 Conversion Data Of Virtual Channel 1" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 1" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 1 channel" rgroup.long 0x8++0x03 line.long 0x00 "ADC2_DATA2,ADC2 Conversion Data Of Virtual Channel 2" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 2" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 2 channel" rgroup.long 0xC++0x03 line.long 0x00 "ADC2_DATA3,ADC2 Conversion Data Of Virtual Channel 3" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 3" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 3 channel" rgroup.long 0x10++0x03 line.long 0x00 "ADC2_DATA4,ADC2 Conversion Data Of Virtual Channel 4" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 4" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 4 channel" rgroup.long 0x14++0x03 line.long 0x00 "ADC2_DATA5,ADC2 Conversion Data Of Virtual Channel 5" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 5" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 5 channel" rgroup.long 0x18++0x03 line.long 0x00 "ADC2_DATA6,ADC2 Conversion Data Of Virtual Channel 6" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 6" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 6 channel" rgroup.long 0x1C++0x03 line.long 0x00 "ADC2_DATA7,ADC2 Conversion Data Of Virtual Channel 7" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 7" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 7 channel" rgroup.long 0x20++0x03 line.long 0x00 "ADC2_DATA8,ADC2 Conversion Data Of Virtual Channel 8" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 8" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 8 channel" rgroup.long 0x24++0x03 line.long 0x00 "ADC2_DATA9,ADC2 Conversion Data Of Virtual Channel 9" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 9" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 9 channel" rgroup.long 0x28++0x03 line.long 0x00 "ADC2_DATA10,ADC2 Conversion Data Of Virtual Channel 10" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 10" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 10 channel" rgroup.long 0x2C++0x03 line.long 0x00 "ADC2_DATA11,ADC2 Conversion Data Of Virtual Channel 11" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 11" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 11 channel" rgroup.long 0x30++0x03 line.long 0x00 "ADC2_DATA12,ADC2 Conversion Data Of Virtual Channel 12" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 12" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 12 channel" rgroup.long 0x34++0x03 line.long 0x00 "ADC2_DATA13,ADC2 Conversion Data Of Virtual Channel 13" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 13" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 13 channel" rgroup.long 0x38++0x03 line.long 0x00 "ADC2_DATA14,ADC2 Conversion Data Of Virtual Channel 14" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 14" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 14 channel" rgroup.long 0x3C++0x03 line.long 0x00 "ADC2_DATA15,ADC2 Conversion Data Of Virtual Channel 15" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 15" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 15 channel" rgroup.long 0x80++0x03 line.long 0x00 "ADC2_DATALOCK0,ADC2 DataLock 0 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 0 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 0 register" rgroup.long 0x84++0x03 line.long 0x00 "ADC2_DATALOCK1,ADC2 DataLock 1 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 1 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 1 register" rgroup.long 0x88++0x03 line.long 0x00 "ADC2_DATALOCK2,ADC2 DataLock 2 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 2 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 2 register" rgroup.long 0x8C++0x03 line.long 0x00 "ADC2_DATALOCK3,ADC2 DataLock 3 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 3 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 3 register" rgroup.long 0x90++0x03 line.long 0x00 "ADC2_DATALOCK4,ADC2 DataLock 4 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 4 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 4 register" rgroup.long 0x94++0x03 line.long 0x00 "ADC2_DATALOCK5,ADC2 DataLock 5 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 5 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 5 register" rgroup.long 0x98++0x03 line.long 0x00 "ADC2_DATALOCK6,ADC2 DataLock 6 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 6 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 6 register" rgroup.long 0x9C++0x03 line.long 0x00 "ADC2_DATALOCK7,ADC2 DataLock 7 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 7 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 7 register" rgroup.long 0xA0++0x03 line.long 0x00 "ADC2_DATALOCK8,ADC2 DataLock 8 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 8 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 8 register" rgroup.long 0xA4++0x03 line.long 0x00 "ADC2_DATALOCK9,ADC2 DataLock 9 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 9 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 9 register" rgroup.long 0xA8++0x03 line.long 0x00 "ADC2_DATALOCK10,ADC2 DataLock 10 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 10 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 10 register" rgroup.long 0xAC++0x03 line.long 0x00 "ADC2_DATALOCK11,ADC2 DataLock 11 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 11 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 11 register" rgroup.long 0xB0++0x03 line.long 0x00 "ADC2_DATALOCK12,ADC2 DataLock 12 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 12 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 12 register" rgroup.long 0xB4++0x03 line.long 0x00 "ADC2_DATALOCK13,ADC2 DataLock 13 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 13 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 13 register" rgroup.long 0xB8++0x03 line.long 0x00 "ADC2_DATALOCK14,ADC2 DataLock 14 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 14 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 14 register" rgroup.long 0xBC++0x03 line.long 0x00 "ADC2_DATALOCK15,ADC2 DataLock 15 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 15 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 15 register" endif width 0x0B tree.end sif cpuis("R9A06G032-CA7") tree "ADC 2" base ad:0x40065140 width 19. rgroup.long 0x00++0x07 line.long 0x00 "ADC_INTSTATUS0,Interrupt Status Before Masking" bitfld.long 0x00 15. " ADC_INTSTATUS0_VC[15] ,Interrupt status before masking on virtual channel ADC_VC 15" "No interrupt,Interrupt" bitfld.long 0x00 14. " [14] ,Interrupt status before masking on virtual channel ADC_VC 14" "No interrupt,Interrupt" bitfld.long 0x00 13. " [13] ,Interrupt status before masking on virtual channel ADC_VC 13" "No interrupt,Interrupt" bitfld.long 0x00 12. " [12] ,Interrupt status before masking on virtual channel ADC_VC 12" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " [11] ,Interrupt status before masking on virtual channel ADC_VC 11" "No interrupt,Interrupt" bitfld.long 0x00 10. " [10] ,Interrupt status before masking on virtual channel ADC_VC 10" "No interrupt,Interrupt" bitfld.long 0x00 9. " [9] ,Interrupt status before masking on virtual channel ADC_VC 9" "No interrupt,Interrupt" bitfld.long 0x00 8. " [8] ,Interrupt status before masking on virtual channel ADC_VC 8" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " [7] ,Interrupt status before masking on virtual channel ADC_VC 7" "No interrupt,Interrupt" bitfld.long 0x00 6. " [6] ,Interrupt status before masking on virtual channel ADC_VC 6" "No interrupt,Interrupt" bitfld.long 0x00 5. " [5] ,Interrupt status before masking on virtual channel ADC_VC 5" "No interrupt,Interrupt" bitfld.long 0x00 4. " [4] ,Interrupt status before masking on virtual channel ADC_VC 4" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " [3] ,Interrupt status before masking on virtual channel ADC_VC 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " [2] ,Interrupt status before masking on virtual channel ADC_VC 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " [1] ,Interrupt status before masking on virtual channel ADC_VC 1" "No interrupt,Interrupt" bitfld.long 0x00 0. " [0] ,Interrupt status before masking on virtual channel ADC_VC 0" "No interrupt,Interrupt" line.long 0x04 "ADC_INTSTATUS1,Interrupt Status After Masking" bitfld.long 0x04 15. " ADC_INTSTATUS1_VC[15] ,Interrupt status after masking on virtual channel ADC_VC 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Interrupt status after masking on virtual channel ADC_VC 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Interrupt status after masking on virtual channel ADC_VC 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Interrupt status after masking on virtual channel ADC_VC 12" "No interrupt,Interrupt" textline " " bitfld.long 0x04 11. " [11] ,Interrupt status after masking on virtual channel ADC_VC 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " [10] ,Interrupt status after masking on virtual channel ADC_VC 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " [9] ,Interrupt status after masking on virtual channel ADC_VC 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Interrupt status after masking on virtual channel ADC_VC 8" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " [7] ,Interrupt status after masking on virtual channel ADC_VC 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Interrupt status after masking on virtual channel ADC_VC 6" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Interrupt status after masking on virtual channel ADC_VC 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Interrupt status after masking on virtual channel ADC_VC 4" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Interrupt status after masking on virtual channel ADC_VC 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Interrupt status after masking on virtual channel ADC_VC 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Interrupt status after masking on virtual channel ADC_VC 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Interrupt status after masking on virtual channel ADC_VC 0" "No interrupt,Interrupt" wgroup.long 0x08++0x03 line.long 0x00 "ADC_INTCLR,Clear Interrupt" bitfld.long 0x00 15. " ADC_INTCLR_VC[15] ,Clear interrupt status on virtual channel ADC_VC 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Clear interrupt status on virtual channel ADC_VC 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Clear interrupt status on virtual channel ADC_VC 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Clear interrupt status on virtual channel ADC_VC 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " [11] ,Clear interrupt status on virtual channel ADC_VC 11" "No effect,Clear" bitfld.long 0x00 10. " [10] ,Clear interrupt status on virtual channel ADC_VC 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Clear interrupt status on virtual channel ADC_VC 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Clear interrupt status on virtual channel ADC_VC 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " [7] ,Clear interrupt status on virtual channel ADC_VC 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Clear interrupt status on virtual channel ADC_VC 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Clear interrupt status on virtual channel ADC_VC 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Clear interrupt status on virtual channel ADC_VC 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Clear interrupt status on virtual channel ADC_VC 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Clear interrupt status on virtual channel ADC_VC 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Clear interrupt status on virtual channel ADC_VC 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Clear interrupt status on virtual channel ADC_VC 0" "No effect,Clear" group.long 0x0C++0x03 line.long 0x00 "ADC_INTMASK,Mask Interrupt" bitfld.long 0x00 15. " ADC_INTMASK_VC[15] ,Mask interrupt status on virtual channel ADC_VC 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Mask interrupt status on virtual channel ADC_VC 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Mask interrupt status on virtual channel ADC_VC 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Mask interrupt status on virtual channel ADC_VC 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " [11] ,Mask interrupt status on virtual channel ADC_VC 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Mask interrupt status on virtual channel ADC_VC 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Mask interrupt status on virtual channel ADC_VC 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Mask interrupt status on virtual channel ADC_VC 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Mask interrupt status on virtual channel ADC_VC 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Mask interrupt status on virtual channel ADC_VC 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Mask interrupt status on virtual channel ADC_VC 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Mask interrupt status on virtual channel ADC_VC 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " [3] ,Mask interrupt status on virtual channel ADC_VC 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Mask interrupt status on virtual channel ADC_VC 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Mask interrupt status on virtual channel ADC_VC 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Mask interrupt status on virtual channel ADC_VC 0" "Masked,Not masked" rgroup.long 0x10++0x07 line.long 0x00 "ADC_INTOVFSTATUS0,Interrupt Overflow Before Masking" bitfld.long 0x00 15. " ADC_INTOVFSTATUS0_VC[15] ,Interrupt overflow before masking on virtual channel ADC_VC 15" "No overflow,Overflow" bitfld.long 0x00 14. " [14] ,Interrupt overflow before masking on virtual channel ADC_VC 14" "No overflow,Overflow" bitfld.long 0x00 13. " [13] ,Interrupt overflow before masking on virtual channel ADC_VC 13" "No overflow,Overflow" bitfld.long 0x00 12. " [12] ,Interrupt overflow before masking on virtual channel ADC_VC 12" "No overflow,Overflow" textline " " bitfld.long 0x00 11. " [11] ,Interrupt overflow before masking on virtual channel ADC_VC 11" "No overflow,Overflow" bitfld.long 0x00 10. " [10] ,Interrupt overflow before masking on virtual channel ADC_VC 10" "No overflow,Overflow" bitfld.long 0x00 9. " [9] ,Interrupt overflow before masking on virtual channel ADC_VC 9" "No overflow,Overflow" bitfld.long 0x00 8. " [8] ,Interrupt overflow before masking on virtual channel ADC_VC 8" "No overflow,Overflow" textline " " bitfld.long 0x00 7. " [7] ,Interrupt overflow before masking on virtual channel ADC_VC 7" "No overflow,Overflow" bitfld.long 0x00 6. " [6] ,Interrupt overflow before masking on virtual channel ADC_VC 6" "No overflow,Overflow" bitfld.long 0x00 5. " [5] ,Interrupt overflow before masking on virtual channel ADC_VC 5" "No overflow,Overflow" bitfld.long 0x00 4. " [4] ,Interrupt overflow before masking on virtual channel ADC_VC 4" "No overflow,Overflow" textline " " bitfld.long 0x00 3. " [3] ,Interrupt overflow before masking on virtual channel ADC_VC 3" "No overflow,Overflow" bitfld.long 0x00 2. " [2] ,Interrupt overflow before masking on virtual channel ADC_VC 2" "No overflow,Overflow" bitfld.long 0x00 1. " [1] ,Interrupt overflow before masking on virtual channel ADC_VC 1" "No overflow,Overflow" bitfld.long 0x00 0. " [0] ,Interrupt overflow before masking on virtual channel ADC_VC 0" "No overflow,Overflow" line.long 0x04 "ADC_INTOVFSTATUS1,Interrupt Overflow After Masking" bitfld.long 0x04 15. " ADC_INTOVFSTATUS1_VC[15] ,Interrupt overflow after masking on virtual channel ADC_VC 15" "No overflow,Overflow" bitfld.long 0x04 14. " [14] ,Interrupt overflow after masking on virtual channel ADC_VC 14" "No overflow,Overflow" bitfld.long 0x04 13. " [13] ,Interrupt overflow after masking on virtual channel ADC_VC 13" "No overflow,Overflow" bitfld.long 0x04 12. " [12] ,Interrupt overflow after masking on virtual channel ADC_VC 12" "No overflow,Overflow" textline " " bitfld.long 0x04 11. " [11] ,Interrupt overflow after masking on virtual channel ADC_VC 11" "No overflow,Overflow" bitfld.long 0x04 10. " [10] ,Interrupt overflow after masking on virtual channel ADC_VC 10" "No overflow,Overflow" bitfld.long 0x04 9. " [9] ,Interrupt overflow after masking on virtual channel ADC_VC 9" "No overflow,Overflow" bitfld.long 0x04 8. " [8] ,Interrupt overflow after masking on virtual channel ADC_VC 8" "No overflow,Overflow" textline " " bitfld.long 0x04 7. " [7] ,Interrupt overflow after masking on virtual channel ADC_VC 7" "No overflow,Overflow" bitfld.long 0x04 6. " [6] ,Interrupt overflow after masking on virtual channel ADC_VC 6" "No overflow,Overflow" bitfld.long 0x04 5. " [5] ,Interrupt overflow after masking on virtual channel ADC_VC 5" "No overflow,Overflow" bitfld.long 0x04 4. " [4] ,Interrupt overflow after masking on virtual channel ADC_VC 4" "No overflow,Overflow" textline " " bitfld.long 0x04 3. " [3] ,Interrupt overflow after masking on virtual channel ADC_VC 3" "No overflow,Overflow" bitfld.long 0x04 2. " [2] ,Interrupt overflow after masking on virtual channel ADC_VC 2" "No overflow,Overflow" bitfld.long 0x04 1. " [1] ,Interrupt overflow after masking on virtual channel ADC_VC 1" "No overflow,Overflow" bitfld.long 0x04 0. " [0] ,Interrupt overflow after masking on virtual channel ADC_VC 0" "No overflow,Overflow" wgroup.long 0x18++0x03 line.long 0x00 "ADC_INTCLROVF,Clear Interrupt Overflow" bitfld.long 0x00 15. " ADC_INTCLROVF_VC[15] ,Clear interrupt overflow on virtual channel ADC_VC 15" "No effect,Clear" bitfld.long 0x00 14. " [14] ,Clear interrupt overflow on virtual channel ADC_VC 14" "No effect,Clear" bitfld.long 0x00 13. " [13] ,Clear interrupt overflow on virtual channel ADC_VC 13" "No effect,Clear" bitfld.long 0x00 12. " [12] ,Clear interrupt overflow on virtual channel ADC_VC 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " [11] ,Clear interrupt overflow on virtual channel ADC_VC 11" "No effect,Clear" bitfld.long 0x00 10. " [10] ,Clear interrupt overflow on virtual channel ADC_VC 10" "No effect,Clear" bitfld.long 0x00 9. " [9] ,Clear interrupt overflow on virtual channel ADC_VC 9" "No effect,Clear" bitfld.long 0x00 8. " [8] ,Clear interrupt overflow on virtual channel ADC_VC 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " [7] ,Clear interrupt overflow on virtual channel ADC_VC 7" "No effect,Clear" bitfld.long 0x00 6. " [6] ,Clear interrupt overflow on virtual channel ADC_VC 6" "No effect,Clear" bitfld.long 0x00 5. " [5] ,Clear interrupt overflow on virtual channel ADC_VC 5" "No effect,Clear" bitfld.long 0x00 4. " [4] ,Clear interrupt overflow on virtual channel ADC_VC 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " [3] ,Clear interrupt overflow on virtual channel ADC_VC 3" "No effect,Clear" bitfld.long 0x00 2. " [2] ,Clear interrupt overflow on virtual channel ADC_VC 2" "No effect,Clear" bitfld.long 0x00 1. " [1] ,Clear interrupt overflow on virtual channel ADC_VC 1" "No effect,Clear" bitfld.long 0x00 0. " [0] ,Clear interrupt overflow on virtual channel ADC_VC 0" "No effect,Clear" group.long 0x1C++0x03 line.long 0x00 "ADC_INTOVFMASK,Mask Interrupt Overflow" bitfld.long 0x00 15. " ADC_INTOVFMASK_VC[15] ,Mask interrupt overflow on virtual channel ADC_VC 15" "Masked,Not masked" bitfld.long 0x00 14. " [14] ,Mask interrupt overflow on virtual channel ADC_VC 14" "Masked,Not masked" bitfld.long 0x00 13. " [13] ,Mask interrupt overflow on virtual channel ADC_VC 13" "Masked,Not masked" bitfld.long 0x00 12. " [12] ,Mask interrupt overflow on virtual channel ADC_VC 12" "Masked,Not masked" textline " " bitfld.long 0x00 11. " [11] ,Mask interrupt overflow on virtual channel ADC_VC 11" "Masked,Not masked" bitfld.long 0x00 10. " [10] ,Mask interrupt overflow on virtual channel ADC_VC 10" "Masked,Not masked" bitfld.long 0x00 9. " [9] ,Mask interrupt overflow on virtual channel ADC_VC 9" "Masked,Not masked" bitfld.long 0x00 8. " [8] ,Mask interrupt overflow on virtual channel ADC_VC 8" "Masked,Not masked" textline " " bitfld.long 0x00 7. " [7] ,Mask interrupt overflow on virtual channel ADC_VC 7" "Masked,Not masked" bitfld.long 0x00 6. " [6] ,Mask interrupt overflow on virtual channel ADC_VC 6" "Masked,Not masked" bitfld.long 0x00 5. " [5] ,Mask interrupt overflow on virtual channel ADC_VC 5" "Masked,Not masked" bitfld.long 0x00 4. " [4] ,Mask interrupt overflow on virtual channel ADC_VC 4" "Masked,Not masked" textline " " bitfld.long 0x00 3. " [3] ,Mask interrupt overflow on virtual channel ADC_VC 3" "Masked,Not masked" bitfld.long 0x00 2. " [2] ,Mask interrupt overflow on virtual channel ADC_VC 2" "Masked,Not masked" bitfld.long 0x00 1. " [1] ,Mask interrupt overflow on virtual channel ADC_VC 1" "Masked,Not masked" bitfld.long 0x00 0. " [0] ,Mask interrupt overflow on virtual channel ADC_VC 0" "Masked,Not masked" textline " " rgroup.long 0x20++0x07 line.long 0x00 "ADC_PENDING,Start of Operation Pending" bitfld.long 0x00 31. " ADC_DMA1_RUNNING ,ADC DMA channel1 is running" "No DMA request,DMA request" bitfld.long 0x00 30. " ADC_DMA0_RUNNING ,ADC DMA channel0 is running" "No DMA request,DMA request" textline " " bitfld.long 0x00 15. " ADC_PENDING_VC[15] ,Start of operation pending on virtual channel ADC_VC 15" "Not received,Received" bitfld.long 0x00 14. " [14] ,Start of operation pending on virtual channel ADC_VC 14" "Not received,Received" bitfld.long 0x00 13. " [13] ,Start of operation pending on virtual channel ADC_VC 13" "Not received,Received" bitfld.long 0x00 12. " [12] ,Start of operation pending on virtual channel ADC_VC 12" "Not received,Received" textline " " bitfld.long 0x00 11. " [11] ,Start of operation pending on virtual channel ADC_VC 11" "Not received,Received" bitfld.long 0x00 10. " [10] ,Start of operation pending on virtual channel ADC_VC 10" "Not received,Received" bitfld.long 0x00 9. " [9] ,Start of operation pending on virtual channel ADC_VC 9" "Not received,Received" bitfld.long 0x00 8. " [8] ,Start of operation pending on virtual channel ADC_VC 8" "Not received,Received" textline " " bitfld.long 0x00 7. " [7] ,Start of operation pending on virtual channel ADC_VC 7" "Not received,Received" bitfld.long 0x00 6. " [6] ,Start of operation pending on virtual channel ADC_VC 6" "Not received,Received" bitfld.long 0x00 5. " [5] ,Start of operation pending on virtual channel ADC_VC 5" "Not received,Received" bitfld.long 0x00 4. " [4] ,Start of operation pending on virtual channel ADC_VC 4" "Not received,Received" textline " " bitfld.long 0x00 3. " [3] ,Start of operation pending on virtual channel ADC_VC 3" "Not received,Received" bitfld.long 0x00 2. " [2] ,Start of operation pending on virtual channel ADC_VC 2" "Not received,Received" bitfld.long 0x00 1. " [1] ,Start of operation pending on virtual channel ADC_VC 1" "Not received,Received" bitfld.long 0x00 0. " [0] ,Start of operation pending on virtual channel ADC_VC 0" "Not received,Received" line.long 0x04 "ADC_PENDINGOVF,Start of Operation Pending Overflow" bitfld.long 0x04 31. " ADC_DMA1_RUNNINGOVF ,Overflow with ADC DMA channel1 is running" "No overflow,Overflow" bitfld.long 0x04 30. " ADC_DMA0_RUNNINGOVF ,Overflow with ADC DMA channel0 is running" "No overflow,Overflow" textline " " bitfld.long 0x04 15. " ADC_PENDINGOVF_VC[15] ,Start of operation pending overflow on virtual channel ADC_VC 15" "No event overflow,Event overflow" bitfld.long 0x04 14. " [14] ,Start of operation pending overflow on virtual channel ADC_VC 14" "No event overflow,Event overflow" bitfld.long 0x04 13. " [13] ,Start of operation pending overflow on virtual channel ADC_VC 13" "No event overflow,Event overflow" bitfld.long 0x04 12. " [12] ,Start of operation pending overflow on virtual channel ADC_VC 12" "No event overflow,Event overflow" textline " " bitfld.long 0x04 11. " [11] ,Start of operation pending overflow on virtual channel ADC_VC 11" "No event overflow,Event overflow" bitfld.long 0x04 10. " [10] ,Start of operation pending overflow on virtual channel ADC_VC 10" "No event overflow,Event overflow" bitfld.long 0x04 9. " [9] ,Start of operation pending overflow on virtual channel ADC_VC 9" "No event overflow,Event overflow" bitfld.long 0x04 8. " [8] ,Start of operation pending overflow on virtual channel ADC_VC 8" "No event overflow,Event overflow" textline " " bitfld.long 0x04 7. " [7] ,Start of operation pending overflow on virtual channel ADC_VC 7" "No event overflow,Event overflow" bitfld.long 0x04 6. " [6] ,Start of operation pending overflow on virtual channel ADC_VC 6" "No event overflow,Event overflow" bitfld.long 0x04 5. " [5] ,Start of operation pending overflow on virtual channel ADC_VC 5" "No event overflow,Event overflow" bitfld.long 0x04 4. " [4] ,Start of operation pending overflow on virtual channel ADC_VC 4" "No event overflow,Event overflow" textline " " bitfld.long 0x04 3. " [3] ,Start of operation pending overflow on virtual channel ADC_VC 3" "No event overflow,Event overflow" bitfld.long 0x04 2. " [2] ,Start of operation pending overflow on virtual channel ADC_VC 2" "No event overflow,Event overflow" bitfld.long 0x04 1. " [1] ,Start of operation pending overflow on virtual channel ADC_VC 1" "No event overflow,Event overflow" bitfld.long 0x04 0. " [0] ,Start of operation pending overflow on virtual channel ADC_VC 0" "No event overflow,Event overflow" wgroup.long 0x28++0x03 line.long 0x00 "ADC_PENDINGCLROVF,Clear Start of Operation Overflow" bitfld.long 0x00 31. " ADC_DMA1_RUNNINGCLROVF ,Clear overflow with ADC DMA channel1 is running" "No clear,Clear" bitfld.long 0x00 30. " ADC_DMA0_RUNNINGCLROVF ,Clear overflow with ADC DMA channel0 is running" "No clear,Clear" textline " " bitfld.long 0x00 15. " ADC_PENDINGCLROVF_VC[15] ,Clear start of operation overflow on virtual channel ADC_VC 15" "No event overflow,Event overflow" bitfld.long 0x00 14. " [14] ,Clear start of operation overflow on virtual channel ADC_VC 14" "No event overflow,Event overflow" bitfld.long 0x00 13. " [13] ,Clear start of operation overflow on virtual channel ADC_VC 13" "No event overflow,Event overflow" bitfld.long 0x00 12. " [12] ,Clear start of operation overflow on virtual channel ADC_VC 12" "No event overflow,Event overflow" textline " " bitfld.long 0x00 11. " [11] ,Clear start of operation overflow on virtual channel ADC_VC 11" "No event overflow,Event overflow" bitfld.long 0x00 10. " [10] ,Clear start of operation overflow on virtual channel ADC_VC 10" "No event overflow,Event overflow" bitfld.long 0x00 9. " [9] ,Clear start of operation overflow on virtual channel ADC_VC 9" "No event overflow,Event overflow" bitfld.long 0x00 8. " [8] ,Clear start of operation overflow on virtual channel ADC_VC 8" "No event overflow,Event overflow" textline " " bitfld.long 0x00 7. " [7] ,Clear start of operation overflow on virtual channel ADC_VC 7" "No event overflow,Event overflow" bitfld.long 0x00 6. " [6] ,Clear start of operation overflow on virtual channel ADC_VC 6" "No event overflow,Event overflow" bitfld.long 0x00 5. " [5] ,Clear start of operation overflow on virtual channel ADC_VC 5" "No event overflow,Event overflow" bitfld.long 0x00 4. " [4] ,Clear start of operation overflow on virtual channel ADC_VC 4" "No event overflow,Event overflow" textline " " bitfld.long 0x00 3. " [3] ,Clear start of operation overflow on virtual channel ADC_VC 3" "No event overflow,Event overflow" bitfld.long 0x00 2. " [2] ,Clear start of operation overflow on virtual channel ADC_VC 2" "No event overflow,Event overflow" bitfld.long 0x00 1. " [1] ,Clear start of operation overflow on virtual channel ADC_VC 1" "No event overflow,Event overflow" bitfld.long 0x00 0. " [0] ,Clear start of operation overflow on virtual channel ADC_VC 0" "No event overflow,Event overflow" textline " " rgroup.long 0x2C++0x07 line.long 0x00 "ADC_CONTROL,ADC Control" bitfld.long 0x00 6. " ADC_BUSY ,ADC configuration change in running" "Not in progress,In progress" bitfld.long 0x00 5. " ADC_VC_BUSY ,ADC_VC busy" "Not busy,Busy" bitfld.long 0x00 0.--4. " ADC_VC_RUN ,ADC_VC channel status" "ADC_VC0,ADC_VC1,ADC_VC2,ADC_VC3,ADC_VC4,ADC_VC5,ADC_VC6,ADC_VC7,ADC_VC8,ADC_VC9,ADC_VC10,ADC_VC11,ADC_VC12,ADC_VC13,ADC_VC14,ADC_VC15,?..." textline " " line.long 0x04 "ADC_FORCE,ADC Request" bitfld.long 0x04 15. " ADC_FORCE_VC[15] ,Force start of operation on virtual channel ADC_VC 15" "Not forced,Forced" bitfld.long 0x04 14. " [14] ,Force start of operation on virtual channel ADC_VC 14" "Not forced,Forced" bitfld.long 0x04 13. " [13] ,Force start of operation on virtual channel ADC_VC 13" "Not forced,Forced" bitfld.long 0x04 12. " [12] ,Force start of operation on virtual channel ADC_VC 12" "Not forced,Forced" textline " " bitfld.long 0x04 11. " [11] ,Force start of operation on virtual channel ADC_VC 11" "Not forced,Forced" bitfld.long 0x04 10. " [10] ,Force start of operation on virtual channel ADC_VC 10" "Not forced,Forced" bitfld.long 0x04 9. " [9] ,Force start of operation on virtual channel ADC_VC 9" "Not forced,Forced" bitfld.long 0x04 8. " [8] ,Force start of operation on virtual channel ADC_VC 8" "Not forced,Forced" textline " " bitfld.long 0x04 7. " [7] ,Force start of operation on virtual channel ADC_VC 7" "Not forced,Forced" bitfld.long 0x04 6. " [6] ,Force start of operation on virtual channel ADC_VC 6" "Not forced,Forced" bitfld.long 0x04 5. " [5] ,Force start of operation on virtual channel ADC_VC 5" "Not forced,Forced" bitfld.long 0x04 4. " [4] ,Force start of operation on virtual channel ADC_VC 4" "Not forced,Forced" textline " " bitfld.long 0x04 3. " [3] ,Force start of operation on virtual channel ADC_VC 3" "Not forced,Forced" bitfld.long 0x04 2. " [2] ,Force start of operation on virtual channel ADC_VC 2" "Not forced,Forced" bitfld.long 0x04 1. " [1] ,Force start of operation on virtual channel ADC_VC 1" "Not forced,Forced" bitfld.long 0x04 0. " [0] ,Force start of operation on virtual channel ADC_VC 0" "Not forced,Forced" wgroup.long 0x34++0x07 line.long 0x00 "ADC_SETFORCE,Set ADC Request" bitfld.long 0x00 15. " ADC_SETFORCE_VC[15] ,Set force start of operation on virtual channel ADC_VC 15" "No effect,Set" bitfld.long 0x00 14. " [14] ,Set force start of operation on virtual channel ADC_VC 14" "No effect,Set" bitfld.long 0x00 13. " [13] ,Set force start of operation on virtual channel ADC_VC 13" "No effect,Set" bitfld.long 0x00 12. " [12] ,Set force start of operation on virtual channel ADC_VC 12" "No effect,Set" textline " " bitfld.long 0x00 11. " [11] ,Set force start of operation on virtual channel ADC_VC 11" "No effect,Set" bitfld.long 0x00 10. " [10] ,Set force start of operation on virtual channel ADC_VC 10" "No effect,Set" bitfld.long 0x00 9. " [9] ,Set force start of operation on virtual channel ADC_VC 9" "No effect,Set" bitfld.long 0x00 8. " [8] ,Set force start of operation on virtual channel ADC_VC 8" "No effect,Set" textline " " bitfld.long 0x00 7. " [7] ,Set force start of operation on virtual channel ADC_VC 7" "No effect,Set" bitfld.long 0x00 6. " [6] ,Set force start of operation on virtual channel ADC_VC 6" "No effect,Set" bitfld.long 0x00 5. " [5] ,Set force start of operation on virtual channel ADC_VC 5" "No effect,Set" bitfld.long 0x00 4. " [4] ,Set force start of operation on virtual channel ADC_VC 4" "No effect,Set" textline " " bitfld.long 0x00 3. " [3] ,Set force start of operation on virtual channel ADC_VC 3" "No effect,Set" bitfld.long 0x00 2. " [2] ,Set force start of operation on virtual channel ADC_VC 2" "No effect,Set" bitfld.long 0x00 1. " [1] ,Set force start of operation on virtual channel ADC_VC 1" "No effect,Set" bitfld.long 0x00 0. " [0] ,Set force start of operation on virtual channel ADC_VC 0" "No effect,Set" line.long 0x04 "ADC_CLRFORCE,Clear ADC Request" bitfld.long 0x04 15. " ADC_CLRFORCE_VC[15] ,Clear force start of operation on virtual channel ADC_VC 15" "No effect,Clear" bitfld.long 0x04 14. " [14] ,Clear force start of operation on virtual channel ADC_VC 14" "No effect,Clear" bitfld.long 0x04 13. " [13] ,Clear force start of operation on virtual channel ADC_VC 13" "No effect,Clear" bitfld.long 0x04 12. " [12] ,Clear force start of operation on virtual channel ADC_VC 12" "No effect,Clear" textline " " bitfld.long 0x04 11. " [11] ,Clear force start of operation on virtual channel ADC_VC 11" "No effect,Clear" bitfld.long 0x04 10. " [10] ,Clear force start of operation on virtual channel ADC_VC 10" "No effect,Clear" bitfld.long 0x04 9. " [9] ,Clear force start of operation on virtual channel ADC_VC 9" "No effect,Clear" bitfld.long 0x04 8. " [8] ,Clear force start of operation on virtual channel ADC_VC 8" "No effect,Clear" textline " " bitfld.long 0x04 7. " [7] ,Clear force start of operation on virtual channel ADC_VC 7" "No effect,Clear" bitfld.long 0x04 6. " [6] ,Clear force start of operation on virtual channel ADC_VC 6" "No effect,Clear" bitfld.long 0x04 5. " [5] ,Clear force start of operation on virtual channel ADC_VC 5" "No effect,Clear" bitfld.long 0x04 4. " [4] ,Clear force start of operation on virtual channel ADC_VC 4" "No effect,Clear" textline " " bitfld.long 0x04 3. " [3] ,Clear force start of operation on virtual channel ADC_VC 3" "No effect,Clear" bitfld.long 0x04 2. " [2] ,Clear force start of operation on virtual channel ADC_VC 2" "No effect,Clear" bitfld.long 0x04 1. " [1] ,Clear force start of operation on virtual channel ADC_VC 1" "No effect,Clear" bitfld.long 0x04 0. " [0] ,Clear force start of operation on virtual channel ADC_VC 0" "No effect,Clear" textline " " group.long 0x3C++0x07 line.long 0x00 "ADC_PRIORITY,ADC Priority Mode" rbitfld.long 0x00 5.--9. " ADC_RR_POINTER ,ADC_VC round robin pointer" "ADC_VC0 last round robin,ADC_VC1 last round robin,ADC_VC2 last round robin,ADC_VC3 last round robin,ADC_VC4 last round robin,ADC_VC5 last round robin,ADC_VC6 last round robin,ADC_VC7 last round robin,ADC_VC8 last round robin,ADC_VC9 last round robin,ADC_VC10 last round robin,ADC_VC11 last round robin,ADC_VC12 last round robin,ADC_VC13 last round robin,ADC_VC14 last round robin,ADC_VC15 last round robin,?..." bitfld.long 0x00 0.--4. " ADC_PRIORITY ,ADC_VC priority" "Round robin all channels,ADC_VC0 high priority,ADC_VC0..1 high priority,ADC_VC0..2 high priority,ADC_VC0..3 high priority,ADC_VC0..4 high priority,ADC_VC0..5 high priority,ADC_VC0..6 high priority,ADC_VC0..7 high priority,ADC_VC0..8 high priority,ADC_VC0..9 high priority,ADC_VC0..10 high priority,ADC_VC0..11 high priority,ADC_VC0..12 high priority,ADC_VC0..13 high priority,ADC_VC0..14 high priority,All channels high,?..." line.long 0x04 "ADC_CONFIG,ADC Configuration" bitfld.long 0x04 4. " ADC_DMA ,DMA channel enable" "Disabled,Enabled" bitfld.long 0x04 3. " ADC_POWER_DOWN ,Power down mode enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " ADC_SAMPLE_HOLD_ENABLE[2] ,ADC1 and ADC2 physical channel8 sample and hold feature enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,ADC1 and ADC2 physical channel7 sample and hold feature enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " [0] ,ADC1 and ADC2 physical channel6 sample and hold feature enable" "Disabled,Enabled" group.long 0xAC++0x03 line.long 0x00 "ADC_ACQS,ADC Control Sample and Hold" bitfld.long 0x00 7.--9. " ADC_TSHOH ,ADC sample and hold SHOUT to SHCNT hold time" ",,2 cycles of ADC_CLK,3 cycles of ADC_CLK,4 cycles of ADC_CLK,5 cycles of ADC_CLK,6 cycles of ADC_CLK,?..." bitfld.long 0x00 5.--6. " ADC_TSHSET ,Delay from ADC sample and hold SHOUT to CONV setup time" ",1 cycle of ADC_CLK,2 cycles of ADC_CLK,?..." textline " " bitfld.long 0x00 0.--4. " ADC_TSHSAMP ,ADC sample and hold sampling time" ",,2 cycles of ADC_CLK,3 cycles of ADC_CLK,4 cycles of ADC_CLK,5 cycles of ADC_CLK,6 cycles of ADC_CLK,7 cycles of ADC_CLK,8 cycles of ADC_CLK,9 cycles of ADC_CLK,10 cycles of ADC_CLK,11 cycles of ADC_CLK,12 cycles of ADC_CLK,13 cycles of ADC_CLK,14 cycles of ADC_CLK,15 cycles of ADC_CLK,16 cycles of ADC_CLK,17 cycles of ADC_CLK,18 cycles of ADC_CLK,19 cycles of ADC_CLK,20 cycles of ADC_CLK,21 cycles of ADC_CLK,22 cycles of ADC_CLK,23 cycles of ADC_CLK,24 cycles of ADC_CLK,25 cycles of ADC_CLK,26 cycles of ADC_CLK,27 cycles of ADC_CLK,28 cycles of ADC_CLK,29 cycles of ADC_CLK,30 cycles of ADC_CLK,31 cycles of ADC_CLK" textline " " group.long 0xB0++0x03 line.long 0x00 "ADC_MASKLOCK0,Mask Data Locked 0" bitfld.long 0x00 15. " ADC_MASKLOCK[15] ,Mask data locked ADC_DATA 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Mask data locked ADC_DATA 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Mask data locked ADC_DATA 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Mask data locked ADC_DATA 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Mask data locked ADC_DATA 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Mask data locked ADC_DATA 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Mask data locked ADC_DATA 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Mask data locked ADC_DATA 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Mask data locked ADC_DATA 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Mask data locked ADC_DATA 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Mask data locked ADC_DATA 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Mask data locked ADC_DATA 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Mask data locked ADC_DATA 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Mask data locked ADC_DATA 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Mask data locked ADC_DATA 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Mask data locked ADC_DATA 0" "Disabled,Enabled" group.long 0xB4++0x03 line.long 0x00 "ADC_MASKLOCK1,Mask Data Locked 1" bitfld.long 0x00 15. " ADC_MASKLOCK[15] ,Mask data locked ADC_DATA 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Mask data locked ADC_DATA 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Mask data locked ADC_DATA 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Mask data locked ADC_DATA 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Mask data locked ADC_DATA 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Mask data locked ADC_DATA 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Mask data locked ADC_DATA 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Mask data locked ADC_DATA 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Mask data locked ADC_DATA 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Mask data locked ADC_DATA 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Mask data locked ADC_DATA 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Mask data locked ADC_DATA 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Mask data locked ADC_DATA 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Mask data locked ADC_DATA 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Mask data locked ADC_DATA 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Mask data locked ADC_DATA 0" "Disabled,Enabled" group.long 0xB8++0x03 line.long 0x00 "ADC_MASKLOCK2,Mask Data Locked 2" bitfld.long 0x00 15. " ADC_MASKLOCK[15] ,Mask data locked ADC_DATA 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Mask data locked ADC_DATA 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Mask data locked ADC_DATA 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Mask data locked ADC_DATA 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Mask data locked ADC_DATA 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Mask data locked ADC_DATA 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Mask data locked ADC_DATA 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Mask data locked ADC_DATA 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Mask data locked ADC_DATA 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Mask data locked ADC_DATA 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Mask data locked ADC_DATA 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Mask data locked ADC_DATA 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Mask data locked ADC_DATA 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Mask data locked ADC_DATA 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Mask data locked ADC_DATA 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Mask data locked ADC_DATA 0" "Disabled,Enabled" group.long 0xBC++0x03 line.long 0x00 "ADC_MASKLOCK3,Mask Data Locked 3" bitfld.long 0x00 15. " ADC_MASKLOCK[15] ,Mask data locked ADC_DATA 15" "Disabled,Enabled" bitfld.long 0x00 14. " [14] ,Mask data locked ADC_DATA 14" "Disabled,Enabled" bitfld.long 0x00 13. " [13] ,Mask data locked ADC_DATA 13" "Disabled,Enabled" bitfld.long 0x00 12. " [12] ,Mask data locked ADC_DATA 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " [11] ,Mask data locked ADC_DATA 11" "Disabled,Enabled" bitfld.long 0x00 10. " [10] ,Mask data locked ADC_DATA 10" "Disabled,Enabled" bitfld.long 0x00 9. " [9] ,Mask data locked ADC_DATA 9" "Disabled,Enabled" bitfld.long 0x00 8. " [8] ,Mask data locked ADC_DATA 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " [7] ,Mask data locked ADC_DATA 7" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Mask data locked ADC_DATA 6" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Mask data locked ADC_DATA 5" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Mask data locked ADC_DATA 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Mask data locked ADC_DATA 3" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Mask data locked ADC_DATA 2" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Mask data locked ADC_DATA 1" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Mask data locked ADC_DATA 0" "Disabled,Enabled" textline " " if (((per.l(ad:0x40065140+0xC0))&0x180C0)==0x18000) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[0] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[0] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xC0))&0x180C0)==0x10000) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[0] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xC0))&0x180C0)==0x8000) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[0] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xC0))&0x180C0)==0x18040) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xC0))&0x180C0)==0x10040) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xC0))&0x180C0)==0x8040) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xC0))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xC0))&0x18000)==0x00) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xC0))&0x180C0)==0x180C0) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xC0))&0x180C0)==0x100C0) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xC0))&0x180C0)==0x80C0) group.long 0xC0++0x03 line.long 0x00 "ADC_VC0,ADC Control Register For Virtual Channel 0" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 0" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 0" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 0" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 0" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 0" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 0" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 0" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xC4))&0x180C0)==0x18000) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[1] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[1] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xC4))&0x180C0)==0x10000) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[1] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xC4))&0x180C0)==0x8000) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[1] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xC4))&0x180C0)==0x18040) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xC4))&0x180C0)==0x10040) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xC4))&0x180C0)==0x8040) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xC4))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xC4))&0x18000)==0x00) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xC4))&0x180C0)==0x180C0) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xC4))&0x180C0)==0x100C0) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xC4))&0x180C0)==0x80C0) group.long 0xC4++0x03 line.long 0x00 "ADC_VC1,ADC Control Register For Virtual Channel 1" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 1" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 1" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 1" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 1" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 1" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 1" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 1" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xC8))&0x180C0)==0x18000) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[2] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[2] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xC8))&0x180C0)==0x10000) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[2] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xC8))&0x180C0)==0x8000) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[2] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xC8))&0x180C0)==0x18040) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xC8))&0x180C0)==0x10040) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xC8))&0x180C0)==0x8040) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xC8))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xC8))&0x18000)==0x00) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xC8))&0x180C0)==0x180C0) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xC8))&0x180C0)==0x100C0) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xC8))&0x180C0)==0x80C0) group.long 0xC8++0x03 line.long 0x00 "ADC_VC2,ADC Control Register For Virtual Channel 2" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 2" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 2" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 2" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 2" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 2" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 2" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 2" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xCC))&0x180C0)==0x18000) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[3] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[3] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xCC))&0x180C0)==0x10000) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[3] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xCC))&0x180C0)==0x8000) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[3] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xCC))&0x180C0)==0x18040) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xCC))&0x180C0)==0x10040) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xCC))&0x180C0)==0x8040) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xCC))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xCC))&0x18000)==0x00) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xCC))&0x180C0)==0x180C0) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xCC))&0x180C0)==0x100C0) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xCC))&0x180C0)==0x80C0) group.long 0xCC++0x03 line.long 0x00 "ADC_VC3,ADC Control Register For Virtual Channel 3" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 3" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 3" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 3" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 3" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 3" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 3" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xD0))&0x180C0)==0x18000) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[4] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[4] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xD0))&0x180C0)==0x10000) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[4] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xD0))&0x180C0)==0x8000) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[4] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xD0))&0x180C0)==0x18040) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xD0))&0x180C0)==0x10040) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xD0))&0x180C0)==0x8040) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xD0))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xD0))&0x18000)==0x00) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xD0))&0x180C0)==0x180C0) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xD0))&0x180C0)==0x100C0) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xD0))&0x180C0)==0x80C0) group.long 0xD0++0x03 line.long 0x00 "ADC_VC4,ADC Control Register For Virtual Channel 4" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 4" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 4" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 4" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 4" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 4" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 4" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 4" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xD4))&0x180C0)==0x18000) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[5] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[5] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xD4))&0x180C0)==0x10000) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[5] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xD4))&0x180C0)==0x8000) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[5] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xD4))&0x180C0)==0x18040) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xD4))&0x180C0)==0x10040) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xD4))&0x180C0)==0x8040) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xD4))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xD4))&0x18000)==0x00) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xD4))&0x180C0)==0x180C0) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xD4))&0x180C0)==0x100C0) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xD4))&0x180C0)==0x80C0) group.long 0xD4++0x03 line.long 0x00 "ADC_VC5,ADC Control Register For Virtual Channel 5" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 5" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 5" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 5" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 5" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 5" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 5" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 5" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xD8))&0x180C0)==0x18000) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[6] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[6] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xD8))&0x180C0)==0x10000) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[6] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xD8))&0x180C0)==0x8000) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[6] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xD8))&0x180C0)==0x18040) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xD8))&0x180C0)==0x10040) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xD8))&0x180C0)==0x8040) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xD8))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xD8))&0x18000)==0x00) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xD8))&0x180C0)==0x180C0) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xD8))&0x180C0)==0x100C0) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xD8))&0x180C0)==0x80C0) group.long 0xD8++0x03 line.long 0x00 "ADC_VC6,ADC Control Register For Virtual Channel 6" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 6" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 6" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 6" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 6" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 6" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 6" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 6" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xDC))&0x180C0)==0x18000) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[7] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[7] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xDC))&0x180C0)==0x10000) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[7] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xDC))&0x180C0)==0x8000) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[7] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xDC))&0x180C0)==0x18040) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xDC))&0x180C0)==0x10040) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xDC))&0x180C0)==0x8040) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xDC))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xDC))&0x18000)==0x00) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xDC))&0x180C0)==0x180C0) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xDC))&0x180C0)==0x100C0) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xDC))&0x180C0)==0x80C0) group.long 0xDC++0x03 line.long 0x00 "ADC_VC7,ADC Control Register For Virtual Channel 7" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 7" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 7" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 7" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 7" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 7" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 7" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 7" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xE0))&0x180C0)==0x18000) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[8] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[8] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xE0))&0x180C0)==0x10000) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[8] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xE0))&0x180C0)==0x8000) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[8] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xE0))&0x180C0)==0x18040) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xE0))&0x180C0)==0x10040) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xE0))&0x180C0)==0x8040) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xE0))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xE0))&0x18000)==0x00) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xE0))&0x180C0)==0x180C0) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xE0))&0x180C0)==0x100C0) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xE0))&0x180C0)==0x80C0) group.long 0xE0++0x03 line.long 0x00 "ADC_VC8,ADC Control Register For Virtual Channel 8" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 8" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 8" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 8" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 8" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 8" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 8" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 8" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xE4))&0x180C0)==0x18000) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[9] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[9] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xE4))&0x180C0)==0x10000) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[9] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xE4))&0x180C0)==0x8000) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[9] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xE4))&0x180C0)==0x18040) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xE4))&0x180C0)==0x10040) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xE4))&0x180C0)==0x8040) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xE4))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xE4))&0x18000)==0x00) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xE4))&0x180C0)==0x180C0) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xE4))&0x180C0)==0x100C0) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xE4))&0x180C0)==0x80C0) group.long 0xE4++0x03 line.long 0x00 "ADC_VC9,ADC Control Register For Virtual Channel 9" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 9" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 9" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 9" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 9" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 9" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 9" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 9" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xE8))&0x180C0)==0x18000) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[10] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[10] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xE8))&0x180C0)==0x10000) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[10] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xE8))&0x180C0)==0x8000) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[10] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xE8))&0x180C0)==0x18040) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xE8))&0x180C0)==0x10040) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xE8))&0x180C0)==0x8040) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xE8))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xE8))&0x18000)==0x00) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xE8))&0x180C0)==0x180C0) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xE8))&0x180C0)==0x100C0) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xE8))&0x180C0)==0x80C0) group.long 0xE8++0x03 line.long 0x00 "ADC_VC10,ADC Control Register For Virtual Channel 10" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 10" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 10" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 10" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 10" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 10" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 10" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 10" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xEC))&0x180C0)==0x18000) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[11] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[11] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xEC))&0x180C0)==0x10000) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[11] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xEC))&0x180C0)==0x8000) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[11] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xEC))&0x180C0)==0x18040) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xEC))&0x180C0)==0x10040) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xEC))&0x180C0)==0x8040) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xEC))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xEC))&0x18000)==0x00) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xEC))&0x180C0)==0x180C0) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xEC))&0x180C0)==0x100C0) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xEC))&0x180C0)==0x80C0) group.long 0xEC++0x03 line.long 0x00 "ADC_VC11,ADC Control Register For Virtual Channel 11" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 11" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 11" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 11" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 11" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 11" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 11" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 11" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xF0))&0x180C0)==0x18000) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[12] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[12] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xF0))&0x180C0)==0x10000) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[12] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xF0))&0x180C0)==0x8000) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[12] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xF0))&0x180C0)==0x18040) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xF0))&0x180C0)==0x10040) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xF0))&0x180C0)==0x8040) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xF0))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xF0))&0x18000)==0x00) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xF0))&0x180C0)==0x180C0) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xF0))&0x180C0)==0x100C0) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xF0))&0x180C0)==0x80C0) group.long 0xF0++0x03 line.long 0x00 "ADC_VC12,ADC Control Register For Virtual Channel 12" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 12" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 12" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 12" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 12" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 12" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 12" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 12" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xF4))&0x180C0)==0x18000) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[13] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[13] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xF4))&0x180C0)==0x10000) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[13] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xF4))&0x180C0)==0x8000) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[13] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xF4))&0x180C0)==0x18040) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xF4))&0x180C0)==0x10040) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xF4))&0x180C0)==0x8040) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xF4))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xF4))&0x18000)==0x00) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xF4))&0x180C0)==0x180C0) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xF4))&0x180C0)==0x100C0) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xF4))&0x180C0)==0x80C0) group.long 0xF4++0x03 line.long 0x00 "ADC_VC13,ADC Control Register For Virtual Channel 13" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 13" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 13" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 13" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 13" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 13" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 13" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 13" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xF8))&0x180C0)==0x18000) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[14] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[14] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xF8))&0x180C0)==0x10000) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[14] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xF8))&0x180C0)==0x8000) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[14] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xF8))&0x180C0)==0x18040) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xF8))&0x180C0)==0x10040) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xF8))&0x180C0)==0x8040) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xF8))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xF8))&0x18000)==0x00) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xF8))&0x180C0)==0x180C0) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xF8))&0x180C0)==0x100C0) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xF8))&0x180C0)==0x80C0) group.long 0xF8++0x03 line.long 0x00 "ADC_VC14,ADC Control Register For Virtual Channel 14" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 14" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 14" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 14" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 14" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 14" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 14" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 14" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif if (((per.l(ad:0x40065140+0xFC))&0x180C0)==0x18000) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[15] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" textline " " endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[15] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xFC))&0x180C0)==0x10000) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Select the physical channel ADC2_IN[8:6,4:0] to be converted when ADC_VC[15] is received by the ADC state machine to run" "ADC2_IN0,ADC2_IN1,ADC2_IN2,ADC2_IN3,ADC2_IN4,ADC2_IN6,ADC2_IN7,ADC2_IN8" endif elif (((per.l(ad:0x40065140+0xFC))&0x180C0)==0x8000) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Select the physical channel ADC1_IN[8:6,4:0] to be converted when ADC_VC[15] is received by the ADC state machine to run" "ADC1_IN0,ADC1_IN1,ADC1_IN2,ADC1_IN3,ADC1_IN4,ADC1_IN6,ADC1_IN7,ADC1_IN8" elif (((per.l(ad:0x40065140+0xFC))&0x180C0)==0x18040) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" textline " " endif bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xFC))&0x180C0)==0x10040) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 5. " ADC2_CHANNELSEL[2] ,Sample and hold on physical channel ADC2_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 4. " [1] ,Sample and hold on physical channel ADC2_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 3. " [0] ,Sample and hold on physical channel ADC2_IN6" "Not sampled and held,Sampled and held" endif elif (((per.l(ad:0x40065140+0xFC))&0x180C0)==0x8040) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 2. " ADC1_CHANNELSEL[2] ,Sample and hold on physical channel ADC1_IN8" "Not sampled and held,Sampled and held" bitfld.long 0x00 1. " [1] ,Sample and hold on physical channel ADC1_IN7" "Not sampled and held,Sampled and held" bitfld.long 0x00 0. " [0] ,Sample and hold on physical channel ADC1_IN6" "Not sampled and held,Sampled and held" elif (((per.l(ad:0x40065140+0xFC))&0xC0)==0x80)||(((per.l(ad:0x40065140+0xFC))&0x18000)==0x00) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" elif (((per.l(ad:0x40065140+0xFC))&0x180C0)==0x180C0) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." elif (((per.l(ad:0x40065140+0xFC))&0x180C0)==0x100C0) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" sif cpuis("R9A06G032-CA7") textline " " bitfld.long 0x00 3.--5. " ADC2_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC2_DATA0..15 to rADC2_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif elif (((per.l(ad:0x40065140+0xFC))&0x180C0)==0x80C0) group.long 0xFC++0x03 line.long 0x00 "ADC_VC15,ADC Control Register For Virtual Channel 15" bitfld.long 0x00 17.--18. " ADC_DMA_REQUEST ,ADC DMA request on virtual channel ADC_VC 15" "ADC DMA disabled,,ADC DMA0 enabled,ADC DMA1 enabled" textline " " sif cpuis("R9A06G032-CA7") bitfld.long 0x00 16. " ADC2_ENABLE ,ADC2 enable on virtual channel ADC_VC 15" "Disabled,Enabled" textline " " endif bitfld.long 0x00 15. " ADC1_ENABLE ,ADC1 enable on virtual channel ADC_VC 15" "Disabled,Enabled" bitfld.long 0x00 14. " ADC_CONTINUOUS ,ADC continuous mode on virtual channel ADC_VC 15" "Single,Continuous" textline " " bitfld.long 0x00 13. " ADC_TRIGENABLE ,Trigger enable on virtual channel ADC_VC 15" "Not triggered,Triggered" bitfld.long 0x00 8.--12. " ADC_TRIGSEL ,Trigger select on virtual channel ADC_VC 15" ",,,,,,,,,,,,,,,,iADC_EOC_VC0,iADC_EOC_VC1,iADC_EOC_VC2,iADC_EOC_VC3,iADC_EOC_VC4,iADC_EOC_VC5,iADC_EOC_VC6,iADC_EOC_VC7,iADC_EOC_VC8,iADC_EOC_VC9,iADC_EOC_VC10,iADC_EOC_VC11,iADC_EOC_VC12,iADC_EOC_VC13,iADC_EOC_VC14,iADC_EOC_VC15,?..." textline " " bitfld.long 0x00 6.--7. " ADC_MODE ,ADC mode on virtual channel ADC_VC 15" "Physical channel convert,Sample and hold,Interrupt && end of command,Data copy in data lock reg" textline " " bitfld.long 0x00 0.--2. " ADC1_CHANNELSEL ,Mask data locked used to enable or disable a copy from each rADC1_DATA0..15 to rADC1_DATALOCK0..15 registers" "rADC_MASKLOCK0,rADC_MASKLOCK1,rADC_MASKLOCK2,rADC_MASKLOCK3,?..." endif textline " " rgroup.long 0x100++0x03 line.long 0x00 "ADC1_DATA0,ADC1 Conversion Data Of Virtual Channel 0" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 0" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 0 channel" rgroup.long 0x104++0x03 line.long 0x00 "ADC1_DATA1,ADC1 Conversion Data Of Virtual Channel 1" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 1" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 1 channel" rgroup.long 0x108++0x03 line.long 0x00 "ADC1_DATA2,ADC1 Conversion Data Of Virtual Channel 2" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 2" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 2 channel" rgroup.long 0x10C++0x03 line.long 0x00 "ADC1_DATA3,ADC1 Conversion Data Of Virtual Channel 3" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 3" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 3 channel" rgroup.long 0x110++0x03 line.long 0x00 "ADC1_DATA4,ADC1 Conversion Data Of Virtual Channel 4" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 4" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 4 channel" rgroup.long 0x114++0x03 line.long 0x00 "ADC1_DATA5,ADC1 Conversion Data Of Virtual Channel 5" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 5" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 5 channel" rgroup.long 0x118++0x03 line.long 0x00 "ADC1_DATA6,ADC1 Conversion Data Of Virtual Channel 6" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 6" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 6 channel" rgroup.long 0x11C++0x03 line.long 0x00 "ADC1_DATA7,ADC1 Conversion Data Of Virtual Channel 7" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 7" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 7 channel" rgroup.long 0x120++0x03 line.long 0x00 "ADC1_DATA8,ADC1 Conversion Data Of Virtual Channel 8" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 8" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 8 channel" rgroup.long 0x124++0x03 line.long 0x00 "ADC1_DATA9,ADC1 Conversion Data Of Virtual Channel 9" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 9" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 9 channel" rgroup.long 0x128++0x03 line.long 0x00 "ADC1_DATA10,ADC1 Conversion Data Of Virtual Channel 10" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 10" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 10 channel" rgroup.long 0x12C++0x03 line.long 0x00 "ADC1_DATA11,ADC1 Conversion Data Of Virtual Channel 11" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 11" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 11 channel" rgroup.long 0x130++0x03 line.long 0x00 "ADC1_DATA12,ADC1 Conversion Data Of Virtual Channel 12" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 12" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 12 channel" rgroup.long 0x134++0x03 line.long 0x00 "ADC1_DATA13,ADC1 Conversion Data Of Virtual Channel 13" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 13" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 13 channel" rgroup.long 0x138++0x03 line.long 0x00 "ADC1_DATA14,ADC1 Conversion Data Of Virtual Channel 14" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 14" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 14 channel" rgroup.long 0x13C++0x03 line.long 0x00 "ADC1_DATA15,ADC1 Conversion Data Of Virtual Channel 15" bitfld.long 0x00 31. " ADC1_DATA_UPDATE ,Data has been updated since the last copy from ADC1_DATA 15" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATA ,ADC1 conversion data for virtual channel ADC_VC 15 channel" rgroup.long 0x180++0x03 line.long 0x00 "ADC1_DATALOCK0,ADC1 DataLock 0 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 0 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 0 register" rgroup.long 0x184++0x03 line.long 0x00 "ADC1_DATALOCK1,ADC1 DataLock 1 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 1 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 1 register" rgroup.long 0x188++0x03 line.long 0x00 "ADC1_DATALOCK2,ADC1 DataLock 2 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 2 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 2 register" rgroup.long 0x18C++0x03 line.long 0x00 "ADC1_DATALOCK3,ADC1 DataLock 3 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 3 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 3 register" rgroup.long 0x190++0x03 line.long 0x00 "ADC1_DATALOCK4,ADC1 DataLock 4 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 4 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 4 register" rgroup.long 0x194++0x03 line.long 0x00 "ADC1_DATALOCK5,ADC1 DataLock 5 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 5 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 5 register" rgroup.long 0x198++0x03 line.long 0x00 "ADC1_DATALOCK6,ADC1 DataLock 6 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 6 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 6 register" rgroup.long 0x19C++0x03 line.long 0x00 "ADC1_DATALOCK7,ADC1 DataLock 7 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 7 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 7 register" rgroup.long 0x1A0++0x03 line.long 0x00 "ADC1_DATALOCK8,ADC1 DataLock 8 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 8 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 8 register" rgroup.long 0x1A4++0x03 line.long 0x00 "ADC1_DATALOCK9,ADC1 DataLock 9 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 9 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 9 register" rgroup.long 0x1A8++0x03 line.long 0x00 "ADC1_DATALOCK10,ADC1 DataLock 10 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 10 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 10 register" rgroup.long 0x1AC++0x03 line.long 0x00 "ADC1_DATALOCK11,ADC1 DataLock 11 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 11 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 11 register" rgroup.long 0x1B0++0x03 line.long 0x00 "ADC1_DATALOCK12,ADC1 DataLock 12 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 12 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 12 register" rgroup.long 0x1B4++0x03 line.long 0x00 "ADC1_DATALOCK13,ADC1 DataLock 13 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 13 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 13 register" rgroup.long 0x1B8++0x03 line.long 0x00 "ADC1_DATALOCK14,ADC1 DataLock 14 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 14 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 14 register" rgroup.long 0x1BC++0x03 line.long 0x00 "ADC1_DATALOCK15,ADC1 DataLock 15 Register" bitfld.long 0x00 31. " ADC1_DATALOCK_UPDATE ,Copy locked of ADC1_DATA_Update bits of ADC1_DATA 15 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC1_DATALOCK ,Copy locked of ADC1_DATA bits of ADC1_DATA 15 register" sif cpuis("R9A06G032-CA7") rgroup.long 0x0++0x03 line.long 0x00 "ADC2_DATA0,ADC2 Conversion Data Of Virtual Channel 0" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 0" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 0 channel" rgroup.long 0x4++0x03 line.long 0x00 "ADC2_DATA1,ADC2 Conversion Data Of Virtual Channel 1" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 1" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 1 channel" rgroup.long 0x8++0x03 line.long 0x00 "ADC2_DATA2,ADC2 Conversion Data Of Virtual Channel 2" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 2" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 2 channel" rgroup.long 0xC++0x03 line.long 0x00 "ADC2_DATA3,ADC2 Conversion Data Of Virtual Channel 3" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 3" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 3 channel" rgroup.long 0x10++0x03 line.long 0x00 "ADC2_DATA4,ADC2 Conversion Data Of Virtual Channel 4" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 4" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 4 channel" rgroup.long 0x14++0x03 line.long 0x00 "ADC2_DATA5,ADC2 Conversion Data Of Virtual Channel 5" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 5" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 5 channel" rgroup.long 0x18++0x03 line.long 0x00 "ADC2_DATA6,ADC2 Conversion Data Of Virtual Channel 6" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 6" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 6 channel" rgroup.long 0x1C++0x03 line.long 0x00 "ADC2_DATA7,ADC2 Conversion Data Of Virtual Channel 7" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 7" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 7 channel" rgroup.long 0x20++0x03 line.long 0x00 "ADC2_DATA8,ADC2 Conversion Data Of Virtual Channel 8" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 8" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 8 channel" rgroup.long 0x24++0x03 line.long 0x00 "ADC2_DATA9,ADC2 Conversion Data Of Virtual Channel 9" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 9" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 9 channel" rgroup.long 0x28++0x03 line.long 0x00 "ADC2_DATA10,ADC2 Conversion Data Of Virtual Channel 10" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 10" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 10 channel" rgroup.long 0x2C++0x03 line.long 0x00 "ADC2_DATA11,ADC2 Conversion Data Of Virtual Channel 11" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 11" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 11 channel" rgroup.long 0x30++0x03 line.long 0x00 "ADC2_DATA12,ADC2 Conversion Data Of Virtual Channel 12" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 12" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 12 channel" rgroup.long 0x34++0x03 line.long 0x00 "ADC2_DATA13,ADC2 Conversion Data Of Virtual Channel 13" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 13" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 13 channel" rgroup.long 0x38++0x03 line.long 0x00 "ADC2_DATA14,ADC2 Conversion Data Of Virtual Channel 14" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 14" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 14 channel" rgroup.long 0x3C++0x03 line.long 0x00 "ADC2_DATA15,ADC2 Conversion Data Of Virtual Channel 15" bitfld.long 0x00 31. " ADC2_DATA_UPDATE ,Data has been updated since the last copy from ADC2_DATA 15" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATA ,ADC2 conversion data for virtual channel ADC_VC 15 channel" rgroup.long 0x80++0x03 line.long 0x00 "ADC2_DATALOCK0,ADC2 DataLock 0 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 0 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 0 register" rgroup.long 0x84++0x03 line.long 0x00 "ADC2_DATALOCK1,ADC2 DataLock 1 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 1 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 1 register" rgroup.long 0x88++0x03 line.long 0x00 "ADC2_DATALOCK2,ADC2 DataLock 2 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 2 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 2 register" rgroup.long 0x8C++0x03 line.long 0x00 "ADC2_DATALOCK3,ADC2 DataLock 3 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 3 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 3 register" rgroup.long 0x90++0x03 line.long 0x00 "ADC2_DATALOCK4,ADC2 DataLock 4 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 4 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 4 register" rgroup.long 0x94++0x03 line.long 0x00 "ADC2_DATALOCK5,ADC2 DataLock 5 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 5 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 5 register" rgroup.long 0x98++0x03 line.long 0x00 "ADC2_DATALOCK6,ADC2 DataLock 6 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 6 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 6 register" rgroup.long 0x9C++0x03 line.long 0x00 "ADC2_DATALOCK7,ADC2 DataLock 7 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 7 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 7 register" rgroup.long 0xA0++0x03 line.long 0x00 "ADC2_DATALOCK8,ADC2 DataLock 8 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 8 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 8 register" rgroup.long 0xA4++0x03 line.long 0x00 "ADC2_DATALOCK9,ADC2 DataLock 9 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 9 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 9 register" rgroup.long 0xA8++0x03 line.long 0x00 "ADC2_DATALOCK10,ADC2 DataLock 10 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 10 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 10 register" rgroup.long 0xAC++0x03 line.long 0x00 "ADC2_DATALOCK11,ADC2 DataLock 11 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 11 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 11 register" rgroup.long 0xB0++0x03 line.long 0x00 "ADC2_DATALOCK12,ADC2 DataLock 12 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 12 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 12 register" rgroup.long 0xB4++0x03 line.long 0x00 "ADC2_DATALOCK13,ADC2 DataLock 13 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 13 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 13 register" rgroup.long 0xB8++0x03 line.long 0x00 "ADC2_DATALOCK14,ADC2 DataLock 14 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 14 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 14 register" rgroup.long 0xBC++0x03 line.long 0x00 "ADC2_DATALOCK15,ADC2 DataLock 15 Register" bitfld.long 0x00 31. " ADC2_DATALOCK_UPDATE ,Copy locked of ADC2_DATA_Update bits of ADC2_DATA 15 register" "Not updated,Updated" hexmask.long.word 0x00 0.--11. 1. " ADC2_DATALOCK ,Copy locked of ADC2_DATA bits of ADC2_DATA 15 register" endif width 0x0B tree.end endif tree.end tree "LCD Controller" base ad:0x53004000 width 17. if (((per.l(ad:0x53004000))&0x1C)==0x18) group.long 0x00++0x03 line.long 0x00 "LCD_CR1,Control Register 1" bitfld.long 0x00 19. " LCD_FBP ,Frame buffer 24 bpp packed word" "Not packed,24 bpp packed" bitfld.long 0x00 18. " LCD_LPS ,LCD port select" "One LCD port output,?..." bitfld.long 0x00 16.--17. " LCD_FDW ,FIFO DMA request burst size" "4-beat burst,8-beat burst,16-beat burst,?..." textline " " bitfld.long 0x00 15. " LCD_PSS ,Palette load source select" "Slave bus,Frame buffer" bitfld.long 0x00 13. " LCD_OPS[1] ,Output pixel select" "RGB 5:6:5||5:5:5 on LSB,RGB 5:6:5||5:5:5 on MSB" bitfld.long 0x00 12. " LCD_OPS[0] ,Output pixel select" "16 bpp RGB||BGR 5:6:5,16 bpp RGB||BGR 5:5:5" textline " " bitfld.long 0x00 11. " LCD_VSP ,Vertical sync polarity" "High,Low" bitfld.long 0x00 10. " LCD_HSP ,Horizontal sync polarity" "High,Low" bitfld.long 0x00 9. " LCD_PCP ,Pixel clock polarity" "Rising,Falling" textline " " bitfld.long 0x00 8. " LCD_DEP ,Data enable polarity" "Low,High" bitfld.long 0x00 7. " LCD_EBO ,Big or little endian byte ordering mode in palette" "Little,Big" bitfld.long 0x00 6. " LCD_EPO ,Big or little endian pixel ordering within byte" "Little,Big" textline " " bitfld.long 0x00 5. " LCD_RGB ,Select RGB or BGR format mode in palette" "RGB,BGR" bitfld.long 0x00 2.--4. " LCD_BPP ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,18 bpp,24 bpp,?..." bitfld.long 0x00 1. " LCD_LPE ,LCD power enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " LCD_LCE ,LCD controller enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "LCD_CR1,Control Register 1" bitfld.long 0x00 19. " LCD_FBP ,Frame buffer 24 bpp packed word" "Not packed,?..." bitfld.long 0x00 18. " LCD_LPS ,LCD port select" "One LCD port output,?..." bitfld.long 0x00 16.--17. " LCD_FDW ,FIFO DMA request burst size" "4-beat burst,8-beat burst,16-beat burst,?..." textline " " bitfld.long 0x00 15. " LCD_PSS ,Palette load source select" "Slave bus,Frame buffer" bitfld.long 0x00 13. " LCD_OPS[1] ,Output pixel select" "RGB 5:6:5||5:5:5 on LSB,RGB 5:6:5||5:5:5 on MSB" bitfld.long 0x00 12. " LCD_OPS[0] ,Output pixel select" "16 bpp RGB||BGR 5:6:5,16 bpp RGB||BGR 5:5:5" textline " " bitfld.long 0x00 11. " LCD_VSP ,Vertical sync polarity" "High,Low" bitfld.long 0x00 10. " LCD_HSP ,Horizontal sync polarity" "High,Low" bitfld.long 0x00 9. " LCD_PCP ,Pixel clock polarity" "Rising,Falling" textline " " bitfld.long 0x00 8. " LCD_DEP ,Data enable polarity" "Low,High" bitfld.long 0x00 7. " LCD_EBO ,Big or little endian byte ordering mode in palette" "Little,Big" bitfld.long 0x00 6. " LCD_EPO ,Big or little endian pixel ordering within byte" "Little,Big" textline " " bitfld.long 0x00 5. " LCD_RGB ,Select RGB or BGR format mode in palette" "RGB,BGR" bitfld.long 0x00 2.--4. " LCD_BPP ,LCD bits per pixel" "1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,18 bpp,24 bpp,?..." bitfld.long 0x00 1. " LCD_LPE ,LCD power enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " LCD_LCE ,LCD controller enable" "Disabled,Enabled" endif group.long 0x08++0x17 line.long 0x00 "LCD_HTR,Horizontal Timing Register" hexmask.long.byte 0x00 24.--31. 1. " LCD_HSW ,Horizontal sync width" hexmask.long.byte 0x00 16.--23. 1. " LCD_HBP ,Horizontal back porch" hexmask.long.byte 0x00 8.--15. 1. " LCD_PPL ,Horizontal pixels-per-line" textline " " hexmask.long.byte 0x00 0.--7. 1. " LCD_HFP ,Horizontal front porch" line.long 0x04 "LCD_VTR1,Vertical1 Timing Register" hexmask.long.byte 0x04 16.--23. 1. " LCD_VBP ,Vertical back porch" hexmask.long.byte 0x04 8.--15. 1. " LCD_VFP ,Vertical front porch" hexmask.long.byte 0x04 0.--7. 1. " LCD_VSW ,Vertical sync width" line.long 0x08 "LCD_VTR2,Vertical2 Timing Register" hexmask.long.word 0x08 0.--11. 1. " LCD_LPP ,Lines-per-panel" line.long 0x0C "LCD_PCTR,Pixel Clock Timing Register" bitfld.long 0x0C 10. " LCD_PCR ,Pixel clock domain reset" "Reset,No reset" line.long 0x10 "LCD_ISR,Interrupt Status Register Before Masking" bitfld.long 0x10 8. " LCD_LDD ,LCD controller disable done interrupt status before masking" "No,Yes" bitfld.long 0x10 7. " LCD_BAU ,DMA base address register update to LCD_DCAR interrupt status before masking" "Not transferred,Transferred" bitfld.long 0x10 6. " LCD_VCT ,Vertical compare triggered interrupt status before masking" "Not triggered,Triggered" textline " " bitfld.long 0x10 5. " LCD_MBE ,DMA master AHB bus error interrupt status before masking" "No error,Error" bitfld.long 0x10 4. " LCD_FER ,Input or output FIFO error underrun or overrun interrupt status before masking" "No error,Error" bitfld.long 0x10 3. " LCD_IFO ,Input FIFO overrun interrupt status before masking" "No error,Error" textline " " bitfld.long 0x10 2. " LCD_IFU ,Input FIFO underrun interrupt status before masking" "No error,Error" bitfld.long 0x10 1. " LCD_OFO ,Output FIFO overrun interrupt status before masking" "No error,Error" bitfld.long 0x10 0. " LCD_OFU ,Output FIFO underrun interrupt status before masking" "No error,Error" line.long 0x14 "LCD_IMR,Interrupt Mask Register" bitfld.long 0x14 8. " LCD_LDDM ,LCD controller disable done mask enable/disable" "Disabled,Enabled" bitfld.long 0x14 7. " LCD_BAUM ,DMA base address register update to bLcd_DCAR mask enable/disable" "Disabled,Enabled" bitfld.long 0x14 6. " LCD_VCTM ,Vertical compare triggered mask enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x14 5. " LCD_MBEM ,DMA master AHB bus error mask enable/disable" "Disabled,Enabled" bitfld.long 0x14 4. " LCD_FERM ,Input or output FIFO error underrun or overrun mask enable/disable" "Disabled,Enabled" bitfld.long 0x14 3. " LCD_IFOM ,Input FIFO overrun mask enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x14 2. " LCD_IFUM ,Input FIFO underrun mask enable/disable" "Disabled,Enabled" bitfld.long 0x14 1. " LCD_OFOM ,Output FIFO overrun mask enable/disable" "Disabled,Enabled" bitfld.long 0x14 0. " LCD_OFUM ,Output FIFO underrun mask enable/disable" "Disabled,Enabled" rgroup.long 0x20++0x03 line.long 0x00 "LCD_IVR,Interrupt Status Register After Masking" bitfld.long 0x00 8. " LCD_LDDV ,LCD controller disable done interrupt status after masking" "No,Yes" bitfld.long 0x00 7. " LCD_BAUV ,DMA base address register update to bLcd_DCAR interrupt status after masking" "Not transferred,Transferred" bitfld.long 0x00 6. " LCD_VCTV ,Vertical compare triggered interrupt status after masking" "Not triggered,Triggered" textline " " bitfld.long 0x00 5. " LCD_MBEV ,DMA master AHB bus error interrupt status after masking" "No error,Error" bitfld.long 0x00 4. " LCD_FERV ,Input or output FIFO error underrun or overrun interrupt status after masking" "No error,Error" bitfld.long 0x00 3. " LCD_IFOV ,Input FIFO overrun interrupt status after masking" "No error,Error" textline " " bitfld.long 0x00 2. " LCD_IFUV ,Input FIFO underrun interrupt status after masking" "No error,Error" bitfld.long 0x00 1. " LCD_OFOV ,Output FIFO overrun interrupt status after masking" "No error,Error" bitfld.long 0x00 0. " LCD_OFUV ,Output FIFO underrun interrupt status after masking" "No error,Error" textline " " group.long 0x24++0x07 line.long 0x00 "LCD_ISCR,Interrupt Scan Compare Register" bitfld.long 0x00 0.--2. " LCD_VSC ,Vertical scan compare" "bLcd_VSC inactive,,,,Start of vertical sync width (bLcd_VSW) pulse,Start of vertical back porch (bLcd_VBP),Start of active frame window,Start of vertical front porch" line.long 0x04 "LCD_DBAR,DMA Start Base Address of Frame Buffer Memory" hexmask.long 0x04 3.--31. 0x08 " LCD_DBAR ,DMA base address" rgroup.long 0x2C++0x03 line.long 0x00 "LCD_DCAR,DMA Current Base Address on Going" group.long 0x30++0x0B line.long 0x00 "LCD_DEAR,DMA End Address" line.long 0x04 "LCD_PWMFR_0,PWM0 Frequency Register" bitfld.long 0x04 22. " LCD_PWMFCE_0 ,PWM0 frequency clock enable" "Inactive,Active" textline " " hexmask.long.tbyte 0x04 0.--21. 1. " LCD_PWMFCD_0 ,PWM0 frequency clock divider" line.long 0x08 "LCD_PWMDCR_0,PWM0 Duty Cycle Register" hexmask.long.byte 0x08 0.--7. 1. " LCD_PWMDC_0 ,PWM0 duty cycle register" textline " " group.long 0x44++0x0F line.long 0x00 "LCD_HVTER,Horizontal And Vertical Timing Extension Register" bitfld.long 0x00 24.--25. " LCD_VSWE ,Vertical sync width extension" "0,1,2,3" bitfld.long 0x00 16.--17. " LCD_HSWE ,Horizontal sync width extension" "0,1,2,3" bitfld.long 0x00 12.--13. " LCD_VFPE ,Vertical back porch extension" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " LCD_VBPE ,Vertical back porch extension" "0,1,2,3" bitfld.long 0x00 4.--5. " LCD_HBPE ,Horizontal back porch extension" "0,1,2,3" bitfld.long 0x00 0.--1. " LCD_HFPE ,Horizontal front porch extension" "0,1,2,3" line.long 0x04 "LCD_HPPLOR,Horizontal Pixels-Per-Line Override Control" bitfld.long 0x04 31. " LCD_HPOE ,Horizontal pixels-per-line override enable" "Disabled,Enabled" hexmask.long.word 0x04 0.--11. 1. " LCD_HPPLO ,Horizontal pixels-per-line override" line.long 0x08 "LCD_PWMFR_1,PWM1 Frequency Register" bitfld.long 0x08 22. " LCD_PWMFCE_1 ,PWM1 frequency clock enable" "Inactive,Active" hexmask.long.tbyte 0x08 0.--21. 1. " LCD_PWMFCD_1 ,PWM1 frequency clock divider" line.long 0x0C "LCD_PWMDCR_1,PWM1 Duty Cycle Register" hexmask.long.byte 0x0C 0.--7. 1. " LCD_PWMDC_1 ,PWM1 duty cycle register" group.long 0x1F8++0x03 line.long 0x00 "LCD_GPIOR,Blink Control" bitfld.long 0x00 1. " LCD_BLINKMODE ,Blink brightness mode" "Black blink,Half bright blink" bitfld.long 0x00 0. " LCD_BLINKON ,Blink function enable or disable" "Disabled,Enabled" rgroup.long 0x1FC++0x03 line.long 0x00 "LCD_CIR,Core Identification Register" hexmask.long.byte 0x00 16.--23. 1. " LCD_MN ,Core identification register - model number" bitfld.long 0x00 12.--15. " LCD_BW ,Core identification register - bit width DMA master bus" ",,,,64 Bits,?..." bitfld.long 0x00 8.--11. " LCD_BL ,Core identification register - DMA master bus interface" ",,,,AHB_BUS,?..." textline " " hexmask.long.byte 0x00 0.--7. 1. " LCD_REV ,Core identification register - revision" tree "Coding Palette" if (((per.l(ad:0x53004000)&0x1020)==0x1000)) group.long 0x200++0x03 line.long 0x00 "LCD_PAL_RGB_555,Coding Palette When RGB 5:5:5 Mode" bitfld.long 0x00 26.--30. " LCD_RED1 ,Red data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--25. " LCD_GREEN1 ,Green data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " LCD_BLUE1 ,Blue data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 10.--14. " LCD_RED0 ,Red data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--9. " LCD_GREEN0 ,Green data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " LCD_BLUE0 ,Blue data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " button "Coding Palette when RGB 5:5:5 Mode" "d (ad:0x53004000+0x200)--(ad:0x53004000+0x3FC) /long" elif (((per.l(ad:0x53004000)&0x1020)==0x00)) group.long 0x200++0x03 line.long 0x00 "LCD_PAL_RGB_565,Coding Palette When RGB 5:6:5 Mode" bitfld.long 0x00 27.--31. " LCD_RED1 ,Red data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--26. " LCD_GREEN1 ,Green data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--20. " LCD_BLUE1 ,Blue data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 11.--15. " LCD_RED0 ,Red data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--10. " LCD_GREEN0 ,Green data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--4. " LCD_BLUE0 ,Blue data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " button "Coding Palette when RGB 5:6:5 Mode" "d (ad:0x53004000+0x200)--(ad:0x53004000+0x3FC) /long" elif (((per.l(ad:0x53004000)&0x1020)==0x1020)) group.long 0x200++0x03 line.long 0x00 "LCD_PAL_RGB_555,Coding Palette When BGR 5:5:5 Mode" bitfld.long 0x00 26.--30. " LCD_BLUE1 ,Blue data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--25. " LCD_GREEN1 ,Green data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--20. " LCD_RED1 ,Red data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 10.--14. " LCD_BLUE0 ,Blue data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--9. " LCD_GREEN0 ,Green data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " LCD_RED0 ,Red data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " button "Coding Palette when BGR 5:5:5 Mode" "d (ad:0x53004000+0x200)--(ad:0x53004000+0x3FC) /long" elif (((per.l(ad:0x53004000)&0x1020)==0x20)) group.long 0x200++0x03 line.long 0x00 "LCD_PAL_RGB_565,Coding Palette When BGR 5:6:5 Mode" bitfld.long 0x00 27.--31. " LCD_BLUE1 ,Blue data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--26. " LCD_GREEN1 ,Green data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--20. " LCD_RED1 ,Red data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 11.--15. " LCD_BLUE0 ,Blue data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--10. " LCD_GREEN0 ,Green data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--4. " LCD_RED0 ,Red data palette" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " button "Coding Palette when BGR 5:6:5 Mode" "d (ad:0x53004000+0x200)--(ad:0x53004000+0x3FC) /long" endif tree.end width 0x0B tree.end tree "Semaphore" base ad:0x53000000 width 24. group.long 0x0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_0,Semaphore Lock CPU 1 Register 0" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x10++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_1,Semaphore Lock CPU 1 Register 1" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x20++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_2,Semaphore Lock CPU 1 Register 2" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x30++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_3,Semaphore Lock CPU 1 Register 3" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x40++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_4,Semaphore Lock CPU 1 Register 4" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x50++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_5,Semaphore Lock CPU 1 Register 5" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x60++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_6,Semaphore Lock CPU 1 Register 6" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x70++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_7,Semaphore Lock CPU 1 Register 7" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x80++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_8,Semaphore Lock CPU 1 Register 8" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x90++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_9,Semaphore Lock CPU 1 Register 9" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0xA0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_10,Semaphore Lock CPU 1 Register 10" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0xB0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_11,Semaphore Lock CPU 1 Register 11" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0xC0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_12,Semaphore Lock CPU 1 Register 12" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0xD0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_13,Semaphore Lock CPU 1 Register 13" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0xE0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_14,Semaphore Lock CPU 1 Register 14" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0xF0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_15,Semaphore Lock CPU 1 Register 15" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x100++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_16,Semaphore Lock CPU 1 Register 16" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x110++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_17,Semaphore Lock CPU 1 Register 17" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x120++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_18,Semaphore Lock CPU 1 Register 18" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x130++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_19,Semaphore Lock CPU 1 Register 19" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x140++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_20,Semaphore Lock CPU 1 Register 20" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x150++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_21,Semaphore Lock CPU 1 Register 21" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x160++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_22,Semaphore Lock CPU 1 Register 22" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x170++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_23,Semaphore Lock CPU 1 Register 23" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x180++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_24,Semaphore Lock CPU 1 Register 24" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x190++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_25,Semaphore Lock CPU 1 Register 25" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_26,Semaphore Lock CPU 1 Register 26" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_27,Semaphore Lock CPU 1 Register 27" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_28,Semaphore Lock CPU 1 Register 28" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_29,Semaphore Lock CPU 1 Register 29" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_30,Semaphore Lock CPU 1 Register 30" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_31,Semaphore Lock CPU 1 Register 31" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x200++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_32,Semaphore Lock CPU 1 Register 32" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x210++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_33,Semaphore Lock CPU 1 Register 33" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x220++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_34,Semaphore Lock CPU 1 Register 34" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x230++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_35,Semaphore Lock CPU 1 Register 35" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x240++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_36,Semaphore Lock CPU 1 Register 36" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x250++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_37,Semaphore Lock CPU 1 Register 37" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x260++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_38,Semaphore Lock CPU 1 Register 38" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x270++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_39,Semaphore Lock CPU 1 Register 39" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x280++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_40,Semaphore Lock CPU 1 Register 40" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x290++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_41,Semaphore Lock CPU 1 Register 41" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_42,Semaphore Lock CPU 1 Register 42" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_43,Semaphore Lock CPU 1 Register 43" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_44,Semaphore Lock CPU 1 Register 44" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_45,Semaphore Lock CPU 1 Register 45" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_46,Semaphore Lock CPU 1 Register 46" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_47,Semaphore Lock CPU 1 Register 47" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x300++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_48,Semaphore Lock CPU 1 Register 48" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x310++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_49,Semaphore Lock CPU 1 Register 49" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x320++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_50,Semaphore Lock CPU 1 Register 50" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x330++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_51,Semaphore Lock CPU 1 Register 51" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x340++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_52,Semaphore Lock CPU 1 Register 52" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x350++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_53,Semaphore Lock CPU 1 Register 53" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x360++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_54,Semaphore Lock CPU 1 Register 54" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x370++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_55,Semaphore Lock CPU 1 Register 55" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x380++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_56,Semaphore Lock CPU 1 Register 56" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x390++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_57,Semaphore Lock CPU 1 Register 57" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_58,Semaphore Lock CPU 1 Register 58" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_59,Semaphore Lock CPU 1 Register 59" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_60,Semaphore Lock CPU 1 Register 60" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_61,Semaphore Lock CPU 1 Register 61" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_62,Semaphore Lock CPU 1 Register 62" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU1_63,Semaphore Lock CPU 1 Register 63" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1000++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_0,Semaphore Lock CPU 2 Register 0" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1010++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_1,Semaphore Lock CPU 2 Register 1" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1020++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_2,Semaphore Lock CPU 2 Register 2" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1030++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_3,Semaphore Lock CPU 2 Register 3" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1040++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_4,Semaphore Lock CPU 2 Register 4" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1050++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_5,Semaphore Lock CPU 2 Register 5" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1060++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_6,Semaphore Lock CPU 2 Register 6" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1070++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_7,Semaphore Lock CPU 2 Register 7" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1080++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_8,Semaphore Lock CPU 2 Register 8" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1090++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_9,Semaphore Lock CPU 2 Register 9" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x10A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_10,Semaphore Lock CPU 2 Register 10" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x10B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_11,Semaphore Lock CPU 2 Register 11" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x10C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_12,Semaphore Lock CPU 2 Register 12" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x10D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_13,Semaphore Lock CPU 2 Register 13" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x10E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_14,Semaphore Lock CPU 2 Register 14" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x10F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_15,Semaphore Lock CPU 2 Register 15" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1100++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_16,Semaphore Lock CPU 2 Register 16" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1110++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_17,Semaphore Lock CPU 2 Register 17" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1120++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_18,Semaphore Lock CPU 2 Register 18" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1130++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_19,Semaphore Lock CPU 2 Register 19" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1140++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_20,Semaphore Lock CPU 2 Register 20" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1150++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_21,Semaphore Lock CPU 2 Register 21" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1160++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_22,Semaphore Lock CPU 2 Register 22" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1170++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_23,Semaphore Lock CPU 2 Register 23" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1180++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_24,Semaphore Lock CPU 2 Register 24" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1190++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_25,Semaphore Lock CPU 2 Register 25" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x11A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_26,Semaphore Lock CPU 2 Register 26" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x11B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_27,Semaphore Lock CPU 2 Register 27" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x11C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_28,Semaphore Lock CPU 2 Register 28" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x11D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_29,Semaphore Lock CPU 2 Register 29" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x11E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_30,Semaphore Lock CPU 2 Register 30" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x11F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_31,Semaphore Lock CPU 2 Register 31" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1200++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_32,Semaphore Lock CPU 2 Register 32" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1210++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_33,Semaphore Lock CPU 2 Register 33" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1220++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_34,Semaphore Lock CPU 2 Register 34" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1230++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_35,Semaphore Lock CPU 2 Register 35" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1240++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_36,Semaphore Lock CPU 2 Register 36" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1250++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_37,Semaphore Lock CPU 2 Register 37" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1260++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_38,Semaphore Lock CPU 2 Register 38" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1270++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_39,Semaphore Lock CPU 2 Register 39" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1280++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_40,Semaphore Lock CPU 2 Register 40" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1290++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_41,Semaphore Lock CPU 2 Register 41" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x12A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_42,Semaphore Lock CPU 2 Register 42" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x12B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_43,Semaphore Lock CPU 2 Register 43" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x12C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_44,Semaphore Lock CPU 2 Register 44" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x12D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_45,Semaphore Lock CPU 2 Register 45" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x12E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_46,Semaphore Lock CPU 2 Register 46" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x12F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_47,Semaphore Lock CPU 2 Register 47" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1300++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_48,Semaphore Lock CPU 2 Register 48" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1310++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_49,Semaphore Lock CPU 2 Register 49" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1320++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_50,Semaphore Lock CPU 2 Register 50" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1330++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_51,Semaphore Lock CPU 2 Register 51" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1340++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_52,Semaphore Lock CPU 2 Register 52" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1350++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_53,Semaphore Lock CPU 2 Register 53" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1360++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_54,Semaphore Lock CPU 2 Register 54" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1370++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_55,Semaphore Lock CPU 2 Register 55" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1380++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_56,Semaphore Lock CPU 2 Register 56" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x1390++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_57,Semaphore Lock CPU 2 Register 57" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x13A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_58,Semaphore Lock CPU 2 Register 58" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x13B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_59,Semaphore Lock CPU 2 Register 59" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x13C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_60,Semaphore Lock CPU 2 Register 60" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x13D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_61,Semaphore Lock CPU 2 Register 61" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x13E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_62,Semaphore Lock CPU 2 Register 62" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x13F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU2_63,Semaphore Lock CPU 2 Register 63" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2000++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_0,Semaphore Lock CPU 3 Register 0" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2010++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_1,Semaphore Lock CPU 3 Register 1" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2020++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_2,Semaphore Lock CPU 3 Register 2" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2030++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_3,Semaphore Lock CPU 3 Register 3" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2040++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_4,Semaphore Lock CPU 3 Register 4" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2050++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_5,Semaphore Lock CPU 3 Register 5" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2060++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_6,Semaphore Lock CPU 3 Register 6" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2070++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_7,Semaphore Lock CPU 3 Register 7" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2080++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_8,Semaphore Lock CPU 3 Register 8" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2090++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_9,Semaphore Lock CPU 3 Register 9" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x20A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_10,Semaphore Lock CPU 3 Register 10" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x20B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_11,Semaphore Lock CPU 3 Register 11" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x20C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_12,Semaphore Lock CPU 3 Register 12" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x20D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_13,Semaphore Lock CPU 3 Register 13" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x20E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_14,Semaphore Lock CPU 3 Register 14" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x20F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_15,Semaphore Lock CPU 3 Register 15" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2100++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_16,Semaphore Lock CPU 3 Register 16" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2110++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_17,Semaphore Lock CPU 3 Register 17" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2120++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_18,Semaphore Lock CPU 3 Register 18" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2130++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_19,Semaphore Lock CPU 3 Register 19" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2140++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_20,Semaphore Lock CPU 3 Register 20" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2150++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_21,Semaphore Lock CPU 3 Register 21" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2160++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_22,Semaphore Lock CPU 3 Register 22" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2170++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_23,Semaphore Lock CPU 3 Register 23" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2180++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_24,Semaphore Lock CPU 3 Register 24" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2190++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_25,Semaphore Lock CPU 3 Register 25" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x21A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_26,Semaphore Lock CPU 3 Register 26" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x21B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_27,Semaphore Lock CPU 3 Register 27" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x21C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_28,Semaphore Lock CPU 3 Register 28" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x21D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_29,Semaphore Lock CPU 3 Register 29" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x21E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_30,Semaphore Lock CPU 3 Register 30" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x21F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_31,Semaphore Lock CPU 3 Register 31" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2200++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_32,Semaphore Lock CPU 3 Register 32" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2210++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_33,Semaphore Lock CPU 3 Register 33" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2220++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_34,Semaphore Lock CPU 3 Register 34" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2230++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_35,Semaphore Lock CPU 3 Register 35" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2240++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_36,Semaphore Lock CPU 3 Register 36" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2250++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_37,Semaphore Lock CPU 3 Register 37" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2260++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_38,Semaphore Lock CPU 3 Register 38" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2270++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_39,Semaphore Lock CPU 3 Register 39" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2280++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_40,Semaphore Lock CPU 3 Register 40" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2290++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_41,Semaphore Lock CPU 3 Register 41" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x22A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_42,Semaphore Lock CPU 3 Register 42" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x22B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_43,Semaphore Lock CPU 3 Register 43" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x22C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_44,Semaphore Lock CPU 3 Register 44" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x22D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_45,Semaphore Lock CPU 3 Register 45" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x22E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_46,Semaphore Lock CPU 3 Register 46" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x22F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_47,Semaphore Lock CPU 3 Register 47" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2300++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_48,Semaphore Lock CPU 3 Register 48" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2310++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_49,Semaphore Lock CPU 3 Register 49" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2320++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_50,Semaphore Lock CPU 3 Register 50" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2330++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_51,Semaphore Lock CPU 3 Register 51" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2340++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_52,Semaphore Lock CPU 3 Register 52" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2350++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_53,Semaphore Lock CPU 3 Register 53" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2360++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_54,Semaphore Lock CPU 3 Register 54" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2370++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_55,Semaphore Lock CPU 3 Register 55" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2380++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_56,Semaphore Lock CPU 3 Register 56" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x2390++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_57,Semaphore Lock CPU 3 Register 57" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x23A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_58,Semaphore Lock CPU 3 Register 58" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x23B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_59,Semaphore Lock CPU 3 Register 59" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x23C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_60,Semaphore Lock CPU 3 Register 60" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x23D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_61,Semaphore Lock CPU 3 Register 61" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x23E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_62,Semaphore Lock CPU 3 Register 62" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x23F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU3_63,Semaphore Lock CPU 3 Register 63" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3000++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_0,Semaphore Lock CPU 4 Register 0" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3010++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_1,Semaphore Lock CPU 4 Register 1" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3020++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_2,Semaphore Lock CPU 4 Register 2" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3030++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_3,Semaphore Lock CPU 4 Register 3" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3040++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_4,Semaphore Lock CPU 4 Register 4" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3050++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_5,Semaphore Lock CPU 4 Register 5" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3060++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_6,Semaphore Lock CPU 4 Register 6" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3070++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_7,Semaphore Lock CPU 4 Register 7" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3080++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_8,Semaphore Lock CPU 4 Register 8" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3090++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_9,Semaphore Lock CPU 4 Register 9" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x30A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_10,Semaphore Lock CPU 4 Register 10" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x30B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_11,Semaphore Lock CPU 4 Register 11" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x30C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_12,Semaphore Lock CPU 4 Register 12" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x30D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_13,Semaphore Lock CPU 4 Register 13" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x30E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_14,Semaphore Lock CPU 4 Register 14" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x30F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_15,Semaphore Lock CPU 4 Register 15" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3100++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_16,Semaphore Lock CPU 4 Register 16" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3110++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_17,Semaphore Lock CPU 4 Register 17" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3120++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_18,Semaphore Lock CPU 4 Register 18" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3130++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_19,Semaphore Lock CPU 4 Register 19" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3140++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_20,Semaphore Lock CPU 4 Register 20" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3150++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_21,Semaphore Lock CPU 4 Register 21" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3160++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_22,Semaphore Lock CPU 4 Register 22" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3170++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_23,Semaphore Lock CPU 4 Register 23" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3180++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_24,Semaphore Lock CPU 4 Register 24" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3190++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_25,Semaphore Lock CPU 4 Register 25" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x31A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_26,Semaphore Lock CPU 4 Register 26" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x31B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_27,Semaphore Lock CPU 4 Register 27" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x31C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_28,Semaphore Lock CPU 4 Register 28" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x31D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_29,Semaphore Lock CPU 4 Register 29" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x31E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_30,Semaphore Lock CPU 4 Register 30" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x31F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_31,Semaphore Lock CPU 4 Register 31" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3200++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_32,Semaphore Lock CPU 4 Register 32" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3210++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_33,Semaphore Lock CPU 4 Register 33" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3220++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_34,Semaphore Lock CPU 4 Register 34" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3230++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_35,Semaphore Lock CPU 4 Register 35" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3240++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_36,Semaphore Lock CPU 4 Register 36" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3250++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_37,Semaphore Lock CPU 4 Register 37" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3260++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_38,Semaphore Lock CPU 4 Register 38" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3270++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_39,Semaphore Lock CPU 4 Register 39" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3280++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_40,Semaphore Lock CPU 4 Register 40" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3290++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_41,Semaphore Lock CPU 4 Register 41" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x32A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_42,Semaphore Lock CPU 4 Register 42" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x32B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_43,Semaphore Lock CPU 4 Register 43" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x32C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_44,Semaphore Lock CPU 4 Register 44" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x32D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_45,Semaphore Lock CPU 4 Register 45" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x32E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_46,Semaphore Lock CPU 4 Register 46" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x32F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_47,Semaphore Lock CPU 4 Register 47" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3300++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_48,Semaphore Lock CPU 4 Register 48" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3310++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_49,Semaphore Lock CPU 4 Register 49" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3320++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_50,Semaphore Lock CPU 4 Register 50" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3330++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_51,Semaphore Lock CPU 4 Register 51" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3340++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_52,Semaphore Lock CPU 4 Register 52" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3350++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_53,Semaphore Lock CPU 4 Register 53" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3360++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_54,Semaphore Lock CPU 4 Register 54" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3370++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_55,Semaphore Lock CPU 4 Register 55" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3380++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_56,Semaphore Lock CPU 4 Register 56" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x3390++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_57,Semaphore Lock CPU 4 Register 57" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x33A0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_58,Semaphore Lock CPU 4 Register 58" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x33B0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_59,Semaphore Lock CPU 4 Register 59" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x33C0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_60,Semaphore Lock CPU 4 Register 60" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x33D0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_61,Semaphore Lock CPU 4 Register 61" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x33E0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_62,Semaphore Lock CPU 4 Register 62" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" group.long 0x33F0++0x03 line.long 0x00 "SEMAPHORELOCKCPU4_63,Semaphore Lock CPU 4 Register 63" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore lock" "Free,,,,Locked by CPU1,Locked by CPU2,Locked by CPU3,Locked by CPU4" rgroup.long 0x4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_0,Semaphore Status CPU 1 Register 0" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x14++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_1,Semaphore Status CPU 1 Register 1" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x24++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_2,Semaphore Status CPU 1 Register 2" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x34++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_3,Semaphore Status CPU 1 Register 3" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x44++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_4,Semaphore Status CPU 1 Register 4" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x54++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_5,Semaphore Status CPU 1 Register 5" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x64++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_6,Semaphore Status CPU 1 Register 6" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x74++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_7,Semaphore Status CPU 1 Register 7" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x84++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_8,Semaphore Status CPU 1 Register 8" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x94++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_9,Semaphore Status CPU 1 Register 9" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0xA4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_10,Semaphore Status CPU 1 Register 10" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0xB4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_11,Semaphore Status CPU 1 Register 11" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0xC4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_12,Semaphore Status CPU 1 Register 12" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0xD4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_13,Semaphore Status CPU 1 Register 13" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0xE4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_14,Semaphore Status CPU 1 Register 14" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0xF4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_15,Semaphore Status CPU 1 Register 15" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x104++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_16,Semaphore Status CPU 1 Register 16" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x114++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_17,Semaphore Status CPU 1 Register 17" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x124++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_18,Semaphore Status CPU 1 Register 18" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x134++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_19,Semaphore Status CPU 1 Register 19" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x144++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_20,Semaphore Status CPU 1 Register 20" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x154++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_21,Semaphore Status CPU 1 Register 21" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x164++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_22,Semaphore Status CPU 1 Register 22" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x174++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_23,Semaphore Status CPU 1 Register 23" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x184++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_24,Semaphore Status CPU 1 Register 24" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x194++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_25,Semaphore Status CPU 1 Register 25" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_26,Semaphore Status CPU 1 Register 26" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_27,Semaphore Status CPU 1 Register 27" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_28,Semaphore Status CPU 1 Register 28" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_29,Semaphore Status CPU 1 Register 29" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_30,Semaphore Status CPU 1 Register 30" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_31,Semaphore Status CPU 1 Register 31" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x204++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_32,Semaphore Status CPU 1 Register 32" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x214++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_33,Semaphore Status CPU 1 Register 33" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x224++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_34,Semaphore Status CPU 1 Register 34" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x234++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_35,Semaphore Status CPU 1 Register 35" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x244++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_36,Semaphore Status CPU 1 Register 36" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x254++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_37,Semaphore Status CPU 1 Register 37" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x264++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_38,Semaphore Status CPU 1 Register 38" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x274++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_39,Semaphore Status CPU 1 Register 39" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x284++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_40,Semaphore Status CPU 1 Register 40" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x294++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_41,Semaphore Status CPU 1 Register 41" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_42,Semaphore Status CPU 1 Register 42" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_43,Semaphore Status CPU 1 Register 43" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_44,Semaphore Status CPU 1 Register 44" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_45,Semaphore Status CPU 1 Register 45" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_46,Semaphore Status CPU 1 Register 46" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_47,Semaphore Status CPU 1 Register 47" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x304++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_48,Semaphore Status CPU 1 Register 48" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x314++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_49,Semaphore Status CPU 1 Register 49" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x324++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_50,Semaphore Status CPU 1 Register 50" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x334++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_51,Semaphore Status CPU 1 Register 51" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x344++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_52,Semaphore Status CPU 1 Register 52" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x354++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_53,Semaphore Status CPU 1 Register 53" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x364++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_54,Semaphore Status CPU 1 Register 54" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x374++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_55,Semaphore Status CPU 1 Register 55" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x384++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_56,Semaphore Status CPU 1 Register 56" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x394++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_57,Semaphore Status CPU 1 Register 57" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_58,Semaphore Status CPU 1 Register 58" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_59,Semaphore Status CPU 1 Register 59" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_60,Semaphore Status CPU 1 Register 60" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_61,Semaphore Status CPU 1 Register 61" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_62,Semaphore Status CPU 1 Register 62" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU1_63,Semaphore Status CPU 1 Register 63" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1004++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_0,Semaphore Status CPU 2 Register 0" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1014++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_1,Semaphore Status CPU 2 Register 1" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1024++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_2,Semaphore Status CPU 2 Register 2" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1034++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_3,Semaphore Status CPU 2 Register 3" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1044++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_4,Semaphore Status CPU 2 Register 4" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1054++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_5,Semaphore Status CPU 2 Register 5" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1064++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_6,Semaphore Status CPU 2 Register 6" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1074++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_7,Semaphore Status CPU 2 Register 7" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1084++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_8,Semaphore Status CPU 2 Register 8" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1094++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_9,Semaphore Status CPU 2 Register 9" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x10A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_10,Semaphore Status CPU 2 Register 10" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x10B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_11,Semaphore Status CPU 2 Register 11" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x10C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_12,Semaphore Status CPU 2 Register 12" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x10D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_13,Semaphore Status CPU 2 Register 13" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x10E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_14,Semaphore Status CPU 2 Register 14" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x10F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_15,Semaphore Status CPU 2 Register 15" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1104++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_16,Semaphore Status CPU 2 Register 16" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1114++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_17,Semaphore Status CPU 2 Register 17" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1124++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_18,Semaphore Status CPU 2 Register 18" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1134++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_19,Semaphore Status CPU 2 Register 19" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1144++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_20,Semaphore Status CPU 2 Register 20" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1154++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_21,Semaphore Status CPU 2 Register 21" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1164++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_22,Semaphore Status CPU 2 Register 22" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1174++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_23,Semaphore Status CPU 2 Register 23" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1184++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_24,Semaphore Status CPU 2 Register 24" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1194++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_25,Semaphore Status CPU 2 Register 25" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x11A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_26,Semaphore Status CPU 2 Register 26" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x11B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_27,Semaphore Status CPU 2 Register 27" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x11C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_28,Semaphore Status CPU 2 Register 28" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x11D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_29,Semaphore Status CPU 2 Register 29" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x11E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_30,Semaphore Status CPU 2 Register 30" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x11F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_31,Semaphore Status CPU 2 Register 31" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1204++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_32,Semaphore Status CPU 2 Register 32" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1214++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_33,Semaphore Status CPU 2 Register 33" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1224++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_34,Semaphore Status CPU 2 Register 34" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1234++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_35,Semaphore Status CPU 2 Register 35" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1244++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_36,Semaphore Status CPU 2 Register 36" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1254++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_37,Semaphore Status CPU 2 Register 37" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1264++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_38,Semaphore Status CPU 2 Register 38" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1274++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_39,Semaphore Status CPU 2 Register 39" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1284++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_40,Semaphore Status CPU 2 Register 40" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1294++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_41,Semaphore Status CPU 2 Register 41" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x12A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_42,Semaphore Status CPU 2 Register 42" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x12B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_43,Semaphore Status CPU 2 Register 43" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x12C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_44,Semaphore Status CPU 2 Register 44" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x12D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_45,Semaphore Status CPU 2 Register 45" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x12E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_46,Semaphore Status CPU 2 Register 46" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x12F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_47,Semaphore Status CPU 2 Register 47" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1304++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_48,Semaphore Status CPU 2 Register 48" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1314++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_49,Semaphore Status CPU 2 Register 49" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1324++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_50,Semaphore Status CPU 2 Register 50" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1334++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_51,Semaphore Status CPU 2 Register 51" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1344++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_52,Semaphore Status CPU 2 Register 52" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1354++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_53,Semaphore Status CPU 2 Register 53" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1364++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_54,Semaphore Status CPU 2 Register 54" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1374++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_55,Semaphore Status CPU 2 Register 55" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1384++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_56,Semaphore Status CPU 2 Register 56" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x1394++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_57,Semaphore Status CPU 2 Register 57" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x13A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_58,Semaphore Status CPU 2 Register 58" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x13B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_59,Semaphore Status CPU 2 Register 59" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x13C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_60,Semaphore Status CPU 2 Register 60" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x13D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_61,Semaphore Status CPU 2 Register 61" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x13E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_62,Semaphore Status CPU 2 Register 62" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x13F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU2_63,Semaphore Status CPU 2 Register 63" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2004++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_0,Semaphore Status CPU 3 Register 0" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2014++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_1,Semaphore Status CPU 3 Register 1" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2024++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_2,Semaphore Status CPU 3 Register 2" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2034++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_3,Semaphore Status CPU 3 Register 3" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2044++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_4,Semaphore Status CPU 3 Register 4" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2054++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_5,Semaphore Status CPU 3 Register 5" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2064++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_6,Semaphore Status CPU 3 Register 6" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2074++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_7,Semaphore Status CPU 3 Register 7" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2084++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_8,Semaphore Status CPU 3 Register 8" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2094++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_9,Semaphore Status CPU 3 Register 9" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x20A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_10,Semaphore Status CPU 3 Register 10" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x20B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_11,Semaphore Status CPU 3 Register 11" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x20C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_12,Semaphore Status CPU 3 Register 12" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x20D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_13,Semaphore Status CPU 3 Register 13" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x20E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_14,Semaphore Status CPU 3 Register 14" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x20F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_15,Semaphore Status CPU 3 Register 15" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2104++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_16,Semaphore Status CPU 3 Register 16" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2114++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_17,Semaphore Status CPU 3 Register 17" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2124++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_18,Semaphore Status CPU 3 Register 18" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2134++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_19,Semaphore Status CPU 3 Register 19" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2144++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_20,Semaphore Status CPU 3 Register 20" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2154++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_21,Semaphore Status CPU 3 Register 21" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2164++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_22,Semaphore Status CPU 3 Register 22" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2174++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_23,Semaphore Status CPU 3 Register 23" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2184++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_24,Semaphore Status CPU 3 Register 24" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2194++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_25,Semaphore Status CPU 3 Register 25" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x21A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_26,Semaphore Status CPU 3 Register 26" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x21B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_27,Semaphore Status CPU 3 Register 27" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x21C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_28,Semaphore Status CPU 3 Register 28" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x21D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_29,Semaphore Status CPU 3 Register 29" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x21E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_30,Semaphore Status CPU 3 Register 30" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x21F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_31,Semaphore Status CPU 3 Register 31" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2204++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_32,Semaphore Status CPU 3 Register 32" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2214++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_33,Semaphore Status CPU 3 Register 33" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2224++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_34,Semaphore Status CPU 3 Register 34" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2234++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_35,Semaphore Status CPU 3 Register 35" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2244++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_36,Semaphore Status CPU 3 Register 36" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2254++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_37,Semaphore Status CPU 3 Register 37" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2264++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_38,Semaphore Status CPU 3 Register 38" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2274++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_39,Semaphore Status CPU 3 Register 39" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2284++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_40,Semaphore Status CPU 3 Register 40" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2294++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_41,Semaphore Status CPU 3 Register 41" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x22A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_42,Semaphore Status CPU 3 Register 42" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x22B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_43,Semaphore Status CPU 3 Register 43" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x22C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_44,Semaphore Status CPU 3 Register 44" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x22D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_45,Semaphore Status CPU 3 Register 45" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x22E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_46,Semaphore Status CPU 3 Register 46" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x22F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_47,Semaphore Status CPU 3 Register 47" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2304++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_48,Semaphore Status CPU 3 Register 48" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2314++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_49,Semaphore Status CPU 3 Register 49" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2324++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_50,Semaphore Status CPU 3 Register 50" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2334++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_51,Semaphore Status CPU 3 Register 51" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2344++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_52,Semaphore Status CPU 3 Register 52" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2354++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_53,Semaphore Status CPU 3 Register 53" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2364++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_54,Semaphore Status CPU 3 Register 54" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2374++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_55,Semaphore Status CPU 3 Register 55" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2384++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_56,Semaphore Status CPU 3 Register 56" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x2394++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_57,Semaphore Status CPU 3 Register 57" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x23A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_58,Semaphore Status CPU 3 Register 58" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x23B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_59,Semaphore Status CPU 3 Register 59" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x23C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_60,Semaphore Status CPU 3 Register 60" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x23D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_61,Semaphore Status CPU 3 Register 61" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x23E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_62,Semaphore Status CPU 3 Register 62" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x23F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU3_63,Semaphore Status CPU 3 Register 63" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3004++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_0,Semaphore Status CPU 4 Register 0" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3014++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_1,Semaphore Status CPU 4 Register 1" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3024++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_2,Semaphore Status CPU 4 Register 2" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3034++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_3,Semaphore Status CPU 4 Register 3" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3044++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_4,Semaphore Status CPU 4 Register 4" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3054++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_5,Semaphore Status CPU 4 Register 5" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3064++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_6,Semaphore Status CPU 4 Register 6" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3074++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_7,Semaphore Status CPU 4 Register 7" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3084++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_8,Semaphore Status CPU 4 Register 8" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3094++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_9,Semaphore Status CPU 4 Register 9" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x30A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_10,Semaphore Status CPU 4 Register 10" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x30B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_11,Semaphore Status CPU 4 Register 11" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x30C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_12,Semaphore Status CPU 4 Register 12" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x30D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_13,Semaphore Status CPU 4 Register 13" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x30E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_14,Semaphore Status CPU 4 Register 14" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x30F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_15,Semaphore Status CPU 4 Register 15" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3104++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_16,Semaphore Status CPU 4 Register 16" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3114++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_17,Semaphore Status CPU 4 Register 17" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3124++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_18,Semaphore Status CPU 4 Register 18" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3134++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_19,Semaphore Status CPU 4 Register 19" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3144++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_20,Semaphore Status CPU 4 Register 20" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3154++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_21,Semaphore Status CPU 4 Register 21" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3164++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_22,Semaphore Status CPU 4 Register 22" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3174++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_23,Semaphore Status CPU 4 Register 23" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3184++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_24,Semaphore Status CPU 4 Register 24" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3194++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_25,Semaphore Status CPU 4 Register 25" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x31A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_26,Semaphore Status CPU 4 Register 26" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x31B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_27,Semaphore Status CPU 4 Register 27" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x31C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_28,Semaphore Status CPU 4 Register 28" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x31D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_29,Semaphore Status CPU 4 Register 29" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x31E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_30,Semaphore Status CPU 4 Register 30" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x31F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_31,Semaphore Status CPU 4 Register 31" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3204++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_32,Semaphore Status CPU 4 Register 32" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3214++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_33,Semaphore Status CPU 4 Register 33" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3224++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_34,Semaphore Status CPU 4 Register 34" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3234++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_35,Semaphore Status CPU 4 Register 35" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3244++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_36,Semaphore Status CPU 4 Register 36" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3254++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_37,Semaphore Status CPU 4 Register 37" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3264++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_38,Semaphore Status CPU 4 Register 38" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3274++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_39,Semaphore Status CPU 4 Register 39" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3284++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_40,Semaphore Status CPU 4 Register 40" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3294++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_41,Semaphore Status CPU 4 Register 41" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x32A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_42,Semaphore Status CPU 4 Register 42" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x32B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_43,Semaphore Status CPU 4 Register 43" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x32C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_44,Semaphore Status CPU 4 Register 44" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x32D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_45,Semaphore Status CPU 4 Register 45" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x32E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_46,Semaphore Status CPU 4 Register 46" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x32F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_47,Semaphore Status CPU 4 Register 47" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3304++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_48,Semaphore Status CPU 4 Register 48" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3314++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_49,Semaphore Status CPU 4 Register 49" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3324++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_50,Semaphore Status CPU 4 Register 50" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3334++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_51,Semaphore Status CPU 4 Register 51" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3344++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_52,Semaphore Status CPU 4 Register 52" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3354++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_53,Semaphore Status CPU 4 Register 53" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3364++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_54,Semaphore Status CPU 4 Register 54" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3374++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_55,Semaphore Status CPU 4 Register 55" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3384++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_56,Semaphore Status CPU 4 Register 56" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x3394++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_57,Semaphore Status CPU 4 Register 57" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x33A4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_58,Semaphore Status CPU 4 Register 58" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x33B4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_59,Semaphore Status CPU 4 Register 59" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x33C4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_60,Semaphore Status CPU 4 Register 60" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x33D4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_61,Semaphore Status CPU 4 Register 61" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x33E4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_62,Semaphore Status CPU 4 Register 62" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" rgroup.long 0x33F4++0x03 line.long 0x00 "SEMAPHORESTATUSCPU4_63,Semaphore Status CPU 4 Register 63" bitfld.long 0x00 0.--2. " SEMAPHORELOCKCPU ,CPU semaphore status" "Free,,,,Reserved by CPU1,Reserved by CPU2,Reserved by CPU3,Reserved by CPU4" width 0x0B tree.end tree.open "MSEBI (Medium Speed External Bus Interface)" tree "MSEBI Master CPU" base ad:0x400C0000 width 35. group.long 0x0++0x07 line.long 0x00 "MSEBIM_CYCLESIZE_CS0_N,Chip Select CycleSize Register 0" hexmask.long.byte 0x00 24.--31. 1. " MSEBIM_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIM_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIM_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIM_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK" textline " " bitfld.long 0x00 1. " MSEBIM_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIM_CLK,High on 1 MSEBIM_CLK -> Low on 1 MSEBIM_CLK" textline " " bitfld.long 0x00 0. " MSEBIM_ALEDATA ,Size of address latch phase (ALEDATA)" "High on 1 MSEBIM_CLK,High on 1 MSEBIM_CLK -> Low on 1 MSEBIM_CLK" line.long 0x04 "MSEBIM_SETUPHOLD_CS0_N,Chip Select SetupHold Register 0" bitfld.long 0x04 24.--29. " MSEBIM_WRDLEHOLD ,Size of hold data phase (WRDLEHOLD)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 16.--21. " MSEBIM_RDDLEHOLD ,Size of hold data phase (RDDLEHOLD)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 8.--13. " MSEBIM_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIM_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " group.long 0x100++0x07 line.long 0x00 "MSEBIM_CYCLESIZE_CS1_N,Chip Select CycleSize Register 1" hexmask.long.byte 0x00 24.--31. 1. " MSEBIM_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIM_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIM_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIM_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK" textline " " bitfld.long 0x00 1. " MSEBIM_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIM_CLK,High on 1 MSEBIM_CLK -> Low on 1 MSEBIM_CLK" textline " " bitfld.long 0x00 0. " MSEBIM_ALEDATA ,Size of address latch phase (ALEDATA)" "High on 1 MSEBIM_CLK,High on 1 MSEBIM_CLK -> Low on 1 MSEBIM_CLK" line.long 0x04 "MSEBIM_SETUPHOLD_CS1_N,Chip Select SetupHold Register 1" bitfld.long 0x04 24.--29. " MSEBIM_WRDLEHOLD ,Size of hold data phase (WRDLEHOLD)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 16.--21. " MSEBIM_RDDLEHOLD ,Size of hold data phase (RDDLEHOLD)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 8.--13. " MSEBIM_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIM_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " group.long 0x200++0x07 line.long 0x00 "MSEBIM_CYCLESIZE_CS2_N,Chip Select CycleSize Register 2" hexmask.long.byte 0x00 24.--31. 1. " MSEBIM_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIM_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIM_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIM_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK" textline " " bitfld.long 0x00 1. " MSEBIM_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIM_CLK,High on 1 MSEBIM_CLK -> Low on 1 MSEBIM_CLK" textline " " bitfld.long 0x00 0. " MSEBIM_ALEDATA ,Size of address latch phase (ALEDATA)" "High on 1 MSEBIM_CLK,High on 1 MSEBIM_CLK -> Low on 1 MSEBIM_CLK" line.long 0x04 "MSEBIM_SETUPHOLD_CS2_N,Chip Select SetupHold Register 2" bitfld.long 0x04 24.--29. " MSEBIM_WRDLEHOLD ,Size of hold data phase (WRDLEHOLD)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 16.--21. " MSEBIM_RDDLEHOLD ,Size of hold data phase (RDDLEHOLD)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 8.--13. " MSEBIM_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIM_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " group.long 0x300++0x07 line.long 0x00 "MSEBIM_CYCLESIZE_CS3_N,Chip Select CycleSize Register 3" hexmask.long.byte 0x00 24.--31. 1. " MSEBIM_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIM_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIM_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIM_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK" textline " " bitfld.long 0x00 1. " MSEBIM_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIM_CLK,High on 1 MSEBIM_CLK -> Low on 1 MSEBIM_CLK" textline " " bitfld.long 0x00 0. " MSEBIM_ALEDATA ,Size of address latch phase (ALEDATA)" "High on 1 MSEBIM_CLK,High on 1 MSEBIM_CLK -> Low on 1 MSEBIM_CLK" line.long 0x04 "MSEBIM_SETUPHOLD_CS3_N,Chip Select SetupHold Register 3" bitfld.long 0x04 24.--29. " MSEBIM_WRDLEHOLD ,Size of hold data phase (WRDLEHOLD)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 16.--21. " MSEBIM_RDDLEHOLD ,Size of hold data phase (RDDLEHOLD)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 8.--13. " MSEBIM_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIM_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIM_CLK,1 MSEBIM_CLK,2 MSEBIM_CLK,3 MSEBIM_CLK,4 MSEBIM_CLK,5 MSEBIM_CLK,6 MSEBIM_CLK,7 MSEBIM_CLK,8 MSEBIM_CLK,9 MSEBIM_CLK,10 MSEBIM_CLK,11 MSEBIM_CLK,12 MSEBIM_CLK,13 MSEBIM_CLK,14 MSEBIM_CLK,15 MSEBIM_CLK,16 MSEBIM_CLK,17 MSEBIM_CLK,18 MSEBIM_CLK,19 MSEBIM_CLK,20 MSEBIM_CLK,21 MSEBIM_CLK,22 MSEBIM_CLK,23 MSEBIM_CLK,24 MSEBIM_CLK,25 MSEBIM_CLK,26 MSEBIM_CLK,27 MSEBIM_CLK,28 MSEBIM_CLK,29 MSEBIM_CLK,30 MSEBIM_CLK,31 MSEBIM_CLK,32 MSEBIM_CLK,33 MSEBIM_CLK,34 MSEBIM_CLK,35 MSEBIM_CLK,36 MSEBIM_CLK,37 MSEBIM_CLK,38 MSEBIM_CLK,39 MSEBIM_CLK,40 MSEBIM_CLK,41 MSEBIM_CLK,42 MSEBIM_CLK,43 MSEBIM_CLK,44 MSEBIM_CLK,45 MSEBIM_CLK,46 MSEBIM_CLK,47 MSEBIM_CLK,48 MSEBIM_CLK,49 MSEBIM_CLK,50 MSEBIM_CLK,51 MSEBIM_CLK,52 MSEBIM_CLK,53 MSEBIM_CLK,54 MSEBIM_CLK,55 MSEBIM_CLK,56 MSEBIM_CLK,57 MSEBIM_CLK,58 MSEBIM_CLK,59 MSEBIM_CLK,60 MSEBIM_CLK,61 MSEBIM_CLK,62 MSEBIM_CLK,63 MSEBIM_CLK" textline " " group.long 0x8++0x07 line.long 0x00 "MSEBIM_TDMACR_CS0_N,DMA Transmit Control And Status Register 0" rbitfld.long 0x00 30. " MSEBIM_SINGLE_DEST_WIDTH ,Size of single transaction" ",64 bits" textline " " hexmask.long.word 0x00 17.--29. 1. " MSEBIM_CURRENT_DEST_BLOCK_SIZE ,Current value of DEST_BLOCK_SIZE" textline " " hexmask.long.word 0x00 4.--16. 1. " MSEBIM_DEST_BLOCK_SIZE ,Destination block transfer size in DMA transmit FIFO" textline " " bitfld.long 0x00 1.--3. " MSEBIM_DEST_BURST_SIZE ,Destination burst transaction size in DMA transmit FIFO" "1 single transaction,4 single transactions,8 single transactions,16 single transactions,32 single transactions,?..." textline " " bitfld.long 0x00 0. " MSEBIM_TDMAE1 ,Transmit DMA enable/disable" "Disabled,Enabled" line.long 0x04 "MSEBIM_RDMACR_CS0_N,DMA Receive Control And Status Register 0" rbitfld.long 0x04 30. " MSEBIM_SINGLE_SRC_WIDTH ,Size of single transaction" ",64 bits" textline " " hexmask.long.word 0x04 17.--29. 1. " MSEBIM_CURRENT_SRC_BLOCK_SIZE ,Current value of SRC_BLOCK_SIZE" textline " " hexmask.long.word 0x04 4.--16. 1. " MSEBIM_SRC_BLOCK_SIZE ,Source block transfer size in DMA receive FIFO" textline " " bitfld.long 0x04 1.--3. " MSEBIM_SRC_BURST_SIZE ,Source burst transaction size in DMA receive FIFO" "1 single transaction,4 single transactions,8 single transactions,16 single transactions,32 single transactions,?..." textline " " bitfld.long 0x04 0. " MSEBIM_RDMAE1 ,Receive DMA enable/disable" "Disabled,Enabled" if (((per.l(ad:0x400C0000+0x8+0x04))&0x40000000)==0x40000000) group.long (0x8+0x08)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_READ_CS0_N,DMA Read Address Register 0" hexmask.long 0x00 3.--31. 0x08 " MSEBIM_ADDRDMA_READ ,Address DMA read access" else group.long (0x8+0x08)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_READ_CS0_N,DMA Read Address Register 0" hexmask.long 0x00 3.--31. 0x08 " MSEBIM_ADDRDMA_READ ,Address DMA read access" textline " " bitfld.long 0x00 2. " MSEBIM_ADDRDMA_READ_2 ,First block address (alignment 32 bits)" "0,1" endif rgroup.long (0x8+0x0C)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_CURRENTREAD_CS0_N,DMA Current Read Address Register 0" if (((per.l(ad:0x400C0000+0x8)&0x40000000)==0x40000000)) group.long (0x8+0x10)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_WRITE_CS0_N,DMA Write Address Register 0" hexmask.long 0x00 3.--31. 0x08 " MSEBIM_ADDRDMA_WRITE ,Address DMA write access" else group.long (0x8+0x10)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_WRITE_CS0_N,DMA Write Address Register 0" hexmask.long 0x00 3.--31. 0x08 " MSEBIM_ADDRDMA_WRITE ,Address DMA read access" textline " " bitfld.long 0x00 2. " MSEBIM_ADDRDMA_WRITE_2 ,First block address (alignment 32 bits)" "0,1" endif rgroup.long (0x8+0x14)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_CURRENTWRITE_CS0_N,DMA Current Write Address Register 0" group.long (0x8+0x18)++0x07 line.long 0x00 "MSEBIM_DMATDLR_CS0_N,DMA Transmit Data Level Register 0" bitfld.long 0x00 16. " MSEBIM_USE_EXT_WRDMA_REQ ,Transmit DMA mode enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x00 13.--15. " MSEBIM_BURST_SIZEMAX_DMAWRITE ,Burst size max allowed on write access from DMA transmit FIFO to MSEBI bus" "1 word,2 words,4 words,8 words,16 words,Not limited,?..." textline " " bitfld.long 0x00 6.--11. " MSEBIM_DMA_TRANSMIT_FIFOLEVEL ,DMA transmit FIFO level" "0 data entry,1 data entry,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,?..." textline " " bitfld.long 0x00 0.--4. " MSEBIM_DMATDLR ,DMA transmit FIFO data level" "0 data entry,1 or less data entry,2 or less data entries,3 or less data entries,4 or less data entries,5 or less data entries,6 or less data entries,7 or less data entries,8 or less data entries,9 or less data entries,10 or less data entries,11 or less data entries,12 or less data entries,13 or less data entries,14 or less data entries,15 or less data entries,16 or less data entries,17 or less data entries,18 or less data entries,19 or less data entries,20 or less data entries,21 or less data entries,22 or less data entries,23 or less data entries,24 or less data entries,25 or less data entries,26 or less data entries,27 or less data entries,28 or less data entries,29 or less data entries,30 or less data entries,31 or less data entries" line.long 0x04 "MSEBIM_DMARDLR_CS0_N,DMA Receive Data Level Register 0" bitfld.long 0x04 16. " MSEBIM_USE_EXT_RDDMA_REQ ,Receive DMA mode enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x04 13.--15. " MSEBIM_BURST_SIZEMAX_DMAREAD ,Burst size max allowed on read access from MSEBI bus to DMA receive FIFO" "1 word,2 words,4 words,8 words,16 words,Not limited,?..." textline " " bitfld.long 0x04 6.--11. " MSEBIM_DMA_RECEIVE_FIFOLEVEL ,DMA receive FIFO level" "0 data entry,1 data entry,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,?..." textline " " bitfld.long 0x04 0.--4. " MSEBIM_DMARDLR ,DMA receive FIFO data level" "0 data entry,1 or less data entry,2 or less data entries,3 or less data entries,4 or less data entries,5 or less data entries,6 or less data entries,7 or less data entries,8 or less data entries,9 or less data entries,10 or less data entries,11 or less data entries,12 or less data entries,13 or less data entries,14 or less data entries,15 or less data entries,16 or less data entries,17 or less data entries,18 or less data entries,19 or less data entries,20 or less data entries,21 or less data entries,22 or less data entries,23 or less data entries,24 or less data entries,25 or less data entries,26 or less data entries,27 or less data entries,28 or less data entries,29 or less data entries,30 or less data entries,31 or less data entries" textline " " group.long 0x108++0x07 line.long 0x00 "MSEBIM_TDMACR_CS1_N,DMA Transmit Control And Status Register 1" rbitfld.long 0x00 30. " MSEBIM_SINGLE_DEST_WIDTH ,Size of single transaction" ",64 bits" textline " " hexmask.long.word 0x00 17.--29. 1. " MSEBIM_CURRENT_DEST_BLOCK_SIZE ,Current value of DEST_BLOCK_SIZE" textline " " hexmask.long.word 0x00 4.--16. 1. " MSEBIM_DEST_BLOCK_SIZE ,Destination block transfer size in DMA transmit FIFO" textline " " bitfld.long 0x00 1.--3. " MSEBIM_DEST_BURST_SIZE ,Destination burst transaction size in DMA transmit FIFO" "1 single transaction,4 single transactions,8 single transactions,16 single transactions,32 single transactions,?..." textline " " bitfld.long 0x00 0. " MSEBIM_TDMAE1 ,Transmit DMA enable/disable" "Disabled,Enabled" line.long 0x04 "MSEBIM_RDMACR_CS1_N,DMA Receive Control And Status Register 1" rbitfld.long 0x04 30. " MSEBIM_SINGLE_SRC_WIDTH ,Size of single transaction" ",64 bits" textline " " hexmask.long.word 0x04 17.--29. 1. " MSEBIM_CURRENT_SRC_BLOCK_SIZE ,Current value of SRC_BLOCK_SIZE" textline " " hexmask.long.word 0x04 4.--16. 1. " MSEBIM_SRC_BLOCK_SIZE ,Source block transfer size in DMA receive FIFO" textline " " bitfld.long 0x04 1.--3. " MSEBIM_SRC_BURST_SIZE ,Source burst transaction size in DMA receive FIFO" "1 single transaction,4 single transactions,8 single transactions,16 single transactions,32 single transactions,?..." textline " " bitfld.long 0x04 0. " MSEBIM_RDMAE1 ,Receive DMA enable/disable" "Disabled,Enabled" if (((per.l(ad:0x400C0000+0x108+0x04))&0x40000000)==0x40000000) group.long (0x108+0x08)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_READ_CS1_N,DMA Read Address Register 1" hexmask.long 0x00 3.--31. 0x08 " MSEBIM_ADDRDMA_READ ,Address DMA read access" else group.long (0x108+0x08)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_READ_CS1_N,DMA Read Address Register 1" hexmask.long 0x00 3.--31. 0x08 " MSEBIM_ADDRDMA_READ ,Address DMA read access" textline " " bitfld.long 0x00 2. " MSEBIM_ADDRDMA_READ_2 ,First block address (alignment 32 bits)" "0,1" endif rgroup.long (0x108+0x0C)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_CURRENTREAD_CS1_N,DMA Current Read Address Register 1" if (((per.l(ad:0x400C0000+0x108)&0x40000000)==0x40000000)) group.long (0x108+0x10)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_WRITE_CS1_N,DMA Write Address Register 1" hexmask.long 0x00 3.--31. 0x08 " MSEBIM_ADDRDMA_WRITE ,Address DMA write access" else group.long (0x108+0x10)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_WRITE_CS1_N,DMA Write Address Register 1" hexmask.long 0x00 3.--31. 0x08 " MSEBIM_ADDRDMA_WRITE ,Address DMA read access" textline " " bitfld.long 0x00 2. " MSEBIM_ADDRDMA_WRITE_2 ,First block address (alignment 32 bits)" "0,1" endif rgroup.long (0x108+0x14)++0x03 line.long 0x00 "MSEBIM_ADDRDMA_CURRENTWRITE_CS1_N,DMA Current Write Address Register 1" group.long (0x108+0x18)++0x07 line.long 0x00 "MSEBIM_DMATDLR_CS1_N,DMA Transmit Data Level Register 1" bitfld.long 0x00 16. " MSEBIM_USE_EXT_WRDMA_REQ ,Transmit DMA mode enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x00 13.--15. " MSEBIM_BURST_SIZEMAX_DMAWRITE ,Burst size max allowed on write access from DMA transmit FIFO to MSEBI bus" "1 word,2 words,4 words,8 words,16 words,Not limited,?..." textline " " bitfld.long 0x00 6.--11. " MSEBIM_DMA_TRANSMIT_FIFOLEVEL ,DMA transmit FIFO level" "0 data entry,1 data entry,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,?..." textline " " bitfld.long 0x00 0.--4. " MSEBIM_DMATDLR ,DMA transmit FIFO data level" "0 data entry,1 or less data entry,2 or less data entries,3 or less data entries,4 or less data entries,5 or less data entries,6 or less data entries,7 or less data entries,8 or less data entries,9 or less data entries,10 or less data entries,11 or less data entries,12 or less data entries,13 or less data entries,14 or less data entries,15 or less data entries,16 or less data entries,17 or less data entries,18 or less data entries,19 or less data entries,20 or less data entries,21 or less data entries,22 or less data entries,23 or less data entries,24 or less data entries,25 or less data entries,26 or less data entries,27 or less data entries,28 or less data entries,29 or less data entries,30 or less data entries,31 or less data entries" line.long 0x04 "MSEBIM_DMARDLR_CS1_N,DMA Receive Data Level Register 1" bitfld.long 0x04 16. " MSEBIM_USE_EXT_RDDMA_REQ ,Receive DMA mode enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x04 13.--15. " MSEBIM_BURST_SIZEMAX_DMAREAD ,Burst size max allowed on read access from MSEBI bus to DMA receive FIFO" "1 word,2 words,4 words,8 words,16 words,Not limited,?..." textline " " bitfld.long 0x04 6.--11. " MSEBIM_DMA_RECEIVE_FIFOLEVEL ,DMA receive FIFO level" "0 data entry,1 data entry,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,?..." textline " " bitfld.long 0x04 0.--4. " MSEBIM_DMARDLR ,DMA receive FIFO data level" "0 data entry,1 or less data entry,2 or less data entries,3 or less data entries,4 or less data entries,5 or less data entries,6 or less data entries,7 or less data entries,8 or less data entries,9 or less data entries,10 or less data entries,11 or less data entries,12 or less data entries,13 or less data entries,14 or less data entries,15 or less data entries,16 or less data entries,17 or less data entries,18 or less data entries,19 or less data entries,20 or less data entries,21 or less data entries,22 or less data entries,23 or less data entries,24 or less data entries,25 or less data entries,26 or less data entries,27 or less data entries,28 or less data entries,29 or less data entries,30 or less data entries,31 or less data entries" textline " " group.long 0x60++0x03 line.long 0x00 "MSEBIM_CONFIG_CS0_N,Chip Select Config Register 0" bitfld.long 0x00 31. " MSEBIM_EXTEND_ADDR[4] ,Extend address capability MSEBI_A31" "Not extended,Extended" textline " " bitfld.long 0x00 30. " [3] ,Extend address capability MSEBI_A30" "Not extended,Extended" textline " " bitfld.long 0x00 29. " [2] ,Extend address capability MSEBI_A29" "Not extended,Extended" textline " " bitfld.long 0x00 28. " [1] ,Extend address capability MSEBI_A28" "Not extended,Extended" textline " " bitfld.long 0x00 27. " [0] ,Extend address capability MSEBI_A27" "Not extended,Extended" textline " " bitfld.long 0x00 15. " MSEBIM_MULTI_DLE ,Multi DLE mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " MSEBIM_CS0N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIM_CS0N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIM_CS0N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " MSEBIM_ALE_MODE ,MSEBI_ALE serial/parallel mode" "Serial,Parallel" textline " " bitfld.long 0x00 8.--10. " MSEBIM_ALE_NUMBER ,Number of phase MSEBI_ALE used to address the peripheral" "0 MSEBI_ALE,1 MSEBI_ALE,2 MSEBI_ALE,3 MSEBI_ALE,4 MSEBI_ALE,?..." textline " " bitfld.long 0x00 7. " MSEBIM_BURST_ENABLE ,Enable the burst mode on read or write access" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIM_MODE_WAIT ,MSEBI wait mode" "No wait,Dedicated ext pins monitored and managed,One common pin monitored and managed,?..." textline " " bitfld.long 0x00 0.--2. " MSEBIM_CONFIG ,MSEBI configuration" "Asynchronous/16 bits/Multiplexed/Mode16/No Burst,Synchronous/16 bits/Multiplexed/Mode16/Burst available,Asynchronous/32 bits/Multiplexed/Mode32/No Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst available,Asynchronous/8bits/Multiplexed/Mode8/No Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst available,?..." group.long 0x160++0x03 line.long 0x00 "MSEBIM_CONFIG_CS1_N,Chip Select Config Register 1" bitfld.long 0x00 31. " MSEBIM_EXTEND_ADDR[4] ,Extend address capability MSEBI_A31" "Not extended,Extended" textline " " bitfld.long 0x00 30. " [3] ,Extend address capability MSEBI_A30" "Not extended,Extended" textline " " bitfld.long 0x00 29. " [2] ,Extend address capability MSEBI_A29" "Not extended,Extended" textline " " bitfld.long 0x00 28. " [1] ,Extend address capability MSEBI_A28" "Not extended,Extended" textline " " bitfld.long 0x00 27. " [0] ,Extend address capability MSEBI_A27" "Not extended,Extended" textline " " bitfld.long 0x00 15. " MSEBIM_MULTI_DLE ,Multi DLE mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " MSEBIM_CS1N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIM_CS1N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIM_CS1N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " MSEBIM_ALE_MODE ,MSEBI_ALE serial/parallel mode" "Serial,Parallel" textline " " bitfld.long 0x00 8.--10. " MSEBIM_ALE_NUMBER ,Number of phase MSEBI_ALE used to address the peripheral" "0 MSEBI_ALE,1 MSEBI_ALE,2 MSEBI_ALE,3 MSEBI_ALE,4 MSEBI_ALE,?..." textline " " bitfld.long 0x00 7. " MSEBIM_BURST_ENABLE ,Enable the burst mode on read or write access" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIM_MODE_WAIT ,MSEBI wait mode" "No wait,Dedicated ext pins monitored and managed,One common pin monitored and managed,?..." textline " " bitfld.long 0x00 0.--2. " MSEBIM_CONFIG ,MSEBI configuration" "Asynchronous/16 bits/Multiplexed/Mode16/No Burst,Synchronous/16 bits/Multiplexed/Mode16/Burst available,Asynchronous/32 bits/Multiplexed/Mode32/No Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst available,Asynchronous/8bits/Multiplexed/Mode8/No Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst available,?..." group.long 0x260++0x03 line.long 0x00 "MSEBIM_CONFIG_CS2_N,Chip Select Config Register 2" bitfld.long 0x00 31. " MSEBIM_EXTEND_ADDR[4] ,Extend address capability MSEBI_A31" "Not extended,Extended" textline " " bitfld.long 0x00 30. " [3] ,Extend address capability MSEBI_A30" "Not extended,Extended" textline " " bitfld.long 0x00 29. " [2] ,Extend address capability MSEBI_A29" "Not extended,Extended" textline " " bitfld.long 0x00 28. " [1] ,Extend address capability MSEBI_A28" "Not extended,Extended" textline " " bitfld.long 0x00 27. " [0] ,Extend address capability MSEBI_A27" "Not extended,Extended" textline " " bitfld.long 0x00 15. " MSEBIM_MULTI_DLE ,Multi DLE mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " MSEBIM_CS2N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIM_CS2N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIM_CS2N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " MSEBIM_ALE_MODE ,MSEBI_ALE serial/parallel mode" "Serial,Parallel" textline " " bitfld.long 0x00 8.--10. " MSEBIM_ALE_NUMBER ,Number of phase MSEBI_ALE used to address the peripheral" "0 MSEBI_ALE,1 MSEBI_ALE,2 MSEBI_ALE,3 MSEBI_ALE,4 MSEBI_ALE,?..." textline " " bitfld.long 0x00 7. " MSEBIM_BURST_ENABLE ,Enable the burst mode on read or write access" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIM_MODE_WAIT ,MSEBI wait mode" "No wait,Dedicated ext pins monitored and managed,One common pin monitored and managed,?..." textline " " bitfld.long 0x00 0.--2. " MSEBIM_CONFIG ,MSEBI configuration" "Asynchronous/16 bits/Multiplexed/Mode16/No Burst,Synchronous/16 bits/Multiplexed/Mode16/Burst available,Asynchronous/32 bits/Multiplexed/Mode32/No Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst available,Asynchronous/8bits/Multiplexed/Mode8/No Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst available,?..." group.long 0x360++0x03 line.long 0x00 "MSEBIM_CONFIG_CS3_N,Chip Select Config Register 3" bitfld.long 0x00 31. " MSEBIM_EXTEND_ADDR[4] ,Extend address capability MSEBI_A31" "Not extended,Extended" textline " " bitfld.long 0x00 30. " [3] ,Extend address capability MSEBI_A30" "Not extended,Extended" textline " " bitfld.long 0x00 29. " [2] ,Extend address capability MSEBI_A29" "Not extended,Extended" textline " " bitfld.long 0x00 28. " [1] ,Extend address capability MSEBI_A28" "Not extended,Extended" textline " " bitfld.long 0x00 27. " [0] ,Extend address capability MSEBI_A27" "Not extended,Extended" textline " " bitfld.long 0x00 15. " MSEBIM_MULTI_DLE ,Multi DLE mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " MSEBIM_CS3N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIM_CS3N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIM_CS3N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " MSEBIM_ALE_MODE ,MSEBI_ALE serial/parallel mode" "Serial,Parallel" textline " " bitfld.long 0x00 8.--10. " MSEBIM_ALE_NUMBER ,Number of phase MSEBI_ALE used to address the peripheral" "0 MSEBI_ALE,1 MSEBI_ALE,2 MSEBI_ALE,3 MSEBI_ALE,4 MSEBI_ALE,?..." textline " " bitfld.long 0x00 7. " MSEBIM_BURST_ENABLE ,Enable the burst mode on read or write access" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIM_MODE_WAIT ,MSEBI wait mode" "No wait,Dedicated ext pins monitored and managed,One common pin monitored and managed,?..." textline " " bitfld.long 0x00 0.--2. " MSEBIM_CONFIG ,MSEBI configuration" "Asynchronous/16 bits/Multiplexed/Mode16/No Burst,Synchronous/16 bits/Multiplexed/Mode16/Burst available,Asynchronous/32 bits/Multiplexed/Mode32/No Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst available,Asynchronous/8bits/Multiplexed/Mode8/No Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst available,?..." textline " " group.long 0x800++0x03 line.long 0x00 "MSEBIM_CONFIG,Common Config Register" bitfld.long 0x00 17.--22. " MSEBIM_CPU_RECEIVE_FIFOLEVEL ,Number of valid data entries in the CPU receive FIFO" "0 data entry/CPU receive FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/CPU receive FIFO full,?..." textline " " bitfld.long 0x00 11.--16. " MSEBIM_CPU_TRANSMIT_FIFOLEVEL ,Number of valid data entries in the CPU transmit FIFO" "0 data entry/CPU transmit FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/CPU transmit FIFO full,?..." textline " " bitfld.long 0x00 8.--10. " MSEBIM_BURST_SIZEMAX_CPUREAD ,Burst size max allowed on read access from MSEBI bus to CPU receive FIFO" "1 word,2 words,4 words,8 words,16 words,Not limited,?..." textline " " bitfld.long 0x00 5.--7. " MSEBIM_BURST_SIZEMAX_CPUWRITE ,Burst size max allowed on write access from CPU transmit FIFO to MSEBI bus" "1 word,2 words,4 words,8 words,16 words,Not limited,?..." textline " " bitfld.long 0x00 4. " MSEBIM_CLKENABLE ,Enable MSEBIM_CLK clock generation" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " MSEBIM_CLKH ,Time duration (MSEBIM_HCLK) of level high of MSEBIM_CLK" "1 MSEBIM_HCLK,2 MSEBIM_HCLK,3 MSEBIM_HCLK,4 MSEBIM_HCLK" textline " " bitfld.long 0x00 0.--1. " MSEBIM_CLKL ,Time duration (MSEBIM_HCLK) of level low of MSEBIM_CLK" "1 MSEBIM_HCLK,2 MSEBIM_HCLK,3 MSEBIM_HCLK,4 MSEBIM_HCLK" wgroup.long 0x808++0x03 line.long 0x00 "MSEBIM_CPU_FIFOREAD_FLUSH,Flush Receive FIFO Register" width 0x0B tree.end tree "MSEBI Master DMA" base ad:0x40080000 width 35. rgroup.long 0x0++0x03 line.long 0x00 "MSEBIM_DMA_FIFOREAD_CS0_N,DMA Receive FIFO Register 0" wgroup.long (0x0+0x10000)++0x03 line.long 0x00 "MSEBIM_DMA_FIFOWRITE_CS0_N,DMA Transmit FIFO Register 0" rgroup.long 0x20000++0x03 line.long 0x00 "MSEBIM_DMA_FIFOREAD_CS1_N,DMA Receive FIFO Register 1" wgroup.long (0x20000+0x10000)++0x03 line.long 0x00 "MSEBIM_DMA_FIFOWRITE_CS1_N,DMA Transmit FIFO Register 1" width 0x0B tree.end tree "MSEBI Slave CPU" base ad:0x400C2000 width 35. if (((per.l(ad:0x400C2000+0x0+0x60)&0x200)==0x200)) rgroup.long 0x0++0x0F line.long 0x00 "MSEBIS_CYCLESIZE_CS0_N,Chip Select CycleSize Register 0" hexmask.long.byte 0x00 24.--31. 1. " MSEBIS_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIS_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIS_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIS_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 1. " MSEBIS_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIS_CLK,High on 1 MSEBIS_CLK -> Low on 1 MSEBIS_CLK" line.long 0x04 "MSEBIS_SETUPHOLD_CS0_N,Chip Select SetupHold Register 0" bitfld.long 0x04 8.--13. " MSEBIS_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIS_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" line.long 0x08 "MSEBIS_MMU_ADDR_CS0_N,MMU Base Address Register 0" hexmask.long.tbyte 0x08 12.--31. 0x10 " MSEBIS_MMU_ADDR ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" line.long 0x0C "MSEBIS_MMU_ADDR_MASK_CS0_N,MMU Address Mask Register 0" hexmask.long.tbyte 0x0C 12.--31. 0x10 " MSEBIS_MMU_ADDR_MASK ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" else group.long 0x0++0x0F line.long 0x00 "MSEBIS_CYCLESIZE_CS0_N,Chip Select CycleSize Register 0" hexmask.long.byte 0x00 24.--31. 1. " MSEBIS_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIS_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIS_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIS_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 1. " MSEBIS_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIS_CLK,High on 1 MSEBIS_CLK -> Low on 1 MSEBIS_CLK" line.long 0x04 "MSEBIS_SETUPHOLD_CS0_N,Chip Select SetupHold Register 0" bitfld.long 0x04 8.--13. " MSEBIS_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIS_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" line.long 0x08 "MSEBIS_MMU_ADDR_CS0_N,MMU Base Address Register 0" hexmask.long.tbyte 0x08 12.--31. 0x10 " MSEBIS_MMU_ADDR ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" line.long 0x0C "MSEBIS_MMU_ADDR_MASK_CS0_N,MMU Address Mask Register 0" hexmask.long.tbyte 0x0C 12.--31. 0x10 " MSEBIS_MMU_ADDR_MASK ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" endif if (((per.l(ad:0x400C2000+0x100+0x60)&0x200)==0x200)) rgroup.long 0x100++0x0F line.long 0x00 "MSEBIS_CYCLESIZE_CS1_N,Chip Select CycleSize Register 1" hexmask.long.byte 0x00 24.--31. 1. " MSEBIS_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIS_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIS_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIS_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 1. " MSEBIS_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIS_CLK,High on 1 MSEBIS_CLK -> Low on 1 MSEBIS_CLK" line.long 0x04 "MSEBIS_SETUPHOLD_CS1_N,Chip Select SetupHold Register 1" bitfld.long 0x04 8.--13. " MSEBIS_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIS_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" line.long 0x08 "MSEBIS_MMU_ADDR_CS1_N,MMU Base Address Register 1" hexmask.long.tbyte 0x08 12.--31. 0x10 " MSEBIS_MMU_ADDR ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" line.long 0x0C "MSEBIS_MMU_ADDR_MASK_CS1_N,MMU Address Mask Register 1" hexmask.long.tbyte 0x0C 12.--31. 0x10 " MSEBIS_MMU_ADDR_MASK ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" else group.long 0x100++0x0F line.long 0x00 "MSEBIS_CYCLESIZE_CS1_N,Chip Select CycleSize Register 1" hexmask.long.byte 0x00 24.--31. 1. " MSEBIS_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIS_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIS_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIS_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 1. " MSEBIS_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIS_CLK,High on 1 MSEBIS_CLK -> Low on 1 MSEBIS_CLK" line.long 0x04 "MSEBIS_SETUPHOLD_CS1_N,Chip Select SetupHold Register 1" bitfld.long 0x04 8.--13. " MSEBIS_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIS_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" line.long 0x08 "MSEBIS_MMU_ADDR_CS1_N,MMU Base Address Register 1" hexmask.long.tbyte 0x08 12.--31. 0x10 " MSEBIS_MMU_ADDR ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" line.long 0x0C "MSEBIS_MMU_ADDR_MASK_CS1_N,MMU Address Mask Register 1" hexmask.long.tbyte 0x0C 12.--31. 0x10 " MSEBIS_MMU_ADDR_MASK ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" endif if (((per.l(ad:0x400C2000+0x200+0x60)&0x200)==0x200)) rgroup.long 0x200++0x0F line.long 0x00 "MSEBIS_CYCLESIZE_CS2_N,Chip Select CycleSize Register 2" hexmask.long.byte 0x00 24.--31. 1. " MSEBIS_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIS_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIS_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIS_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 1. " MSEBIS_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIS_CLK,High on 1 MSEBIS_CLK -> Low on 1 MSEBIS_CLK" line.long 0x04 "MSEBIS_SETUPHOLD_CS2_N,Chip Select SetupHold Register 2" bitfld.long 0x04 8.--13. " MSEBIS_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIS_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" line.long 0x08 "MSEBIS_MMU_ADDR_CS2_N,MMU Base Address Register 2" hexmask.long.tbyte 0x08 12.--31. 0x10 " MSEBIS_MMU_ADDR ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" line.long 0x0C "MSEBIS_MMU_ADDR_MASK_CS2_N,MMU Address Mask Register 2" hexmask.long.tbyte 0x0C 12.--31. 0x10 " MSEBIS_MMU_ADDR_MASK ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" else group.long 0x200++0x0F line.long 0x00 "MSEBIS_CYCLESIZE_CS2_N,Chip Select CycleSize Register 2" hexmask.long.byte 0x00 24.--31. 1. " MSEBIS_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIS_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIS_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIS_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 1. " MSEBIS_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIS_CLK,High on 1 MSEBIS_CLK -> Low on 1 MSEBIS_CLK" line.long 0x04 "MSEBIS_SETUPHOLD_CS2_N,Chip Select SetupHold Register 2" bitfld.long 0x04 8.--13. " MSEBIS_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIS_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" line.long 0x08 "MSEBIS_MMU_ADDR_CS2_N,MMU Base Address Register 2" hexmask.long.tbyte 0x08 12.--31. 0x10 " MSEBIS_MMU_ADDR ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" line.long 0x0C "MSEBIS_MMU_ADDR_MASK_CS2_N,MMU Address Mask Register 2" hexmask.long.tbyte 0x0C 12.--31. 0x10 " MSEBIS_MMU_ADDR_MASK ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" endif if (((per.l(ad:0x400C2000+0x300+0x60)&0x200)==0x200)) rgroup.long 0x300++0x0F line.long 0x00 "MSEBIS_CYCLESIZE_CS3_N,Chip Select CycleSize Register 3" hexmask.long.byte 0x00 24.--31. 1. " MSEBIS_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIS_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIS_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIS_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 1. " MSEBIS_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIS_CLK,High on 1 MSEBIS_CLK -> Low on 1 MSEBIS_CLK" line.long 0x04 "MSEBIS_SETUPHOLD_CS3_N,Chip Select SetupHold Register 3" bitfld.long 0x04 8.--13. " MSEBIS_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIS_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" line.long 0x08 "MSEBIS_MMU_ADDR_CS3_N,MMU Base Address Register 3" hexmask.long.tbyte 0x08 12.--31. 0x10 " MSEBIS_MMU_ADDR ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" line.long 0x0C "MSEBIS_MMU_ADDR_MASK_CS3_N,MMU Address Mask Register 3" hexmask.long.tbyte 0x0C 12.--31. 0x10 " MSEBIS_MMU_ADDR_MASK ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" else group.long 0x300++0x0F line.long 0x00 "MSEBIS_CYCLESIZE_CS3_N,Chip Select CycleSize Register 3" hexmask.long.byte 0x00 24.--31. 1. " MSEBIS_WRDLEDATA_NB ,Size of latch data phase in no burst mode (WRDLEDATA_NB)" textline " " hexmask.long.byte 0x00 16.--23. 1. " MSEBIS_RDDLEDATA_NB ,Size of latch data phase in no burst mode (RDDLEDATA_NB)" textline " " bitfld.long 0x00 12.--13. " MSEBIS_WRDLEDATA_B ,Size of latch data phase in burst mode (WRDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 8.--9. " MSEBIS_RDDLEDATA_B ,Size of latch data phase in burst mode (RDDLEDATA_B)" "1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK" textline " " bitfld.long 0x00 1. " MSEBIS_CLEDATA ,Size of control latch phase (CLEDATA)" "High on 1 MSEBIS_CLK,High on 1 MSEBIS_CLK -> Low on 1 MSEBIS_CLK" line.long 0x04 "MSEBIS_SETUPHOLD_CS3_N,Chip Select SetupHold Register 3" bitfld.long 0x04 8.--13. " MSEBIS_WRDLESETUP ,Size of setup data phase (WRDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" textline " " bitfld.long 0x04 0.--5. " MSEBIS_RDDLESETUP ,Size of setup data phase (RDDLESETUP)" "0 MSEBIS_CLK,1 MSEBIS_CLK,2 MSEBIS_CLK,3 MSEBIS_CLK,4 MSEBIS_CLK,5 MSEBIS_CLK,6 MSEBIS_CLK,7 MSEBIS_CLK,8 MSEBIS_CLK,9 MSEBIS_CLK,10 MSEBIS_CLK,11 MSEBIS_CLK,12 MSEBIS_CLK,13 MSEBIS_CLK,14 MSEBIS_CLK,15 MSEBIS_CLK,16 MSEBIS_CLK,17 MSEBIS_CLK,18 MSEBIS_CLK,19 MSEBIS_CLK,20 MSEBIS_CLK,21 MSEBIS_CLK,22 MSEBIS_CLK,23 MSEBIS_CLK,24 MSEBIS_CLK,25 MSEBIS_CLK,26 MSEBIS_CLK,27 MSEBIS_CLK,28 MSEBIS_CLK,29 MSEBIS_CLK,30 MSEBIS_CLK,31 MSEBIS_CLK,32 MSEBIS_CLK,33 MSEBIS_CLK,34 MSEBIS_CLK,35 MSEBIS_CLK,36 MSEBIS_CLK,37 MSEBIS_CLK,38 MSEBIS_CLK,39 MSEBIS_CLK,40 MSEBIS_CLK,41 MSEBIS_CLK,42 MSEBIS_CLK,43 MSEBIS_CLK,44 MSEBIS_CLK,45 MSEBIS_CLK,46 MSEBIS_CLK,47 MSEBIS_CLK,48 MSEBIS_CLK,49 MSEBIS_CLK,50 MSEBIS_CLK,51 MSEBIS_CLK,52 MSEBIS_CLK,53 MSEBIS_CLK,54 MSEBIS_CLK,55 MSEBIS_CLK,56 MSEBIS_CLK,57 MSEBIS_CLK,58 MSEBIS_CLK,59 MSEBIS_CLK,60 MSEBIS_CLK,61 MSEBIS_CLK,62 MSEBIS_CLK,63 MSEBIS_CLK" line.long 0x08 "MSEBIS_MMU_ADDR_CS3_N,MMU Base Address Register 3" hexmask.long.tbyte 0x08 12.--31. 0x10 " MSEBIS_MMU_ADDR ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" line.long 0x0C "MSEBIS_MMU_ADDR_MASK_CS3_N,MMU Address Mask Register 3" hexmask.long.tbyte 0x0C 12.--31. 0x10 " MSEBIS_MMU_ADDR_MASK ,Address translation when bMSEBIS_ADDR_MODE is set to MMU mode" endif group.long 0x10++0x07 line.long 0x00 "MSEBIS_DMATX_REQ_CS0_N,DMA Transmit Request Register 0" bitfld.long 0x00 1. " MSEBIS_DMATX_ENABLE ,MSEBI slave controller configuration status of channel DMA TX" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MSEBIS_DMATX_FORCE ,Force change on DMA flow control pins (WR pins)" "Not forced,Forced" line.long 0x04 "MSEBIS_DMARX_REQ_CS0_N,DMA Receive Request Register 0" bitfld.long 0x04 1. " MSEBIS_DMARX_ENABLE ,MSEBI Slave controller configuration status of channel DMA RX" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " MSEBIS_DMARX_FORCE ,Force change on DMA flow control pins (RD pins)" "Not forced,Forced" if (((per.l(ad:0x400C2000+0x10+0x60)&0x200)==0x200)) rgroup.long (0x10+0x08)++0x07 line.long 0x00 "MSEBIS_DMATDLR_CS0_N,DMA Transmit Data Level Register 0" rbitfld.long 0x00 8.--13. " MSEBIS_DMATX_FIFO_LVL ,DMA TX 0 FIFO level" "0 data entry/DMA TX 0 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/DMA TX 0 FIFO full,?..." textline " " bitfld.long 0x00 3. " MSEBIS_DMATX_FLOW_CTRL ,Enable the DMA flow control for signal MSEBIS_DMA_WR0_N" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MSEBIS_DMATX_OPT_BURST ,Optimize bandwidth of the NoC AHB" "Not optimized,Optimized" textline " " bitfld.long 0x00 0.--1. " MSEBIS_DMATX_MAX_BURST ,Size of burst" "1 word max,4 words max,8 words max,16 words max" line.long 0x04 "MSEBIS_DMARDLR_CS0_N,DMA Receive Data Level Register 0" rbitfld.long 0x04 8.--13. " MSEBIS_DMARX_FIFO_L ,DMA RX 0 FIFO level" "0 data entry/DMA RX 0 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/DMA RX 0 FIFO full,?..." textline " " bitfld.long 0x04 2. " MSEBIS_DMARX_FLOW_CTRL ,Enable the DMA flow control for signal MSEBIS_DMA_RD0_N" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--1. " MSEBIS_DMARX_MAX_BURST ,Size of burst" "1 word max,4 words max,8 words max,16 words max" else group.long (0x10+0x08)++0x07 line.long 0x00 "MSEBIS_DMATDLR_CS0_N,DMA Transmit Data Level Register 0" rbitfld.long 0x00 8.--13. " MSEBIS_DMATX_FIFO_LVL ,DMA TX 0 FIFO level" "0 data entry/DMA TX 0 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/DMA TX 0 FIFO full,?..." textline " " bitfld.long 0x00 3. " MSEBIS_DMATX_FLOW_CTRL ,Enable the DMA flow control for signal MSEBIS_DMA_WR0_N" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MSEBIS_DMATX_OPT_BURST ,Optimize bandwidth of the NoC AHB" "Not optimized,Optimized" textline " " bitfld.long 0x00 0.--1. " MSEBIS_DMATX_MAX_BURST ,Size of burst" "1 word max,4 words max,8 words max,16 words max" line.long 0x04 "MSEBIS_DMARDLR_CS0_N,DMA Receive Data Level Register 0" rbitfld.long 0x04 8.--13. " MSEBIS_DMARX_FIFO_L ,DMA RX 0 FIFO level" "0 data entry/DMA RX 0 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/DMA RX 0 FIFO full,?..." textline " " bitfld.long 0x04 2. " MSEBIS_DMARX_FLOW_CTRL ,Enable the DMA flow control for signal MSEBIS_DMA_RD0_N" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--1. " MSEBIS_DMARX_MAX_BURST ,Size of burst" "1 word max,4 words max,8 words max,16 words max" endif group.long 0x110++0x07 line.long 0x00 "MSEBIS_DMATX_REQ_CS1_N,DMA Transmit Request Register 1" bitfld.long 0x00 1. " MSEBIS_DMATX_ENABLE ,MSEBI slave controller configuration status of channel DMA TX" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MSEBIS_DMATX_FORCE ,Force change on DMA flow control pins (WR pins)" "Not forced,Forced" line.long 0x04 "MSEBIS_DMARX_REQ_CS1_N,DMA Receive Request Register 1" bitfld.long 0x04 1. " MSEBIS_DMARX_ENABLE ,MSEBI Slave controller configuration status of channel DMA RX" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " MSEBIS_DMARX_FORCE ,Force change on DMA flow control pins (RD pins)" "Not forced,Forced" if (((per.l(ad:0x400C2000+0x110+0x60)&0x200)==0x200)) rgroup.long (0x110+0x08)++0x07 line.long 0x00 "MSEBIS_DMATDLR_CS1_N,DMA Transmit Data Level Register 1" rbitfld.long 0x00 8.--13. " MSEBIS_DMATX_FIFO_LVL ,DMA TX 1 FIFO level" "0 data entry/DMA TX 1 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/DMA TX 1 FIFO full,?..." textline " " bitfld.long 0x00 3. " MSEBIS_DMATX_FLOW_CTRL ,Enable the DMA flow control for signal MSEBIS_DMA_WR1_N" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MSEBIS_DMATX_OPT_BURST ,Optimize bandwidth of the NoC AHB" "Not optimized,Optimized" textline " " bitfld.long 0x00 0.--1. " MSEBIS_DMATX_MAX_BURST ,Size of burst" "1 word max,4 words max,8 words max,16 words max" line.long 0x04 "MSEBIS_DMARDLR_CS1_N,DMA Receive Data Level Register 1" rbitfld.long 0x04 8.--13. " MSEBIS_DMARX_FIFO_L ,DMA RX 1 FIFO level" "0 data entry/DMA RX 1 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/DMA RX 1 FIFO full,?..." textline " " bitfld.long 0x04 2. " MSEBIS_DMARX_FLOW_CTRL ,Enable the DMA flow control for signal MSEBIS_DMA_RD1_N" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--1. " MSEBIS_DMARX_MAX_BURST ,Size of burst" "1 word max,4 words max,8 words max,16 words max" else group.long (0x110+0x08)++0x07 line.long 0x00 "MSEBIS_DMATDLR_CS1_N,DMA Transmit Data Level Register 1" rbitfld.long 0x00 8.--13. " MSEBIS_DMATX_FIFO_LVL ,DMA TX 1 FIFO level" "0 data entry/DMA TX 1 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/DMA TX 1 FIFO full,?..." textline " " bitfld.long 0x00 3. " MSEBIS_DMATX_FLOW_CTRL ,Enable the DMA flow control for signal MSEBIS_DMA_WR1_N" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " MSEBIS_DMATX_OPT_BURST ,Optimize bandwidth of the NoC AHB" "Not optimized,Optimized" textline " " bitfld.long 0x00 0.--1. " MSEBIS_DMATX_MAX_BURST ,Size of burst" "1 word max,4 words max,8 words max,16 words max" line.long 0x04 "MSEBIS_DMARDLR_CS1_N,DMA Receive Data Level Register 1" rbitfld.long 0x04 8.--13. " MSEBIS_DMARX_FIFO_L ,DMA RX 1 FIFO level" "0 data entry/DMA RX 1 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/DMA RX 1 FIFO full,?..." textline " " bitfld.long 0x04 2. " MSEBIS_DMARX_FLOW_CTRL ,Enable the DMA flow control for signal MSEBIS_DMA_RD1_N" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--1. " MSEBIS_DMARX_MAX_BURST ,Size of burst" "1 word max,4 words max,8 words max,16 words max" endif if (((per.l(ad:0x400C2000+0x60+0x60)&0x200)==0x200)) rgroup.long 0x60++0x03 line.long 0x00 "MSEBIS_CONFIG_CS0_N,Chip Select Config Register 0" bitfld.long 0x00 14. " MSEBIS_CS0N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS0N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS0N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." else if ((((per.l(ad:0x400C2000+0x60)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x160)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x260)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x360)&0x02)==0x02))) rgroup.long 0x60++0x03 line.long 0x00 "MSEBIS_CONFIG_CS0_N,Chip Select Config Register 0" bitfld.long 0x00 14. " MSEBIS_CS0N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS0N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS0N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." else group.long 0x60++0x03 line.long 0x00 "MSEBIS_CONFIG_CS0_N,Chip Select Config Register 0" bitfld.long 0x00 14. " MSEBIS_CS0N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS0N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS0N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." endif endif if (((per.l(ad:0x400C2000+0x160+0x60)&0x200)==0x200)) rgroup.long 0x160++0x03 line.long 0x00 "MSEBIS_CONFIG_CS1_N,Chip Select Config Register 1" bitfld.long 0x00 14. " MSEBIS_CS1N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS1N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS1N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." else if ((((per.l(ad:0x400C2000+0x60)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x160)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x260)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x360)&0x02)==0x02))) rgroup.long 0x160++0x03 line.long 0x00 "MSEBIS_CONFIG_CS1_N,Chip Select Config Register 1" bitfld.long 0x00 14. " MSEBIS_CS1N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS1N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS1N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." else group.long 0x160++0x03 line.long 0x00 "MSEBIS_CONFIG_CS1_N,Chip Select Config Register 1" bitfld.long 0x00 14. " MSEBIS_CS1N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS1N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS1N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." endif endif if (((per.l(ad:0x400C2000+0x260+0x60)&0x200)==0x200)) rgroup.long 0x260++0x03 line.long 0x00 "MSEBIS_CONFIG_CS2_N,Chip Select Config Register 2" bitfld.long 0x00 14. " MSEBIS_CS2N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS2N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS2N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." else if ((((per.l(ad:0x400C2000+0x60)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x160)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x260)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x360)&0x02)==0x02))) rgroup.long 0x260++0x03 line.long 0x00 "MSEBIS_CONFIG_CS2_N,Chip Select Config Register 2" bitfld.long 0x00 14. " MSEBIS_CS2N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS2N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS2N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." else group.long 0x260++0x03 line.long 0x00 "MSEBIS_CONFIG_CS2_N,Chip Select Config Register 2" bitfld.long 0x00 14. " MSEBIS_CS2N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS2N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS2N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." endif endif if (((per.l(ad:0x400C2000+0x360+0x60)&0x200)==0x200)) rgroup.long 0x360++0x03 line.long 0x00 "MSEBIS_CONFIG_CS3_N,Chip Select Config Register 3" bitfld.long 0x00 14. " MSEBIS_CS3N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS3N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS3N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." else if ((((per.l(ad:0x400C2000+0x60)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x160)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x260)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x360)&0x02)==0x02))) rgroup.long 0x360++0x03 line.long 0x00 "MSEBIS_CONFIG_CS3_N,Chip Select Config Register 3" bitfld.long 0x00 14. " MSEBIS_CS3N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS3N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS3N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." else group.long 0x360++0x03 line.long 0x00 "MSEBIS_CONFIG_CS3_N,Chip Select Config Register 3" bitfld.long 0x00 14. " MSEBIS_CS3N_ROUTING_CS3_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MSEBIS_CS3N_ROUTING_CS2_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MSEBIS_CS3N_ROUTING_CS1_N ,Enable address routing on this line" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " MSEBIS_CS_ENABLE ,MSEBI slave controller configuration status of channel CPU" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " MSEBIS_ADDR_MODE ,MSEBI slave interface address mode" "Direct access,MMU mode" textline " " bitfld.long 0x00 7. " MSEBIS_BURST_ENABLE ,Enable the burst mode on read or write access on AHB master port" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MSEBIS_MODE_WAIT ,MSEBI wait mode" ",Dedicated ext pins driven,One common pin driven,?..." textline " " bitfld.long 0x00 3. " MSEBIS_WEN ,Manage write access right to the device" "Prohibited,Permitted" textline " " bitfld.long 0x00 2. " MSEBIS_BUSY ,MSEBI slave controller communication status" "Not busy,Busy" textline " " bitfld.long 0x00 0.--1. " MSEBIS_CONFIG ,MSEBI configuration" "Synchronous/16 bits/Multiplexed/Mode16/Burst,Synchronous/32 bits/Multiplexed/Mode32/Burst,Synchronous/8 bits/Multiplexed/Mode8/Burst,?..." endif endif if (((per.l(ad:0x400C2000+0x60)&0x200)==0x200))||(((per.l(ad:0x400C2000+0x160)&0x200)==0x200))||(((per.l(ad:0x400C2000+0x260)&0x200)==0x200))||(((per.l(ad:0x400C2000+0x360)&0x200)==0x200)) if ((((per.l(ad:0x400C2000+0x60)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x160)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x260)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x360)&0x02)==0x02))) rgroup.long 0x800++0x03 line.long 0x00 "MSEBIS_CONFIG,Common Config Register" bitfld.long 0x00 30. " MSEBIS_WAIT_CONF ,MSEBIS wait configuration" ",1" textline " " bitfld.long 0x00 28. " MSEBIS_TIMEOUT_REG_ACCESS ,Flag a timeout during the synchronization mechanism for write access on slaves configuration registers" "No timeout/No effect,Timeout/Clear" textline " " bitfld.long 0x00 24.--27. " MSEBIS_TIMEOUT_REG_ACCESS_DELAY ,Delay before the timeout is triggered when unlocking configuration registers for chip select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 23. " MSEBIS_AHB_MASTER_CACHE ,Request from AHB master port of the slave can be configured to allow use of the cache" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " MSEBIS_AHB_MASTER_BUF ,Request from AHB master port of the slave can be configured to allow use bufferable access" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 16.--21. " MSEBIS_CPUTX_FIFO_LVL ,CPU transmit FIFO Level" "0 data entry/COU transmit $2 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/CPU transmit $2 FIFO full,?..." textline " " bitfld.long 0x00 8.--13. " MSEBIS_CPURX_FIFO_LVL ,CPU receive FIFO Level" "0 data entry/COU receive $2 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/CPU receive $2 FIFO full,?..." textline " " bitfld.long 0x00 2.--3. " MSEBIS_BURST_SIZEMAX_CPUWRITE ,Size of burst" "1 word max,4 words max,8 words max,16 words max" textline " " bitfld.long 0x00 0.--1. " MSEBIS_BURST_SIZEMAX_CPUREAD ,Size of a prefetch burst" "1 word max,4 words max,8 words max,16 words max" else group.long 0x800++0x03 line.long 0x00 "MSEBIS_CONFIG,Common Config Register" bitfld.long 0x00 30. " MSEBIS_WAIT_CONF ,MSEBIS wait configuration" ",1" textline " " bitfld.long 0x00 28. " MSEBIS_TIMEOUT_REG_ACCESS ,Flag a timeout during the synchronization mechanism for write access on slaves configuration registers" "No timeout/No effect,Timeout/Clear" textline " " rbitfld.long 0x00 24.--27. " MSEBIS_TIMEOUT_REG_ACCESS_DELAY ,Delay before the timeout is triggered when unlocking configuration registers for chip select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 23. " MSEBIS_AHB_MASTER_CACHE ,Request from AHB master port of the slave can be configured to allow use of the cache" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " MSEBIS_AHB_MASTER_BUF ,Request from AHB master port of the slave can be configured to allow use bufferable access" "Not bufferable,Bufferable" textline " " rbitfld.long 0x00 16.--21. " MSEBIS_CPUTX_FIFO_LVL ,CPU transmit FIFO Level" "0 data entry/COU transmit $2 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/CPU transmit $2 FIFO full,?..." textline " " rbitfld.long 0x00 8.--13. " MSEBIS_CPURX_FIFO_LVL ,CPU receive FIFO Level" "0 data entry/COU receive $2 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/CPU receive $2 FIFO full,?..." textline " " bitfld.long 0x00 2.--3. " MSEBIS_BURST_SIZEMAX_CPUWRITE ,Size of burst" "1 word max,4 words max,8 words max,16 words max" textline " " bitfld.long 0x00 0.--1. " MSEBIS_BURST_SIZEMAX_CPUREAD ,Size of a prefetch burst" "1 word max,4 words max,8 words max,16 words max" endif else if ((((per.l(ad:0x400C2000+0x60)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x160)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x260)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x360)&0x02)==0x02))) rgroup.long 0x800++0x03 line.long 0x00 "MSEBIS_CONFIG,Common Config Register" bitfld.long 0x00 30. " MSEBIS_WAIT_CONF ,MSEBIS wait configuration" ",1" textline " " bitfld.long 0x00 28. " MSEBIS_TIMEOUT_REG_ACCESS ,Flag a timeout during the synchronization mechanism for write access on slaves configuration registers" "No timeout/No effect,Timeout/Clear" textline " " bitfld.long 0x00 24.--27. " MSEBIS_TIMEOUT_REG_ACCESS_DELAY ,Delay before the timeout is triggered when unlocking configuration registers for chip select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 23. " MSEBIS_AHB_MASTER_CACHE ,Request from AHB master port of the slave can be configured to allow use of the cache" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " MSEBIS_AHB_MASTER_BUF ,Request from AHB master port of the slave can be configured to allow use bufferable access" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 16.--21. " MSEBIS_CPUTX_FIFO_LVL ,CPU transmit FIFO Level" "0 data entry/COU transmit $2 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/CPU transmit $2 FIFO full,?..." textline " " bitfld.long 0x00 8.--13. " MSEBIS_CPURX_FIFO_LVL ,CPU receive FIFO Level" "0 data entry/COU receive $2 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/CPU receive $2 FIFO full,?..." textline " " bitfld.long 0x00 2.--3. " MSEBIS_BURST_SIZEMAX_CPUWRITE ,Size of burst" "1 word max,4 words max,8 words max,16 words max" textline " " bitfld.long 0x00 0.--1. " MSEBIS_BURST_SIZEMAX_CPUREAD ,Size of a prefetch burst" "1 word max,4 words max,8 words max,16 words max" else group.long 0x800++0x03 line.long 0x00 "MSEBIS_CONFIG,Common Config Register" bitfld.long 0x00 30. " MSEBIS_WAIT_CONF ,MSEBIS wait configuration" ",1" textline " " bitfld.long 0x00 28. " MSEBIS_TIMEOUT_REG_ACCESS ,Flag a timeout during the synchronization mechanism for write access on slaves configuration registers" "No timeout/No effect,Timeout/Clear" textline " " bitfld.long 0x00 24.--27. " MSEBIS_TIMEOUT_REG_ACCESS_DELAY ,Delay before the timeout is triggered when unlocking configuration registers for chip select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 23. " MSEBIS_AHB_MASTER_CACHE ,Request from AHB master port of the slave can be configured to allow use of the cache" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " MSEBIS_AHB_MASTER_BUF ,Request from AHB master port of the slave can be configured to allow use bufferable access" "Not bufferable,Bufferable" textline " " rbitfld.long 0x00 16.--21. " MSEBIS_CPUTX_FIFO_LVL ,CPU transmit FIFO Level" "0 data entry/COU transmit $2 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/CPU transmit $2 FIFO full,?..." textline " " rbitfld.long 0x00 8.--13. " MSEBIS_CPURX_FIFO_LVL ,CPU receive FIFO Level" "0 data entry/COU receive $2 FIFO empty,1 data entry || Activity on MSEBI bus,2 data entries,3 data entries,4 data entries,5 data entries,6 data entries,7 data entries,8 data entries,9 data entries,10 data entries,11 data entries,12 data entries,13 data entries,14 data entries,15 data entries,16 data entries,17 data entries,18 data entries,19 data entries,20 data entries,21 data entries,22 data entries,23 data entries,24 data entries,25 data entries,26 data entries,27 data entries,28 data entries,29 data entries,30 data entries,31 data entries,32 data entries/CPU receive $2 FIFO full,?..." textline " " bitfld.long 0x00 2.--3. " MSEBIS_BURST_SIZEMAX_CPUWRITE ,Size of burst" "1 word max,4 words max,8 words max,16 words max" textline " " bitfld.long 0x00 0.--1. " MSEBIS_BURST_SIZEMAX_CPUREAD ,Size of a prefetch burst" "1 word max,4 words max,8 words max,16 words max" endif endif textline " " rgroup.long 0x804++0x07 line.long 0x00 "MSEBIS_STATUS_INT0,Interrupt Status Register" bitfld.long 0x00 13. " MSEBIS_INT0_DMATX[1] ,MSEBI_CS1_N end of block interrupt" "Not detected,Detected" bitfld.long 0x00 12. " [0] ,MSEBI_CS0_N end of block interrupt" "Not detected,Detected" textline " " bitfld.long 0x00 9. " MSEBIS_INT0_DMARX[1] ,MSEBI_CS1_N end of block interrupt" "Not detected,Detected" bitfld.long 0x00 8. " [0] ,MSEBI_CS0_N end of block interrupt" "Not detected,Detected" textline " " bitfld.long 0x00 7. " MSEBIS_INT0_CPUTX[3] ,MSEBI_CS3_N end of block interrupt" "Not detected,Detected" bitfld.long 0x00 6. " [2] ,MSEBI_CS2_N end of block interrupt" "Not detected,Detected" textline " " bitfld.long 0x00 5. " [1] ,MSEBI_CS1_N end of block interrupt" "Not detected,Detected" bitfld.long 0x00 4. " [0] ,MSEBI_CS0_N end of block interrupt" "Not detected,Detected" textline " " bitfld.long 0x00 3. " MSEBIS_INT0_CPURX[3] ,MSEBI_CS3_N end of block interrupt" "Not detected,Detected" bitfld.long 0x00 2. " [2] ,MSEBI_CS2_N end of block interrupt" "Not detected,Detected" textline " " bitfld.long 0x00 1. " [1] ,MSEBI_CS1_N end of block interrupt" "Not detected,Detected" bitfld.long 0x00 0. " [0] ,MSEBI_CS0_N end of block interrupt" "Not detected,Detected" line.long 0x04 "MSEBIS_STATUS_INT1,Masked Interrupt Status Register" bitfld.long 0x04 13. " MSEBIS_INT1_DMATX[1] ,MSEBI_CS1_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" bitfld.long 0x04 12. " [0] ,MSEBI_CS0_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" textline " " bitfld.long 0x04 9. " MSEBIS_INT1_DMARX[1] ,MSEBI_CS1_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" bitfld.long 0x04 8. " [0] ,MSEBI_CS0_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" textline " " bitfld.long 0x04 7. " MSEBIS_INT1_CPUTX[3] ,MSEBI_CS3_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" bitfld.long 0x04 6. " [2] ,MSEBI_CS2_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" textline " " bitfld.long 0x04 5. " [1] ,MSEBI_CS1_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" bitfld.long 0x04 4. " [0] ,MSEBI_CS0_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" textline " " bitfld.long 0x04 3. " MSEBIS_INT1_CPURX[3] ,MSEBI_CS3_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" bitfld.long 0x04 2. " [2] ,MSEBI_CS2_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" textline " " bitfld.long 0x04 1. " [1] ,MSEBI_CS1_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" bitfld.long 0x04 0. " [0] ,MSEBI_CS0_N end of block interrupt" "Not detected/Masked,Detected/Unmasked" group.long 0x80C++0x07 line.long 0x00 "MSEBIS_MASK_INT,Interrupt Mask Register" bitfld.long 0x00 13. " MSEBIS_MASK_INT_DMATX[1] ,MSEBI_CS1_N end of block interrupt mask" "Masked,Unmasked" bitfld.long 0x00 12. " [0] ,MSEBI_CS0_N end of block interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 9. " MSEBIS_MASK_INT_DMARX[1] ,MSEBI_CS1_N end of block interrupt mask" "Masked,Unmasked" bitfld.long 0x00 8. " [0] ,MSEBI_CS0_N end of block interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 7. " MSEBIS_MASK_INT_CPUTX[3] ,MSEBI_CS3_N end of block interrupt mask" "Masked,Unmasked" bitfld.long 0x00 6. " [2] ,MSEBI_CS2_N end of block interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 5. " [1] ,MSEBI_CS1_N end of block interrupt mask" "Masked,Unmasked" bitfld.long 0x00 4. " [0] ,MSEBI_CS0_N end of block interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 3. " MSEBIS_MASK_INT_CPURX[3] ,MSEBI_CS3_N end of block interrupt mask" "Masked,Unmasked" bitfld.long 0x00 2. " [2] ,MSEBI_CS2_N end of block interrupt mask" "Masked,Unmasked" textline " " bitfld.long 0x00 1. " [1] ,MSEBI_CS1_N end of block interrupt mask" "Masked,Unmasked" bitfld.long 0x00 0. " [0] ,MSEBI_CS0_N end of block interrupt mask" "Masked,Unmasked" line.long 0x04 "MSEBIS_CLR_INT,Interrupt Clear Register" bitfld.long 0x04 13. " MSEBIS_CLR_INT_DMATX[1] ,MSEBI_CS1_N end of block interrupt clear" "Not cleared,Cleared" bitfld.long 0x04 12. " [0] ,MSEBI_CS0_N end of block interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x04 9. " MSEBIS_CLR_INT_DMARX[1] ,MSEBI_CS1_N end of block interrupt clear" "Not cleared,Cleared" bitfld.long 0x04 8. " [0] ,MSEBI_CS0_N end of block interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x04 7. " MSEBIS_CLR_INT_CPUTX[3] ,MSEBI_CS3_N end of block interrupt clear" "Not cleared,Cleared" bitfld.long 0x04 6. " [2] ,MSEBI_CS2_N end of block interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x04 5. " [1] ,MSEBI_CS1_N end of block interrupt clear" "Not cleared,Cleared" bitfld.long 0x04 4. " [0] ,MSEBI_CS0_N end of block interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x04 3. " MSEBIS_CLR_INT_CPURX[3] ,MSEBI_CS3_N end of block interrupt clear" "Not cleared,Cleared" bitfld.long 0x04 2. " [2] ,MSEBI_CS2_N end of block interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x04 1. " [1] ,MSEBI_CS1_N end of block interrupt clear" "Not cleared,Cleared" bitfld.long 0x04 0. " [0] ,MSEBI_CS0_N end of block interrupt clear" "Not cleared,Cleared" textline " " if ((((per.l(ad:0x400C2000+0x60)&0x200)==0x200))||(((per.l(ad:0x400C2000+0x160)&0x200)==0x200))||(((per.l(ad:0x400C2000+0x260)&0x200)==0x200))||(((per.l(ad:0x400C2000+0x360)&0x200)==0x200)))||((((per.l(ad:0x400C2000+0x60)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x160)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x260)&0x02)==0x02))||(((per.l(ad:0x400C2000+0x360)&0x02)==0x02))) rgroup.long 0x814++0x03 line.long 0x00 "MSEBIS_EOB_ADDR,End Of Block Address Register" hexmask.long 0x00 2.--31. 0x04 " MSEBIS_EOB_ADDR ,Address of the descriptor used to complete the write transfer in memory for MSEBI_CS[n]_N" else group.long 0x814++0x03 line.long 0x00 "MSEBIS_EOB_ADDR,End Of Block Address Register" hexmask.long 0x00 2.--31. 0x04 " MSEBIS_EOB_ADDR ,Address of the descriptor used to complete the write transfer in memory for MSEBI_CS[n]_N" endif width 0x0B tree.end tree "MSEBI Slave DMA" base ad:0x400C1000 width 35. group.long 0x00++0x07 line.long 0x00 "MSEBIS_INT,Slave Interrupt Register" bitfld.long 0x00 13. " MSEBIS_SET_INT_DMATX[1] ,MSEBI_CS1_N slave interrupt" "No interrupt,Interrupt" bitfld.long 0x00 12. " [0] ,MSEBI_CS0_N slave interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " MSEBIS_SET_INT_DMARX[1] ,MSEBI_CS1_N slave interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " [0] ,MSEBI_CS0_N slave interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " MSEBIS_SET_INT_CPUTX[3] ,MSEBI_CS3_N slave interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " [2] ,MSEBI_CS2_N slave interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " [1] ,MSEBI_CS1_N slave interrupt" "No interrupt,Interrupt" bitfld.long 0x00 4. " [0] ,MSEBI_CS0_N slave interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " MSEBIS_SET_INT_CPURX[3] ,MSEBI_CS3_N slave interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " [2] ,MSEBI_CS2_N slave interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " [1] ,MSEBI_CS1_N slave interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " [0] ,MSEBI_CS0_N slave interrupt" "No interrupt,Interrupt" line.long 0x04 "MSEBIS_STATUS,Slave Status Register" bitfld.long 0x04 11. " MSEBIS_ERROR_CS_CONFIGURATION[3] ,MSEBI_CS3_N slave controller has detected a configuration change" "No error,Error" bitfld.long 0x04 10. " [2] ,MSEBI_CS2_N slave controller has detected a configuration change" "No error,Error" textline " " bitfld.long 0x04 9. " [1] ,MSEBI_CS1_N slave controller has detected a configuration change" "No error,Error" bitfld.long 0x04 8. " [0] ,MSEBI_CS0_N slave controller has detected a configuration change" "No error,Error" textline " " bitfld.long 0x04 7. " MSEBIS_ERROR_WEN[3] ,MSEBI_CS3_N slave controller has detected an error on write access write" "No error,Error" bitfld.long 0x04 6. " [2] ,MSEBI_CS2_N slave controller has detected an error on write access write" "No error,Error" textline " " bitfld.long 0x04 5. " [1] ,MSEBI_CS1_N slave controller has detected an error on write access write" "No error,Error" bitfld.long 0x04 4. " [0] ,MSEBI_CS0_N slave controller has detected an error on write access write" "No error,Error" textline " " bitfld.long 0x04 3. " MSEBIS_ERROR_ADDR[3] ,MSEBI_CS3_N slave controller has detect an access to bad address" "No error,Error" bitfld.long 0x04 2. " [2] ,MSEBI_CS2_N slave controller has detect an access to bad address" "No error,Error" textline " " bitfld.long 0x04 1. " [1] ,MSEBI_CS1_N slave controller has detect an access to bad address" "No error,Error" bitfld.long 0x04 0. " [0] ,MSEBI_CS0_N slave controller has detect an access to bad address" "No error,Error" rgroup.long 0x8++0x03 line.long 0x00 "MSEBIS_ID_CS0_N,Slave ID Register 0" rgroup.long 0xC++0x03 line.long 0x00 "MSEBIS_ID_CS1_N,Slave ID Register 1" rgroup.long 0x10++0x03 line.long 0x00 "MSEBIS_ID_CS2_N,Slave ID Register 2" rgroup.long 0x14++0x03 line.long 0x00 "MSEBIS_ID_CS3_N,Slave ID Register 3" width 0x0B tree.end tree.end sif !cpuis("R9A06G03?-CA7") tree.open "HW-RTOS GMAC (Gigabit Ethernet MAC)" tree "HW-RTOS HWFC (Hardware Function Call)" base ad:0x400E0000 width 8. group.long 0x00++0x03 line.long 0x00 "C0TYPE,Hardware Function Type Register" group.long 0x08++0x03 line.long 0x00 "C0STAT,Hardware Function Status Register" group.long 0xF000++0x03 line.long 0x00 "SYSC,Hardware Function System Call Register" hexmask.long.word 0x00 0.--15. 1. " SYSC ,Hardware function to be used" if (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==(0x5000||0x5006))) group.long 0xF004++0x03 line.long 0x00 "R4,Hardware Function Argument Register 4" hexmask.long.word 0x00 0.--15. 1. " BUFFLNGTH ,Buffer length" hgroup.long 0xF008++0x03 hide.long 0x00 "R5,Hardware Function Argument Register 5" hgroup.long 0xF00C++0x03 hide.long 0x00 "R6,Hardware Function Argument Register 6" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==(0x5001||0x5100))) group.long 0xF004++0x03 line.long 0x00 "R4,Hardware Function Argument Register 4" hgroup.long 0xF008++0x03 hide.long 0x00 "R5,Hardware Function Argument Register 5" hgroup.long 0xF00C++0x03 hide.long 0x00 "R6,Hardware Function Argument Register 6" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==(0x5002||0x5114))) group.long 0xF004++0x07 line.long 0x00 "R4,Hardware Function Argument Register 4" line.long 0x04 "R5,Hardware Function Argument Register 5" hgroup.long 0xF00C++0x03 hide.long 0x00 "R6,Hardware Function Argument Register 6" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x5102)) group.long 0xF004++0x03 line.long 0x00 "R4,Hardware Function Argument Register 4" bitfld.long 0x00 0. " FRCRST ,Forced reset" "Not forced,Forced" hgroup.long 0xF008++0x03 hide.long 0x00 "R5,Hardware Function Argument Register 5" hgroup.long 0xF00C++0x03 hide.long 0x00 "R6,Hardware Function Argument Register 6" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x510B)) group.long 0xF004++0x03 line.long 0x00 "R4,Hardware Function Argument Register 4" bitfld.long 0x00 8. " INTSRC[8] ,Interrupt source [8]" "Disabled,Enabled" bitfld.long 0x00 7. " [7] ,Interrupt source [7]" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Interrupt source [6]" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " [5] ,Interrupt source [5]" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Interrupt source [4]" "Disabled,Enabled" bitfld.long 0x00 3. " [3] ,Interrupt source [3]" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " [2] ,Interrupt source [2]" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Interrupt source [1]" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Interrupt source [0]" "Disabled,Enabled" hgroup.long 0xF008++0x03 hide.long 0x00 "R5,Hardware Function Argument Register 5" hgroup.long 0xF00C++0x03 hide.long 0x00 "R6,Hardware Function Argument Register 6" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==(0x5211||0x5212))) group.long 0xF004++0x0B line.long 0x00 "R4,Hardware Function Argument Register 4" line.long 0x04 "R5,Hardware Function Argument Register 5" line.long 0x08 "R6,Hardware Function Argument Register 6" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x5104)) group.long 0xF004++0x0B line.long 0x00 "R4,Hardware Function Argument Register 4" line.long 0x04 "R5,Hardware Function Argument Register 5" line.long 0x08 "R6,Hardware Function Argument Register 6" hexmask.long.word 0x08 0.--15. 1. " NUMBTX ,Number of bytes for transfer" else hgroup.long 0xF004++0x07 hide.long 0x00 "R4,Hardware Function Argument Register 4" hgroup.long 0xF008++0x07 hide.long 0x00 "R5,Hardware Function Argument Register 5" hgroup.long 0xF00C++0x03 hide.long 0x00 "R6,Hardware Function Argument Register 6" endif hgroup.long 0xF010++0x03 hide.long 0x00 "R7,Hardware Function Argument Register 7" group.long 0xF014++0x03 line.long 0x00 "CMD,Hardware Function Command Register" if (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x5000)) if (((per.l(ad:0x400E0000+0xF020)&0x20000000)==0x20000000)) group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Complete" "Not completed,Completed" bitfld.long 0x00 0.--1. " RSLT ,Result" "Success,Success,Invalid sys call,Buffer insufficient" else group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Complete" "Not completed,Completed" bitfld.long 0x00 0.--1. " RSLT ,Result" ",,Invalid sys call,Buffer insufficient" endif group.long 0xF024++0x03 line.long 0x00 "R1,Hardware Function Return Value Register 1" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x5006)) group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Hardware function complete" "Not completed,Completed" bitfld.long 0x00 0.--1. " RSLT ,Result" "Success,Success,Invalid sys call,Buffer insufficient" group.long 0xF024++0x03 line.long 0x00 "R1,Hardware Function Return Value Register 1" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x5001)) group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Hardware function complete" "Not completed,Completed" bitfld.long 0x00 0.--1. " RSLT ,Result" "Success,Success,Invalid sys call,Buffer insufficient" hgroup.long 0xF024++0x03 hide.long 0x00 "R1,Hardware Function Return Value Register 1" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x5002)) group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Hardware function complete" "Not completed,Completed" bitfld.long 0x00 0.--2. " RSLT ,Result" "Success,Success,Invalid sys call,Buffer not definable,Part of buffer released,?..." hgroup.long 0xF024++0x03 hide.long 0x00 "R1,Hardware Function Return Value Register 1" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==(0x5101||0x510B||0x5104||0x5114))) group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Hardware function complete" "Not completed,Completed" bitfld.long 0x00 0. " RSLT ,Result" "Success,Invalid sys call" hgroup.long 0xF024++0x03 hide.long 0x00 "R1,Hardware Function Return Value Register 1" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x5100)) group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Hardware function complete" "Not completed,Completed" bitfld.long 0x00 0.--1. " RSLT ,Result" "Success,Invalid sys call,?..." hgroup.long 0xF024++0x03 hide.long 0x00 "R1,Hardware Function Return Value Register 1" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x510C)) group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Hardware function complete" "Not completed,Completed" bitfld.long 0x00 1. " RSLT[1] ,Memory access timeout" "No timeout,Timeout" bitfld.long 0x00 0. " [0] ,Memory access violation" "No violation,Violation" hgroup.long 0xF024++0x03 hide.long 0x00 "R1,Hardware Function Return Value Register 1" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x5102)) if (((per.l(ad:0x400E0000+0xF004)&0x01)==0x01)) group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Hardware function complete" "Not completed,Completed" bitfld.long 0x00 0.--1. " RSLT ,Result" "Success,Invalid sys call,Cannot be disabled,Already disabled" else group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Hardware function complete" "Not completed,Completed" bitfld.long 0x00 0.--1. " RSLT ,Result" "Success,Invalid sys call,?..." endif hgroup.long 0xF024++0x03 hide.long 0x00 "R1,Hardware Function Return Value Register 1" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==0x510D)) group.long 0xF020++0x03 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Hardware function complete" "Not completed,Completed" textline " " bitfld.long 0x00 3. " RSLT[3] ,HWFNC_MACDMA_Rx_Disable is issued when forced reset is enabled" "Not issued,Issued" bitfld.long 0x00 2. " [2] ,Rx data size is over 4096 words" "Not over,Over" bitfld.long 0x00 0. " [0] ,Buffer get fails result" "No failure,Failure" hgroup.long 0xF024++0x03 hide.long 0x00 "R1,Hardware Function Return Value Register 1" elif (((per.l(ad:0x400E0000+0xF000)&0xFFFF)==(0x5211||0x5212))) group.long 0xF020++0x07 line.long 0x00 "R0,Hardware Function Return Value Register 0" bitfld.long 0x00 29. " CMPLT ,Hardware function complete" "Not completed,Completed" bitfld.long 0x00 0.--1. " RSLT ,Result" "Success,Invalid sys call,Exception occurred,?..." line.long 0x04 "R1,Hardware Function Return Value Register 1" else hgroup.long 0xF020++0x03 hide.long 0x00 "R0,Hardware Function Return Value Register 0" hgroup.long 0xF024++0x03 hide.long 0x00 "R1,Hardware Function Return Value Register 1" endif width 0x0B tree.end tree "HW-RTOS GMAC (Gigabit Ethernet MAC)" base ad:0x400F0000 width 16. rgroup.long 0x0C++0x07 line.long 0x00 "GMAC_TXID,TX ID Register" line.long 0x04 "GMAC_TXRESULT,TX Result Register" bitfld.long 0x04 13. " TCMP ,Transmission finished" "Not finished,Finished" bitfld.long 0x04 12. " TABT ,Transmission abort occurred" "Not occurred,Occurred" bitfld.long 0x04 7. " OVERFW ,A frame longer than 1518 octets was written to the transmit FIFO" "Not written,Written" bitfld.long 0x04 6. " UNDERFW ,A frame shorter than the minimum frame length was written to the transmit FIFO" "Not written,Written" textline " " bitfld.long 0x04 0. " FIFOUFLOW ,An FIFO underflow occurred during transmission" "No underflow,Underflow" group.long 0x20++0x0B line.long 0x00 "GMAC_MODE,Mode Register" bitfld.long 0x00 31. " ETHMODE ,HW-RTOS GMAC ethernet mode" "Not used,Gigabit eth" bitfld.long 0x00 30. " DUPMODE ,HW-RTOS GMAC full duplex mode" "Not used,Full duplex" line.long 0x04 "GMAC_RXMODE,RX Mode Register" bitfld.long 0x04 31. " AFILLTEREN ,Address filtering enable" "Disabled,Enabled" bitfld.long 0x04 30. " MFILLTEREN ,Multicast address frames filtering enable" "Disabled,Enabled" bitfld.long 0x04 29. " SFRXFIFO ,Cut through/Store & forward mode" "Cut through,Store & forward" bitfld.long 0x04 28. " RAMASKEN ,Enable function that can be set by the BITMSK[7:0] bits of the GMAC_ADRnB register" "Disabled,Enabled" textline " " bitfld.long 0x04 14.--15. " REMPTH ,When the number of data words in the FIFO is below this value the REMP bit of the GMAC_RXFIFO register is set to 1" "4 words,8 words,16 words,32 words" bitfld.long 0x04 12.--13. " RFULLTH ,When the empty space in the FIFO is below this value the RFULL bit in the GMAC_RXFIFO register becomes 1" "4 words,8 words,16 words,32 words" bitfld.long 0x04 9.--11. " RRTTH ,If the number of data words in the FIFO exceeds this value the RRT bit of the GMAC_RXFIFO register is set to 1" "4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words" line.long 0x08 "GMAC_TXMODE,TX Mode Register" bitfld.long 0x08 30. " LPTXEN ,Permit transmission of frames that are longer than the length prescribed by IEEE802.3" "Prohibited,Permitted" bitfld.long 0x08 29. " SF ,Starts transmission after the data up to the end of the frame is written to TX FIFO" "Not used,Started" bitfld.long 0x08 28. " SPTXEN ,Permit transmission of frames that are shorter than the length prescribed by IEEE802.3" "Prohibited,Permitted" bitfld.long 0x08 14.--15. " FSTTH ,Frame start threshold" "4 words,8 words,16 words,32 words" textline " " bitfld.long 0x08 11.--13. " TEMPTH ,If fewer words of data are in the TX FIFO buffer than the value specified by these bits the TEMP bit in the GMAC_TXFIFO register becomes 1" "4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words" bitfld.long 0x08 9.--10. " TFULLTH ,If the empty space in the TX FIFO buffer is below the value specified by these bits the TFULL bit in the GMAC_TXFIFO becomes 1" "4 words,8 words,16 words,32 words" bitfld.long 0x08 6.--7. " TRBMODE ,Write mode of transmission result to the GMAC_TXRESULT register" "Always written,Written on error,Never written,?..." wgroup.long 0x30++0x03 line.long 0x00 "GMAC_RESET,Reset Register" bitfld.long 0x00 31. " ALLRST ,Reset all Ethernet MAC modules which includes HW-RTOS GMAC registers" "No reset,Reset" bitfld.long 0x00 15. " TXRST ,Reset the TX MAC TX FIFO modules" "No reset,Reset" bitfld.long 0x00 14. " RXRST ,Reset the RX MAC RX FIFO modules" "No reset,Reset" group.long 0x80++0x03 line.long 0x00 "GMAC_PAUSE1,Pause Packet Data Register 1" group.long 0x84++0x03 line.long 0x00 "GMAC_PAUSE2,Pause Packet Data Register 2" group.long 0x88++0x03 line.long 0x00 "GMAC_PAUSE3,Pause Packet Data Register 3" group.long 0x8C++0x03 line.long 0x00 "GMAC_PAUSE4,Pause Packet Data Register 4" group.long 0x90++0x03 line.long 0x00 "GMAC_PAUSE5,Pause Packet Data Register 5" group.long 0x98++0x0B line.long 0x00 "GMAC_FLWCTL,RX Flow Control Register" bitfld.long 0x00 31. " PPRXEN ,Auto broadcast suspension in response to reception of a pause packet enable" "Disabled,Enabled" line.long 0x04 "GMAC_PAUSPKT,Pause Packet Register" bitfld.long 0x04 31. " PPR ,Pause packet transmission start" "Not started,Started" line.long 0x08 "GMAC_MIIM,MIIM Register" bitfld.long 0x08 26. " RWDV ,Read/write operation" "Read,Write" hexmask.long.word 0x08 21.--25. 0x20 " PHYADDR ,Address of the PHY to be accessed" hexmask.long.byte 0x08 16.--20. 0x01 " REGADDR ,Register address of the PHY to be accessed" hexmask.long.word 0x08 0.--15. 1. " DATA ,Write data or read data" group.long 0x100++0x07 line.long 0x00 "GMAC_ADR1A,MAC Address Register 1A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR1B,MAC Address Register 1B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x108++0x07 line.long 0x00 "GMAC_ADR2A,MAC Address Register 2A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR2B,MAC Address Register 2B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x110++0x07 line.long 0x00 "GMAC_ADR3A,MAC Address Register 3A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR3B,MAC Address Register 3B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x118++0x07 line.long 0x00 "GMAC_ADR4A,MAC Address Register 4A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR4B,MAC Address Register 4B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x120++0x07 line.long 0x00 "GMAC_ADR5A,MAC Address Register 5A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR5B,MAC Address Register 5B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x128++0x07 line.long 0x00 "GMAC_ADR6A,MAC Address Register 6A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR6B,MAC Address Register 6B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x130++0x07 line.long 0x00 "GMAC_ADR7A,MAC Address Register 7A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR7B,MAC Address Register 7B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x138++0x07 line.long 0x00 "GMAC_ADR8A,MAC Address Register 8A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR8B,MAC Address Register 8B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x140++0x07 line.long 0x00 "GMAC_ADR9A,MAC Address Register 9A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR9B,MAC Address Register 9B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x148++0x07 line.long 0x00 "GMAC_ADR10A,MAC Address Register 10A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR10B,MAC Address Register 10B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x150++0x07 line.long 0x00 "GMAC_ADR11A,MAC Address Register 11A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR11B,MAC Address Register 11B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x158++0x07 line.long 0x00 "GMAC_ADR12A,MAC Address Register 12A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR12B,MAC Address Register 12B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x160++0x07 line.long 0x00 "GMAC_ADR13A,MAC Address Register 13A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR13B,MAC Address Register 13B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x168++0x07 line.long 0x00 "GMAC_ADR14A,MAC Address Register 14A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR14B,MAC Address Register 14B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x170++0x07 line.long 0x00 "GMAC_ADR15A,MAC Address Register 15A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR15B,MAC Address Register 15B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" group.long 0x178++0x07 line.long 0x00 "GMAC_ADR16A,MAC Address Register 16A" hexmask.long.byte 0x00 24.--31. 1. " MADDR4B ,4th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 16.--23. 1. " MADDR3B ,3rd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 8.--15. 1. " MADDR2B ,2nd byte from the beginning of the MAC address to be included" hexmask.long.byte 0x00 0.--7. 1. " MADDR1B ,1st byte from the beginning of the MAC address to be included" line.long 0x04 "GMAC_ADR16B,MAC Address Register 16B" bitfld.long 0x04 23. " BITMSK[7] ,Comparative masks on a bit [7] basis for destination address" "Not masked,Masked" bitfld.long 0x04 22. " [6] ,Comparative masks on a bit [6] basis for destination address" "Not masked,Masked" bitfld.long 0x04 21. " [5] ,Comparative masks on a bit [5] basis for destination address" "Not masked,Masked" bitfld.long 0x04 20. " [4] ,Comparative masks on a bit [4] basis for destination address" "Not masked,Masked" textline " " bitfld.long 0x04 19. " [3] ,Comparative masks on a bit [3] basis for destination address" "Not masked,Masked" bitfld.long 0x04 18. " [2] ,Comparative masks on a bit [2] basis for destination address" "Not masked,Masked" bitfld.long 0x04 17. " [1] ,Comparative masks on a bit [1] basis for destination address" "Not masked,Masked" bitfld.long 0x04 16. " [0] ,Comparative masks on a bit [0] basis for destination address" "Not masked,Masked" textline " " hexmask.long.byte 0x04 8.--15. 1. " MADDR6B ,6th byte from the beginning of the MAC address to be included" hexmask.long.byte 0x04 0.--7. 1. " MADDR5B ,5th byte from the beginning of the MAC address to be included" rgroup.long 0x200++0x07 line.long 0x00 "GMAC_RXFIFO,RX FIFO Status Register" bitfld.long 0x00 31. " RFULL ,Empty number of words in RX FIFO is equal to or less than receive almost full threshold" "Not occurred,Occurred" bitfld.long 0x00 30. " REMP ,Number of words in RX FIFO is equal to or less than receive almost full threshold" "Not occurred,Occurred" bitfld.long 0x00 29. " RRT ,Number of words in RX FIFO buffer is over the RX FIFO read threshold" "Not occurred,Occurred" hexmask.long.word 0x00 17.--28. 1. " RSW ,Number of data words in RX FIFO" line.long 0x04 "GMAC_TXFIFO,TX FIFO Status Register" bitfld.long 0x04 31. " TFULL ,Empty space in the TX FIFO buffer is below the threshold set by the TFULLTH[1:0] bits of the GMAC_TXMODE register" "Not occurred,Occurred" bitfld.long 0x04 30. " TEMP ,Number of data words in TX FIFO is equal to or less than the threshold value set by the TEMPTH[2:0] bits of the GMAC_TXMODE register" "Not occurred,Occurred" bitfld.long 0x04 27.--29. " TSTATUS ,Status of TX FIFO" "Stopped,Stopped,Stopped,Stopped,ACC NEW FR,Write enable,CMPLT,Full" bitfld.long 0x04 24.--26. " TRBFR ,Number of frames existing in the transmission result buffer" "0,1,2,3,4,5,6,7" group.long 0x208++0x03 line.long 0x00 "GMAC_ACC,TCP/IPACC Register" bitfld.long 0x00 2. " RTCPIPACC ,Disable checksum support for the RX TCPIP accelerator" "No,Yes" bitfld.long 0x00 1. " TTCPIPEN ,TX TCPIP accelerator enable" "Disabled,Enabled" bitfld.long 0x00 0. " RTCPIPEN ,RX TCPIP accelerator enable" "Disabled,Enabled" group.long 0x220++0x03 line.long 0x00 "GMAC_RXMAC_ENA,RX MAC Enable Register" bitfld.long 0x00 0. " RMACEN ,Reception enable" "Disabled,Enabled" rgroup.long 0x1100++0x03 line.long 0x00 "BUFID,Receive Buffer Information Register" bitfld.long 0x00 31. " NOEMP ,Receive buffer not empty" "No,Yes" bitfld.long 0x00 28. " VALID ,Receive data valid" "Invalid,Valid" hexmask.long.word 0x00 16.--27. 1. " WORD ,Number of words in receive data" hexmask.long.word 0x00 0.--15. 0x01 " ADDR ,Receive buffer address" width 0x0B tree.end tree.end endif tree "A5PSW (Advanced 5port Switch)" base ad:0x44050000 sif cpuis("R9A06G032-CA7")||cpuis("R9A06G033-CA7") width 20. rgroup.long 0x00++0x03 line.long 0x00 "REVISION,Switch Core Version" group.long 0x04++0x2F line.long 0x00 "SCRATCH,Scratch Register" line.long 0x04 "PORT_ENA,Port Enable Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 20. " RXENA[4] ,Receive enable mask port 4" "Unmasked,Masked" bitfld.long 0x04 19. " [3] ,Receive enable mask port 3" "Unmasked,Masked" textline " " endif bitfld.long 0x04 18. " RXENA[2] ,Receive enable mask port 2" "Unmasked,Masked" bitfld.long 0x04 17. " [1] ,Receive enable mask port 1" "Unmasked,Masked" bitfld.long 0x04 16. " [0] ,Receive enable mask port 0" "Unmasked,Masked" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 4. " TXENA[4] ,Transmit enable mask port 4" "Unmasked,Masked" bitfld.long 0x04 3. " [3] ,Transmit enable mask port 3" "Unmasked,Masked" textline " " endif bitfld.long 0x04 2. " TXENA[2] ,Transmit enable mask port 2" "Unmasked,Masked" bitfld.long 0x04 1. " [1] ,Transmit enable mask port 1" "Unmasked,Masked" bitfld.long 0x04 0. " [0] ,Transmit enable mask port 0" "Unmasked,Masked" line.long 0x08 "UCAST_DEFAULT_MASK,Unicast Default Mask Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x08 4. " UCASTDM[4] ,Default unicast resolution port 4" "0,1" bitfld.long 0x08 3. " [3] ,Default unicast resolution port 3" "0,1" textline " " endif bitfld.long 0x08 2. " UCASTDM[2] ,Default unicast resolution port 2" "0,1" bitfld.long 0x08 1. " [1] ,Default unicast resolution port 1" "0,1" bitfld.long 0x08 0. " [0] ,Default unicast resolution port 0" "0,1" line.long 0x0C "VLAN_VERIFY,Verify VLAN Domain" sif !cpuis("R9A06G034-CM3") bitfld.long 0x0C 20. " VLANDISC[4] ,Discard unknown port 4" "Not discarded,Discarded" bitfld.long 0x0C 19. " [3] ,Discard unknown port 3" "Not discarded,Discarded" textline " " endif bitfld.long 0x0C 18. " VLANDISC[2] ,Discard unknown port 2" "Not discarded,Discarded" bitfld.long 0x0C 17. " [1] ,Discard unknown port 1" "Not discarded,Discarded" bitfld.long 0x0C 16. " [0] ,Discard unknown port 0" "Not discarded,Discarded" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x0C 4. " VLANVERI[4] ,Verify VLAN domain port 4" "Not verified,Verified" bitfld.long 0x0C 3. " [3] ,Verify VLAN domain port 3" "Not verified,Verified" textline " " endif bitfld.long 0x0C 2. " VLANVERI[2] ,Verify VLAN domain port 2" "Not verified,Verified" bitfld.long 0x0C 1. " [1] ,Verify VLAN domain port 1" "Not verified,Verified" bitfld.long 0x0C 0. " [0] ,Verify VLAN domain port 0" "Not verified,Verified" line.long 0x10 "BCAST_DEFAULT_MASK,Broadcast Default Mask Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x10 4. " BCASTDM[4] ,Default broadcast resolution port 4" "0,1" bitfld.long 0x10 3. " [3] ,Default broadcast resolution port 3" "0,1" textline " " endif bitfld.long 0x10 2. " BCASTDM[2] ,Default broadcast resolution port 2" "0,1" bitfld.long 0x10 1. " [1] ,Default broadcast resolution port 1" "0,1" bitfld.long 0x10 0. " [0] ,Default broadcast resolution port 0" "0,1" line.long 0x14 "MCAST_DEFAULT_MASK,Multicast Default Mask Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x14 4. " MCASTDM[4] ,Default multicast resolution port 4" "0,1" bitfld.long 0x14 3. " [3] ,Default multicast resolution port 3" "0,1" textline " " endif bitfld.long 0x14 2. " MCASTDM[2] ,Default multicast resolution port 2" "0,1" bitfld.long 0x14 1. " [1] ,Default multicast resolution port 1" "0,1" bitfld.long 0x14 0. " [0] ,Default multicast resolution port 0" "0,1" line.long 0x18 "INPUT_LEARN_BLOCK,Input Learning Block Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x18 20. " LEARNDIS[4] ,Disable learning port 4" "No,Yes" bitfld.long 0x18 19. " [3] ,Disable learning port 3" "No,Yes" textline " " endif bitfld.long 0x18 18. " LEARNDIS[2] ,Disable learning port 2" "No,Yes" bitfld.long 0x18 17. " [1] ,Disable learning port 1" "No,Yes" bitfld.long 0x18 16. " [0] ,Disable learning port 0" "No,Yes" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x18 4. " BLOCKEN[4] ,Enable blocking port 4" "Disabled,Enabled" bitfld.long 0x18 3. " [3] ,Enable blocking port 3" "Disabled,Enabled" textline " " endif bitfld.long 0x18 2. " BLOCKEN[2] ,Enable blocking port 2" "Disabled,Enabled" bitfld.long 0x18 1. " [1] ,Enable blocking port 1" "Disabled,Enabled" bitfld.long 0x18 0. " [0] ,Enable blocking port 0" "Disabled,Enabled" textline " " line.long 0x1C "MGMT_CONFIG,Management Configuration Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x1C 20. " PORTMASK[4] ,Portmask for transmission of management frames port 4" "Unmasked,Masked" bitfld.long 0x1C 19. " [3] ,Portmask for transmission of management frames port 3" "Unmasked,Masked" textline " " endif bitfld.long 0x1C 18. " PORTMASK[2] ,Portmask for transmission of management frames port 2" "Unmasked,Masked" bitfld.long 0x1C 17. " [1] ,Portmask for transmission of management frames port 1" "Unmasked,Masked" bitfld.long 0x1C 16. " [0] ,Portmask for transmission of management frames port 0" "Unmasked,Masked" textline " " bitfld.long 0x1C 13.--15. " PRIORITY ,Priority to use for transmitted BPDU frames if non zero" "Lowest,1,2,3,4,5,6,Highest" bitfld.long 0x1C 7. " DISCARD ,BPDU frames always discarded" "Not discarded,Discarded" bitfld.long 0x1C 6. " ENABLE ,Bridge protocol frames exclusively forward" "Not forwarded,Forwarded" bitfld.long 0x1C 5. " MESSAGE_TRANSMITTED ,BPDU message transmitted" "Not transmitted,Transmitted" textline " " sif cpuis("R9A06G034-CM3") bitfld.long 0x1C 0.--3. " PORT ,Port number of the port that should act as a management port" "0,1,2,?..." else bitfld.long 0x1C 0.--3. " PORT ,Port number of the port that should act as a management port" "0,1,2,3,4,?..." endif textline " " line.long 0x20 "MODE_CONFIG,Mode Configuration Register" bitfld.long 0x20 31. " STATSRESET ,Reset statistics counters command" "No reset,Reset" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x20 12. " CUT_THROUGH_ENABLE[4] ,Port 4 cut through support enable" "Disabled,Enabled" bitfld.long 0x20 11. " [3] ,Port 3 cut through support enable" "Disabled,Enabled" textline " " endif bitfld.long 0x20 10. " CUT_THROUGH_ENABLE[2] ,Port 2 cut through support enable" "Disabled,Enabled" bitfld.long 0x20 9. " [1] ,Port 1 cut through support enable" "Disabled,Enabled" bitfld.long 0x20 8. " [0] ,Port 0 cut through support enable" "Disabled,Enabled" textline " " line.long 0x24 "VLAN_IN_MODE,VLAN Input Manipulation Mode Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x24 8.--9. " P4VLANINMD ,Port 4 define behavior of VLAN input manipulation function" "Single tagging with passthrough/VID overwrite,Single tagging with replace,Tag always,?..." bitfld.long 0x24 6.--7. " P3VLANINMD ,Port 3 define behavior of VLAN input manipulation function" "Single tagging with passthrough/VID overwrite,Single tagging with replace,Tag always,?..." textline " " endif bitfld.long 0x24 4.--5. " P2VLANINMD ,Port 2 define behavior of VLAN input manipulation function" "Single tagging with passthrough/VID overwrite,Single tagging with replace,Tag always,?..." bitfld.long 0x24 2.--3. " P1VLANINMD ,Port 1 define behavior of VLAN input manipulation function" "Single tagging with passthrough/VID overwrite,Single tagging with replace,Tag always,?..." textline " " bitfld.long 0x24 0.--1. " P0VLANINMD ,Port 0 define behavior of VLAN input manipulation function" "Single tagging with passthrough/VID overwrite,Single tagging with replace,Tag always,?..." line.long 0x28 "VLAN_OUT_MODE,VLAN Output Manipulation Mode Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x28 8.--9. " P4VLANOUTMD ,Port 4 define behavior of VLAN output manipulation function" "No output manipulation,Strip mode,Tag through,VLAN Domain mode/Transparent mode" bitfld.long 0x28 6.--7. " P3VLANOUTMD ,Port 3 define behavior of VLAN output manipulation function" "No output manipulation,Strip mode,Tag through,VLAN Domain mode/Transparent mode" textline " " endif bitfld.long 0x28 4.--5. " P2VLANOUTMD ,Port 2 define behavior of VLAN output manipulation function" "No output manipulation,Strip mode,Tag through,VLAN Domain mode/Transparent mode" bitfld.long 0x28 2.--3. " P1VLANOUTMD ,Port 1 define behavior of VLAN output manipulation function" "No output manipulation,Strip mode,Tag through,VLAN Domain mode/Transparent mode" textline " " bitfld.long 0x28 0.--1. " P0VLANOUTMD ,Port 0 define behavior of VLAN output manipulation function" "No output manipulation,Strip mode,Tag through,VLAN Domain mode/Transparent mode" textline " " line.long 0x2C "VLAN_IN_MODE_ENA,VLAN Input Mode Enable Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x2C 4. " VLANINMDEN[4] ,Enable the input processing according to the VLAN_IN_MODE for a port 4" "Disabled,Enabled" bitfld.long 0x2C 3. " [3] ,Enable the input processing according to the VLAN_IN_MODE for a port 3" "Disabled,Enabled" textline " " endif bitfld.long 0x2C 2. " VLANINMDEN[2] ,Enable the input processing according to the VLAN_IN_MODE for a port 2" "Disabled,Enabled" bitfld.long 0x2C 1. " [1] ,Enable the input processing according to the VLAN_IN_MODE for a port 1" "Disabled,Enabled" bitfld.long 0x2C 0. " [0] ,Enable the input processing according to the VLAN_IN_MODE for a port 0" "Disabled,Enabled" rgroup.long 0x34++0x03 line.long 0x00 "VLAN_TAG_ID,VLAN Tag ID Register" hexmask.long.word 0x00 0.--15. 1. " VLANTAGID ,The VLAN type field value to expect to identify a VLAN tagged frame" group.long 0x38++0x37 line.long 0x00 "BCAST_STORM_LIMIT,Broadcast Storm Protection Register" hexmask.long.word 0x00 16.--31. 1. " BCASTLIMIT ,Number of broadcast frames (-1) that can be accepted on a port during a timeout period" hexmask.long.word 0x00 0.--15. 1. " TMOUT ,Timeout in steps of 65536 switch system clock cycles" line.long 0x04 "MCAST_STORM_LIMIT,Multicast Storm Protection Register" hexmask.long.word 0x04 16.--31. 1. " MCASTLIMIT ,Number of multicast frames (-1) that can be accepted on a port during a timeout period" textline " " line.long 0x08 "MIRROR_CONTROL,Port Mirroring Configuration Register" bitfld.long 0x08 10. " EG_DA_MATCH ,Frames transmitted on an egress port with a destination address matching the value programmed in MIRROR_EDST mirrored" "Not mirrored,Mirrored" bitfld.long 0x08 9. " EG_SA_MATCH ,Frames transmitted on an egress port with a source address matching the value programmed in MIRROR_ESRC mirrored" "Not mirrored,Mirrored" bitfld.long 0x08 8. " ING_DA_MATCH ,Frames transmitted on an ingress port with a destination address matching the value programmed in MIRROR_IDST mirrored" "Not mirrored,Mirrored" bitfld.long 0x08 7. " ING_SA_MATCH ,Frames transmitted on an egress port with a source address matching the value programmed in MIRROR_ISRC mirrored" "Not mirrored,Mirrored" textline " " bitfld.long 0x08 6. " EG_MAP_ENABLE ,Egress map enable" "Disabled,Enabled" bitfld.long 0x08 5. " ING_MAP_ENABLE ,Ingress map enable" "Disabled,Enabled" bitfld.long 0x08 4. " MIRROR_ENABLE ,Mirroring enable" "Disabled,Enabled" textline " " sif cpuis("R9A06G034-CM3") bitfld.long 0x08 0.--3. " MIRROR_PORT ,The port number of the port that should act as the mirror port and receive all mirrored frames" "0,1,2,?..." else bitfld.long 0x08 0.--3. " MIRROR_PORT ,The port number of the port that should act as the mirror port and receive all mirrored frames" "0,1,2,3,4,?..." endif textline " " line.long 0x0C "MIRROR_EG_MAP,Port Mirroring Egress Port Definition" sif !cpuis("R9A06G034-CM3") bitfld.long 0x0C 4. " EMAP[4] ,Port 4 mirroring egress port definitions" "Not mirrored,Mirrored" bitfld.long 0x0C 3. " [3] ,Port 3 mirroring egress port definitions" "Not mirrored,Mirrored" textline " " endif bitfld.long 0x0C 2. " EMAP[2] ,Port 2 mirroring egress port definitions" "Not mirrored,Mirrored" bitfld.long 0x0C 1. " [1] ,Port 1 mirroring egress port definitions" "Not mirrored,Mirrored" bitfld.long 0x0C 0. " [0] ,Port 0 mirroring egress port definitions" "Not mirrored,Mirrored" line.long 0x10 "MIRROR_ING_MAP,Port Mirroring Ingress Port Definition" sif !cpuis("R9A06G034-CM3") bitfld.long 0x10 4. " IMAP[4] ,Port 4 mirroring ingress port definitions" "Not mirrored,Mirrored" bitfld.long 0x10 3. " [3] ,Port 3 mirroring ingress port definitions" "Not mirrored,Mirrored" textline " " endif bitfld.long 0x10 2. " IMAP[2] ,Port 2 mirroring ingress port definitions" "Not mirrored,Mirrored" bitfld.long 0x10 1. " [1] ,Port 1 mirroring ingress port definitions" "Not mirrored,Mirrored" bitfld.long 0x10 0. " [0] ,Port 0 mirroring ingress port definitions" "Not mirrored,Mirrored" line.long 0x14 "MIRROR_ISRC_0,Ingress Source MAC Address For Mirror Filtering 0" line.long 0x18 "MIRROR_ISRC_1,Ingress Source MAC Address For Mirror Filtering 1" hexmask.long.word 0x18 0.--15. 0x01 " ISRC ,Ingress source MAC address for mirror filtering" line.long 0x1C "MIRROR_IDST_0,Ingress Destination MAC Address For Mirror Filtering 0" line.long 0x20 "MIRROR_IDST_1,Ingress Destination MAC Address For Mirror Filtering 1" hexmask.long.word 0x20 0.--15. 0x01 " IDST ,Ingress destination MAC address for mirror filtering" line.long 0x24 "MIRROR_ESRC_0,Egress Source MAC Address For Mirror Filtering 0" line.long 0x28 "MIRROR_ESRC_1,Egress Source MAC Address For Mirror Filtering 1" hexmask.long.word 0x28 0.--15. 0x01 " ESRC ,Egress source MAC address for mirror filtering" line.long 0x2C "MIRROR_EDST_0,Egress Destination MAC Address For Mirror Filtering 0" line.long 0x30 "MIRROR_EDST_1,Egress Destination MAC Address For Mirror Filtering 1" hexmask.long.word 0x30 0.--15. 0x01 " ESRC ,Egress destination MAC address for mirror filtering" line.long 0x34 "MIRROR_CNT,Mirror Filtering Count Value Register" hexmask.long.byte 0x34 0.--7. 1. " CNT ,Count value for mirror filtering" group.long 0x88++0x03 line.long 0x00 "QMGR_ST_MINCELLS,Output Queue Minimum Memory Statistics Register" hexmask.long.word 0x00 0.--10. 1. " M_CELLS_MIN ,Lowest number of free cells reached in memory during operation" textline " " group.long 0x94++0x0B line.long 0x00 "QMGR_RED_MIN4,RED Minimum Threshold Register" hexmask.long.byte 0x00 24.--31. 1. " CFGRED_MINTH4[31:24] ,Random early detection minimum threshold queue 3" hexmask.long.byte 0x00 16.--23. 1. " CFGRED_MINTH4[23:16] ,Random early detection minimum threshold queue 2" hexmask.long.byte 0x00 8.--15. 1. " CFGRED_MINTH4[15:8] ,Random early detection minimum threshold queue 1" hexmask.long.byte 0x00 0.--7. 1. " CFGRED_MINTH4[7:0] ,Random early detection minimum threshold queue 0" line.long 0x04 "QMGR_RED_MAX4,RED Maximum Threshold Register" hexmask.long.byte 0x04 24.--31. 1. " CFGRED_MAXTH4[31:24] ,Random early detection maximum threshold queue 3" hexmask.long.byte 0x04 16.--23. 1. " CFGRED_MAXTH4[23:16] ,Random early detection maximum threshold queue 2" hexmask.long.byte 0x04 8.--15. 1. " CFGRED_MAXTH4[15:8] ,Random early detection maximum threshold queue 1" hexmask.long.byte 0x04 0.--7. 1. " CFGRED_MAXTH4[7:0] ,Random early detection maximum threshold queue 0" line.long 0x08 "QMGR_RED_CONFIG,RED Configuration Register" bitfld.long 0x08 8. " GACTIVITY_EN ,Averaging on global switch activity or on port local activity only" "Local,Global" textline " " bitfld.long 0x08 3. " QUEUE_RED_EN[3] ,Enable random early detection (RED) or taildrop congestion management for a queue 3" "Taildrop,RED" bitfld.long 0x08 2. " [2] ,Enable random early detection (RED) or taildrop congestion management for a queue 2" "Taildrop,RED" bitfld.long 0x08 1. " [1] ,Enable random early detection (RED) or taildrop congestion management for a queue 1" "Taildrop,RED" bitfld.long 0x08 0. " [0] ,Enable random early detection (RED) or taildrop congestion management for a queue 0" "Taildrop,RED" hgroup.long 0xA0++0x03 hide.long 0x00 "IMC_STATUS,Input Memory Controller Status Register" in textline " " rgroup.long 0xA4++0x0B line.long 0x00 "IMC_ERR_FULL,Input Port Memory Full And Truncation Indicator" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " IPC_ERR_TRUNC[4] ,Port 4 memory full while frame receiving, frame truncated" "Not truncated,Truncated" bitfld.long 0x00 19. " [3] ,Port 3 memory full while frame receiving, frame truncated" "Not truncated,Truncated" textline " " endif bitfld.long 0x00 18. " IPC_ERR_TRUNC[2] ,Port 2 memory full while frame receiving, frame truncated" "Not truncated,Truncated" bitfld.long 0x00 17. " [1] ,Port 1 memory full while frame receiving, frame truncated" "Not truncated,Truncated" bitfld.long 0x00 16. " [0] ,Port 0 memory full while frame receiving, frame truncated" "Not truncated,Truncated" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 4. " IPC_ERR_FULL[4] ,Port 4 memory full at start, frame discarded" "Not discarded,Discarded" bitfld.long 0x00 3. " [3] ,Port 3 memory full while frame receiving, frame discarded" "Not discarded,Discarded" textline " " endif bitfld.long 0x00 2. " IPC_ERR_FULL[2] ,Port 2 memory full while frame receiving, frame discarded" "Not discarded,Discarded" bitfld.long 0x00 1. " [1] ,Port 1 memory full while frame receiving, frame discarded" "Not discarded,Discarded" bitfld.long 0x00 0. " [0] ,Port 0 memory full while frame receiving, frame discarded" "Not discarded,Discarded" line.long 0x04 "IMC_ERR_IFACE,Input Port Memory Error Indicator" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 20. " WBUF_OFLOW[4] ,Port 4 overflow in the input write buffer to the memory controller error" "No error,Error" bitfld.long 0x04 19. " [3] ,Port 3 overflow in the input write buffer to the memory controller error" "No error,Error" textline " " endif bitfld.long 0x04 18. " WBUF_OFLOW[2] ,Port 2 overflow in the input write buffer to the memory controller error" "No error,Error" bitfld.long 0x04 17. " [1] ,Port 1 overflow in the input write buffer to the memory controller error" "No error,Error" bitfld.long 0x04 16. " [0] ,Port 0 overflow in the input write buffer to the memory controller error" "No error,Error" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 4. " IPC_ERR_IFACE[4] ,Port 4 frame has been truncated and discarded error" "No error,Error" bitfld.long 0x04 3. " [3] ,Port 3 frame has been truncated and discarded error" "No error,Error" textline " " endif bitfld.long 0x04 2. " IPC_ERR_IFACE[2] ,Port 2 frame has been truncated and discarded error" "No error,Error" bitfld.long 0x04 1. " [1] ,Port 1 frame has been truncated and discarded error" "No error,Error" bitfld.long 0x04 0. " [0] ,Port 0 frame has been truncated and discarded error" "No error,Error" line.long 0x08 "IMC_ERR_QOFLOW,Output Port Queue Overflow Indicator" sif !cpuis("R9A06G034-CM3") bitfld.long 0x08 4. " OP_ERROR[4] ,Port 4 frame could not be stored in an output queue of the port as the queue FIFO overflowed error" "No error,Error" bitfld.long 0x08 3. " [3] ,Port 3 frame could not be stored in an output queue of the port as the queue FIFO overflowed error" "No error,Error" textline " " endif bitfld.long 0x08 2. " OP_ERROR[2] ,Port 2 frame could not be stored in an output queue of the port as the queue FIFO overflowed error" "No error,Error" bitfld.long 0x08 1. " [1] ,Port 1 frame could not be stored in an output queue of the port as the queue FIFO overflowed error" "No error,Error" bitfld.long 0x08 0. " [0] ,Port 0 frame could not be stored in an output queue of the port as the queue FIFO overflowed error" "No error,Error" group.long 0xB0++0x0B line.long 0x00 "IMC_CONFIG,Input Memory Controller Configuration Register" bitfld.long 0x00 0. " WFQ_ENABLE ,Enable weighted fair queuing or strict priority output queue scheduling" "Strict priority,Weighted fair queuing" textline " " if (((per.l(ad:0x44050000+0xC0)&0x8000000)==0x8000000)) group.long 0xC0++0x03 line.long 0x00 "GPARSER0,0th Parser Of 1st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xC0)&0x10000000)==0x10000000)) group.long 0xC0++0x03 line.long 0x00 "GPARSER0,0th Parser Of 1st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xC0)&0x40000000)==0x40000000)) group.long 0xC0++0x03 line.long 0x00 "GPARSER0,0th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xC0++0x03 line.long 0x00 "GPARSER0,0th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xC0+0x10)++0x03 line.long 0x00 "GARITH0,Snoop Configuration For Arithmetic 0th Stage Of 1st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 3 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 2 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 1 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 0 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xC4)&0x8000000)==0x8000000)) group.long 0xC4++0x03 line.long 0x00 "GPARSER1,1th Parser Of 1st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xC4)&0x10000000)==0x10000000)) group.long 0xC4++0x03 line.long 0x00 "GPARSER1,1th Parser Of 1st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xC4)&0x40000000)==0x40000000)) group.long 0xC4++0x03 line.long 0x00 "GPARSER1,1th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xC4++0x03 line.long 0x00 "GPARSER1,1th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xC4+0x10)++0x03 line.long 0x00 "GARITH1,Snoop Configuration For Arithmetic 1th Stage Of 1st Block" bitfld.long 0x00 20.--21. " SNOOPMODE ,Snoop mode" "Disabled,Forwarded to designated,Forwarded normally,Discarded" textline " " bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 12. " SELECT_ARITH0 ,Select arithmetic stage 0 in addition to any of the parser results" "Not selected,Selected" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 3 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 2 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 1 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 0 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xC8)&0x8000000)==0x8000000)) group.long 0xC8++0x03 line.long 0x00 "GPARSER2,2th Parser Of 1st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xC8)&0x10000000)==0x10000000)) group.long 0xC8++0x03 line.long 0x00 "GPARSER2,2th Parser Of 1st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xC8)&0x40000000)==0x40000000)) group.long 0xC8++0x03 line.long 0x00 "GPARSER2,2th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xC8++0x03 line.long 0x00 "GPARSER2,2th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xC8+0x10)++0x03 line.long 0x00 "GARITH2,Snoop Configuration For Arithmetic 2th Stage Of 1st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 13. " SELECT_ARITH1 ,Select arithmetic stage 1 in addition to any of the parser results" "Not selected,Selected" bitfld.long 0x00 12. " SELECT_ARITH0 ,Select arithmetic stage 0 in addition to any of the parser results" "Not selected,Selected" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 3 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 2 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 1 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 0 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xCC)&0x8000000)==0x8000000)) group.long 0xCC++0x03 line.long 0x00 "GPARSER3,3th Parser Of 1st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xCC)&0x10000000)==0x10000000)) group.long 0xCC++0x03 line.long 0x00 "GPARSER3,3th Parser Of 1st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xCC)&0x40000000)==0x40000000)) group.long 0xCC++0x03 line.long 0x00 "GPARSER3,3th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xCC++0x03 line.long 0x00 "GPARSER3,3th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xCC+0x10)++0x03 line.long 0x00 "GARITH3,Snoop Configuration For Arithmetic 3th Stage Of 1st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 14. " SELECT_ARITH2 ,Select arithmetic stage 2 in addition to any of the parser results" "Not selected,Selected" bitfld.long 0x00 13. " SELECT_ARITH1 ,Select arithmetic stage 1 in addition to any of the parser results" "Not selected,Selected" textline " " bitfld.long 0x00 12. " SELECT_ARITH0 ,Select arithmetic stage 0 in addition to any of the parser results" "Not selected,Selected" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 3 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 2 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 1 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 0 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xE0)&0x8000000)==0x8000000)) group.long 0xE0++0x03 line.long 0x00 "GPARSER4,4th Parser Of 2st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xE0)&0x10000000)==0x10000000)) group.long 0xE0++0x03 line.long 0x00 "GPARSER4,4th Parser Of 2st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xE0)&0x40000000)==0x40000000)) group.long 0xE0++0x03 line.long 0x00 "GPARSER4,4th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xE0++0x03 line.long 0x00 "GPARSER4,4th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xE0+0x10)++0x03 line.long 0x00 "GARITH4,Snoop Configuration For Arithmetic 4th Stage Of 2st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 7 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 6 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 5 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 4 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xE4)&0x8000000)==0x8000000)) group.long 0xE4++0x03 line.long 0x00 "GPARSER5,5th Parser Of 2st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xE4)&0x10000000)==0x10000000)) group.long 0xE4++0x03 line.long 0x00 "GPARSER5,5th Parser Of 2st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xE4)&0x40000000)==0x40000000)) group.long 0xE4++0x03 line.long 0x00 "GPARSER5,5th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xE4++0x03 line.long 0x00 "GPARSER5,5th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xE4+0x10)++0x03 line.long 0x00 "GARITH5,Snoop Configuration For Arithmetic 5th Stage Of 2st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 7 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 6 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 5 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 4 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xE8)&0x8000000)==0x8000000)) group.long 0xE8++0x03 line.long 0x00 "GPARSER6,6th Parser Of 2st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xE8)&0x10000000)==0x10000000)) group.long 0xE8++0x03 line.long 0x00 "GPARSER6,6th Parser Of 2st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xE8)&0x40000000)==0x40000000)) group.long 0xE8++0x03 line.long 0x00 "GPARSER6,6th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xE8++0x03 line.long 0x00 "GPARSER6,6th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xE8+0x10)++0x03 line.long 0x00 "GARITH6,Snoop Configuration For Arithmetic 6th Stage Of 2st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 7 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 6 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 5 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 4 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xEC)&0x8000000)==0x8000000)) group.long 0xEC++0x03 line.long 0x00 "GPARSER7,7th Parser Of 2st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xEC)&0x10000000)==0x10000000)) group.long 0xEC++0x03 line.long 0x00 "GPARSER7,7th Parser Of 2st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xEC)&0x40000000)==0x40000000)) group.long 0xEC++0x03 line.long 0x00 "GPARSER7,7th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xEC++0x03 line.long 0x00 "GPARSER7,7th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xEC+0x10)++0x03 line.long 0x00 "GARITH7,Snoop Configuration For Arithmetic 7th Stage Of 2st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 7 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 6 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 5 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 4 from a parser inverted" "Not inverted,Inverted" textline " " group.long 0x100++0x03 line.long 0x00 "VLAN_PRIORITY0,VLAN Priority Register 0" bitfld.long 0x00 21.--22. " PRIOIN7 ,VLAN priority 7" "Lowest,1,2,Highest" bitfld.long 0x00 18.--19. " PRIOIN6 ,VLAN priority 6" "Lowest,1,2,Highest" bitfld.long 0x00 15.--16. " PRIOIN5 ,VLAN priority 5" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " PRIOIN4 ,VLAN priority 4" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 9.--10. " PRIOIN3 ,VLAN priority 3" "Lowest,1,2,Highest" bitfld.long 0x00 6.--7. " PRIOIN2 ,VLAN priority 2" "Lowest,1,2,Highest" bitfld.long 0x00 3.--4. " PRIOIN1 ,VLAN priority 1" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " PRIOIN0 ,VLAN priority 0" "Lowest,1,2,Highest" group.long (0x100+0x40)++0x03 line.long 0x00 "IP_PRIORITY0,IO Priority Register 0" bitfld.long 0x00 31. " READ ,Read enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " PRIORITY ,Priority information to write into the addressed table entry" "Lowest,1,2,Highest" bitfld.long 0x00 8. " IPV6_SELECT ,IPV6 select" "Not selected,Selected" hexmask.long.byte 0x00 0.--7. 0x01 " ADDRESS ,Address of the priority entry to read or write for a frame received on port 0" group.long (0x100+0x80)++0x03 line.long 0x00 "PRIORITY_CFG0,Priority Configuration Register 0" bitfld.long 0x00 4.--5. " DEFAULT_PRIORITY ,The default priority of a frame received on port 0" "Lowest,1,2,Highest" bitfld.long 0x00 3. " TYPE_EN ,Enable TYPE based priority resolution for frame received on port 0" "Disabled,Enabled" bitfld.long 0x00 2. " MAC_EN ,Enable MAC based priority resolution for frame received on port 0" "Disabled,Enabled" bitfld.long 0x00 1. " IP_EN ,Enable IP priority resolution for frame received on port 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VLAN_EN ,Enable VLAN priority resolution for frame received on port 0" "Disabled,Enabled" group.long 0x104++0x03 line.long 0x00 "VLAN_PRIORITY1,VLAN Priority Register 1" bitfld.long 0x00 21.--22. " PRIOIN7 ,VLAN priority 7" "Lowest,1,2,Highest" bitfld.long 0x00 18.--19. " PRIOIN6 ,VLAN priority 6" "Lowest,1,2,Highest" bitfld.long 0x00 15.--16. " PRIOIN5 ,VLAN priority 5" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " PRIOIN4 ,VLAN priority 4" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 9.--10. " PRIOIN3 ,VLAN priority 3" "Lowest,1,2,Highest" bitfld.long 0x00 6.--7. " PRIOIN2 ,VLAN priority 2" "Lowest,1,2,Highest" bitfld.long 0x00 3.--4. " PRIOIN1 ,VLAN priority 1" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " PRIOIN0 ,VLAN priority 0" "Lowest,1,2,Highest" group.long (0x104+0x40)++0x03 line.long 0x00 "IP_PRIORITY1,IO Priority Register 1" bitfld.long 0x00 31. " READ ,Read enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " PRIORITY ,Priority information to write into the addressed table entry" "Lowest,1,2,Highest" bitfld.long 0x00 8. " IPV6_SELECT ,IPV6 select" "Not selected,Selected" hexmask.long.byte 0x00 0.--7. 0x01 " ADDRESS ,Address of the priority entry to read or write for a frame received on port 1" group.long (0x104+0x80)++0x03 line.long 0x00 "PRIORITY_CFG1,Priority Configuration Register 1" bitfld.long 0x00 4.--5. " DEFAULT_PRIORITY ,The default priority of a frame received on port 1" "Lowest,1,2,Highest" bitfld.long 0x00 3. " TYPE_EN ,Enable TYPE based priority resolution for frame received on port 1" "Disabled,Enabled" bitfld.long 0x00 2. " MAC_EN ,Enable MAC based priority resolution for frame received on port 1" "Disabled,Enabled" bitfld.long 0x00 1. " IP_EN ,Enable IP priority resolution for frame received on port 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VLAN_EN ,Enable VLAN priority resolution for frame received on port 1" "Disabled,Enabled" group.long 0x108++0x03 line.long 0x00 "VLAN_PRIORITY2,VLAN Priority Register 2" bitfld.long 0x00 21.--22. " PRIOIN7 ,VLAN priority 7" "Lowest,1,2,Highest" bitfld.long 0x00 18.--19. " PRIOIN6 ,VLAN priority 6" "Lowest,1,2,Highest" bitfld.long 0x00 15.--16. " PRIOIN5 ,VLAN priority 5" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " PRIOIN4 ,VLAN priority 4" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 9.--10. " PRIOIN3 ,VLAN priority 3" "Lowest,1,2,Highest" bitfld.long 0x00 6.--7. " PRIOIN2 ,VLAN priority 2" "Lowest,1,2,Highest" bitfld.long 0x00 3.--4. " PRIOIN1 ,VLAN priority 1" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " PRIOIN0 ,VLAN priority 0" "Lowest,1,2,Highest" group.long (0x108+0x40)++0x03 line.long 0x00 "IP_PRIORITY2,IO Priority Register 2" bitfld.long 0x00 31. " READ ,Read enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " PRIORITY ,Priority information to write into the addressed table entry" "Lowest,1,2,Highest" bitfld.long 0x00 8. " IPV6_SELECT ,IPV6 select" "Not selected,Selected" hexmask.long.byte 0x00 0.--7. 0x01 " ADDRESS ,Address of the priority entry to read or write for a frame received on port 2" group.long (0x108+0x80)++0x03 line.long 0x00 "PRIORITY_CFG2,Priority Configuration Register 2" bitfld.long 0x00 4.--5. " DEFAULT_PRIORITY ,The default priority of a frame received on port 2" "Lowest,1,2,Highest" bitfld.long 0x00 3. " TYPE_EN ,Enable TYPE based priority resolution for frame received on port 2" "Disabled,Enabled" bitfld.long 0x00 2. " MAC_EN ,Enable MAC based priority resolution for frame received on port 2" "Disabled,Enabled" bitfld.long 0x00 1. " IP_EN ,Enable IP priority resolution for frame received on port 2" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VLAN_EN ,Enable VLAN priority resolution for frame received on port 2" "Disabled,Enabled" group.long 0x10C++0x03 line.long 0x00 "VLAN_PRIORITY3,VLAN Priority Register 3" bitfld.long 0x00 21.--22. " PRIOIN7 ,VLAN priority 7" "Lowest,1,2,Highest" bitfld.long 0x00 18.--19. " PRIOIN6 ,VLAN priority 6" "Lowest,1,2,Highest" bitfld.long 0x00 15.--16. " PRIOIN5 ,VLAN priority 5" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " PRIOIN4 ,VLAN priority 4" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 9.--10. " PRIOIN3 ,VLAN priority 3" "Lowest,1,2,Highest" bitfld.long 0x00 6.--7. " PRIOIN2 ,VLAN priority 2" "Lowest,1,2,Highest" bitfld.long 0x00 3.--4. " PRIOIN1 ,VLAN priority 1" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " PRIOIN0 ,VLAN priority 0" "Lowest,1,2,Highest" group.long (0x10C+0x40)++0x03 line.long 0x00 "IP_PRIORITY3,IO Priority Register 3" bitfld.long 0x00 31. " READ ,Read enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " PRIORITY ,Priority information to write into the addressed table entry" "Lowest,1,2,Highest" bitfld.long 0x00 8. " IPV6_SELECT ,IPV6 select" "Not selected,Selected" hexmask.long.byte 0x00 0.--7. 0x01 " ADDRESS ,Address of the priority entry to read or write for a frame received on port 3" group.long (0x10C+0x80)++0x03 line.long 0x00 "PRIORITY_CFG3,Priority Configuration Register 3" bitfld.long 0x00 4.--5. " DEFAULT_PRIORITY ,The default priority of a frame received on port 3" "Lowest,1,2,Highest" bitfld.long 0x00 3. " TYPE_EN ,Enable TYPE based priority resolution for frame received on port 3" "Disabled,Enabled" bitfld.long 0x00 2. " MAC_EN ,Enable MAC based priority resolution for frame received on port 3" "Disabled,Enabled" bitfld.long 0x00 1. " IP_EN ,Enable IP priority resolution for frame received on port 3" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VLAN_EN ,Enable VLAN priority resolution for frame received on port 3" "Disabled,Enabled" group.long 0x110++0x03 line.long 0x00 "VLAN_PRIORITY4,VLAN Priority Register 4" bitfld.long 0x00 21.--22. " PRIOIN7 ,VLAN priority 7" "Lowest,1,2,Highest" bitfld.long 0x00 18.--19. " PRIOIN6 ,VLAN priority 6" "Lowest,1,2,Highest" bitfld.long 0x00 15.--16. " PRIOIN5 ,VLAN priority 5" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " PRIOIN4 ,VLAN priority 4" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 9.--10. " PRIOIN3 ,VLAN priority 3" "Lowest,1,2,Highest" bitfld.long 0x00 6.--7. " PRIOIN2 ,VLAN priority 2" "Lowest,1,2,Highest" bitfld.long 0x00 3.--4. " PRIOIN1 ,VLAN priority 1" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " PRIOIN0 ,VLAN priority 0" "Lowest,1,2,Highest" group.long (0x110+0x40)++0x03 line.long 0x00 "IP_PRIORITY4,IO Priority Register 4" bitfld.long 0x00 31. " READ ,Read enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " PRIORITY ,Priority information to write into the addressed table entry" "Lowest,1,2,Highest" bitfld.long 0x00 8. " IPV6_SELECT ,IPV6 select" "Not selected,Selected" hexmask.long.byte 0x00 0.--7. 0x01 " ADDRESS ,Address of the priority entry to read or write for a frame received on port 4" group.long (0x110+0x80)++0x03 line.long 0x00 "PRIORITY_CFG4,Priority Configuration Register 4" bitfld.long 0x00 4.--5. " DEFAULT_PRIORITY ,The default priority of a frame received on port 4" "Lowest,1,2,Highest" bitfld.long 0x00 3. " TYPE_EN ,Enable TYPE based priority resolution for frame received on port 4" "Disabled,Enabled" bitfld.long 0x00 2. " MAC_EN ,Enable MAC based priority resolution for frame received on port 4" "Disabled,Enabled" bitfld.long 0x00 1. " IP_EN ,Enable IP priority resolution for frame received on port 4" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VLAN_EN ,Enable VLAN priority resolution for frame received on port 4" "Disabled,Enabled" group.long 0x1B8++0x0F line.long 0x00 "PRIORITY_TYPE1,Priority Type Register 1" bitfld.long 0x00 17.--18. " PRIORITY ,The priority value to use if a match occurs" "Lowest,1,2,Highest" bitfld.long 0x00 16. " VALID ,Register contains valid data" "Not contains,Contains" hexmask.long.word 0x00 0.--15. 1. " TYPEVALUE ,16-bit value compared against the frames type/length field at receive" line.long 0x04 "PRIORITY_TYPE2,Priority Type Register 2" bitfld.long 0x04 17.--18. " PRIORITY ,The priority value to use if a match occurs" "Lowest,1,2,Highest" bitfld.long 0x04 16. " VALID ,Register contains valid data" "Not contains,Contains" hexmask.long.word 0x04 0.--15. 1. " TYPEVALUE ,16-bit value compared against the frames type/length field at receive" line.long 0x08 "MGMT_ADDR0_LO,Lower MAC Address For Bridge Protocol Frame" hexmask.long.byte 0x08 24.--31. 0x01 " BPDU_DST_CUSTOM[3] ,Additional MAC address defining a bridge protocol frame 4th byte" hexmask.long.byte 0x08 16.--23. 0x01 " [2] ,Additional MAC address defining a bridge protocol frame 3rd byte" hexmask.long.byte 0x08 8.--15. 0x01 " [1] ,Additional MAC address defining a bridge protocol frame 2nd byte" hexmask.long.byte 0x08 0.--7. 0x01 " [0] ,Additional MAC address defining a bridge protocol frame 1st byte" line.long 0x0C "MGMT_ADDR0_HI,Higher MAC Address For Bridge Protocol Frame" hexmask.long.byte 0x0C 16.--23. 1. " MASK8BIT ,8 bit mask for comparing the last byte of the MAC address" hexmask.long.byte 0x0C 8.--15. 0x01 " BPDU_DST_CUSTOM[1] ,6th (last) byte" hexmask.long.byte 0x0C 0.--7. 0x01 " BPDU_DST_CUSTOM[0] ,5th byte" textline " " group.long 0x200++0x03 line.long 0x00 "SYSTEM_TAGINFO0,One VLAN ID Field For VLAN Input Manipulation 0" hexmask.long.word 0x00 0.--15. 1. " SYSVLANINFO ,System VLAN Info (prio/cfi/vid) for the port 0" group.long (0x200+0x40)++0x03 line.long 0x00 "AUTH_PORT0,PORT 0 Authentication Control And Configuration" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " GUEST_MASK[4] ,Destination port 4 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 19. " [3] ,Destination port 3 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " GUEST_MASK[2] ,Destination port 2 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Destination port 1 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Destination port 0 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" sif cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,?..." else textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,3,4,?..." endif textline " " bitfld.long 0x00 11. " AUTO_CHANGE_UNAUTHORIZED ,Enable automatic port change to unauthorized" "Disabled,Enabled" bitfld.long 0x00 5. " EAPOL_UNICAST_ENABLE ,Enable unicast enable" "Disabled,Enabled" bitfld.long 0x00 4. " BPDU_ENABLE ,Reception of BPDU frames enable" "Disabled,Enabled" bitfld.long 0x00 3. " GUEST_ENABLE ,Reception of non EAPOL frames enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EAPOL_ENABLE ,Reception of EAPOL frames enable" "Disabled,Enabled" bitfld.long 0x00 1. " CONTROLLED_BOTH ,Port direction mode" "In,Both" bitfld.long 0x00 0. " AUTHORIZED ,Authorized state" "Unauthorized,Authorized" group.long 0x204++0x03 line.long 0x00 "SYSTEM_TAGINFO1,One VLAN ID Field For VLAN Input Manipulation 1" hexmask.long.word 0x00 0.--15. 1. " SYSVLANINFO ,System VLAN Info (prio/cfi/vid) for the port 1" group.long (0x204+0x40)++0x03 line.long 0x00 "AUTH_PORT1,PORT 1 Authentication Control And Configuration" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " GUEST_MASK[4] ,Destination port 4 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 19. " [3] ,Destination port 3 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " GUEST_MASK[2] ,Destination port 2 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Destination port 1 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Destination port 0 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" sif cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,?..." else textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,3,4,?..." endif textline " " bitfld.long 0x00 11. " AUTO_CHANGE_UNAUTHORIZED ,Enable automatic port change to unauthorized" "Disabled,Enabled" bitfld.long 0x00 5. " EAPOL_UNICAST_ENABLE ,Enable unicast enable" "Disabled,Enabled" bitfld.long 0x00 4. " BPDU_ENABLE ,Reception of BPDU frames enable" "Disabled,Enabled" bitfld.long 0x00 3. " GUEST_ENABLE ,Reception of non EAPOL frames enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EAPOL_ENABLE ,Reception of EAPOL frames enable" "Disabled,Enabled" bitfld.long 0x00 1. " CONTROLLED_BOTH ,Port direction mode" "In,Both" bitfld.long 0x00 0. " AUTHORIZED ,Authorized state" "Unauthorized,Authorized" group.long 0x208++0x03 line.long 0x00 "SYSTEM_TAGINFO2,One VLAN ID Field For VLAN Input Manipulation 2" hexmask.long.word 0x00 0.--15. 1. " SYSVLANINFO ,System VLAN Info (prio/cfi/vid) for the port 2" group.long (0x208+0x40)++0x03 line.long 0x00 "AUTH_PORT2,PORT 2 Authentication Control And Configuration" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " GUEST_MASK[4] ,Destination port 4 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 19. " [3] ,Destination port 3 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " GUEST_MASK[2] ,Destination port 2 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Destination port 1 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Destination port 0 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" sif cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,?..." else textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,3,4,?..." endif textline " " bitfld.long 0x00 11. " AUTO_CHANGE_UNAUTHORIZED ,Enable automatic port change to unauthorized" "Disabled,Enabled" bitfld.long 0x00 5. " EAPOL_UNICAST_ENABLE ,Enable unicast enable" "Disabled,Enabled" bitfld.long 0x00 4. " BPDU_ENABLE ,Reception of BPDU frames enable" "Disabled,Enabled" bitfld.long 0x00 3. " GUEST_ENABLE ,Reception of non EAPOL frames enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EAPOL_ENABLE ,Reception of EAPOL frames enable" "Disabled,Enabled" bitfld.long 0x00 1. " CONTROLLED_BOTH ,Port direction mode" "In,Both" bitfld.long 0x00 0. " AUTHORIZED ,Authorized state" "Unauthorized,Authorized" group.long 0x20C++0x03 line.long 0x00 "SYSTEM_TAGINFO3,One VLAN ID Field For VLAN Input Manipulation 3" hexmask.long.word 0x00 0.--15. 1. " SYSVLANINFO ,System VLAN Info (prio/cfi/vid) for the port 3" group.long (0x20C+0x40)++0x03 line.long 0x00 "AUTH_PORT3,PORT 3 Authentication Control And Configuration" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " GUEST_MASK[4] ,Destination port 4 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 19. " [3] ,Destination port 3 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " GUEST_MASK[2] ,Destination port 2 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Destination port 1 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Destination port 0 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" sif cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,?..." else textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,3,4,?..." endif textline " " bitfld.long 0x00 11. " AUTO_CHANGE_UNAUTHORIZED ,Enable automatic port change to unauthorized" "Disabled,Enabled" bitfld.long 0x00 5. " EAPOL_UNICAST_ENABLE ,Enable unicast enable" "Disabled,Enabled" bitfld.long 0x00 4. " BPDU_ENABLE ,Reception of BPDU frames enable" "Disabled,Enabled" bitfld.long 0x00 3. " GUEST_ENABLE ,Reception of non EAPOL frames enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EAPOL_ENABLE ,Reception of EAPOL frames enable" "Disabled,Enabled" bitfld.long 0x00 1. " CONTROLLED_BOTH ,Port direction mode" "In,Both" bitfld.long 0x00 0. " AUTHORIZED ,Authorized state" "Unauthorized,Authorized" group.long 0x210++0x03 line.long 0x00 "SYSTEM_TAGINFO4,One VLAN ID Field For VLAN Input Manipulation 4" hexmask.long.word 0x00 0.--15. 1. " SYSVLANINFO ,System VLAN Info (prio/cfi/vid) for the port 4" group.long (0x210+0x40)++0x03 line.long 0x00 "AUTH_PORT4,PORT 4 Authentication Control And Configuration" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " GUEST_MASK[4] ,Destination port 4 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 19. " [3] ,Destination port 3 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " GUEST_MASK[2] ,Destination port 2 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Destination port 1 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Destination port 0 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" sif cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,?..." else textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,3,4,?..." endif textline " " bitfld.long 0x00 11. " AUTO_CHANGE_UNAUTHORIZED ,Enable automatic port change to unauthorized" "Disabled,Enabled" bitfld.long 0x00 5. " EAPOL_UNICAST_ENABLE ,Enable unicast enable" "Disabled,Enabled" bitfld.long 0x00 4. " BPDU_ENABLE ,Reception of BPDU frames enable" "Disabled,Enabled" bitfld.long 0x00 3. " GUEST_ENABLE ,Reception of non EAPOL frames enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EAPOL_ENABLE ,Reception of EAPOL frames enable" "Disabled,Enabled" bitfld.long 0x00 1. " CONTROLLED_BOTH ,Port direction mode" "In,Both" bitfld.long 0x00 0. " AUTHORIZED ,Authorized state" "Unauthorized,Authorized" textline " " group.long 0x280++0x03 line.long 0x00 "VLAN_RES_TABLE0,0 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x284++0x03 line.long 0x00 "VLAN_RES_TABLE1,1 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x288++0x03 line.long 0x00 "VLAN_RES_TABLE2,2 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x28C++0x03 line.long 0x00 "VLAN_RES_TABLE3,3 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x290++0x03 line.long 0x00 "VLAN_RES_TABLE4,4 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x294++0x03 line.long 0x00 "VLAN_RES_TABLE5,5 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x298++0x03 line.long 0x00 "VLAN_RES_TABLE6,6 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x29C++0x03 line.long 0x00 "VLAN_RES_TABLE7,7 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2A0++0x03 line.long 0x00 "VLAN_RES_TABLE8,8 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2A4++0x03 line.long 0x00 "VLAN_RES_TABLE9,9 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2A8++0x03 line.long 0x00 "VLAN_RES_TABLE10,10 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2AC++0x03 line.long 0x00 "VLAN_RES_TABLE11,11 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2B0++0x03 line.long 0x00 "VLAN_RES_TABLE12,12 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2B4++0x03 line.long 0x00 "VLAN_RES_TABLE13,13 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2B8++0x03 line.long 0x00 "VLAN_RES_TABLE14,14 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2BC++0x03 line.long 0x00 "VLAN_RES_TABLE15,15 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2C0++0x03 line.long 0x00 "VLAN_RES_TABLE16,16 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2C4++0x03 line.long 0x00 "VLAN_RES_TABLE17,17 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2C8++0x03 line.long 0x00 "VLAN_RES_TABLE18,18 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2CC++0x03 line.long 0x00 "VLAN_RES_TABLE19,19 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2D0++0x03 line.long 0x00 "VLAN_RES_TABLE20,20 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2D4++0x03 line.long 0x00 "VLAN_RES_TABLE21,21 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2D8++0x03 line.long 0x00 "VLAN_RES_TABLE22,22 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2DC++0x03 line.long 0x00 "VLAN_RES_TABLE23,23 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2E0++0x03 line.long 0x00 "VLAN_RES_TABLE24,24 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2E4++0x03 line.long 0x00 "VLAN_RES_TABLE25,25 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2E8++0x03 line.long 0x00 "VLAN_RES_TABLE26,26 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2EC++0x03 line.long 0x00 "VLAN_RES_TABLE27,27 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2F0++0x03 line.long 0x00 "VLAN_RES_TABLE28,28 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2F4++0x03 line.long 0x00 "VLAN_RES_TABLE29,29 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2F8++0x03 line.long 0x00 "VLAN_RES_TABLE30,30 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2FC++0x03 line.long 0x00 "VLAN_RES_TABLE31,31 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " rgroup.long 0x300++0x0F line.long 0x00 "TOTAL_DISC,Discarded Frame Total Number Register" line.long 0x04 "TOTAL_BYT_DISC,Discarded Frame Total Bytes Register" line.long 0x08 "TOTAL_FRM,Processed Frame Total Number Register" line.long 0x0C "TOTAL_BYT_FRM,Processed Frame Total Bytes Register" rgroup.long 0x310++0x0F line.long 0x00 "ODISC0,PORT 0 Discarded Outgoing Frame Count Register" line.long 0x04 "IDISC_VLAN0,PORT 0 Discarded Incoming VLAN Tagged Frame Count Register" line.long 0x08 "IDISC_UNTAGGED0,PORT 0 Discarded Incoming VLAN Untagged Frame Count Register" line.long 0x0C "IDISC_BLOCKED0,PORT 0 Discarded Incoming Blocked Frame Count Register" rgroup.long (0x310+0xB0)++0x03 line.long 0x00 "IMC_QLEVEL_P0,PORT 0 Queued Frame Count Register" bitfld.long 0x00 12.--15. " QUEUE3 ,A 4 bit value per queue indicating number of frames stored in the queue3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " QUEUE2 ,A 4 bit value per queue indicating number of frames stored in the queue2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " QUEUE1 ,A 4 bit value per queue indicating number of frames stored in the queue1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " QUEUE0 ,A 4 bit value per queue indicating number of frames stored in the queue0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x320++0x0F line.long 0x00 "ODISC1,PORT 1 Discarded Outgoing Frame Count Register" line.long 0x04 "IDISC_VLAN1,PORT 1 Discarded Incoming VLAN Tagged Frame Count Register" line.long 0x08 "IDISC_UNTAGGED1,PORT 1 Discarded Incoming VLAN Untagged Frame Count Register" line.long 0x0C "IDISC_BLOCKED1,PORT 1 Discarded Incoming Blocked Frame Count Register" rgroup.long (0x320+0xB0)++0x03 line.long 0x00 "IMC_QLEVEL_P1,PORT 1 Queued Frame Count Register" bitfld.long 0x00 12.--15. " QUEUE3 ,A 4 bit value per queue indicating number of frames stored in the queue3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " QUEUE2 ,A 4 bit value per queue indicating number of frames stored in the queue2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " QUEUE1 ,A 4 bit value per queue indicating number of frames stored in the queue1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " QUEUE0 ,A 4 bit value per queue indicating number of frames stored in the queue0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x330++0x0F line.long 0x00 "ODISC2,PORT 2 Discarded Outgoing Frame Count Register" line.long 0x04 "IDISC_VLAN2,PORT 2 Discarded Incoming VLAN Tagged Frame Count Register" line.long 0x08 "IDISC_UNTAGGED2,PORT 2 Discarded Incoming VLAN Untagged Frame Count Register" line.long 0x0C "IDISC_BLOCKED2,PORT 2 Discarded Incoming Blocked Frame Count Register" rgroup.long (0x330+0xB0)++0x03 line.long 0x00 "IMC_QLEVEL_P2,PORT 2 Queued Frame Count Register" bitfld.long 0x00 12.--15. " QUEUE3 ,A 4 bit value per queue indicating number of frames stored in the queue3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " QUEUE2 ,A 4 bit value per queue indicating number of frames stored in the queue2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " QUEUE1 ,A 4 bit value per queue indicating number of frames stored in the queue1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " QUEUE0 ,A 4 bit value per queue indicating number of frames stored in the queue0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x340++0x0F line.long 0x00 "ODISC3,PORT 3 Discarded Outgoing Frame Count Register" line.long 0x04 "IDISC_VLAN3,PORT 3 Discarded Incoming VLAN Tagged Frame Count Register" line.long 0x08 "IDISC_UNTAGGED3,PORT 3 Discarded Incoming VLAN Untagged Frame Count Register" line.long 0x0C "IDISC_BLOCKED3,PORT 3 Discarded Incoming Blocked Frame Count Register" rgroup.long (0x340+0xB0)++0x03 line.long 0x00 "IMC_QLEVEL_P3,PORT 3 Queued Frame Count Register" bitfld.long 0x00 12.--15. " QUEUE3 ,A 4 bit value per queue indicating number of frames stored in the queue3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " QUEUE2 ,A 4 bit value per queue indicating number of frames stored in the queue2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " QUEUE1 ,A 4 bit value per queue indicating number of frames stored in the queue1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " QUEUE0 ,A 4 bit value per queue indicating number of frames stored in the queue0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x350++0x0F line.long 0x00 "ODISC4,PORT 4 Discarded Outgoing Frame Count Register" line.long 0x04 "IDISC_VLAN4,PORT 4 Discarded Incoming VLAN Tagged Frame Count Register" line.long 0x08 "IDISC_UNTAGGED4,PORT 4 Discarded Incoming VLAN Untagged Frame Count Register" line.long 0x0C "IDISC_BLOCKED4,PORT 4 Discarded Incoming Blocked Frame Count Register" rgroup.long (0x350+0xB0)++0x03 line.long 0x00 "IMC_QLEVEL_P4,PORT 4 Queued Frame Count Register" bitfld.long 0x00 12.--15. " QUEUE3 ,A 4 bit value per queue indicating number of frames stored in the queue3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " QUEUE2 ,A 4 bit value per queue indicating number of frames stored in the queue2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " QUEUE1 ,A 4 bit value per queue indicating number of frames stored in the queue1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " QUEUE0 ,A 4 bit value per queue indicating number of frames stored in the queue0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x400++0x13 line.long 0x00 "LK_CTRL,Learning/Lookup Function Global Configuration Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " DISCARD_UNKNOWN_SOURCE[4] ,Discard if source address not found port 4" "Disabled,Enabled" bitfld.long 0x00 19. " [3] ,Discard if source address not found port 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " DISCARD_UNKNOWN_SOURCE[2] ,Discard if source address not found port 2" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Discard if source address not found port 1" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Discard if source address not found port 0" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CLEAR_TABLE ,Write all table entries with 0" "Not cleared,Cleared" bitfld.long 0x00 4. " DISCARD_UNKNOWN_DESTINATION ,Discard frame on destination address not found status" "Disabled,Enabled" bitfld.long 0x00 3. " ALLOW_MIGRATION ,Allow migration of dynamic entries" "Not allowed,Allowed" bitfld.long 0x00 2. " ENABLE_AGING ,Aging process enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ENABLE_LEARNING ,Enable frame source address auto add by hardware" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE_LOOKUP ,Enable lookup controller" "Disabled,Enabled" line.long 0x04 "LK_STATUS,Status Bits And Table Overflow Counter" bitfld.long 0x04 31. " LEARNEVENT ,New source address was detected" "Not detected,Detected" hexmask.long.word 0x04 16.--29. 1. " OVERFLOWS ,Number of table overflows that occurred" hexmask.long.word 0x04 0.--15. 0x01 " AGEADDRESS ,Address the aging process will inspect when the aging timer expires next time" line.long 0x08 "LK_ADDR_CTRL,Address Table Transaction Control And Read/Write Address" bitfld.long 0x08 31. " BUSY ,Transaction busy indication" "Not busy,Busy" bitfld.long 0x08 30. " DELETE_PORT ,Delete port" "Not deleted,Deleted" bitfld.long 0x08 29. " CLEAR ,Write all zero to the entry selected by the given address" "Not cleared,Cleared" bitfld.long 0x08 28. " LOOKUP ,Lookup of the MAC address given in LK_DATA_LO/HI" "No lookup,Lookup" textline " " bitfld.long 0x08 27. " WAIT_COMPLETE ,Stall the processor bus until the transaction is completed" "Not stalled,Stalled" bitfld.long 0x08 26. " READ ,Perform single read transaction" "Not performed,Performed" bitfld.long 0x08 25. " WRITE ,Perform a single write transaction" "Not performed,Performed" bitfld.long 0x08 24. " GETLASTNEW ,Retrieve last source address that was not found in the table" "Not retrieved,Retrieved" textline " " bitfld.long 0x08 23. " CLEAR_STATIC ,Clear valid static entries" "Not cleared,Cleared" bitfld.long 0x08 22. " CLEAR_DYNAMIC ,Clear valid dynamic entries" "Not cleared,Cleared" hexmask.long.word 0x08 0.--12. 0x01 " ADDRESS_MASK ,Memory address for read and write transactions" line.long 0x0C "LK_DATA_LO,Lower 32-Bit Data Of Lookup Memory Entry" line.long 0x10 "LK_DATA_HI,Higher 26-Bit Data Of Lookup Memory Entry" hexmask.long 0x10 0.--25. 1. " MEMDATA ,Memory data" textline " " group.long 0x418++0x07 line.long 0x00 "LK_LEARNCOUNT,Learned Address Count Register" bitfld.long 0x00 30.--31. " WRITE_MODE ,LEARNCOUNT write mode" "Given value,Inc by 1,Dec by 1,?..." hexmask.long.word 0x00 0.--13. 1. " LEARNCOUNT ,Number of learned addresses" line.long 0x04 "LK_AGETIME,Period Of The Aging Timer" hexmask.long.tbyte 0x04 0.--23. 1. " LK_AGETIME ,24 bit timer value" textline " " group.long 0x480++0x03 line.long 0x00 "MGMT_TAG_CONFIG,Management Tag Configuration Register" hexmask.long.word 0x00 16.--31. 1. " TAGFIELD ,Value of the tag that is found in the first type/length field of the frame" bitfld.long 0x00 5. " ENABLE_TYPE2 ,Frames with a type field that match the value in register PRIORITY_TYPE2[15:0] will get the control tag is inserted" "Disabled,Enabled" bitfld.long 0x00 4. " ENABLE_TYPE1 ,Frames with a type field that match the value in register PRIORITY_TYPE1[15:0] will get the control tag is inserted" "Disabled,Enabled" bitfld.long 0x00 1. " ALL_FRAMES ,Enable tag insertion for all frames" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENABLE ,Enable management port tag insertion module" "Disabled,Enabled" group.long 0x50C++0x03 line.long 0x00 "PEERDELAY0,Peer Delay Value For Port 0" hexmask.long 0x00 0.--29. 1. " PEERDELAY0 ,Peer delay value determined at the port" group.long 0x510++0x03 line.long 0x00 "PEERDELAY1,Peer Delay Value For Port 1" hexmask.long 0x00 0.--29. 1. " PEERDELAY1 ,Peer delay value determined at the port" group.long 0x514++0x03 line.long 0x00 "PEERDELAY2,Peer Delay Value For Port 2" hexmask.long 0x00 0.--29. 1. " PEERDELAY2 ,Peer delay value determined at the port" group.long 0x518++0x03 line.long 0x00 "PEERDELAY3,Peer Delay Value For Port 3" hexmask.long 0x00 0.--29. 1. " PEERDELAY3 ,Peer delay value determined at the port" group.long 0x520++0x03 line.long 0x00 "PORT0_CTRL,PORT 0 Timestamp Control/Status" bitfld.long 0x00 2. " TS_KEEP ,Keep last timestamp in the receive timestamp registers" "Not kept,Kept" bitfld.long 0x00 1. " TS_OVR ,A newer timestamp has overwritten the last stored timestamp" "Not overwritten,Overwritten" bitfld.long 0x00 0. " TS_VALID ,A valid timestamp is available" "Not available,Available" rgroup.long (0x520+0x04)++0x03 line.long 0x00 "PORT0_TIME,PORT 0 Memorized Transmit Timestamp" group.long 0x528++0x03 line.long 0x00 "PORT1_CTRL,PORT 1 Timestamp Control/Status" bitfld.long 0x00 2. " TS_KEEP ,Keep last timestamp in the receive timestamp registers" "Not kept,Kept" bitfld.long 0x00 1. " TS_OVR ,A newer timestamp has overwritten the last stored timestamp" "Not overwritten,Overwritten" bitfld.long 0x00 0. " TS_VALID ,A valid timestamp is available" "Not available,Available" rgroup.long (0x528+0x04)++0x03 line.long 0x00 "PORT1_TIME,PORT 1 Memorized Transmit Timestamp" group.long 0x530++0x03 line.long 0x00 "PORT2_CTRL,PORT 2 Timestamp Control/Status" bitfld.long 0x00 2. " TS_KEEP ,Keep last timestamp in the receive timestamp registers" "Not kept,Kept" bitfld.long 0x00 1. " TS_OVR ,A newer timestamp has overwritten the last stored timestamp" "Not overwritten,Overwritten" bitfld.long 0x00 0. " TS_VALID ,A valid timestamp is available" "Not available,Available" rgroup.long (0x530+0x04)++0x03 line.long 0x00 "PORT2_TIME,PORT 2 Memorized Transmit Timestamp" group.long 0x538++0x03 line.long 0x00 "PORT3_CTRL,PORT 3 Timestamp Control/Status" bitfld.long 0x00 2. " TS_KEEP ,Keep last timestamp in the receive timestamp registers" "Not kept,Kept" bitfld.long 0x00 1. " TS_OVR ,A newer timestamp has overwritten the last stored timestamp" "Not overwritten,Overwritten" bitfld.long 0x00 0. " TS_VALID ,A valid timestamp is available" "Not available,Available" rgroup.long (0x538+0x04)++0x03 line.long 0x00 "PORT3_TIME,PORT 3 Memorized Transmit Timestamp" textline " " group.long 0x600++0x07 line.long 0x00 "INT_CONFIG,Interrupt Enable Configuration Register" bitfld.long 0x00 31. " PATTERN_INT ,RX pattern matcher modules interrupt output wired with host interrupt pin enable" "Disabled,Enabled" bitfld.long 0x00 30. " TDMA_INT ,TDMA scheduler interrupt wired with host interrupt pin enable" "Disabled,Enabled" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 27. " IRQ_MAC_EEE[3] ,Line port 3 MAC interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 26. " IRQ_MAC_EEE[2] ,Line port 2 MAC interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " [1] ,Line port 1 MAC interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " [0] ,Line port 0 MAC interrupt enable" "Disabled,Enabled" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 19. " IRQ_TSM_TX[3] ,Line port 3 transmit timestamp capture interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " IRQ_TSM_TX[2] ,Line port 2 transmit timestamp capture interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Line port 1 transmit timestamp capture interrupt enable" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Line port 0 transmit timestamp capture interrupt enable" "Disabled,Enabled" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 11. " IRQ_LINK[3] ,Line port 3 phy link change interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 10. " IRQ_LINK[2] ,Line port 2 phy link change interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " [1] ,Line port 1 phy link change interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " [0] ,Line port 0 phy link change interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HUB_INT ,Hub modules interrupt output wired with host interrupt pin enable" "Disabled,Enabled" bitfld.long 0x00 6. " PRP_INT ,PRP modules interrupt output wired with host interrupt pin enable" "Disabled,Enabled" bitfld.long 0x00 5. " DLR_INT ,DLR modules interrupt output wired with host interrupt pin enable" "Disabled,Enabled" bitfld.long 0x00 4. " IRQ_TEST ,Interrupt trigger enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " LK_NEW_SRC ,Enable interrupt for new source address" "Disabled,Enabled" bitfld.long 0x00 1. " MDIO1 ,Enable interrupt on transaction complete from first MDIO controller" "Disabled,Enabled" bitfld.long 0x00 0. " IRQ_EN ,Interrupt global enable" "Disabled,Enabled" line.long 0x04 "INT_STAT_ACK,Interrupt Status/ACK Register" rbitfld.long 0x04 31. " PATTERN_INT ,Interrupt pending status from RX pattern matcher module" "No interrupt,Interrupt" rbitfld.long 0x04 30. " TDMA_INT ,Interrupt pending status from TDMA scheduler" "No interrupt,Interrupt" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 27. " IRQ_MAC_EEE[3] ,Line port 3 MAC interrupt status" "No interrupt,Interrupt" textline " " endif bitfld.long 0x04 26. " IRQ_MAC_EEE[2] ,Line port 2 MAC interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 25. " [1] ,Line port 1 MAC interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 24. " [0] ,Line port 0 MAC interrupt status" "No interrupt,Interrupt" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 19. " IRQ_TSM_TX[3] ,Line port 3 transmit timestamp capture interrupt status" "No interrupt,Interrupt" textline " " endif bitfld.long 0x04 18. " IRQ_TSM_TX[2] ,Line port 2 transmit timestamp capture interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 17. " [1] ,Line port 1 transmit timestamp capture interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 16. " [0] ,Line port 0 transmit timestamp capture interrupt status" "No interrupt,Interrupt" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 11. " IRQ_LINK[3] ,Line port 3 phy link change interrupt status" "No interrupt,Interrupt" textline " " endif bitfld.long 0x04 10. " IRQ_LINK[2] ,Line port 2 phy link change interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 9. " [1] ,Line port 1 phy link change interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 8. " [0] ,Line port 0 phy link change interrupt status" "No interrupt,Interrupt" textline " " rbitfld.long 0x04 7. " HUB_INT ,Interrupt pending status from hub module" "No interrupt,Interrupt" rbitfld.long 0x04 6. " PRP_INT ,Interrupt pending status from PRP module" "No interrupt,Interrupt" rbitfld.long 0x04 5. " DLR_INT ,Interrupt pending status from DLR module" "No interrupt,Interrupt" rbitfld.long 0x04 4. " IRQ_TEST ,Interrupt status for IRQ_TEST" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " LK_NEW_SRC ,Latched interrupt status for LK_NEW_SRC" "No interrupt,Interrupt" bitfld.long 0x04 1. " MDIO1 ,Latched interrupt status for MDIO1" "No interrupt,Interrupt" rbitfld.long 0x04 0. " IRQ_PEND ,Interrupt pending status" "Disabled,Enabled" textline " " group.long 0x700++0x0B line.long 0x00 "MDIO_CFG_STATUS,MDIO Configuration And Status Register" hexmask.long.word 0x00 7.--15. 1. " CLKDIV ,MDIO clock divisor" bitfld.long 0x00 5. " DISPREAM ,Disable preamble" "No,Yes" bitfld.long 0x00 2.--4. " HOLD ,MDIO hold time setting" "1 AHB,3 AHB,5 AHB,7 AHB,9 AHB,11 AHB,13 AHB,15 AHB" rbitfld.long 0x00 1. " READERR ,MDIO read error" "No error,Error" textline " " rbitfld.long 0x00 0. " BUSY ,MDIO busy" "Not busy,Busy" line.long 0x04 "MDIO_COMMAND,MDIO PHY Command Register" bitfld.long 0x04 15. " TRANINIT ,Read transaction" "Not initialized,Initialized" hexmask.long.word 0x04 5.--9. 0x20 " PHYADDR ,Read transaction" hexmask.long.byte 0x04 0.--4. 0x01 " REGADDR ,Register address" line.long 0x08 "MDIO_DATA,MDIO Data Register" hexmask.long.word 0x08 0.--15. 1. " MDIO_DATA ,MDIO data" textline " " width 35. rgroup.long 0x800++0x03 line.long 0x00 "REV_P0,PORT 0 MAC Core Revision" group.long (0x800+0x08)++0x0B line.long 0x00 "COMMAND_CONFIG_P0,Port 0 Command Configuration Register" bitfld.long 0x00 24. " NO_LGTH_CHECK ,Payload length check disable" "No,Yes" bitfld.long 0x00 23. " CNTL_FRM_ENA ,MAC control frame enable" "Disabled,Enabled" bitfld.long 0x00 13. " SW_RESET ,Self clearing reset command bit" "No reset,Reset" bitfld.long 0x00 11. " TX_CRC_APPEND ,Enable CRC append on transmit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HD_ENA ,Enable auto full/half duplex operation" "Disabled,Enabled" rbitfld.long 0x00 9. " TX_ADDR_INS ,Tx address insert" "0,1" bitfld.long 0x00 8. " PAUSE_IGNORE ,Ignore pause frame quanta" "Not ignored,Ignored" rbitfld.long 0x00 7. " PAUSE_FWD ,Terminate/Forward pause frames" "Terminated,Forwarded" textline " " bitfld.long 0x00 6. " CRC_FWD ,Terminate/Forward received CRC" "Terminated,Forwarded" rbitfld.long 0x00 5. " PAD_EN ,Enable frame padding remove on receive" "Disabled,Enabled" rbitfld.long 0x00 4. " PROMIS_EN ,Enable MAC promiscuous operation" "Disabled,Enabled" bitfld.long 0x00 3. " ETH_SPEED ,Ethernet speed" "10/100,Gigabit" textline " " bitfld.long 0x00 1. " RX_ENA ,Enable MAC transmit path" "Disabled,Enabled" bitfld.long 0x00 0. " TX_ENA ,Enable MAC transmit path" "Disabled,Enabled" line.long 0x04 "MAC_ADDR_0_P0,Port 0 MAC Address Register 0" line.long 0x08 "MAC_ADDR_1_P0,Port 0 MAC Address Register 1" hexmask.long.word 0x08 0.--15. 0x01 " MAC_ADDR ,The last 2 bytes of the ports MAC address" group.long (0x800+0x14)++0x07 line.long 0x00 "FRM_LENGTH_P0,PORT 0 Maximum Frame Length Register" hexmask.long.word 0x00 0.--13. 1. " FRM_LENGTH ,Maximum frame length" line.long 0x04 "PAUSE_QUANT_P0,PORT 0 MAC Pause Quanta" hexmask.long.word 0x04 0.--15. 1. " PAUSE_QUANT ,Pause quanta" group.long (0x800+0x30)++0x0B line.long 0x00 "PTPCLOCKIDENTITY1_P0,PORT 0 PTP Clock Identity1 Register" hexmask.long.byte 0x00 24.--31. 1. " CLOCKIDENTITY3 ,ClockIdentity[3]" hexmask.long.byte 0x00 16.--23. 1. " CLOCKIDENTITY2 ,ClockIdentity[2]" hexmask.long.byte 0x00 8.--15. 1. " CLOCKIDENTITY1 ,ClockIdentity[1]" hexmask.long.byte 0x00 0.--7. 1. " CLOCKIDENTITY0 ,ClockIdentity[0]" line.long 0x04 "PTPCLOCKIDENTITY2_P0,PORT 0 PTP Clock Identity2 Register" hexmask.long.byte 0x04 24.--31. 1. " CLOCKIDENTITY7 ,ClockIdentity[7]" hexmask.long.byte 0x04 16.--23. 1. " CLOCKIDENTITY6 ,ClockIdentity[6]" hexmask.long.byte 0x04 8.--15. 1. " CLOCKIDENTITY5 ,ClockIdentity[5]" hexmask.long.byte 0x04 0.--7. 1. " CLOCKIDENTITY4 ,ClockIdentity[4]" line.long 0x08 "PTPAUTORESPONSE_P0,PORT 0 PTP Auto Response Register" hexmask.long.byte 0x08 24.--31. 1. " PORTNUMBER1 ,PortNumber[1]" hexmask.long.byte 0x08 16.--23. 1. " PORTNUMBER0 ,PortNumber[0]" bitfld.long 0x08 0. " AUTORESPENABLE ,Enable automatic generation of IEEE 1588v2 layer 2 peer delay response messages" "Disabled,Enabled" if (((per.l(ad:0x44050000+0x800+0x40)&0x04)==0x04)) rgroup.long (0x800+0x40)++0x03 line.long 0x00 "STATUS_P0,PORT 0 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" bitfld.long 0x00 0.--1. " PHYSPEED ,Currently active PHY interface speed" "10 Mbps,100 Mbps,1 Gigabit,?..." else rgroup.long (0x800+0x40)++0x03 line.long 0x00 "STATUS_P0,PORT 0 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" endif group.long (0x800+0x44)++0x03 line.long 0x00 "TX_IPG_LENGTH_P0,PORT 0 Transmit IPG Length Register" bitfld.long 0x00 0.--4. " TX_IPG_LENGTH ,Transmit interpacket gap in octets" ",,,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hgroup.long (0x800+0x48)++0x03 hide.long 0x00 "EEE_CTL_STAT_P0,PORT 0 MAC EEE Functions Control And Status" in group.long (0x800+0x4C)++0x07 line.long 0x00 "EEE_IDLE_TIME_P0,PORT 0 EEE Idle Time Register" line.long 0x04 "EEE_TWSYS_TIME_P0,PORT 0 EEE Wake Up Time Register" group.long (0x800+0x54)++0x03 line.long 0x00 "IDLE_SLOPE_P0,PORT 0 MAC Traffic Shaper Bandwidth Control" hexmask.long.word 0x00 0.--10. 1. " IDLE_SLOPE ,Traffic shaper bandwidth control" rgroup.long (0x800+0x68)++0x7C line.long 0x00 "AFRAMESTRANSMITTEDOK_P0,PORT 0 MAC Transmitted Valid Frame Count Register" line.long 0x04 "AFRAMESRECEIVEDOK_P0,PORT 0 MAC Received Valid Frame Count Register" line.long 0x08 "AFRAMECHECKSEQUENCEERRORS_P0,PORT 0 MAC FCS Error Frame Count Register" line.long 0x0C "AALIGNMENTERRORS_P0,PORT 0 MAC Alignment Error Frame Count Register" line.long 0x10 "AOCTETSTRANSMITTEDOK_P0,PORT 0 MAC Transmitted Valid Frame Octets Register" line.long 0x14 "AOCTETSRECEIVEDOK_P0,PORT 0 MAC Received Valid Frame Octets Register" line.long 0x18 "ATXPAUSEMACCTRLFRAMES_P0,PORT 0 MAC Transmitted Pause Frame Count Register" line.long 0x1C "ARXPAUSEMACCTRLFRAMES_P0,PORT 0 MAC Received Pause Frame Count Register" line.long 0x20 "IFINERRORS_P0,PORT 0 MAC Input Error Count Register" line.long 0x24 "IFOUTERRORS_P0,PORT 0 MAC Output Error Count Register" line.long 0x28 "IFINUCASTPKTS_P0,PORT 0 MAC Received Unicast Frame Count Register" line.long 0x2C "IFINMULTICASTPKTS_P0,PORT 0 MAC Received Multicast Frame Count Register" line.long 0x30 "IFINBROADCASTPKTS_P0,PORT 0 MAC Received Broadcast Frame Count Register" line.long 0x34 "IFOUTDISCARDS_P0,PORT 0 MAC Discarded Outbound Frame Count Register" line.long 0x38 "IFOUTUCASTPKTS_P0,PORT 0 MAC Transmitted Unicast Frame Count Register" line.long 0x3C "IFOUTMULTICASTPKTS_P0,PORT 0 MAC Transmitted Multicast Frame Count Register" line.long 0x40 "IFOUTBROADCASTPKTS_P0,PORT 0 MAC Transmitted Broadcast Frame Count Register" line.long 0x44 "ETHERSTATSDROPEVENTS_P0,PORT 0 MAC Dropped Frame Count Register" line.long 0x48 "ETHERSTATSOCTETS_P0,PORT 0 MAC All Frame Octets Register" line.long 0x4C "ETHERSTATSPKTS_P0,PORT 0 MAC All Frame Count Register" line.long 0x50 "ETHERSTATSUNDERSIZEPKTS_P0,PORT 0 MAC Too Short Frame Count Register" line.long 0x54 "ETHERSTATSOVERSIZEPKTS_P0,PORT 0 MAC Too Long Frame Count Register" line.long 0x58 "ETHERSTATSPKTS64OCTETS_P0,PORT 0 MAC 64 Octets Frame Count Register" line.long 0x5C "ETHERSTATSPKTS65TO127OCTETS_P0,PORT 0 MAC 65 to 127 Octets Frame Count Register" line.long 0x60 "ETHERSTATSPKTS128TO255OCTETS_P0,PORT 0 MAC 128 to 255 Octets Frame Count Register" line.long 0x64 "ETHERSTATSPKTS256TO511OCTETS_P0,PORT 0 MAC 256 to 511 Octets Frame Count Register" line.long 0x68 "ETHERSTATSPKTS512TO1023OCTETS_P0,PORT 0 MAC 512 to 1023 Octets Frame Count Register" line.long 0x6C "ETHERSTATSPKTS1024TO1518OCTETS_P0,PORT 0 MAC 1024 to 1519 Octets Frame Count Register" line.long 0x70 "ETHERSTATSPKTS1519TOXOCTETS_P0,PORT 0 MAC Over 1519 Octets Frame Count Register" line.long 0x74 "ETHERSTATSJABBERS_P0,PORT 0 MAC Jabbers Frame Count Register" line.long 0x78 "ETHERSTATSFRAGMENTS_P0,PORT 0 MAC Fragment Frame Count Register" rgroup.long (0x800+0xE8)++0x03 line.long 0x00 "VLANRECEIVEDOK_P0,PORT 0 MAC Received VLAN Tagged Frame Count Register" rgroup.long (0x800+0xF4)++0x07 line.long 0x00 "VLANTRANSMITTEDOK_P0,PORT 0 MAC Transmitted VLAN Tagged Frame Count Register" line.long 0x04 "FRAMESRETRANSMITTED_P0,PORT 0 MAC Retransmitted Frame Count Register" rgroup.long (0x800+0x100)++0x03 line.long 0x00 "STATS_HIWORD_P0,PORT 0 MAC Statistics Counter High Word Register" group.long (0x800+0x104)++0x0B line.long 0x00 "STATS_CTRL_P0,PORT 0 MAC Statistics Control Register" rbitfld.long 0x00 1. " CLEARBUSY ,Clear in progress indication" "Not cleared,Cleared" bitfld.long 0x00 0. " CLEARALL ,Self clearing counter initialize command" "Not cleared,Cleared" line.long 0x04 "STATS_CLEAR_VALUELO_P0,PORT 0 MAC Statistics Clear Value Lower Register" line.long 0x08 "STATS_CLEAR_VALUEHI_P0,PORT 0 MAC Statistics Clear Value Higher Register" rgroup.long (0x800+0x110)++0x17 line.long 0x00 "ADEFERRED_P0,PORT 0 MAC Deferred Count Register" line.long 0x04 "AMULTIPLECOLLISIONS_P0,PORT 0 MAC Multiple Collision Count Register" line.long 0x08 "ASINGLECOLLISIONS_P0,PORT 0 MAC Single CollinsionsCount Register" line.long 0x0C "ALATECOLLISIONS_P0,PORT 0 MAC Late Collision Count Register" line.long 0x10 "AEXCESSIVECOLLISIONS_P0,PORT 0 MAC Excessive Collision Count Register" line.long 0x14 "ACARRIERSENSEERRORS_P0,PORT 0 MAC Carrier Sense Error Count Register" rgroup.long 0xC00++0x03 line.long 0x00 "REV_P1,PORT 1 MAC Core Revision" group.long (0xC00+0x08)++0x0B line.long 0x00 "COMMAND_CONFIG_P1,Port 1 Command Configuration Register" bitfld.long 0x00 24. " NO_LGTH_CHECK ,Payload length check disable" "No,Yes" bitfld.long 0x00 23. " CNTL_FRM_ENA ,MAC control frame enable" "Disabled,Enabled" bitfld.long 0x00 13. " SW_RESET ,Self clearing reset command bit" "No reset,Reset" bitfld.long 0x00 11. " TX_CRC_APPEND ,Enable CRC append on transmit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HD_ENA ,Enable auto full/half duplex operation" "Disabled,Enabled" rbitfld.long 0x00 9. " TX_ADDR_INS ,Tx address insert" "0,1" bitfld.long 0x00 8. " PAUSE_IGNORE ,Ignore pause frame quanta" "Not ignored,Ignored" rbitfld.long 0x00 7. " PAUSE_FWD ,Terminate/Forward pause frames" "Terminated,Forwarded" textline " " bitfld.long 0x00 6. " CRC_FWD ,Terminate/Forward received CRC" "Terminated,Forwarded" rbitfld.long 0x00 5. " PAD_EN ,Enable frame padding remove on receive" "Disabled,Enabled" rbitfld.long 0x00 4. " PROMIS_EN ,Enable MAC promiscuous operation" "Disabled,Enabled" bitfld.long 0x00 3. " ETH_SPEED ,Ethernet speed" "10/100,Gigabit" textline " " bitfld.long 0x00 1. " RX_ENA ,Enable MAC transmit path" "Disabled,Enabled" bitfld.long 0x00 0. " TX_ENA ,Enable MAC transmit path" "Disabled,Enabled" line.long 0x04 "MAC_ADDR_0_P1,Port 1 MAC Address Register 0" line.long 0x08 "MAC_ADDR_1_P1,Port 1 MAC Address Register 1" hexmask.long.word 0x08 0.--15. 0x01 " MAC_ADDR ,The last 2 bytes of the ports MAC address" group.long (0xC00+0x14)++0x07 line.long 0x00 "FRM_LENGTH_P1,PORT 1 Maximum Frame Length Register" hexmask.long.word 0x00 0.--13. 1. " FRM_LENGTH ,Maximum frame length" line.long 0x04 "PAUSE_QUANT_P1,PORT 1 MAC Pause Quanta" hexmask.long.word 0x04 0.--15. 1. " PAUSE_QUANT ,Pause quanta" group.long (0xC00+0x30)++0x0B line.long 0x00 "PTPCLOCKIDENTITY1_P1,PORT 1 PTP Clock Identity1 Register" hexmask.long.byte 0x00 24.--31. 1. " CLOCKIDENTITY3 ,ClockIdentity[3]" hexmask.long.byte 0x00 16.--23. 1. " CLOCKIDENTITY2 ,ClockIdentity[2]" hexmask.long.byte 0x00 8.--15. 1. " CLOCKIDENTITY1 ,ClockIdentity[1]" hexmask.long.byte 0x00 0.--7. 1. " CLOCKIDENTITY0 ,ClockIdentity[0]" line.long 0x04 "PTPCLOCKIDENTITY2_P1,PORT 1 PTP Clock Identity2 Register" hexmask.long.byte 0x04 24.--31. 1. " CLOCKIDENTITY7 ,ClockIdentity[7]" hexmask.long.byte 0x04 16.--23. 1. " CLOCKIDENTITY6 ,ClockIdentity[6]" hexmask.long.byte 0x04 8.--15. 1. " CLOCKIDENTITY5 ,ClockIdentity[5]" hexmask.long.byte 0x04 0.--7. 1. " CLOCKIDENTITY4 ,ClockIdentity[4]" line.long 0x08 "PTPAUTORESPONSE_P1,PORT 1 PTP Auto Response Register" hexmask.long.byte 0x08 24.--31. 1. " PORTNUMBER1 ,PortNumber[1]" hexmask.long.byte 0x08 16.--23. 1. " PORTNUMBER0 ,PortNumber[0]" bitfld.long 0x08 0. " AUTORESPENABLE ,Enable automatic generation of IEEE 1588v2 layer 2 peer delay response messages" "Disabled,Enabled" if (((per.l(ad:0x44050000+0xC00+0x40)&0x04)==0x04)) rgroup.long (0xC00+0x40)++0x03 line.long 0x00 "STATUS_P1,PORT 1 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" bitfld.long 0x00 0.--1. " PHYSPEED ,Currently active PHY interface speed" "10 Mbps,100 Mbps,1 Gigabit,?..." else rgroup.long (0xC00+0x40)++0x03 line.long 0x00 "STATUS_P1,PORT 1 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" endif group.long (0xC00+0x44)++0x03 line.long 0x00 "TX_IPG_LENGTH_P1,PORT 1 Transmit IPG Length Register" bitfld.long 0x00 0.--4. " TX_IPG_LENGTH ,Transmit interpacket gap in octets" ",,,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hgroup.long (0xC00+0x48)++0x03 hide.long 0x00 "EEE_CTL_STAT_P1,PORT 1 MAC EEE Functions Control And Status" in group.long (0xC00+0x4C)++0x07 line.long 0x00 "EEE_IDLE_TIME_P1,PORT 1 EEE Idle Time Register" line.long 0x04 "EEE_TWSYS_TIME_P1,PORT 1 EEE Wake Up Time Register" group.long (0xC00+0x54)++0x03 line.long 0x00 "IDLE_SLOPE_P1,PORT 1 MAC Traffic Shaper Bandwidth Control" hexmask.long.word 0x00 0.--10. 1. " IDLE_SLOPE ,Traffic shaper bandwidth control" rgroup.long (0xC00+0x68)++0x7C line.long 0x00 "AFRAMESTRANSMITTEDOK_P1,PORT 1 MAC Transmitted Valid Frame Count Register" line.long 0x04 "AFRAMESRECEIVEDOK_P1,PORT 1 MAC Received Valid Frame Count Register" line.long 0x08 "AFRAMECHECKSEQUENCEERRORS_P1,PORT 1 MAC FCS Error Frame Count Register" line.long 0x0C "AALIGNMENTERRORS_P1,PORT 1 MAC Alignment Error Frame Count Register" line.long 0x10 "AOCTETSTRANSMITTEDOK_P1,PORT 1 MAC Transmitted Valid Frame Octets Register" line.long 0x14 "AOCTETSRECEIVEDOK_P1,PORT 1 MAC Received Valid Frame Octets Register" line.long 0x18 "ATXPAUSEMACCTRLFRAMES_P1,PORT 1 MAC Transmitted Pause Frame Count Register" line.long 0x1C "ARXPAUSEMACCTRLFRAMES_P1,PORT 1 MAC Received Pause Frame Count Register" line.long 0x20 "IFINERRORS_P1,PORT 1 MAC Input Error Count Register" line.long 0x24 "IFOUTERRORS_P1,PORT 1 MAC Output Error Count Register" line.long 0x28 "IFINUCASTPKTS_P1,PORT 1 MAC Received Unicast Frame Count Register" line.long 0x2C "IFINMULTICASTPKTS_P1,PORT 1 MAC Received Multicast Frame Count Register" line.long 0x30 "IFINBROADCASTPKTS_P1,PORT 1 MAC Received Broadcast Frame Count Register" line.long 0x34 "IFOUTDISCARDS_P1,PORT 1 MAC Discarded Outbound Frame Count Register" line.long 0x38 "IFOUTUCASTPKTS_P1,PORT 1 MAC Transmitted Unicast Frame Count Register" line.long 0x3C "IFOUTMULTICASTPKTS_P1,PORT 1 MAC Transmitted Multicast Frame Count Register" line.long 0x40 "IFOUTBROADCASTPKTS_P1,PORT 1 MAC Transmitted Broadcast Frame Count Register" line.long 0x44 "ETHERSTATSDROPEVENTS_P1,PORT 1 MAC Dropped Frame Count Register" line.long 0x48 "ETHERSTATSOCTETS_P1,PORT 1 MAC All Frame Octets Register" line.long 0x4C "ETHERSTATSPKTS_P1,PORT 1 MAC All Frame Count Register" line.long 0x50 "ETHERSTATSUNDERSIZEPKTS_P1,PORT 1 MAC Too Short Frame Count Register" line.long 0x54 "ETHERSTATSOVERSIZEPKTS_P1,PORT 1 MAC Too Long Frame Count Register" line.long 0x58 "ETHERSTATSPKTS64OCTETS_P1,PORT 1 MAC 64 Octets Frame Count Register" line.long 0x5C "ETHERSTATSPKTS65TO127OCTETS_P1,PORT 1 MAC 65 to 127 Octets Frame Count Register" line.long 0x60 "ETHERSTATSPKTS128TO255OCTETS_P1,PORT 1 MAC 128 to 255 Octets Frame Count Register" line.long 0x64 "ETHERSTATSPKTS256TO511OCTETS_P1,PORT 1 MAC 256 to 511 Octets Frame Count Register" line.long 0x68 "ETHERSTATSPKTS512TO1023OCTETS_P1,PORT 1 MAC 512 to 1023 Octets Frame Count Register" line.long 0x6C "ETHERSTATSPKTS1024TO1518OCTETS_P1,PORT 1 MAC 1024 to 1519 Octets Frame Count Register" line.long 0x70 "ETHERSTATSPKTS1519TOXOCTETS_P1,PORT 1 MAC Over 1519 Octets Frame Count Register" line.long 0x74 "ETHERSTATSJABBERS_P1,PORT 1 MAC Jabbers Frame Count Register" line.long 0x78 "ETHERSTATSFRAGMENTS_P1,PORT 1 MAC Fragment Frame Count Register" rgroup.long (0xC00+0xE8)++0x03 line.long 0x00 "VLANRECEIVEDOK_P1,PORT 1 MAC Received VLAN Tagged Frame Count Register" rgroup.long (0xC00+0xF4)++0x07 line.long 0x00 "VLANTRANSMITTEDOK_P1,PORT 1 MAC Transmitted VLAN Tagged Frame Count Register" line.long 0x04 "FRAMESRETRANSMITTED_P1,PORT 1 MAC Retransmitted Frame Count Register" rgroup.long (0xC00+0x100)++0x03 line.long 0x00 "STATS_HIWORD_P1,PORT 1 MAC Statistics Counter High Word Register" group.long (0xC00+0x104)++0x0B line.long 0x00 "STATS_CTRL_P1,PORT 1 MAC Statistics Control Register" rbitfld.long 0x00 1. " CLEARBUSY ,Clear in progress indication" "Not cleared,Cleared" bitfld.long 0x00 0. " CLEARALL ,Self clearing counter initialize command" "Not cleared,Cleared" line.long 0x04 "STATS_CLEAR_VALUELO_P1,PORT 1 MAC Statistics Clear Value Lower Register" line.long 0x08 "STATS_CLEAR_VALUEHI_P1,PORT 1 MAC Statistics Clear Value Higher Register" rgroup.long (0xC00+0x110)++0x17 line.long 0x00 "ADEFERRED_P1,PORT 1 MAC Deferred Count Register" line.long 0x04 "AMULTIPLECOLLISIONS_P1,PORT 1 MAC Multiple Collision Count Register" line.long 0x08 "ASINGLECOLLISIONS_P1,PORT 1 MAC Single CollinsionsCount Register" line.long 0x0C "ALATECOLLISIONS_P1,PORT 1 MAC Late Collision Count Register" line.long 0x10 "AEXCESSIVECOLLISIONS_P1,PORT 1 MAC Excessive Collision Count Register" line.long 0x14 "ACARRIERSENSEERRORS_P1,PORT 1 MAC Carrier Sense Error Count Register" rgroup.long 0x1000++0x03 line.long 0x00 "REV_P2,PORT 2 MAC Core Revision" group.long (0x1000+0x08)++0x0B line.long 0x00 "COMMAND_CONFIG_P2,Port 2 Command Configuration Register" bitfld.long 0x00 24. " NO_LGTH_CHECK ,Payload length check disable" "No,Yes" bitfld.long 0x00 23. " CNTL_FRM_ENA ,MAC control frame enable" "Disabled,Enabled" bitfld.long 0x00 13. " SW_RESET ,Self clearing reset command bit" "No reset,Reset" bitfld.long 0x00 11. " TX_CRC_APPEND ,Enable CRC append on transmit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HD_ENA ,Enable auto full/half duplex operation" "Disabled,Enabled" rbitfld.long 0x00 9. " TX_ADDR_INS ,Tx address insert" "0,1" bitfld.long 0x00 8. " PAUSE_IGNORE ,Ignore pause frame quanta" "Not ignored,Ignored" rbitfld.long 0x00 7. " PAUSE_FWD ,Terminate/Forward pause frames" "Terminated,Forwarded" textline " " bitfld.long 0x00 6. " CRC_FWD ,Terminate/Forward received CRC" "Terminated,Forwarded" rbitfld.long 0x00 5. " PAD_EN ,Enable frame padding remove on receive" "Disabled,Enabled" rbitfld.long 0x00 4. " PROMIS_EN ,Enable MAC promiscuous operation" "Disabled,Enabled" bitfld.long 0x00 3. " ETH_SPEED ,Ethernet speed" "10/100,Gigabit" textline " " bitfld.long 0x00 1. " RX_ENA ,Enable MAC transmit path" "Disabled,Enabled" bitfld.long 0x00 0. " TX_ENA ,Enable MAC transmit path" "Disabled,Enabled" line.long 0x04 "MAC_ADDR_0_P2,Port 2 MAC Address Register 0" line.long 0x08 "MAC_ADDR_1_P2,Port 2 MAC Address Register 1" hexmask.long.word 0x08 0.--15. 0x01 " MAC_ADDR ,The last 2 bytes of the ports MAC address" group.long (0x1000+0x14)++0x07 line.long 0x00 "FRM_LENGTH_P2,PORT 2 Maximum Frame Length Register" hexmask.long.word 0x00 0.--13. 1. " FRM_LENGTH ,Maximum frame length" line.long 0x04 "PAUSE_QUANT_P2,PORT 2 MAC Pause Quanta" hexmask.long.word 0x04 0.--15. 1. " PAUSE_QUANT ,Pause quanta" group.long (0x1000+0x30)++0x0B line.long 0x00 "PTPCLOCKIDENTITY1_P2,PORT 2 PTP Clock Identity1 Register" hexmask.long.byte 0x00 24.--31. 1. " CLOCKIDENTITY3 ,ClockIdentity[3]" hexmask.long.byte 0x00 16.--23. 1. " CLOCKIDENTITY2 ,ClockIdentity[2]" hexmask.long.byte 0x00 8.--15. 1. " CLOCKIDENTITY1 ,ClockIdentity[1]" hexmask.long.byte 0x00 0.--7. 1. " CLOCKIDENTITY0 ,ClockIdentity[0]" line.long 0x04 "PTPCLOCKIDENTITY2_P2,PORT 2 PTP Clock Identity2 Register" hexmask.long.byte 0x04 24.--31. 1. " CLOCKIDENTITY7 ,ClockIdentity[7]" hexmask.long.byte 0x04 16.--23. 1. " CLOCKIDENTITY6 ,ClockIdentity[6]" hexmask.long.byte 0x04 8.--15. 1. " CLOCKIDENTITY5 ,ClockIdentity[5]" hexmask.long.byte 0x04 0.--7. 1. " CLOCKIDENTITY4 ,ClockIdentity[4]" line.long 0x08 "PTPAUTORESPONSE_P2,PORT 2 PTP Auto Response Register" hexmask.long.byte 0x08 24.--31. 1. " PORTNUMBER1 ,PortNumber[1]" hexmask.long.byte 0x08 16.--23. 1. " PORTNUMBER0 ,PortNumber[0]" bitfld.long 0x08 0. " AUTORESPENABLE ,Enable automatic generation of IEEE 1588v2 layer 2 peer delay response messages" "Disabled,Enabled" if (((per.l(ad:0x44050000+0x1000+0x40)&0x04)==0x04)) rgroup.long (0x1000+0x40)++0x03 line.long 0x00 "STATUS_P2,PORT 2 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" bitfld.long 0x00 0.--1. " PHYSPEED ,Currently active PHY interface speed" "10 Mbps,100 Mbps,1 Gigabit,?..." else rgroup.long (0x1000+0x40)++0x03 line.long 0x00 "STATUS_P2,PORT 2 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" endif group.long (0x1000+0x44)++0x03 line.long 0x00 "TX_IPG_LENGTH_P2,PORT 2 Transmit IPG Length Register" bitfld.long 0x00 0.--4. " TX_IPG_LENGTH ,Transmit interpacket gap in octets" ",,,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hgroup.long (0x1000+0x48)++0x03 hide.long 0x00 "EEE_CTL_STAT_P2,PORT 2 MAC EEE Functions Control And Status" in group.long (0x1000+0x4C)++0x07 line.long 0x00 "EEE_IDLE_TIME_P2,PORT 2 EEE Idle Time Register" line.long 0x04 "EEE_TWSYS_TIME_P2,PORT 2 EEE Wake Up Time Register" group.long (0x1000+0x54)++0x03 line.long 0x00 "IDLE_SLOPE_P2,PORT 2 MAC Traffic Shaper Bandwidth Control" hexmask.long.word 0x00 0.--10. 1. " IDLE_SLOPE ,Traffic shaper bandwidth control" rgroup.long (0x1000+0x68)++0x7C line.long 0x00 "AFRAMESTRANSMITTEDOK_P2,PORT 2 MAC Transmitted Valid Frame Count Register" line.long 0x04 "AFRAMESRECEIVEDOK_P2,PORT 2 MAC Received Valid Frame Count Register" line.long 0x08 "AFRAMECHECKSEQUENCEERRORS_P2,PORT 2 MAC FCS Error Frame Count Register" line.long 0x0C "AALIGNMENTERRORS_P2,PORT 2 MAC Alignment Error Frame Count Register" line.long 0x10 "AOCTETSTRANSMITTEDOK_P2,PORT 2 MAC Transmitted Valid Frame Octets Register" line.long 0x14 "AOCTETSRECEIVEDOK_P2,PORT 2 MAC Received Valid Frame Octets Register" line.long 0x18 "ATXPAUSEMACCTRLFRAMES_P2,PORT 2 MAC Transmitted Pause Frame Count Register" line.long 0x1C "ARXPAUSEMACCTRLFRAMES_P2,PORT 2 MAC Received Pause Frame Count Register" line.long 0x20 "IFINERRORS_P2,PORT 2 MAC Input Error Count Register" line.long 0x24 "IFOUTERRORS_P2,PORT 2 MAC Output Error Count Register" line.long 0x28 "IFINUCASTPKTS_P2,PORT 2 MAC Received Unicast Frame Count Register" line.long 0x2C "IFINMULTICASTPKTS_P2,PORT 2 MAC Received Multicast Frame Count Register" line.long 0x30 "IFINBROADCASTPKTS_P2,PORT 2 MAC Received Broadcast Frame Count Register" line.long 0x34 "IFOUTDISCARDS_P2,PORT 2 MAC Discarded Outbound Frame Count Register" line.long 0x38 "IFOUTUCASTPKTS_P2,PORT 2 MAC Transmitted Unicast Frame Count Register" line.long 0x3C "IFOUTMULTICASTPKTS_P2,PORT 2 MAC Transmitted Multicast Frame Count Register" line.long 0x40 "IFOUTBROADCASTPKTS_P2,PORT 2 MAC Transmitted Broadcast Frame Count Register" line.long 0x44 "ETHERSTATSDROPEVENTS_P2,PORT 2 MAC Dropped Frame Count Register" line.long 0x48 "ETHERSTATSOCTETS_P2,PORT 2 MAC All Frame Octets Register" line.long 0x4C "ETHERSTATSPKTS_P2,PORT 2 MAC All Frame Count Register" line.long 0x50 "ETHERSTATSUNDERSIZEPKTS_P2,PORT 2 MAC Too Short Frame Count Register" line.long 0x54 "ETHERSTATSOVERSIZEPKTS_P2,PORT 2 MAC Too Long Frame Count Register" line.long 0x58 "ETHERSTATSPKTS64OCTETS_P2,PORT 2 MAC 64 Octets Frame Count Register" line.long 0x5C "ETHERSTATSPKTS65TO127OCTETS_P2,PORT 2 MAC 65 to 127 Octets Frame Count Register" line.long 0x60 "ETHERSTATSPKTS128TO255OCTETS_P2,PORT 2 MAC 128 to 255 Octets Frame Count Register" line.long 0x64 "ETHERSTATSPKTS256TO511OCTETS_P2,PORT 2 MAC 256 to 511 Octets Frame Count Register" line.long 0x68 "ETHERSTATSPKTS512TO1023OCTETS_P2,PORT 2 MAC 512 to 1023 Octets Frame Count Register" line.long 0x6C "ETHERSTATSPKTS1024TO1518OCTETS_P2,PORT 2 MAC 1024 to 1519 Octets Frame Count Register" line.long 0x70 "ETHERSTATSPKTS1519TOXOCTETS_P2,PORT 2 MAC Over 1519 Octets Frame Count Register" line.long 0x74 "ETHERSTATSJABBERS_P2,PORT 2 MAC Jabbers Frame Count Register" line.long 0x78 "ETHERSTATSFRAGMENTS_P2,PORT 2 MAC Fragment Frame Count Register" rgroup.long (0x1000+0xE8)++0x03 line.long 0x00 "VLANRECEIVEDOK_P2,PORT 2 MAC Received VLAN Tagged Frame Count Register" rgroup.long (0x1000+0xF4)++0x07 line.long 0x00 "VLANTRANSMITTEDOK_P2,PORT 2 MAC Transmitted VLAN Tagged Frame Count Register" line.long 0x04 "FRAMESRETRANSMITTED_P2,PORT 2 MAC Retransmitted Frame Count Register" rgroup.long (0x1000+0x100)++0x03 line.long 0x00 "STATS_HIWORD_P2,PORT 2 MAC Statistics Counter High Word Register" group.long (0x1000+0x104)++0x0B line.long 0x00 "STATS_CTRL_P2,PORT 2 MAC Statistics Control Register" rbitfld.long 0x00 1. " CLEARBUSY ,Clear in progress indication" "Not cleared,Cleared" bitfld.long 0x00 0. " CLEARALL ,Self clearing counter initialize command" "Not cleared,Cleared" line.long 0x04 "STATS_CLEAR_VALUELO_P2,PORT 2 MAC Statistics Clear Value Lower Register" line.long 0x08 "STATS_CLEAR_VALUEHI_P2,PORT 2 MAC Statistics Clear Value Higher Register" rgroup.long (0x1000+0x110)++0x17 line.long 0x00 "ADEFERRED_P2,PORT 2 MAC Deferred Count Register" line.long 0x04 "AMULTIPLECOLLISIONS_P2,PORT 2 MAC Multiple Collision Count Register" line.long 0x08 "ASINGLECOLLISIONS_P2,PORT 2 MAC Single CollinsionsCount Register" line.long 0x0C "ALATECOLLISIONS_P2,PORT 2 MAC Late Collision Count Register" line.long 0x10 "AEXCESSIVECOLLISIONS_P2,PORT 2 MAC Excessive Collision Count Register" line.long 0x14 "ACARRIERSENSEERRORS_P2,PORT 2 MAC Carrier Sense Error Count Register" rgroup.long 0x1400++0x03 line.long 0x00 "REV_P3,PORT 3 MAC Core Revision" group.long (0x1400+0x08)++0x0B line.long 0x00 "COMMAND_CONFIG_P3,Port 3 Command Configuration Register" bitfld.long 0x00 24. " NO_LGTH_CHECK ,Payload length check disable" "No,Yes" bitfld.long 0x00 23. " CNTL_FRM_ENA ,MAC control frame enable" "Disabled,Enabled" bitfld.long 0x00 13. " SW_RESET ,Self clearing reset command bit" "No reset,Reset" bitfld.long 0x00 11. " TX_CRC_APPEND ,Enable CRC append on transmit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HD_ENA ,Enable auto full/half duplex operation" "Disabled,Enabled" rbitfld.long 0x00 9. " TX_ADDR_INS ,Tx address insert" "0,1" bitfld.long 0x00 8. " PAUSE_IGNORE ,Ignore pause frame quanta" "Not ignored,Ignored" rbitfld.long 0x00 7. " PAUSE_FWD ,Terminate/Forward pause frames" "Terminated,Forwarded" textline " " bitfld.long 0x00 6. " CRC_FWD ,Terminate/Forward received CRC" "Terminated,Forwarded" rbitfld.long 0x00 5. " PAD_EN ,Enable frame padding remove on receive" "Disabled,Enabled" rbitfld.long 0x00 4. " PROMIS_EN ,Enable MAC promiscuous operation" "Disabled,Enabled" bitfld.long 0x00 3. " ETH_SPEED ,Ethernet speed" "10/100,Gigabit" textline " " bitfld.long 0x00 1. " RX_ENA ,Enable MAC transmit path" "Disabled,Enabled" bitfld.long 0x00 0. " TX_ENA ,Enable MAC transmit path" "Disabled,Enabled" line.long 0x04 "MAC_ADDR_0_P3,Port 3 MAC Address Register 0" line.long 0x08 "MAC_ADDR_1_P3,Port 3 MAC Address Register 1" hexmask.long.word 0x08 0.--15. 0x01 " MAC_ADDR ,The last 2 bytes of the ports MAC address" group.long (0x1400+0x14)++0x07 line.long 0x00 "FRM_LENGTH_P3,PORT 3 Maximum Frame Length Register" hexmask.long.word 0x00 0.--13. 1. " FRM_LENGTH ,Maximum frame length" line.long 0x04 "PAUSE_QUANT_P3,PORT 3 MAC Pause Quanta" hexmask.long.word 0x04 0.--15. 1. " PAUSE_QUANT ,Pause quanta" group.long (0x1400+0x30)++0x0B line.long 0x00 "PTPCLOCKIDENTITY1_P3,PORT 3 PTP Clock Identity1 Register" hexmask.long.byte 0x00 24.--31. 1. " CLOCKIDENTITY3 ,ClockIdentity[3]" hexmask.long.byte 0x00 16.--23. 1. " CLOCKIDENTITY2 ,ClockIdentity[2]" hexmask.long.byte 0x00 8.--15. 1. " CLOCKIDENTITY1 ,ClockIdentity[1]" hexmask.long.byte 0x00 0.--7. 1. " CLOCKIDENTITY0 ,ClockIdentity[0]" line.long 0x04 "PTPCLOCKIDENTITY2_P3,PORT 3 PTP Clock Identity2 Register" hexmask.long.byte 0x04 24.--31. 1. " CLOCKIDENTITY7 ,ClockIdentity[7]" hexmask.long.byte 0x04 16.--23. 1. " CLOCKIDENTITY6 ,ClockIdentity[6]" hexmask.long.byte 0x04 8.--15. 1. " CLOCKIDENTITY5 ,ClockIdentity[5]" hexmask.long.byte 0x04 0.--7. 1. " CLOCKIDENTITY4 ,ClockIdentity[4]" line.long 0x08 "PTPAUTORESPONSE_P3,PORT 3 PTP Auto Response Register" hexmask.long.byte 0x08 24.--31. 1. " PORTNUMBER1 ,PortNumber[1]" hexmask.long.byte 0x08 16.--23. 1. " PORTNUMBER0 ,PortNumber[0]" bitfld.long 0x08 0. " AUTORESPENABLE ,Enable automatic generation of IEEE 1588v2 layer 2 peer delay response messages" "Disabled,Enabled" if (((per.l(ad:0x44050000+0x1400+0x40)&0x04)==0x04)) rgroup.long (0x1400+0x40)++0x03 line.long 0x00 "STATUS_P3,PORT 3 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" bitfld.long 0x00 0.--1. " PHYSPEED ,Currently active PHY interface speed" "10 Mbps,100 Mbps,1 Gigabit,?..." else rgroup.long (0x1400+0x40)++0x03 line.long 0x00 "STATUS_P3,PORT 3 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" endif group.long (0x1400+0x44)++0x03 line.long 0x00 "TX_IPG_LENGTH_P3,PORT 3 Transmit IPG Length Register" bitfld.long 0x00 0.--4. " TX_IPG_LENGTH ,Transmit interpacket gap in octets" ",,,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hgroup.long (0x1400+0x48)++0x03 hide.long 0x00 "EEE_CTL_STAT_P3,PORT 3 MAC EEE Functions Control And Status" in group.long (0x1400+0x4C)++0x07 line.long 0x00 "EEE_IDLE_TIME_P3,PORT 3 EEE Idle Time Register" line.long 0x04 "EEE_TWSYS_TIME_P3,PORT 3 EEE Wake Up Time Register" group.long (0x1400+0x54)++0x03 line.long 0x00 "IDLE_SLOPE_P3,PORT 3 MAC Traffic Shaper Bandwidth Control" hexmask.long.word 0x00 0.--10. 1. " IDLE_SLOPE ,Traffic shaper bandwidth control" rgroup.long (0x1400+0x68)++0x7C line.long 0x00 "AFRAMESTRANSMITTEDOK_P3,PORT 3 MAC Transmitted Valid Frame Count Register" line.long 0x04 "AFRAMESRECEIVEDOK_P3,PORT 3 MAC Received Valid Frame Count Register" line.long 0x08 "AFRAMECHECKSEQUENCEERRORS_P3,PORT 3 MAC FCS Error Frame Count Register" line.long 0x0C "AALIGNMENTERRORS_P3,PORT 3 MAC Alignment Error Frame Count Register" line.long 0x10 "AOCTETSTRANSMITTEDOK_P3,PORT 3 MAC Transmitted Valid Frame Octets Register" line.long 0x14 "AOCTETSRECEIVEDOK_P3,PORT 3 MAC Received Valid Frame Octets Register" line.long 0x18 "ATXPAUSEMACCTRLFRAMES_P3,PORT 3 MAC Transmitted Pause Frame Count Register" line.long 0x1C "ARXPAUSEMACCTRLFRAMES_P3,PORT 3 MAC Received Pause Frame Count Register" line.long 0x20 "IFINERRORS_P3,PORT 3 MAC Input Error Count Register" line.long 0x24 "IFOUTERRORS_P3,PORT 3 MAC Output Error Count Register" line.long 0x28 "IFINUCASTPKTS_P3,PORT 3 MAC Received Unicast Frame Count Register" line.long 0x2C "IFINMULTICASTPKTS_P3,PORT 3 MAC Received Multicast Frame Count Register" line.long 0x30 "IFINBROADCASTPKTS_P3,PORT 3 MAC Received Broadcast Frame Count Register" line.long 0x34 "IFOUTDISCARDS_P3,PORT 3 MAC Discarded Outbound Frame Count Register" line.long 0x38 "IFOUTUCASTPKTS_P3,PORT 3 MAC Transmitted Unicast Frame Count Register" line.long 0x3C "IFOUTMULTICASTPKTS_P3,PORT 3 MAC Transmitted Multicast Frame Count Register" line.long 0x40 "IFOUTBROADCASTPKTS_P3,PORT 3 MAC Transmitted Broadcast Frame Count Register" line.long 0x44 "ETHERSTATSDROPEVENTS_P3,PORT 3 MAC Dropped Frame Count Register" line.long 0x48 "ETHERSTATSOCTETS_P3,PORT 3 MAC All Frame Octets Register" line.long 0x4C "ETHERSTATSPKTS_P3,PORT 3 MAC All Frame Count Register" line.long 0x50 "ETHERSTATSUNDERSIZEPKTS_P3,PORT 3 MAC Too Short Frame Count Register" line.long 0x54 "ETHERSTATSOVERSIZEPKTS_P3,PORT 3 MAC Too Long Frame Count Register" line.long 0x58 "ETHERSTATSPKTS64OCTETS_P3,PORT 3 MAC 64 Octets Frame Count Register" line.long 0x5C "ETHERSTATSPKTS65TO127OCTETS_P3,PORT 3 MAC 65 to 127 Octets Frame Count Register" line.long 0x60 "ETHERSTATSPKTS128TO255OCTETS_P3,PORT 3 MAC 128 to 255 Octets Frame Count Register" line.long 0x64 "ETHERSTATSPKTS256TO511OCTETS_P3,PORT 3 MAC 256 to 511 Octets Frame Count Register" line.long 0x68 "ETHERSTATSPKTS512TO1023OCTETS_P3,PORT 3 MAC 512 to 1023 Octets Frame Count Register" line.long 0x6C "ETHERSTATSPKTS1024TO1518OCTETS_P3,PORT 3 MAC 1024 to 1519 Octets Frame Count Register" line.long 0x70 "ETHERSTATSPKTS1519TOXOCTETS_P3,PORT 3 MAC Over 1519 Octets Frame Count Register" line.long 0x74 "ETHERSTATSJABBERS_P3,PORT 3 MAC Jabbers Frame Count Register" line.long 0x78 "ETHERSTATSFRAGMENTS_P3,PORT 3 MAC Fragment Frame Count Register" rgroup.long (0x1400+0xE8)++0x03 line.long 0x00 "VLANRECEIVEDOK_P3,PORT 3 MAC Received VLAN Tagged Frame Count Register" rgroup.long (0x1400+0xF4)++0x07 line.long 0x00 "VLANTRANSMITTEDOK_P3,PORT 3 MAC Transmitted VLAN Tagged Frame Count Register" line.long 0x04 "FRAMESRETRANSMITTED_P3,PORT 3 MAC Retransmitted Frame Count Register" rgroup.long (0x1400+0x100)++0x03 line.long 0x00 "STATS_HIWORD_P3,PORT 3 MAC Statistics Counter High Word Register" group.long (0x1400+0x104)++0x0B line.long 0x00 "STATS_CTRL_P3,PORT 3 MAC Statistics Control Register" rbitfld.long 0x00 1. " CLEARBUSY ,Clear in progress indication" "Not cleared,Cleared" bitfld.long 0x00 0. " CLEARALL ,Self clearing counter initialize command" "Not cleared,Cleared" line.long 0x04 "STATS_CLEAR_VALUELO_P3,PORT 3 MAC Statistics Clear Value Lower Register" line.long 0x08 "STATS_CLEAR_VALUEHI_P3,PORT 3 MAC Statistics Clear Value Higher Register" rgroup.long (0x1400+0x110)++0x17 line.long 0x00 "ADEFERRED_P3,PORT 3 MAC Deferred Count Register" line.long 0x04 "AMULTIPLECOLLISIONS_P3,PORT 3 MAC Multiple Collision Count Register" line.long 0x08 "ASINGLECOLLISIONS_P3,PORT 3 MAC Single CollinsionsCount Register" line.long 0x0C "ALATECOLLISIONS_P3,PORT 3 MAC Late Collision Count Register" line.long 0x10 "AEXCESSIVECOLLISIONS_P3,PORT 3 MAC Excessive Collision Count Register" line.long 0x14 "ACARRIERSENSEERRORS_P3,PORT 3 MAC Carrier Sense Error Count Register" rgroup.long 0x1800++0x03 line.long 0x00 "REV_P4,PORT 4 MAC Core Revision" group.long (0x1800+0x08)++0x0B line.long 0x00 "COMMAND_CONFIG_P4,Port 4 Command Configuration Register" bitfld.long 0x00 24. " NO_LGTH_CHECK ,Payload length check disable" "No,Yes" bitfld.long 0x00 23. " CNTL_FRM_ENA ,MAC control frame enable" "Disabled,Enabled" bitfld.long 0x00 13. " SW_RESET ,Self clearing reset command bit" "No reset,Reset" bitfld.long 0x00 11. " TX_CRC_APPEND ,Enable CRC append on transmit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HD_ENA ,Enable auto full/half duplex operation" "Disabled,Enabled" rbitfld.long 0x00 9. " TX_ADDR_INS ,Tx address insert" "0,1" bitfld.long 0x00 8. " PAUSE_IGNORE ,Ignore pause frame quanta" "Not ignored,Ignored" rbitfld.long 0x00 7. " PAUSE_FWD ,Terminate/Forward pause frames" "Terminated,Forwarded" textline " " bitfld.long 0x00 6. " CRC_FWD ,Terminate/Forward received CRC" "Terminated,Forwarded" rbitfld.long 0x00 5. " PAD_EN ,Enable frame padding remove on receive" "Disabled,Enabled" rbitfld.long 0x00 4. " PROMIS_EN ,Enable MAC promiscuous operation" "Disabled,Enabled" bitfld.long 0x00 3. " ETH_SPEED ,Ethernet speed" "10/100,Gigabit" textline " " bitfld.long 0x00 1. " RX_ENA ,Enable MAC transmit path" "Disabled,Enabled" bitfld.long 0x00 0. " TX_ENA ,Enable MAC transmit path" "Disabled,Enabled" group.long (0x1800+0x14)++0x07 line.long 0x00 "FRM_LENGTH_P4,PORT 4 Maximum Frame Length Register" hexmask.long.word 0x00 0.--13. 1. " FRM_LENGTH ,Maximum frame length" line.long 0x04 "PAUSE_QUANT_P4,PORT 4 MAC Pause Quanta" hexmask.long.word 0x04 0.--15. 1. " PAUSE_QUANT ,Pause quanta" if (((per.l(ad:0x44050000+0x1800+0x40)&0x04)==0x04)) rgroup.long (0x1800+0x40)++0x03 line.long 0x00 "STATUS_P4,PORT 4 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" bitfld.long 0x00 0.--1. " PHYSPEED ,Currently active PHY interface speed" "10 Mbps,100 Mbps,1 Gigabit,?..." else rgroup.long (0x1800+0x40)++0x03 line.long 0x00 "STATUS_P4,PORT 4 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" endif group.long (0x1800+0x44)++0x03 line.long 0x00 "TX_IPG_LENGTH_P4,PORT 4 Transmit IPG Length Register" bitfld.long 0x00 0.--4. " TX_IPG_LENGTH ,Transmit interpacket gap in octets" ",,,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long (0x1800+0x54)++0x03 line.long 0x00 "IDLE_SLOPE_P4,PORT 4 MAC Traffic Shaper Bandwidth Control" hexmask.long.word 0x00 0.--10. 1. " IDLE_SLOPE ,Traffic shaper bandwidth control" rgroup.long (0x1800+0x68)++0x7C line.long 0x00 "AFRAMESTRANSMITTEDOK_P4,PORT 4 MAC Transmitted Valid Frame Count Register" line.long 0x04 "AFRAMESRECEIVEDOK_P4,PORT 4 MAC Received Valid Frame Count Register" line.long 0x08 "AFRAMECHECKSEQUENCEERRORS_P4,PORT 4 MAC FCS Error Frame Count Register" line.long 0x0C "AALIGNMENTERRORS_P4,PORT 4 MAC Alignment Error Frame Count Register" line.long 0x10 "AOCTETSTRANSMITTEDOK_P4,PORT 4 MAC Transmitted Valid Frame Octets Register" line.long 0x14 "AOCTETSRECEIVEDOK_P4,PORT 4 MAC Received Valid Frame Octets Register" line.long 0x18 "ATXPAUSEMACCTRLFRAMES_P4,PORT 4 MAC Transmitted Pause Frame Count Register" line.long 0x1C "ARXPAUSEMACCTRLFRAMES_P4,PORT 4 MAC Received Pause Frame Count Register" line.long 0x20 "IFINERRORS_P4,PORT 4 MAC Input Error Count Register" line.long 0x24 "IFOUTERRORS_P4,PORT 4 MAC Output Error Count Register" line.long 0x28 "IFINUCASTPKTS_P4,PORT 4 MAC Received Unicast Frame Count Register" line.long 0x2C "IFINMULTICASTPKTS_P4,PORT 4 MAC Received Multicast Frame Count Register" line.long 0x30 "IFINBROADCASTPKTS_P4,PORT 4 MAC Received Broadcast Frame Count Register" line.long 0x34 "IFOUTDISCARDS_P4,PORT 4 MAC Discarded Outbound Frame Count Register" line.long 0x38 "IFOUTUCASTPKTS_P4,PORT 4 MAC Transmitted Unicast Frame Count Register" line.long 0x3C "IFOUTMULTICASTPKTS_P4,PORT 4 MAC Transmitted Multicast Frame Count Register" line.long 0x40 "IFOUTBROADCASTPKTS_P4,PORT 4 MAC Transmitted Broadcast Frame Count Register" line.long 0x44 "ETHERSTATSDROPEVENTS_P4,PORT 4 MAC Dropped Frame Count Register" line.long 0x48 "ETHERSTATSOCTETS_P4,PORT 4 MAC All Frame Octets Register" line.long 0x4C "ETHERSTATSPKTS_P4,PORT 4 MAC All Frame Count Register" line.long 0x50 "ETHERSTATSUNDERSIZEPKTS_P4,PORT 4 MAC Too Short Frame Count Register" line.long 0x54 "ETHERSTATSOVERSIZEPKTS_P4,PORT 4 MAC Too Long Frame Count Register" line.long 0x58 "ETHERSTATSPKTS64OCTETS_P4,PORT 4 MAC 64 Octets Frame Count Register" line.long 0x5C "ETHERSTATSPKTS65TO127OCTETS_P4,PORT 4 MAC 65 to 127 Octets Frame Count Register" line.long 0x60 "ETHERSTATSPKTS128TO255OCTETS_P4,PORT 4 MAC 128 to 255 Octets Frame Count Register" line.long 0x64 "ETHERSTATSPKTS256TO511OCTETS_P4,PORT 4 MAC 256 to 511 Octets Frame Count Register" line.long 0x68 "ETHERSTATSPKTS512TO1023OCTETS_P4,PORT 4 MAC 512 to 1023 Octets Frame Count Register" line.long 0x6C "ETHERSTATSPKTS1024TO1518OCTETS_P4,PORT 4 MAC 1024 to 1519 Octets Frame Count Register" line.long 0x70 "ETHERSTATSPKTS1519TOXOCTETS_P4,PORT 4 MAC Over 1519 Octets Frame Count Register" line.long 0x74 "ETHERSTATSJABBERS_P4,PORT 4 MAC Jabbers Frame Count Register" line.long 0x78 "ETHERSTATSFRAGMENTS_P4,PORT 4 MAC Fragment Frame Count Register" rgroup.long (0x1800+0xE8)++0x03 line.long 0x00 "VLANRECEIVEDOK_P4,PORT 4 MAC Received VLAN Tagged Frame Count Register" rgroup.long (0x1800+0xF4)++0x07 line.long 0x00 "VLANTRANSMITTEDOK_P4,PORT 4 MAC Transmitted VLAN Tagged Frame Count Register" line.long 0x04 "FRAMESRETRANSMITTED_P4,PORT 4 MAC Retransmitted Frame Count Register" rgroup.long (0x1800+0x100)++0x03 line.long 0x00 "STATS_HIWORD_P4,PORT 4 MAC Statistics Counter High Word Register" group.long (0x1800+0x104)++0x0B line.long 0x00 "STATS_CTRL_P4,PORT 4 MAC Statistics Control Register" rbitfld.long 0x00 1. " CLEARBUSY ,Clear in progress indication" "Not cleared,Cleared" bitfld.long 0x00 0. " CLEARALL ,Self clearing counter initialize command" "Not cleared,Cleared" line.long 0x04 "STATS_CLEAR_VALUELO_P4,PORT 4 MAC Statistics Clear Value Lower Register" line.long 0x08 "STATS_CLEAR_VALUEHI_P4,PORT 4 MAC Statistics Clear Value Higher Register" textline " " width 23. group.long 0x3C00++0x03 line.long 0x00 "DLR_CONTROL,DLR Control Register" hexmask.long.word 0x00 8.--19. 1. " US_TIME ,Number of clock cycles required for 1 microsecond for the switch system clock" bitfld.long 0x00 4. " IGNORE_INVTM ,Enable ignore beacon frames with invalid timeout timer" "Disabled,Enabled" bitfld.long 0x00 1. " AUTOFLUSH ,Enable automatic flushing of unicast entries in address table if ring reconfiguration occurs" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENABLE ,Enable DLR extension module" "Disabled,Enabled" rgroup.long 0x3C04++0x07 line.long 0x00 "DLR_STATUS,DLR Status Register" hexmask.long.byte 0x00 24.--31. 1. " TOPOLOGY ,Current network topology" bitfld.long 0x00 17. " LINK_STATUS[1] ,Link status of port 1" "Link down,Link up" bitfld.long 0x00 16. " LINK_STATUS[0] ,Link status of port 0" "Link down,Link up" textline " " hexmask.long.byte 0x00 8.--15. 1. " NODE_STATE ,Local node current state" bitfld.long 0x00 1. " LASTBCNRCVPORT[1] ,Last beacon receive port 1" "Not received,Received" bitfld.long 0x00 0. " LASTBCNRCVPORT[0] ,Last beacon receive port 0" "Not received,Received" line.long 0x04 "DLR_ETH_TYP,DLR Ethernet Type Register" hexmask.long.word 0x04 0.--15. 1. " DLR_ETH_TYP ,Ethernet type for DLR frame detection" group.long 0x3C0C++0x0F line.long 0x00 "DLR_IRQ_CONTROL,DLR Interrupt Control Register" bitfld.long 0x00 31. " ATOMIC_AND ,Atomic AND enable" "Disabled,Enabled" bitfld.long 0x00 30. " ATOMIC_OR ,Atomic OR enable" "Disabled,Enabled" bitfld.long 0x00 29. " LOW_INT_EN ,Enable active low interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " IRQ_FRM_DSCRD1 ,Enable interrupt on frame discard due to source address match with the local address on port 1" "Disabled,Enabled" bitfld.long 0x00 14. " IRQ_FRM_DSCRD0 ,Enable interrupt on frame discard due to source address match with the local address on port 0" "Disabled,Enabled" bitfld.long 0x00 13. " IRQ_BEC_RCV1_ENA ,Enable interrupt on beacon frame detection on port 1" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " IRQ_BEC_RCV0_ENA ,Enable interrupt on beacon frame detection on port 0" "Disabled,Enabled" bitfld.long 0x00 11. " IRQ_INVALID_TMR_ENA ,Enable interrupt on invalid range for beacon timeout timer value detection" "Disabled,Enabled" bitfld.long 0x00 10. " IRQ_IP_ADDR_CHNG_ENA ,Enable interrupt on IP address change detection within beacon frame from ring supervisor" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " IRQ_SUP_IGNORD_ENA ,Enable interrupt on beacon frame detection from a supervisor with lower precedence than the current ring supervisor" "Disabled,Enabled" bitfld.long 0x00 8. " IRQ_LINK_CHNG1_ENA ,Enable link change interrupt event for port 1" "Disabled,Enabled" bitfld.long 0x00 7. " IRQ_LINK_CHNG0_ENA ,Enable link change interrupt event for port 0" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " IRQ_SUPR_CHNG_ENA ,Enable interrupt on ring supervisor change" "Disabled,Enabled" bitfld.long 0x00 5. " IRQ_BEC_TMR1_EXP_ENA ,Enable interrupt on beacon timeout timer expire for port 1" "Disabled,Enabled" bitfld.long 0x00 4. " IRQ_BEC_TMR0_EXP_ENA ,Enable interrupt on beacon timeout timer expire for port 0" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " IRQ_STOP_NBCHK1_ENA ,Enable stop neighbor check timeout timer interrupt for port 1" "Disabled,Enabled" bitfld.long 0x00 2. " IRQ_STOP_NBCHK0_ENA ,Enable stop neighbor check timeout timer interrupt for port 0" "Disabled,Enabled" bitfld.long 0x00 1. " IRQ_FLUSH_MACADDR_ENA ,Enable flush local MAC address table interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " IRQ_STATE_CHNG_ENA ,Enable interrupt for state change" "Disabled,Enabled" line.long 0x04 "DLR_IRQ_STAT_ACK,DLR Interrupt Status/ACK Register" bitfld.long 0x04 15. " FRM_DSCRD1_IRQ_PENDING ,Latched event on frame discard due to source address match with the local address on port 1" "Not occurred,Occurred" bitfld.long 0x04 14. " FRM_DSCRD0_IRQ_PENDING ,Latched event on frame discard due to source address match with the local address on port 0" "Not occurred,Occurred" bitfld.long 0x04 13. " BEC_RCV1_IRQ_PENDING ,Latched event on beacon frame detection on port 1" "Not occurred,Occurred" textline " " bitfld.long 0x04 12. " BEC_RCV0_IRQ_PENDING ,Latched event on beacon frame detection on port 0" "Not occurred,Occurred" bitfld.long 0x04 11. " INVALID_TMR_IRQ_PENDING ,Latched event on invalid beacon timeout timer value detection within beacon frame on port 0 or port 1" "Not occurred,Occurred" bitfld.long 0x04 10. " IP_CHNG_IRQ_PENDING ,Latched IP address change event" "Not occurred,Occurred" textline " " bitfld.long 0x04 9. " SUP_IGNORD_IRQ_PENDING ,Latched event for beacon frame detection from ignored supervisor" "Not occurred,Occurred" bitfld.long 0x04 8. " LINK1_IRQ_PENDING ,Latched link status change event" "Not occurred,Occurred" bitfld.long 0x04 7. " LINK0_IRQ_PENDING ,Latched link status change event" "Not occurred,Occurred" textline " " bitfld.long 0x04 6. " SUPR_CHNG_IRQ_PENDING ,Latched supervisor change event" "Not occurred,Occurred" bitfld.long 0x04 5. " BEC_TMR1_IRQ_PENDING ,Beacon timeout timer expire interrupt for port 1" "Not occurred,Occurred" bitfld.long 0x04 4. " BEC_TMR0_IRQ_PENDING ,Beacon timeout timer expire interrupt for port 0" "Not occurred,Occurred" textline " " bitfld.long 0x04 3. " NBCHK1_IRQ_PENDING ,Stop event for neighbor check timeout timer for port 1" "Not occurred,Occurred" bitfld.long 0x04 2. " NBCHK0_IRQ_PENDING ,Stop event for neighbor check timeout timer for port 0" "Not occurred,Occurred" bitfld.long 0x04 1. " FLUSH_IRQ_PENDING ,Latched flush event for MAC address learning table" "Not occurred,Occurred" textline " " bitfld.long 0x04 0. " STATE_CHNG_IRQ_PENDING ,Latched state change event" "Not occurred,Occurred" line.long 0x08 "DLR_LOC_MACLO,DLR Local MAC Address Low Register" hexmask.long.byte 0x08 24.--31. 0x01 " LOC_MAC[3] ,4th byte of local MAC address" hexmask.long.byte 0x08 16.--23. 0x01 " [2] ,3th byte of local MAC address" hexmask.long.byte 0x08 8.--15. 0x01 " [1] ,2th byte of local MAC address" textline " " hexmask.long.byte 0x08 0.--7. 0x01 " [0] ,1th byte of local MAC address" line.long 0x0C "DLR_LOC_MACHI,DLR Local MAC Address High Register" hexmask.long.byte 0x0C 8.--15. 0x01 " LOC_MAC[1] ,6th byte of local MAC address" hexmask.long.byte 0x0C 0.--7. 0x01 " [0] ,5th byte of local MAC address" rgroup.long 0x3C20++0x23 line.long 0x00 "DLR_SUPR_MACLO,DLR Supervisor MAC Address Low Register" hexmask.long.byte 0x00 24.--31. 0x01 " SUPR_MAC[3] ,4th byte of active ring supervisors MAC address" hexmask.long.byte 0x00 16.--23. 0x01 " [2] ,3th byte of active ring supervisors MAC address" hexmask.long.byte 0x00 8.--15. 0x01 " [1] ,2th byte of active ring supervisors MAC address" textline " " hexmask.long.byte 0x00 0.--7. 0x01 " [0] ,1th byte of active ring supervisors MAC address" line.long 0x04 "DLR_SUPR_MACHI,DLR Supervisor MAC Address High Register" hexmask.long.byte 0x04 16.--23. 1. " PRECE ,Ring supervisors precedence value" hexmask.long.byte 0x04 8.--15. 0x01 " SUPR_MAC[1] ,6th byte of active ring supervisors MAC address" hexmask.long.byte 0x04 0.--7. 0x01 " [0] ,5th byte of active ring supervisors MAC address" line.long 0x08 "DLR_STATE_VLAN,DLR Ring Status/VLAN Register" hexmask.long.word 0x08 16.--31. 1. " VLANTAG ,VLAN Tag control field extracted from the VLAN info field of the beacon frame" bitfld.long 0x08 8. " VLANVALID ,VLAN valid" "Not valid,Valid" hexmask.long.byte 0x08 0.--7. 1. " RINGSTAT ,DLR ring state extracted from the ring state field of the beacon frame" line.long 0x0C "DLR_BEC_TMOUT,DLR Beacon Timeout Register" line.long 0x10 "DLR_BEC_INTRVL,DLR Beacon Interval Register" line.long 0x14 "DLR_SUPR_IPADR,DLR Supervisor IP Address Register" line.long 0x18 "DLR_ETH_STYP_VER,DLR Sub Type/Protocol Version Register" hexmask.long.byte 0x18 16.--23. 1. " SPORT ,Source port extracted from the source port field of the beacon frame" hexmask.long.byte 0x18 8.--15. 1. " PROTVER ,DLR ring protocol version extracted from the ring protocol version field of the beacon frame" hexmask.long.byte 0x18 0.--7. 1. " SUBTYPE ,DLR ring ether sub type extracted from the ring sub type field of the beacon frame" line.long 0x1C "DLR_INV_TMOUT,DLR Beacon Timeout Timer Register" line.long 0x20 "DLR_SEQ_ID,DLR Sequence ID Register CntOutOfSeqLowB" group.long 0x3C58++0x07 line.long 0x00 "DLR_DSTLO,DLR Beacon Destination Address Low Register" hexmask.long.byte 0x00 24.--31. 0x01 " DLR_DST[3] ,4th byte of the beacon frame destination multicast address" hexmask.long.byte 0x00 16.--23. 0x01 " [2] ,3th byte of the beacon frame destination multicast address" hexmask.long.byte 0x00 8.--15. 0x01 " [1] ,2th byte of the beacon frame destination multicast address" textline " " hexmask.long.byte 0x00 0.--7. 0x01 " [0] ,1th byte of the beacon frame destination multicast address" line.long 0x04 "DLR_DSTHI,DLR Beacon Destination Address High Register" hexmask.long.byte 0x04 8.--15. 0x01 " DLR_DST[1] ,6th byte of the beacon frame destination multicast address" hexmask.long.byte 0x04 0.--7. 0x01 " [0] ,5th byte of the beacon frame destination multicast address" rgroup.long 0x3C60++0x0B line.long 0x00 "DLR_RX_STAT0,DLR Received Frame Statistic Register 0" line.long 0x04 "DLR_RX_ERR_STAT0,DLR Received Frame Error Statistic Register 0" line.long 0x08 "DLR_TX_STAT0,DLR Transmitted Frame Statistic Register 0" rgroup.long 0x3C70++0x0B line.long 0x00 "DLR_RX_STAT1,DLR Received Frame Statistic Register 1" line.long 0x04 "DLR_RX_ERR_STAT1,DLR Received Frame Error Statistic Register 1" line.long 0x08 "DLR_TX_STAT1,DLR Transmitted Frame Statistic Register 1" textline " " group.long 0x3D00++0x27 line.long 0x00 "PRP_CONFIG,PRP Configuration Register" bitfld.long 0x00 16. " PRP_AGE_ENA ,Enable history memory aging timer" "Disabled,Enabled" bitfld.long 0x00 8. " TX_RCT_1588 ,Append RCT to IEEE 1588 frames" "Not allowed,Allowed" bitfld.long 0x00 7. " TX_RCT_UNKNOWN ,Append RCT to frames that have unknown destination and are hence flooded" "Not allowed,Allowed" textline " " bitfld.long 0x00 6. " TX_RCT_MULTICAST ,Append RCT to multicast frames" "Not allowed,Allowed" bitfld.long 0x00 5. " TX_RCT_BROADCAST ,Append RCT to broadcast frames" "Not allowed,Allowed" bitfld.long 0x00 3.--4. " TX_RCT_MODE ,Control appending the RCT to transmitted frames on the redundant ports" "Append RCT if group only,Append RCT to group always,Disable RCT append,Append RCT always forced" textline " " bitfld.long 0x00 2. " RX_REMOVE_RCT ,Allow PRP port RX to remove the RCT" "Not allowed,Allowed" bitfld.long 0x00 1. " RX_DUP_ACCEPT ,Enable duplicate accept mode of operation at receive" "Disabled,Enabled" bitfld.long 0x00 0. " PRP_ENA ,Enable PRP operation" "Disabled,Enabled" textline " " line.long 0x04 "PRP_GROUP,PRP Port Group Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 19. " LANB_MASK[3] ,Port 3 LAN B port" "Disabled,Enabled" textline " " endif bitfld.long 0x04 18. " LANB_MASK[2] ,Port 2 LAN B port" "Disabled,Enabled" bitfld.long 0x04 17. " [1] ,Port 1 LAN B port" "Disabled,Enabled" bitfld.long 0x04 16. " [0] ,Port 0 LAN B port" "Disabled,Enabled" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 3. " PRP_GROUP[3] ,Port 3 as redundant port" "Disabled,Enabled" textline " " endif bitfld.long 0x04 2. " PRP_GROUP[2] ,Port 2 as redundant port" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,Port 1 as redundant port" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,Port 0 as redundant port" "Disabled,Enabled" line.long 0x08 "PRP_SUFFIX,PRP RCT Suffix" hexmask.long.word 0x08 0.--15. 1. " PRP_SUFFIX ,The redundancy control trailer suffix" line.long 0x0C "PRP_LANID,PRP LAN Identifier" bitfld.long 0x0C 4.--7. " LANBID ,LAN B identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " LANAID ,LAN A identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "DUP_W,PRP Max Duplicate Detection Window Size" hexmask.long.word 0x10 0.--8. 1. " DUP_W ,Maximum duplicate detect window size" line.long 0x14 "PRP_AGETIME,PRP Aging Time Define Register" hexmask.long.tbyte 0x14 0.--23. 1. " PRP_AGETIME ,Timeout in steps of 32 switch system clock cycles to control aging of duplicate history data" line.long 0x18 "PRP_IRQ_CONTROL,PRP Interrupt Control Register" bitfld.long 0x18 3. " SEQMISSING ,Enable interrupt for frames received and accepted that caused the history to skip a sequence number that was never received" "Disabled,Enabled" bitfld.long 0x18 2. " OUTOFSEQ ,Enable interrupt for frames received and accepted but have an unexpected sequence number" "Disabled,Enabled" bitfld.long 0x18 1. " WRONGLAN ,Enable interrupt for frames received at a redundant port with an invalid LAN identifier in its redundancy trailer" "Disabled,Enabled" textline " " bitfld.long 0x18 0. " MEMTOOLATE ,Enable interrupt for memory error indications" "Disabled,Enabled" line.long 0x1C "PRP_IRQ_STAT_ACK,PRP Interrupt Status/ACK Register" eventfld.long 0x1C 3. " SEQMISSING ,Status of interrupt for frames received and accepted that caused the history to skip a sequence number that was never received" "No interrupt,Interrupt" eventfld.long 0x1C 2. " OUTOFSEQ ,Status of interrupt for frames received and accepted but have an unexpected sequence number" "No interrupt,Interrupt" eventfld.long 0x1C 1. " WRONGLAN ,Status of interrupt for frames received at a redundant port with an invalid LAN identifier in its redundancy trailer" "No interrupt,Interrupt" textline " " eventfld.long 0x1C 0. " MEMTOOLATE ,Status of interrupt for memory error indications" "No interrupt,Interrupt" line.long 0x20 "RM_ADDR_CTRL,PRP History Memory Transactions Control Register" rbitfld.long 0x20 31. " BUSY ,Transaction busy indication" "Not busy,Busy" bitfld.long 0x20 29. " CLEAR ,Write all zero to the entry selected by the given address" "Not cleared,Cleared" bitfld.long 0x20 26. " READ ,Perform single read transaction" "Not performed,Performed" textline " " bitfld.long 0x20 25. " WRITE ,Perform a single write transaction" "Not performed,Performed" bitfld.long 0x20 23. " CLEAR_MEMORY ,Write all memory locations with zero" "Not cleared,Cleared" bitfld.long 0x20 22. " CLEAR_DYNAMIC ,Scan the complete table for valid dynamic history entries and delete them" "Not cleared,Cleared" textline " " hexmask.long.word 0x20 0.--12. 0x01 " ADDRESS ,Memory address for read and write transactions" line.long 0x24 "RM_DATA,PRP Memory Data Register" rgroup.long 0x3D2C++0x03 line.long 0x00 "RM_STATUS,PRP Memory Controller Status Indication" hexmask.long.word 0x00 0.--15. 0x01 " AGEADDRESS ,Address the aging process will inspect when the aging timer expires next time" group.long 0x3D30++0x03 line.long 0x00 "TXSEQTOOLATE,PRP Frame Transmission Retrieval of Failed Sequence" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 4. " TXSEQTOOLATE[4] ,Retrieval of a sequence number failed port 4" "No failure,Failure" bitfld.long 0x00 3. " [3] ,Retrieval of a sequence number failed port 3" "No failure,Failure" textline " " endif bitfld.long 0x00 2. " TXSEQTOOLATE[2] ,Retrieval of a sequence number failed port 2" "No failure,Failure" bitfld.long 0x00 1. " [1] ,Retrieval of a sequence number failed port 1" "No failure,Failure" bitfld.long 0x00 0. " [0] ,Retrieval of a sequence number failed port 0" "No failure,Failure" rgroup.long 0x3D34++0x2B line.long 0x00 "CNTERRWRONGLANA,PRP Wrong ID LAN-A Count Register" line.long 0x04 "CNTERRWRONGLANB,PRP Wrong ID LAN-B Count Register" line.long 0x08 "CNTDUPLANA,PRP Duplicate LAN-A Count Register" line.long 0x0C "CNTDUPLANB,PRP Duplicate LAN-B Count Register" line.long 0x10 "CNTOUTOFSEQLOWA,PRP Sequence Error Low LAN-A Count Register" line.long 0x14 "CNTOUTOFSEQLOWB,PRP Sequence Error Low LAN-B Count Register" line.long 0x18 "CNTOUTOFSEQA,PRP Sequence Error LAN-A Count Register" line.long 0x1C "CNTOUTOFSEQB,PRP Sequence Error LAN-B Count Register" line.long 0x20 "CNTACCEPTA,PRP Valid Frame LAN-A Count Register" line.long 0x24 "CNTACCEPTB,PRP Valid Frame LAN-B Count Register" line.long 0x28 "CNTMISSING,PRP Drop history Adjustment Count" group.long 0x3E00++0x1F line.long 0x00 "HUB_CONFIG,HUB Configuration Register" bitfld.long 0x00 3. " HUB_ISOLATE ,Isolate all hub ports from the other ports of the switch" "Not isolated,Isolated" bitfld.long 0x00 2. " TRIGGER_MODE ,Enable single frame trigger mode" "Disabled,Enabled" bitfld.long 0x00 1. " RETRANSMIT_ENA ,Enable Hub retransmit capability" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HUB_ENA ,Enable integrated HUB operation" "Disabled,Enabled" line.long 0x04 "HUB_GROUP,HUB Port Group Register" sif cpuis("R9A06G034-CM3") bitfld.long 0x04 1. " HUB_GROUP[1] ,Combine port 1 to a hub group" "Not combined,Combined" bitfld.long 0x04 0. " [0] ,Combine port 0 to a hub group" "Not combined,Combined" else bitfld.long 0x04 3. " HUB_GROUP[3] ,Combine port 3 to a hub group" "Not combined,Combined" bitfld.long 0x04 2. " [2] ,Combine port 2 to a hub group" "Not combined,Combined" bitfld.long 0x04 1. " [1] ,Combine port 1 to a hub group" "Not combined,Combined" bitfld.long 0x04 0. " [0] ,Combine port 0 to a hub group" "Not combined,Combined" endif line.long 0x08 "HUB_DEFPORT,HUB Default Port Selection Register" sif cpuis("R9A06G034-CM3") bitfld.long 0x08 0.--3. " HUB_DEFPORT ,Default port within the hub group where all traffic from a port outside the group is forwarded to" ",Port 0,Port 1,?..." else bitfld.long 0x08 0.--3. " HUB_DEFPORT ,Default port within the hub group where all traffic from a port outside the group is forwarded to" ",Port 0,Port 1,,Port 2,,,,Port 3,?..." endif line.long 0x0C "HUB_TRIGGER_IMMEDIATE,HUB Transmission Trigger Immediate Register" sif cpuis("R9A06G034-CM3") bitfld.long 0x0C 0.--3. " HUB_TRIGGER_IMMEDIATE ,Trigger transmission of a single frame from given port within the hub group" ",Port 0,Port 1,?..." else bitfld.long 0x0C 0.--3. " HUB_TRIGGER_IMMEDIATE ,Trigger transmission of a single frame from given port within the hub group" ",Port 0,Port 1,,Port 2,,,,Port 3,?..." endif line.long 0x10 "HUB_TRIGGER_AT,HUB Transmission Trigger At Register" sif cpuis("R9A06G034-CM3") bitfld.long 0x10 0.--3. " HUB_TRIGGER_AT ,Trigger transmission of a single frame at a specific time" ",Port 0,Port 1,?..." else bitfld.long 0x10 0.--3. " HUB_TRIGGER_AT ,Trigger transmission of a single frame at a specific time" ",Port 0,Port 1,,Port 2,,,,Port 3,?..." endif line.long 0x14 "HUB_TTIME,HUB Transmission Time Define Register" textline " " line.long 0x18 "HUB_IRQ_CONTROL,HUB Interrupt Control Register" bitfld.long 0x18 6. " TRIGGER_TIMER_ACK ,Enable interrupt when Hub transmit started after writing the HUB_TRIGGER_AT register and the timeout value has been reached (register HUB_TTIME)" "Disabled,Enabled" bitfld.long 0x18 5. " TRIGGER_IMMEDIATE_ACK ,Enable interrupt when Hub transmit started after writing the HUB_TRIGGER_IMMEDIATE register" "Disabled,Enabled" bitfld.long 0x18 4. " CHANGE_DET ,Enable interrupt for Hub TX state machine port state change request detection" "Disabled,Enabled" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x18 3. " RX_TRIGGER[3] ,Enable interrupt on receive pattern match trigger function port 3" "Disabled,Enabled" bitfld.long 0x18 2. " [2] ,Enable interrupt on receive pattern match trigger function port 2" "Disabled,Enabled" textline " " endif bitfld.long 0x18 1. " RX_TRIGGER[1] ,Enable interrupt on receive pattern match trigger function port 1" "Disabled,Enabled" bitfld.long 0x18 0. " [0] ,Enable interrupt on receive pattern match trigger function port 0" "Disabled,Enabled" line.long 0x1C "HUB_IRQ_STAT_ACK,HUB Interrupt Status/ACK Register" eventfld.long 0x1C 6. " TRIGGER_TIMER_ACK ,Status of interrupt when Hub transmit started after writing the HUB_TRIGGER_AT register and the timeout value has been reached (register HUB_TTIME)" "No interrupt,Interrupt" eventfld.long 0x1C 5. " TRIGGER_IMMEDIATE_ACK ,Status of interrupt when Hub transmit started after writing the HUB_TRIGGER_IMMEDIATE register" "No interrupt,Interrupt" eventfld.long 0x1C 4. " CHANGE_DET ,Status of interrupt for Hub TX state machine port state change request detection" "No interrupt,Interrupt" textline " " sif !cpuis("R9A06G034-CM3") eventfld.long 0x1C 3. " RX_TRIGGER[3] ,Status of interrupt on receive pattern match trigger function port 3" "No interrupt,Interrupt" eventfld.long 0x1C 2. " [2] ,Status of interrupt on receive pattern match trigger function port 2" "No interrupt,Interrupt" textline " " endif eventfld.long 0x1C 1. " RX_TRIGGER[1] ,Status of interrupt on receive pattern match trigger function port 1" "No interrupt,Interrupt" eventfld.long 0x1C 0. " [0] ,Status of interrupt on receive pattern match trigger function port 0" "No interrupt,Interrupt" textline " " rgroup.long 0x3E20++0x07 line.long 0x00 "HUB_STATUS,HUB Status Register" bitfld.long 0x00 12. " TX_CHANGE_PENDING ,Pending change request in the hub transmitter that is unsolved and causes the Hub to stop operation" "Not changed,Changed" bitfld.long 0x00 11. " SPEED_OK ,Port speed of all group ports match" "Not matched,Matched" bitfld.long 0x00 10. " TX_BUSY ,Transmit busy status" "Not busy,Busy" bitfld.long 0x00 9. " TX_ACTIVE ,Hub global transmit state machine hub mode enter" "Not entered,Entered" textline " " sif cpuis("R9A06G034-CM3") bitfld.long 0x00 1. " PORTS_ACTIVE[1] ,Port 1 active" "Not active,Active" bitfld.long 0x00 0. " [0] ,Port 0 active" "Not active,Active" else bitfld.long 0x00 3. " PORTS_ACTIVE[3] ,Port 3 active" "Not active,Active" bitfld.long 0x00 2. " [2] ,Port 2 active" "Not active,Active" bitfld.long 0x00 1. " [1] ,Port 1 active" "Not active,Active" bitfld.long 0x00 0. " [0] ,Port 0 active" "Not active,Active" endif line.long 0x04 "HUB_OPORT_STATUS,HUB Output Port Status Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 3. " HUB_OPORT_STATUS[3] ,Port 3 data available status" "Not available,Available" bitfld.long 0x04 2. " [2] ,Port 2 data available status" "Not available,Available" textline " " endif bitfld.long 0x04 1. " HUB_OPORT_STATUS[1] ,Port 1 data available status" "Not available,Available" bitfld.long 0x04 0. " [0] ,Port 0 data available status" "Not available,Available" textline " " group.long 0x3E80++0x03 line.long 0x00 "RXMATCH_CONFIG0,RX Pattern Match Configuration For PORT 0" bitfld.long 0x00 7. " PATTERN_EN[7] ,Enable pattern 7 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable pattern 6 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable pattern 5 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable pattern 4 on the port (RX)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Enable pattern 3 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable pattern 2 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable pattern 1 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable pattern 0 on the port (RX)" "Disabled,Enabled" group.long 0x3E84++0x03 line.long 0x00 "RXMATCH_CONFIG1,RX Pattern Match Configuration For PORT 1" bitfld.long 0x00 7. " PATTERN_EN[7] ,Enable pattern 7 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable pattern 6 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable pattern 5 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable pattern 4 on the port (RX)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Enable pattern 3 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable pattern 2 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable pattern 1 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable pattern 0 on the port (RX)" "Disabled,Enabled" group.long 0x3E88++0x03 line.long 0x00 "RXMATCH_CONFIG2,RX Pattern Match Configuration For PORT 2" bitfld.long 0x00 7. " PATTERN_EN[7] ,Enable pattern 7 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable pattern 6 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable pattern 5 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable pattern 4 on the port (RX)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Enable pattern 3 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable pattern 2 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable pattern 1 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable pattern 0 on the port (RX)" "Disabled,Enabled" group.long 0x3E8C++0x03 line.long 0x00 "RXMATCH_CONFIG3,RX Pattern Match Configuration For PORT 3" bitfld.long 0x00 7. " PATTERN_EN[7] ,Enable pattern 7 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable pattern 6 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable pattern 5 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable pattern 4 on the port (RX)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Enable pattern 3 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable pattern 2 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable pattern 1 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable pattern 0 on the port (RX)" "Disabled,Enabled" group.long 0x3E90++0x03 line.long 0x00 "RXMATCH_CONFIG4,RX Pattern Match Configuration For PORT 4" bitfld.long 0x00 7. " PATTERN_EN[7] ,Enable pattern 7 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable pattern 6 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable pattern 5 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable pattern 4 on the port (RX)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Enable pattern 3 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable pattern 2 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable pattern 1 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable pattern 0 on the port (RX)" "Disabled,Enabled" textline " " if (((per.l(ad:0x44050000+0x3EB0)&0x08)==0x08)) group.long 0x3EB0++0x03 line.long 0x00 "PATTERN_CTRL0,RX Pattern Match Function Control For Pattern 0" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EB0++0x03 line.long 0x00 "PATTERN_CTRL0,RX Pattern Match Function Control For Pattern 0" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EB4)&0x08)==0x08)) group.long 0x3EB4++0x03 line.long 0x00 "PATTERN_CTRL1,RX Pattern Match Function Control For Pattern 1" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EB4++0x03 line.long 0x00 "PATTERN_CTRL1,RX Pattern Match Function Control For Pattern 1" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EB8)&0x08)==0x08)) group.long 0x3EB8++0x03 line.long 0x00 "PATTERN_CTRL2,RX Pattern Match Function Control For Pattern 2" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EB8++0x03 line.long 0x00 "PATTERN_CTRL2,RX Pattern Match Function Control For Pattern 2" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EBC)&0x08)==0x08)) group.long 0x3EBC++0x03 line.long 0x00 "PATTERN_CTRL3,RX Pattern Match Function Control For Pattern 3" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EBC++0x03 line.long 0x00 "PATTERN_CTRL3,RX Pattern Match Function Control For Pattern 3" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EC0)&0x08)==0x08)) group.long 0x3EC0++0x03 line.long 0x00 "PATTERN_CTRL4,RX Pattern Match Function Control For Pattern 4" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EC0++0x03 line.long 0x00 "PATTERN_CTRL4,RX Pattern Match Function Control For Pattern 4" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EC4)&0x08)==0x08)) group.long 0x3EC4++0x03 line.long 0x00 "PATTERN_CTRL5,RX Pattern Match Function Control For Pattern 5" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EC4++0x03 line.long 0x00 "PATTERN_CTRL5,RX Pattern Match Function Control For Pattern 5" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EC8)&0x08)==0x08)) group.long 0x3EC8++0x03 line.long 0x00 "PATTERN_CTRL6,RX Pattern Match Function Control For Pattern 6" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EC8++0x03 line.long 0x00 "PATTERN_CTRL6,RX Pattern Match Function Control For Pattern 6" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3ECC)&0x08)==0x08)) group.long 0x3ECC++0x03 line.long 0x00 "PATTERN_CTRL7,RX Pattern Match Function Control For Pattern 7" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3ECC++0x03 line.long 0x00 "PATTERN_CTRL7,RX Pattern Match Function Control For Pattern 7" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif textline " " group.long 0x3ED0++0x07 line.long 0x00 "PTN_IRQ_CONTROL,RX Pattern Match Interrupt Control Register" bitfld.long 0x00 7. " MATCHINT[7] ,Enable interrupt on receive pattern 7 match" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable interrupt on receive pattern 6 match" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable interrupt on receive pattern 5 match" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable interrupt on receive pattern 4 match" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Enable interrupt on receive pattern 3 match" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable interrupt on receive pattern 2 match" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable interrupt on receive pattern 1 match" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable interrupt on receive pattern 0 match" "Disabled,Enabled" line.long 0x04 "PTN_IRQ_STAT_ACK,RX Pattern Match Interrupt Status/ACK Register" eventfld.long 0x04 7. " MATCHINT[7] ,Status of interrupt on receive pattern 7 match" "No interrupt,Interrupt" eventfld.long 0x04 6. " [6] ,Status of interrupt on receive pattern 6 match" "No interrupt,Interrupt" eventfld.long 0x04 5. " [5] ,Status of interrupt on receive pattern 5 match" "No interrupt,Interrupt" eventfld.long 0x04 4. " [4] ,Status of interrupt on receive pattern 4 match" "No interrupt,Interrupt" textline " " eventfld.long 0x04 3. " [3] ,Status of interrupt on receive pattern 3 match" "No interrupt,Interrupt" eventfld.long 0x04 2. " [2] ,Status of interrupt on receive pattern 2 match" "No interrupt,Interrupt" eventfld.long 0x04 1. " [1] ,Status of interrupt on receive pattern 1 match" "No interrupt,Interrupt" eventfld.long 0x04 0. " [0] ,Status of interrupt on receive pattern 0 match" "No interrupt,Interrupt" group.long 0x3EDC++0x0F line.long 0x00 "PATTERN_SEL,RX Pattern Number Selection Register" bitfld.long 0x00 0.--2. " PATTERN_SEL ,Pattern number which is selected for read/write through the following registers PTRN_CMP_*, PTRN_MSK_*" "0,1,2,3,4,5,6,7" line.long 0x04 "PTRN_CMP_30,Pattern Compare Value Bytes 3 .. 0" hexmask.long.byte 0x04 24.--31. 1. " PTRN_CMP_30[3] ,Byte 3 of pattern compare value" hexmask.long.byte 0x04 16.--23. 1. " [2] ,Byte 2 of pattern compare value" hexmask.long.byte 0x04 8.--15. 1. " [1] ,Byte 1 of pattern compare value" hexmask.long.byte 0x04 0.--7. 1. " [0] ,Byte 0 of pattern compare value" line.long 0x08 "PTRN_CMP_74,Pattern Compare Value Bytes 7 .. 4" hexmask.long.byte 0x08 24.--31. 1. " PTRN_CMP_74[3] ,Byte 7 of pattern compare value" hexmask.long.byte 0x08 16.--23. 1. " [2] ,Byte 6 of pattern compare value" hexmask.long.byte 0x08 8.--15. 1. " [1] ,Byte 5 of pattern compare value" hexmask.long.byte 0x08 0.--7. 1. " [0] ,Byte 4 of pattern compare value" line.long 0x0C "PTRN_CMP_118,Pattern Compare Value Bytes 11 .. 8" hexmask.long.byte 0x0C 24.--31. 1. " PTRN_CMP_118[3] ,Byte 11 of pattern compare value" hexmask.long.byte 0x0C 16.--23. 1. " [2] ,Byte 10 of pattern compare value" hexmask.long.byte 0x0C 8.--15. 1. " [1] ,Byte 9 of pattern compare value" hexmask.long.byte 0x0C 0.--7. 1. " [0] ,Byte 8 of pattern compare value" textline " " group.long 0x3EF0++0x0B line.long 0x00 "PTRN_MSK_30,Pattern Mask for Bytes 3 .. 0" bitfld.long 0x00 31. "PTRN_MSK_30 ,Pattern mask for byte 3 bit 7" "0,1" bitfld.long 0x00 30. ",Pattern mask for byte 3 bit 6" "0,1" bitfld.long 0x00 29. ",Pattern mask for byte 3 bit 5" "0,1" bitfld.long 0x00 28. ",Pattern mask for byte 3 bit 4" "0,1" bitfld.long 0x00 27. ",Pattern mask for byte 3 bit 3" "0,1" bitfld.long 0x00 26. ",Pattern mask for byte 3 bit 2" "0,1" bitfld.long 0x00 25. ",Pattern mask for byte 3 bit 1" "0,1" bitfld.long 0x00 24. ",Pattern mask for byte 3 bit 0" "0,1" bitfld.long 0x00 23. ",Pattern mask for byte 2 bit 7" "0,1" bitfld.long 0x00 22. ",Pattern mask for byte 2 bit 6" "0,1" bitfld.long 0x00 21. ",Pattern mask for byte 2 bit 5" "0,1" bitfld.long 0x00 20. ",Pattern mask for byte 2 bit 4" "0,1" bitfld.long 0x00 19. ",Pattern mask for byte 2 bit 3" "0,1" bitfld.long 0x00 18. ",Pattern mask for byte 2 bit 2" "0,1" bitfld.long 0x00 17. ",Pattern mask for byte 2 bit 1" "0,1" bitfld.long 0x00 16. ",Pattern mask for byte 2 bit 0" "0,1" bitfld.long 0x00 15. ",Pattern mask for byte 1 bit 7" "0,1" bitfld.long 0x00 14. ",Pattern mask for byte 1 bit 6" "0,1" bitfld.long 0x00 13. ",Pattern mask for byte 1 bit 5" "0,1" bitfld.long 0x00 12. ",Pattern mask for byte 1 bit 4" "0,1" bitfld.long 0x00 11. ",Pattern mask for byte 1 bit 3" "0,1" bitfld.long 0x00 10. ",Pattern mask for byte 1 bit 2" "0,1" bitfld.long 0x00 9. ",Pattern mask for byte 1 bit 1" "0,1" bitfld.long 0x00 8. ",Pattern mask for byte 1 bit 0" "0,1" bitfld.long 0x00 7. ",Pattern mask for byte 0 bit 7" "0,1" bitfld.long 0x00 6. ",Pattern mask for byte 0 bit 6" "0,1" bitfld.long 0x00 5. ",Pattern mask for byte 0 bit 5" "0,1" bitfld.long 0x00 4. ",Pattern mask for byte 0 bit 4" "0,1" bitfld.long 0x00 3. ",Pattern mask for byte 0 bit 3" "0,1" bitfld.long 0x00 2. ",Pattern mask for byte 0 bit 2" "0,1" bitfld.long 0x00 1. ",Pattern mask for byte 0 bit 1" "0,1" bitfld.long 0x00 0. ",Pattern mask for byte 0 bit 0" "0,1" line.long 0x04 "PTRN_MSK_74,Pattern Mask for Bytes 7 .. 4" bitfld.long 0x04 31. "PTRN_MSK_74 ,Pattern mask for byte 7 bit 7" "0,1" bitfld.long 0x04 30. ",Pattern mask for byte 7 bit 6" "0,1" bitfld.long 0x04 29. ",Pattern mask for byte 7 bit 5" "0,1" bitfld.long 0x04 28. ",Pattern mask for byte 7 bit 4" "0,1" bitfld.long 0x04 27. ",Pattern mask for byte 7 bit 3" "0,1" bitfld.long 0x04 26. ",Pattern mask for byte 7 bit 2" "0,1" bitfld.long 0x04 25. ",Pattern mask for byte 7 bit 1" "0,1" bitfld.long 0x04 24. ",Pattern mask for byte 7 bit 0" "0,1" bitfld.long 0x04 23. ",Pattern mask for byte 6 bit 7" "0,1" bitfld.long 0x04 22. ",Pattern mask for byte 6 bit 6" "0,1" bitfld.long 0x04 21. ",Pattern mask for byte 6 bit 5" "0,1" bitfld.long 0x04 20. ",Pattern mask for byte 6 bit 4" "0,1" bitfld.long 0x04 19. ",Pattern mask for byte 6 bit 3" "0,1" bitfld.long 0x04 18. ",Pattern mask for byte 6 bit 2" "0,1" bitfld.long 0x04 17. ",Pattern mask for byte 6 bit 1" "0,1" bitfld.long 0x04 16. ",Pattern mask for byte 6 bit 0" "0,1" bitfld.long 0x04 15. ",Pattern mask for byte 5 bit 7" "0,1" bitfld.long 0x04 14. ",Pattern mask for byte 5 bit 6" "0,1" bitfld.long 0x04 13. ",Pattern mask for byte 5 bit 5" "0,1" bitfld.long 0x04 12. ",Pattern mask for byte 5 bit 4" "0,1" bitfld.long 0x04 11. ",Pattern mask for byte 5 bit 3" "0,1" bitfld.long 0x04 10. ",Pattern mask for byte 5 bit 2" "0,1" bitfld.long 0x04 9. ",Pattern mask for byte 5 bit 1" "0,1" bitfld.long 0x04 8. ",Pattern mask for byte 5 bit 0" "0,1" bitfld.long 0x04 7. ",Pattern mask for byte 4 bit 7" "0,1" bitfld.long 0x04 6. ",Pattern mask for byte 4 bit 6" "0,1" bitfld.long 0x04 5. ",Pattern mask for byte 4 bit 5" "0,1" bitfld.long 0x04 4. ",Pattern mask for byte 4 bit 4" "0,1" bitfld.long 0x04 3. ",Pattern mask for byte 4 bit 3" "0,1" bitfld.long 0x04 2. ",Pattern mask for byte 4 bit 2" "0,1" bitfld.long 0x04 1. ",Pattern mask for byte 4 bit 1" "0,1" bitfld.long 0x04 0. ",Pattern mask for byte 4 bit 0" "0,1" line.long 0x08 "PTRN_MSK_118,Pattern Mask for Bytes 11 .. 8" bitfld.long 0x08 31. "PTRN_MSK_118 ,Pattern mask for byte 11 bit 7" "0,1" bitfld.long 0x08 30. ",Pattern mask for byte 11 bit 6" "0,1" bitfld.long 0x08 29. ",Pattern mask for byte 11 bit 5" "0,1" bitfld.long 0x08 28. ",Pattern mask for byte 11 bit 4" "0,1" bitfld.long 0x08 27. ",Pattern mask for byte 11 bit 3" "0,1" bitfld.long 0x08 26. ",Pattern mask for byte 11 bit 2" "0,1" bitfld.long 0x08 25. ",Pattern mask for byte 11 bit 1" "0,1" bitfld.long 0x08 24. ",Pattern mask for byte 11 bit 0" "0,1" bitfld.long 0x08 23. ",Pattern mask for byte 10 bit 7" "0,1" bitfld.long 0x08 22. ",Pattern mask for byte 10 bit 6" "0,1" bitfld.long 0x08 21. ",Pattern mask for byte 10 bit 5" "0,1" bitfld.long 0x08 20. ",Pattern mask for byte 10 bit 4" "0,1" bitfld.long 0x08 19. ",Pattern mask for byte 10 bit 3" "0,1" bitfld.long 0x08 18. ",Pattern mask for byte 10 bit 2" "0,1" bitfld.long 0x08 17. ",Pattern mask for byte 10 bit 1" "0,1" bitfld.long 0x08 16. ",Pattern mask for byte 10 bit 0" "0,1" bitfld.long 0x08 15. ",Pattern mask for byte 9 bit 7" "0,1" bitfld.long 0x08 14. ",Pattern mask for byte 9 bit 6" "0,1" bitfld.long 0x08 13. ",Pattern mask for byte 9 bit 5" "0,1" bitfld.long 0x08 12. ",Pattern mask for byte 9 bit 4" "0,1" bitfld.long 0x08 11. ",Pattern mask for byte 9 bit 3" "0,1" bitfld.long 0x08 10. ",Pattern mask for byte 9 bit 2" "0,1" bitfld.long 0x08 9. ",Pattern mask for byte 9 bit 1" "0,1" bitfld.long 0x08 8. ",Pattern mask for byte 9 bit 0" "0,1" bitfld.long 0x08 7. ",Pattern mask for byte 8 bit 7" "0,1" bitfld.long 0x08 6. ",Pattern mask for byte 8 bit 6" "0,1" bitfld.long 0x08 5. ",Pattern mask for byte 8 bit 5" "0,1" bitfld.long 0x08 4. ",Pattern mask for byte 8 bit 4" "0,1" bitfld.long 0x08 3. ",Pattern mask for byte 8 bit 3" "0,1" bitfld.long 0x08 2. ",Pattern mask for byte 8 bit 2" "0,1" bitfld.long 0x08 1. ",Pattern mask for byte 8 bit 1" "0,1" bitfld.long 0x08 0. ",Pattern mask for byte 8 bit 0" "0,1" textline " " group.long 0x3F00++0x33 line.long 0x00 "TDMA_CONFIG,TDMA Configuration Register" rbitfld.long 0x00 1. " WAIT_START ,Scheduler is enabled but has not yet reached the time given in register TDMA_START" "Disabled,Enabled" bitfld.long 0x00 0. " TDMA_ENA ,Enable TDMA scheduler" "Disabled,Enabled" line.long 0x04 "TDMA_PORTS,TDMA Scheduling Enable Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 4. " PORT4 ,Port 4 define the ports that should use TDMA scheduling" "Disabled,Enabled" bitfld.long 0x04 3. " PORT3 ,Port 3 define the ports that should use TDMA scheduling" "Disabled,Enabled" textline " " endif bitfld.long 0x04 2. " PORT2 ,Port 2 define the ports that should use TDMA scheduling" "Disabled,Enabled" bitfld.long 0x04 1. " PORT1 ,Port 1 define the ports that should use TDMA scheduling" "Disabled,Enabled" bitfld.long 0x04 0. " PORT0 ,Port 0 define the ports that should use TDMA scheduling" "Disabled,Enabled" line.long 0x08 "TDMA_START,TDMA Start Time Set Register" line.long 0x0C "TDMA_MODULO,TDMA System Timer Modulo" line.long 0x10 "TDMA_CYCLE,TDMA Periodic Cycle Set Register" line.long 0x14 "TDMA_T1,TDMA 1st Time Offset" line.long 0x18 "TDMA_T2,TDMA 2nd Time Offset" line.long 0x1C "TDMA_T3,TDMA 3rd Time Offset" line.long 0x20 "QUEUES_TS,TDMA 1st Slot Transmit Enable" bitfld.long 0x20 3. " QUEUE3 ,Queue 3 allowed for transmit at cycle start (until T1)" "Not allowed,Allowed" bitfld.long 0x20 2. " QUEUE2 ,Queue 2 allowed for transmit at cycle start (until T1)" "Not allowed,Allowed" bitfld.long 0x20 1. " QUEUE1 ,Queue 1 allowed for transmit at cycle start (until T1)" "Not allowed,Allowed" textline " " bitfld.long 0x20 0. " QUEUE0 ,Queue 0 allowed for transmit at cycle start (until T1)" "Not allowed,Allowed" line.long 0x24 "QUEUES_T1,TDMA 2nd Slot Transmit Enable" bitfld.long 0x24 3. " QUEUE3 ,Queue 3 allowed to transmit from time T1 until T2 (2nd slot)" "Not allowed,Allowed" bitfld.long 0x24 2. " QUEUE2 ,Queue 2 allowed to transmit from time T1 until T2 (2nd slot)" "Not allowed,Allowed" bitfld.long 0x24 1. " QUEUE1 ,Queue 1 allowed to transmit from time T1 until T2 (2nd slot)" "Not allowed,Allowed" textline " " bitfld.long 0x24 0. " QUEUE0 ,Queue 0 allowed to transmit from time T1 until T2 (2nd slot)" "Not allowed,Allowed" line.long 0x28 "QUEUES_T2,TDMA 3rd Slot Transmit Enable" bitfld.long 0x28 3. " QUEUE3 ,Queue 3 allowed to transmit from time T2 until T3 (3rd slot)" "Not allowed,Allowed" bitfld.long 0x28 2. " QUEUE2 ,Queue 2 allowed to transmit from time T2 until T3 (3rd slot)" "Not allowed,Allowed" bitfld.long 0x28 1. " QUEUE1 ,Queue 1 allowed to transmit from time T2 until T3 (3rd slot)" "Not allowed,Allowed" textline " " bitfld.long 0x28 0. " QUEUE0 ,Queue 0 allowed to transmit from time T2 until T3 (3rd slot)" "Not allowed,Allowed" line.long 0x2C "QUEUES_T3,TDMA Last Slot Transmit Enable" bitfld.long 0x2C 3. " QUEUE3 ,Queue 3 allowed to transmit from time T3 until end of cycle" "Not allowed,Allowed" bitfld.long 0x2C 2. " QUEUE2 ,Queue 2 allowed to transmit from time T3 until end of cycle" "Not allowed,Allowed" bitfld.long 0x2C 1. " QUEUE1 ,Queue 1 allowed to transmit from time T3 until end of cycle" "Not allowed,Allowed" textline " " bitfld.long 0x2C 0. " QUEUE0 ,Queue 0 allowed to transmit from time T3 until end of cycle" "Not allowed,Allowed" line.long 0x30 "QUEUES_START,TDMA First Cycle Transmit Enable" bitfld.long 0x30 3. " QUEUE3 ,Queue 3 allowed to transmit when the scheduler was enabled until the system timer has reached the first cycle time given in TDMA_START" "Not allowed,Allowed" bitfld.long 0x30 2. " QUEUE2 ,Queue 2 allowed to transmit when the scheduler was enabled until the system timer has reached the first cycle time given in TDMA_START" "Not allowed,Allowed" bitfld.long 0x30 1. " QUEUE1 ,Queue 1 allowed to transmit when the scheduler was enabled until the system timer has reached the first cycle time given in TDMA_START" "Not allowed,Allowed" textline " " bitfld.long 0x30 0. " QUEUE0 ,Queue 0 allowed to transmit when the scheduler was enabled until the system timer has reached the first cycle time given in TDMA_START" "Not allowed,Allowed" rgroup.long 0x3F34++0x03 line.long 0x00 "TIME_LOAD_NEXT,TDMA Calculated Next Loading Time" group.long 0x3F38++0x07 line.long 0x00 "TDMA_IRQ_CONTROL,TDMA Interrupt Control Register" bitfld.long 0x00 3. " T3_EN ,Enable interrupt on TDMA cycle T3 offset reached" "Disabled,Enabled" bitfld.long 0x00 2. " T2_EN ,Enable interrupt on TDMA cycle T2 offset reached" "Disabled,Enabled" bitfld.long 0x00 1. " T1_EN ,Enable interrupt on TDMA cycle T1 offset reached" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CYCLE_EN ,Enable interrupt on TDMA cycle start" "Disabled,Enabled" line.long 0x04 "TDMA_IRQ_STAT_ACK,TDMA Interrupt Status/ACK Register" eventfld.long 0x04 3. " T3_EN ,Status of interrupt on TDMA cycle T3 offset reached" "No interrupt,Interrupt" eventfld.long 0x04 2. " T2_EN ,Status of interrupt on TDMA cycle T2 offset reached" "No interrupt,Interrupt" eventfld.long 0x04 1. " T1_EN ,Status of interrupt on TDMA cycle T1 offset reached" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " CYCLE_EN ,Status of interrupt on TDMA cycle start" "No interrupt,Interrupt" width 0x0B elif cpuis("R9A06G034-CM3") width 20. rgroup.long 0x00++0x03 line.long 0x00 "REVISION,Switch Core Version" group.long 0x04++0x2F line.long 0x00 "SCRATCH,Scratch Register" line.long 0x04 "PORT_ENA,Port Enable Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 20. " RXENA[4] ,Receive enable mask port 4" "Unmasked,Masked" bitfld.long 0x04 19. " [3] ,Receive enable mask port 3" "Unmasked,Masked" textline " " endif bitfld.long 0x04 18. " RXENA[2] ,Receive enable mask port 2" "Unmasked,Masked" bitfld.long 0x04 17. " [1] ,Receive enable mask port 1" "Unmasked,Masked" bitfld.long 0x04 16. " [0] ,Receive enable mask port 0" "Unmasked,Masked" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 4. " TXENA[4] ,Transmit enable mask port 4" "Unmasked,Masked" bitfld.long 0x04 3. " [3] ,Transmit enable mask port 3" "Unmasked,Masked" textline " " endif bitfld.long 0x04 2. " TXENA[2] ,Transmit enable mask port 2" "Unmasked,Masked" bitfld.long 0x04 1. " [1] ,Transmit enable mask port 1" "Unmasked,Masked" bitfld.long 0x04 0. " [0] ,Transmit enable mask port 0" "Unmasked,Masked" line.long 0x08 "UCAST_DEFAULT_MASK,Unicast Default Mask Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x08 4. " UCASTDM[4] ,Default unicast resolution port 4" "0,1" bitfld.long 0x08 3. " [3] ,Default unicast resolution port 3" "0,1" textline " " endif bitfld.long 0x08 2. " UCASTDM[2] ,Default unicast resolution port 2" "0,1" bitfld.long 0x08 1. " [1] ,Default unicast resolution port 1" "0,1" bitfld.long 0x08 0. " [0] ,Default unicast resolution port 0" "0,1" line.long 0x0C "VLAN_VERIFY,Verify VLAN Domain" sif !cpuis("R9A06G034-CM3") bitfld.long 0x0C 20. " VLANDISC[4] ,Discard unknown port 4" "Not discarded,Discarded" bitfld.long 0x0C 19. " [3] ,Discard unknown port 3" "Not discarded,Discarded" textline " " endif bitfld.long 0x0C 18. " VLANDISC[2] ,Discard unknown port 2" "Not discarded,Discarded" bitfld.long 0x0C 17. " [1] ,Discard unknown port 1" "Not discarded,Discarded" bitfld.long 0x0C 16. " [0] ,Discard unknown port 0" "Not discarded,Discarded" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x0C 4. " VLANVERI[4] ,Verify VLAN domain port 4" "Not verified,Verified" bitfld.long 0x0C 3. " [3] ,Verify VLAN domain port 3" "Not verified,Verified" textline " " endif bitfld.long 0x0C 2. " VLANVERI[2] ,Verify VLAN domain port 2" "Not verified,Verified" bitfld.long 0x0C 1. " [1] ,Verify VLAN domain port 1" "Not verified,Verified" bitfld.long 0x0C 0. " [0] ,Verify VLAN domain port 0" "Not verified,Verified" line.long 0x10 "BCAST_DEFAULT_MASK,Broadcast Default Mask Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x10 4. " BCASTDM[4] ,Default broadcast resolution port 4" "0,1" bitfld.long 0x10 3. " [3] ,Default broadcast resolution port 3" "0,1" textline " " endif bitfld.long 0x10 2. " BCASTDM[2] ,Default broadcast resolution port 2" "0,1" bitfld.long 0x10 1. " [1] ,Default broadcast resolution port 1" "0,1" bitfld.long 0x10 0. " [0] ,Default broadcast resolution port 0" "0,1" line.long 0x14 "MCAST_DEFAULT_MASK,Multicast Default Mask Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x14 4. " MCASTDM[4] ,Default multicast resolution port 4" "0,1" bitfld.long 0x14 3. " [3] ,Default multicast resolution port 3" "0,1" textline " " endif bitfld.long 0x14 2. " MCASTDM[2] ,Default multicast resolution port 2" "0,1" bitfld.long 0x14 1. " [1] ,Default multicast resolution port 1" "0,1" bitfld.long 0x14 0. " [0] ,Default multicast resolution port 0" "0,1" line.long 0x18 "INPUT_LEARN_BLOCK,Input Learning Block Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x18 20. " LEARNDIS[4] ,Disable learning port 4" "No,Yes" bitfld.long 0x18 19. " [3] ,Disable learning port 3" "No,Yes" textline " " endif bitfld.long 0x18 18. " LEARNDIS[2] ,Disable learning port 2" "No,Yes" bitfld.long 0x18 17. " [1] ,Disable learning port 1" "No,Yes" bitfld.long 0x18 16. " [0] ,Disable learning port 0" "No,Yes" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x18 4. " BLOCKEN[4] ,Enable blocking port 4" "Disabled,Enabled" bitfld.long 0x18 3. " [3] ,Enable blocking port 3" "Disabled,Enabled" textline " " endif bitfld.long 0x18 2. " BLOCKEN[2] ,Enable blocking port 2" "Disabled,Enabled" bitfld.long 0x18 1. " [1] ,Enable blocking port 1" "Disabled,Enabled" bitfld.long 0x18 0. " [0] ,Enable blocking port 0" "Disabled,Enabled" textline " " line.long 0x1C "MGMT_CONFIG,Management Configuration Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x1C 20. " PORTMASK[4] ,Portmask for transmission of management frames port 4" "Unmasked,Masked" bitfld.long 0x1C 19. " [3] ,Portmask for transmission of management frames port 3" "Unmasked,Masked" textline " " endif bitfld.long 0x1C 18. " PORTMASK[2] ,Portmask for transmission of management frames port 2" "Unmasked,Masked" bitfld.long 0x1C 17. " [1] ,Portmask for transmission of management frames port 1" "Unmasked,Masked" bitfld.long 0x1C 16. " [0] ,Portmask for transmission of management frames port 0" "Unmasked,Masked" textline " " bitfld.long 0x1C 13.--15. " PRIORITY ,Priority to use for transmitted BPDU frames if non zero" "Lowest,1,2,3,4,5,6,Highest" bitfld.long 0x1C 7. " DISCARD ,BPDU frames always discarded" "Not discarded,Discarded" bitfld.long 0x1C 6. " ENABLE ,Bridge protocol frames exclusively forward" "Not forwarded,Forwarded" bitfld.long 0x1C 5. " MESSAGE_TRANSMITTED ,BPDU message transmitted" "Not transmitted,Transmitted" textline " " sif cpuis("R9A06G034-CM3") bitfld.long 0x1C 0.--3. " PORT ,Port number of the port that should act as a management port" "0,1,2,?..." else bitfld.long 0x1C 0.--3. " PORT ,Port number of the port that should act as a management port" "0,1,2,3,4,?..." endif textline " " line.long 0x20 "MODE_CONFIG,Mode Configuration Register" bitfld.long 0x20 31. " STATSRESET ,Reset statistics counters command" "No reset,Reset" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x20 12. " CUT_THROUGH_ENABLE[4] ,Port 4 cut through support enable" "Disabled,Enabled" bitfld.long 0x20 11. " [3] ,Port 3 cut through support enable" "Disabled,Enabled" textline " " endif bitfld.long 0x20 10. " CUT_THROUGH_ENABLE[2] ,Port 2 cut through support enable" "Disabled,Enabled" bitfld.long 0x20 9. " [1] ,Port 1 cut through support enable" "Disabled,Enabled" bitfld.long 0x20 8. " [0] ,Port 0 cut through support enable" "Disabled,Enabled" textline " " line.long 0x24 "VLAN_IN_MODE,VLAN Input Manipulation Mode Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x24 8.--9. " P4VLANINMD ,Port 4 define behavior of VLAN input manipulation function" "Single tagging with passthrough/VID overwrite,Single tagging with replace,Tag always,?..." bitfld.long 0x24 6.--7. " P3VLANINMD ,Port 3 define behavior of VLAN input manipulation function" "Single tagging with passthrough/VID overwrite,Single tagging with replace,Tag always,?..." textline " " endif bitfld.long 0x24 4.--5. " P2VLANINMD ,Port 2 define behavior of VLAN input manipulation function" "Single tagging with passthrough/VID overwrite,Single tagging with replace,Tag always,?..." bitfld.long 0x24 2.--3. " P1VLANINMD ,Port 1 define behavior of VLAN input manipulation function" "Single tagging with passthrough/VID overwrite,Single tagging with replace,Tag always,?..." textline " " bitfld.long 0x24 0.--1. " P0VLANINMD ,Port 0 define behavior of VLAN input manipulation function" "Single tagging with passthrough/VID overwrite,Single tagging with replace,Tag always,?..." line.long 0x28 "VLAN_OUT_MODE,VLAN Output Manipulation Mode Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x28 8.--9. " P4VLANOUTMD ,Port 4 define behavior of VLAN output manipulation function" "No output manipulation,Strip mode,Tag through,VLAN Domain mode/Transparent mode" bitfld.long 0x28 6.--7. " P3VLANOUTMD ,Port 3 define behavior of VLAN output manipulation function" "No output manipulation,Strip mode,Tag through,VLAN Domain mode/Transparent mode" textline " " endif bitfld.long 0x28 4.--5. " P2VLANOUTMD ,Port 2 define behavior of VLAN output manipulation function" "No output manipulation,Strip mode,Tag through,VLAN Domain mode/Transparent mode" bitfld.long 0x28 2.--3. " P1VLANOUTMD ,Port 1 define behavior of VLAN output manipulation function" "No output manipulation,Strip mode,Tag through,VLAN Domain mode/Transparent mode" textline " " bitfld.long 0x28 0.--1. " P0VLANOUTMD ,Port 0 define behavior of VLAN output manipulation function" "No output manipulation,Strip mode,Tag through,VLAN Domain mode/Transparent mode" textline " " line.long 0x2C "VLAN_IN_MODE_ENA,VLAN Input Mode Enable Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x2C 4. " VLANINMDEN[4] ,Enable the input processing according to the VLAN_IN_MODE for a port 4" "Disabled,Enabled" bitfld.long 0x2C 3. " [3] ,Enable the input processing according to the VLAN_IN_MODE for a port 3" "Disabled,Enabled" textline " " endif bitfld.long 0x2C 2. " VLANINMDEN[2] ,Enable the input processing according to the VLAN_IN_MODE for a port 2" "Disabled,Enabled" bitfld.long 0x2C 1. " [1] ,Enable the input processing according to the VLAN_IN_MODE for a port 1" "Disabled,Enabled" bitfld.long 0x2C 0. " [0] ,Enable the input processing according to the VLAN_IN_MODE for a port 0" "Disabled,Enabled" rgroup.long 0x34++0x03 line.long 0x00 "VLAN_TAG_ID,VLAN Tag ID Register" hexmask.long.word 0x00 0.--15. 1. " VLANTAGID ,The VLAN type field value to expect to identify a VLAN tagged frame" group.long 0x38++0x37 line.long 0x00 "BCAST_STORM_LIMIT,Broadcast Storm Protection Register" hexmask.long.word 0x00 16.--31. 1. " BCASTLIMIT ,Number of broadcast frames (-1) that can be accepted on a port during a timeout period" hexmask.long.word 0x00 0.--15. 1. " TMOUT ,Timeout in steps of 65536 switch system clock cycles" line.long 0x04 "MCAST_STORM_LIMIT,Multicast Storm Protection Register" hexmask.long.word 0x04 16.--31. 1. " MCASTLIMIT ,Number of multicast frames (-1) that can be accepted on a port during a timeout period" textline " " line.long 0x08 "MIRROR_CONTROL,Port Mirroring Configuration Register" bitfld.long 0x08 10. " EG_DA_MATCH ,Frames transmitted on an egress port with a destination address matching the value programmed in MIRROR_EDST mirrored" "Not mirrored,Mirrored" bitfld.long 0x08 9. " EG_SA_MATCH ,Frames transmitted on an egress port with a source address matching the value programmed in MIRROR_ESRC mirrored" "Not mirrored,Mirrored" bitfld.long 0x08 8. " ING_DA_MATCH ,Frames transmitted on an ingress port with a destination address matching the value programmed in MIRROR_IDST mirrored" "Not mirrored,Mirrored" bitfld.long 0x08 7. " ING_SA_MATCH ,Frames transmitted on an egress port with a source address matching the value programmed in MIRROR_ISRC mirrored" "Not mirrored,Mirrored" textline " " bitfld.long 0x08 6. " EG_MAP_ENABLE ,Egress map enable" "Disabled,Enabled" bitfld.long 0x08 5. " ING_MAP_ENABLE ,Ingress map enable" "Disabled,Enabled" bitfld.long 0x08 4. " MIRROR_ENABLE ,Mirroring enable" "Disabled,Enabled" textline " " sif cpuis("R9A06G034-CM3") bitfld.long 0x08 0.--3. " MIRROR_PORT ,The port number of the port that should act as the mirror port and receive all mirrored frames" "0,1,2,?..." else bitfld.long 0x08 0.--3. " MIRROR_PORT ,The port number of the port that should act as the mirror port and receive all mirrored frames" "0,1,2,3,4,?..." endif textline " " line.long 0x0C "MIRROR_EG_MAP,Port Mirroring Egress Port Definition" sif !cpuis("R9A06G034-CM3") bitfld.long 0x0C 4. " EMAP[4] ,Port 4 mirroring egress port definitions" "Not mirrored,Mirrored" bitfld.long 0x0C 3. " [3] ,Port 3 mirroring egress port definitions" "Not mirrored,Mirrored" textline " " endif bitfld.long 0x0C 2. " EMAP[2] ,Port 2 mirroring egress port definitions" "Not mirrored,Mirrored" bitfld.long 0x0C 1. " [1] ,Port 1 mirroring egress port definitions" "Not mirrored,Mirrored" bitfld.long 0x0C 0. " [0] ,Port 0 mirroring egress port definitions" "Not mirrored,Mirrored" line.long 0x10 "MIRROR_ING_MAP,Port Mirroring Ingress Port Definition" sif !cpuis("R9A06G034-CM3") bitfld.long 0x10 4. " IMAP[4] ,Port 4 mirroring ingress port definitions" "Not mirrored,Mirrored" bitfld.long 0x10 3. " [3] ,Port 3 mirroring ingress port definitions" "Not mirrored,Mirrored" textline " " endif bitfld.long 0x10 2. " IMAP[2] ,Port 2 mirroring ingress port definitions" "Not mirrored,Mirrored" bitfld.long 0x10 1. " [1] ,Port 1 mirroring ingress port definitions" "Not mirrored,Mirrored" bitfld.long 0x10 0. " [0] ,Port 0 mirroring ingress port definitions" "Not mirrored,Mirrored" line.long 0x14 "MIRROR_ISRC_0,Ingress Source MAC Address For Mirror Filtering 0" line.long 0x18 "MIRROR_ISRC_1,Ingress Source MAC Address For Mirror Filtering 1" hexmask.long.word 0x18 0.--15. 0x01 " ISRC ,Ingress source MAC address for mirror filtering" line.long 0x1C "MIRROR_IDST_0,Ingress Destination MAC Address For Mirror Filtering 0" line.long 0x20 "MIRROR_IDST_1,Ingress Destination MAC Address For Mirror Filtering 1" hexmask.long.word 0x20 0.--15. 0x01 " IDST ,Ingress destination MAC address for mirror filtering" line.long 0x24 "MIRROR_ESRC_0,Egress Source MAC Address For Mirror Filtering 0" line.long 0x28 "MIRROR_ESRC_1,Egress Source MAC Address For Mirror Filtering 1" hexmask.long.word 0x28 0.--15. 0x01 " ESRC ,Egress source MAC address for mirror filtering" line.long 0x2C "MIRROR_EDST_0,Egress Destination MAC Address For Mirror Filtering 0" line.long 0x30 "MIRROR_EDST_1,Egress Destination MAC Address For Mirror Filtering 1" hexmask.long.word 0x30 0.--15. 0x01 " ESRC ,Egress destination MAC address for mirror filtering" line.long 0x34 "MIRROR_CNT,Mirror Filtering Count Value Register" hexmask.long.byte 0x34 0.--7. 1. " CNT ,Count value for mirror filtering" group.long 0x88++0x03 line.long 0x00 "QMGR_ST_MINCELLS,Output Queue Minimum Memory Statistics Register" hexmask.long.word 0x00 0.--10. 1. " M_CELLS_MIN ,Lowest number of free cells reached in memory during operation" textline " " group.long 0x94++0x0B line.long 0x00 "QMGR_RED_MIN4,RED Minimum Threshold Register" hexmask.long.byte 0x00 24.--31. 1. " CFGRED_MINTH4[31:24] ,Random early detection minimum threshold queue 3" hexmask.long.byte 0x00 16.--23. 1. " CFGRED_MINTH4[23:16] ,Random early detection minimum threshold queue 2" hexmask.long.byte 0x00 8.--15. 1. " CFGRED_MINTH4[15:8] ,Random early detection minimum threshold queue 1" hexmask.long.byte 0x00 0.--7. 1. " CFGRED_MINTH4[7:0] ,Random early detection minimum threshold queue 0" line.long 0x04 "QMGR_RED_MAX4,RED Maximum Threshold Register" hexmask.long.byte 0x04 24.--31. 1. " CFGRED_MAXTH4[31:24] ,Random early detection maximum threshold queue 3" hexmask.long.byte 0x04 16.--23. 1. " CFGRED_MAXTH4[23:16] ,Random early detection maximum threshold queue 2" hexmask.long.byte 0x04 8.--15. 1. " CFGRED_MAXTH4[15:8] ,Random early detection maximum threshold queue 1" hexmask.long.byte 0x04 0.--7. 1. " CFGRED_MAXTH4[7:0] ,Random early detection maximum threshold queue 0" line.long 0x08 "QMGR_RED_CONFIG,RED Configuration Register" bitfld.long 0x08 8. " GACTIVITY_EN ,Averaging on global switch activity or on port local activity only" "Local,Global" textline " " bitfld.long 0x08 3. " QUEUE_RED_EN[3] ,Enable random early detection (RED) or taildrop congestion management for a queue 3" "Taildrop,RED" bitfld.long 0x08 2. " [2] ,Enable random early detection (RED) or taildrop congestion management for a queue 2" "Taildrop,RED" bitfld.long 0x08 1. " [1] ,Enable random early detection (RED) or taildrop congestion management for a queue 1" "Taildrop,RED" bitfld.long 0x08 0. " [0] ,Enable random early detection (RED) or taildrop congestion management for a queue 0" "Taildrop,RED" hgroup.long 0xA0++0x03 hide.long 0x00 "IMC_STATUS,Input Memory Controller Status Register" in textline " " rgroup.long 0xA4++0x0B line.long 0x00 "IMC_ERR_FULL,Input Port Memory Full And Truncation Indicator" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " IPC_ERR_TRUNC[4] ,Port 4 memory full while frame receiving, frame truncated" "Not truncated,Truncated" bitfld.long 0x00 19. " [3] ,Port 3 memory full while frame receiving, frame truncated" "Not truncated,Truncated" textline " " endif bitfld.long 0x00 18. " IPC_ERR_TRUNC[2] ,Port 2 memory full while frame receiving, frame truncated" "Not truncated,Truncated" bitfld.long 0x00 17. " [1] ,Port 1 memory full while frame receiving, frame truncated" "Not truncated,Truncated" bitfld.long 0x00 16. " [0] ,Port 0 memory full while frame receiving, frame truncated" "Not truncated,Truncated" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 4. " IPC_ERR_FULL[4] ,Port 4 memory full at start, frame discarded" "Not discarded,Discarded" bitfld.long 0x00 3. " [3] ,Port 3 memory full while frame receiving, frame discarded" "Not discarded,Discarded" textline " " endif bitfld.long 0x00 2. " IPC_ERR_FULL[2] ,Port 2 memory full while frame receiving, frame discarded" "Not discarded,Discarded" bitfld.long 0x00 1. " [1] ,Port 1 memory full while frame receiving, frame discarded" "Not discarded,Discarded" bitfld.long 0x00 0. " [0] ,Port 0 memory full while frame receiving, frame discarded" "Not discarded,Discarded" line.long 0x04 "IMC_ERR_IFACE,Input Port Memory Error Indicator" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 20. " WBUF_OFLOW[4] ,Port 4 overflow in the input write buffer to the memory controller error" "No error,Error" bitfld.long 0x04 19. " [3] ,Port 3 overflow in the input write buffer to the memory controller error" "No error,Error" textline " " endif bitfld.long 0x04 18. " WBUF_OFLOW[2] ,Port 2 overflow in the input write buffer to the memory controller error" "No error,Error" bitfld.long 0x04 17. " [1] ,Port 1 overflow in the input write buffer to the memory controller error" "No error,Error" bitfld.long 0x04 16. " [0] ,Port 0 overflow in the input write buffer to the memory controller error" "No error,Error" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 4. " IPC_ERR_IFACE[4] ,Port 4 frame has been truncated and discarded error" "No error,Error" bitfld.long 0x04 3. " [3] ,Port 3 frame has been truncated and discarded error" "No error,Error" textline " " endif bitfld.long 0x04 2. " IPC_ERR_IFACE[2] ,Port 2 frame has been truncated and discarded error" "No error,Error" bitfld.long 0x04 1. " [1] ,Port 1 frame has been truncated and discarded error" "No error,Error" bitfld.long 0x04 0. " [0] ,Port 0 frame has been truncated and discarded error" "No error,Error" line.long 0x08 "IMC_ERR_QOFLOW,Output Port Queue Overflow Indicator" sif !cpuis("R9A06G034-CM3") bitfld.long 0x08 4. " OP_ERROR[4] ,Port 4 frame could not be stored in an output queue of the port as the queue FIFO overflowed error" "No error,Error" bitfld.long 0x08 3. " [3] ,Port 3 frame could not be stored in an output queue of the port as the queue FIFO overflowed error" "No error,Error" textline " " endif bitfld.long 0x08 2. " OP_ERROR[2] ,Port 2 frame could not be stored in an output queue of the port as the queue FIFO overflowed error" "No error,Error" bitfld.long 0x08 1. " [1] ,Port 1 frame could not be stored in an output queue of the port as the queue FIFO overflowed error" "No error,Error" bitfld.long 0x08 0. " [0] ,Port 0 frame could not be stored in an output queue of the port as the queue FIFO overflowed error" "No error,Error" group.long 0xB0++0x0B line.long 0x00 "IMC_CONFIG,Input Memory Controller Configuration Register" bitfld.long 0x00 0. " WFQ_ENABLE ,Enable weighted fair queuing or strict priority output queue scheduling" "Strict priority,Weighted fair queuing" textline " " if (((per.l(ad:0x44050000+0xC0)&0x8000000)==0x8000000)) group.long 0xC0++0x03 line.long 0x00 "GPARSER0,0th Parser Of 1st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xC0)&0x10000000)==0x10000000)) group.long 0xC0++0x03 line.long 0x00 "GPARSER0,0th Parser Of 1st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xC0)&0x40000000)==0x40000000)) group.long 0xC0++0x03 line.long 0x00 "GPARSER0,0th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xC0++0x03 line.long 0x00 "GPARSER0,0th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xC0+0x10)++0x03 line.long 0x00 "GARITH0,Snoop Configuration For Arithmetic 0th Stage Of 1st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 3 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 2 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 1 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 0 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xC4)&0x8000000)==0x8000000)) group.long 0xC4++0x03 line.long 0x00 "GPARSER1,1th Parser Of 1st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xC4)&0x10000000)==0x10000000)) group.long 0xC4++0x03 line.long 0x00 "GPARSER1,1th Parser Of 1st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xC4)&0x40000000)==0x40000000)) group.long 0xC4++0x03 line.long 0x00 "GPARSER1,1th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xC4++0x03 line.long 0x00 "GPARSER1,1th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xC4+0x10)++0x03 line.long 0x00 "GARITH1,Snoop Configuration For Arithmetic 1th Stage Of 1st Block" bitfld.long 0x00 20.--21. " SNOOPMODE ,Snoop mode" "Disabled,Forwarded to designated,Forwarded normally,Discarded" textline " " bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 12. " SELECT_ARITH0 ,Select arithmetic stage 0 in addition to any of the parser results" "Not selected,Selected" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 3 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 2 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 1 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 0 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xC8)&0x8000000)==0x8000000)) group.long 0xC8++0x03 line.long 0x00 "GPARSER2,2th Parser Of 1st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xC8)&0x10000000)==0x10000000)) group.long 0xC8++0x03 line.long 0x00 "GPARSER2,2th Parser Of 1st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xC8)&0x40000000)==0x40000000)) group.long 0xC8++0x03 line.long 0x00 "GPARSER2,2th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xC8++0x03 line.long 0x00 "GPARSER2,2th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xC8+0x10)++0x03 line.long 0x00 "GARITH2,Snoop Configuration For Arithmetic 2th Stage Of 1st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 13. " SELECT_ARITH1 ,Select arithmetic stage 1 in addition to any of the parser results" "Not selected,Selected" bitfld.long 0x00 12. " SELECT_ARITH0 ,Select arithmetic stage 0 in addition to any of the parser results" "Not selected,Selected" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 3 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 2 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 1 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 0 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xCC)&0x8000000)==0x8000000)) group.long 0xCC++0x03 line.long 0x00 "GPARSER3,3th Parser Of 1st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xCC)&0x10000000)==0x10000000)) group.long 0xCC++0x03 line.long 0x00 "GPARSER3,3th Parser Of 1st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xCC)&0x40000000)==0x40000000)) group.long 0xCC++0x03 line.long 0x00 "GPARSER3,3th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xCC++0x03 line.long 0x00 "GPARSER3,3th Parser Of 1st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xCC+0x10)++0x03 line.long 0x00 "GARITH3,Snoop Configuration For Arithmetic 3th Stage Of 1st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 14. " SELECT_ARITH2 ,Select arithmetic stage 2 in addition to any of the parser results" "Not selected,Selected" bitfld.long 0x00 13. " SELECT_ARITH1 ,Select arithmetic stage 1 in addition to any of the parser results" "Not selected,Selected" textline " " bitfld.long 0x00 12. " SELECT_ARITH0 ,Select arithmetic stage 0 in addition to any of the parser results" "Not selected,Selected" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 3 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 2 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 1 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 0 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xE0)&0x8000000)==0x8000000)) group.long 0xE0++0x03 line.long 0x00 "GPARSER4,4th Parser Of 2st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xE0)&0x10000000)==0x10000000)) group.long 0xE0++0x03 line.long 0x00 "GPARSER4,4th Parser Of 2st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xE0)&0x40000000)==0x40000000)) group.long 0xE0++0x03 line.long 0x00 "GPARSER4,4th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xE0++0x03 line.long 0x00 "GPARSER4,4th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xE0+0x10)++0x03 line.long 0x00 "GARITH4,Snoop Configuration For Arithmetic 4th Stage Of 2st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 7 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 6 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 5 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 4 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xE4)&0x8000000)==0x8000000)) group.long 0xE4++0x03 line.long 0x00 "GPARSER5,5th Parser Of 2st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xE4)&0x10000000)==0x10000000)) group.long 0xE4++0x03 line.long 0x00 "GPARSER5,5th Parser Of 2st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xE4)&0x40000000)==0x40000000)) group.long 0xE4++0x03 line.long 0x00 "GPARSER5,5th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xE4++0x03 line.long 0x00 "GPARSER5,5th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xE4+0x10)++0x03 line.long 0x00 "GARITH5,Snoop Configuration For Arithmetic 5th Stage Of 2st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 7 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 6 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 5 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 4 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xE8)&0x8000000)==0x8000000)) group.long 0xE8++0x03 line.long 0x00 "GPARSER6,6th Parser Of 2st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xE8)&0x10000000)==0x10000000)) group.long 0xE8++0x03 line.long 0x00 "GPARSER6,6th Parser Of 2st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xE8)&0x40000000)==0x40000000)) group.long 0xE8++0x03 line.long 0x00 "GPARSER6,6th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xE8++0x03 line.long 0x00 "GPARSER6,6th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xE8+0x10)++0x03 line.long 0x00 "GARITH6,Snoop Configuration For Arithmetic 6th Stage Of 2st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 7 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 6 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 5 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 4 from a parser inverted" "Not inverted,Inverted" textline " " if (((per.l(ad:0x44050000+0xEC)&0x8000000)==0x8000000)) group.long 0xEC++0x03 line.long 0x00 "GPARSER7,7th Parser Of 2st Block" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" else if (((per.l(ad:0x44050000+0xEC)&0x10000000)==0x10000000)) group.long 0xEC++0x03 line.long 0x00 "GPARSER7,7th Parser Of 2st Block" bitfld.long 0x00 29. " OFFSET_PLUS2 ,Repeat the comparison at offset+2, if the comparison at offset failed" "Not repeated,Repeated" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Least significant bits of a 16 bit compare value" else if (((per.l(ad:0x44050000+0xEC)&0x40000000)==0x40000000)) group.long 0xEC++0x03 line.long 0x00 "GPARSER7,7th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Mask for single byte compares or 2nd compare value" else group.long 0xEC++0x03 line.long 0x00 "GPARSER7,7th Parser Of 2st Block" bitfld.long 0x00 30. " CMP_MASK_OR ,Use the mask byte (7:0) as a 2nd compare value" "Not used,Used" bitfld.long 0x00 28. " COMPARE16 ,Use Mask (7:0) as a value to perform a 16 bit compare" "Not used,Used" bitfld.long 0x00 27. " IPPROTOCOL ,Compare compare value with the protocol field found within the IP header for both IPv4 and IPv6 frames" "Not compared,Compared" bitfld.long 0x00 26. " IPDATA ,Start offset with the first byte following an IP header if an IP frame is processed" "Not started,Started" textline " " bitfld.long 0x00 25. " SKIPVLAN ,Skip optional VLAN tags found in the frame" "Not skipped,Skipped" bitfld.long 0x00 24. " VALID ,Entry is valid" "Not valid,Valid" bitfld.long 0x00 23. " OFFSET_DA ,Start counting offset from the first byte of the MAC destination address" "Not started,Started" hexmask.long.byte 0x00 16.--21. 0x01 " OFFSET ,Offset in bytes where to find the data for comparison within the frame" textline " " hexmask.long.byte 0x00 0.--7. 1. " MASK_VALUE2 ,Data from the frame is ANDed with this mask" endif endif endif textline " " group.long (0xEC+0x10)++0x03 line.long 0x00 "GARITH7,Snoop Configuration For Arithmetic 7th Stage Of 2st Block" bitfld.long 0x00 17. " RESULT_INVERT ,Invert output" "Not inverted,Inverted" bitfld.long 0x00 16. " OPERATION ,Operation" "AND,OR" textline " " bitfld.long 0x00 11. " SELECT_MATCH[3] ,Parser 3 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 9. " [2] ,Parser 2 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 8. " [1] ,Parser 1 result relevant at this stage" "Not relevant,Relevant" bitfld.long 0x00 7. " [0] ,Parser 0 result relevant at this stage" "Not relevant,Relevant" textline " " bitfld.long 0x00 3. " NOT_INPUT[3] ,Match result 7 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 2. " [2] ,Match result 6 from a parser inverted" "Not inverted,Inverted" textline " " bitfld.long 0x00 1. " [1] ,Match result 5 from a parser inverted" "Not inverted,Inverted" bitfld.long 0x00 0. " [0] ,Match result 4 from a parser inverted" "Not inverted,Inverted" textline " " group.long 0x100++0x03 line.long 0x00 "VLAN_PRIORITY0,VLAN Priority Register 0" bitfld.long 0x00 21.--22. " PRIOIN7 ,VLAN priority 7" "Lowest,1,2,Highest" bitfld.long 0x00 18.--19. " PRIOIN6 ,VLAN priority 6" "Lowest,1,2,Highest" bitfld.long 0x00 15.--16. " PRIOIN5 ,VLAN priority 5" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " PRIOIN4 ,VLAN priority 4" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 9.--10. " PRIOIN3 ,VLAN priority 3" "Lowest,1,2,Highest" bitfld.long 0x00 6.--7. " PRIOIN2 ,VLAN priority 2" "Lowest,1,2,Highest" bitfld.long 0x00 3.--4. " PRIOIN1 ,VLAN priority 1" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " PRIOIN0 ,VLAN priority 0" "Lowest,1,2,Highest" group.long (0x100+0x40)++0x03 line.long 0x00 "IP_PRIORITY0,IO Priority Register 0" bitfld.long 0x00 31. " READ ,Read enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " PRIORITY ,Priority information to write into the addressed table entry" "Lowest,1,2,Highest" bitfld.long 0x00 8. " IPV6_SELECT ,IPV6 select" "Not selected,Selected" hexmask.long.byte 0x00 0.--7. 0x01 " ADDRESS ,Address of the priority entry to read or write for a frame received on port 0" group.long (0x100+0x80)++0x03 line.long 0x00 "PRIORITY_CFG0,Priority Configuration Register 0" bitfld.long 0x00 4.--5. " DEFAULT_PRIORITY ,The default priority of a frame received on port 0" "Lowest,1,2,Highest" bitfld.long 0x00 3. " TYPE_EN ,Enable TYPE based priority resolution for frame received on port 0" "Disabled,Enabled" bitfld.long 0x00 2. " MAC_EN ,Enable MAC based priority resolution for frame received on port 0" "Disabled,Enabled" bitfld.long 0x00 1. " IP_EN ,Enable IP priority resolution for frame received on port 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VLAN_EN ,Enable VLAN priority resolution for frame received on port 0" "Disabled,Enabled" group.long 0x104++0x03 line.long 0x00 "VLAN_PRIORITY1,VLAN Priority Register 1" bitfld.long 0x00 21.--22. " PRIOIN7 ,VLAN priority 7" "Lowest,1,2,Highest" bitfld.long 0x00 18.--19. " PRIOIN6 ,VLAN priority 6" "Lowest,1,2,Highest" bitfld.long 0x00 15.--16. " PRIOIN5 ,VLAN priority 5" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " PRIOIN4 ,VLAN priority 4" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 9.--10. " PRIOIN3 ,VLAN priority 3" "Lowest,1,2,Highest" bitfld.long 0x00 6.--7. " PRIOIN2 ,VLAN priority 2" "Lowest,1,2,Highest" bitfld.long 0x00 3.--4. " PRIOIN1 ,VLAN priority 1" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " PRIOIN0 ,VLAN priority 0" "Lowest,1,2,Highest" group.long (0x104+0x40)++0x03 line.long 0x00 "IP_PRIORITY1,IO Priority Register 1" bitfld.long 0x00 31. " READ ,Read enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " PRIORITY ,Priority information to write into the addressed table entry" "Lowest,1,2,Highest" bitfld.long 0x00 8. " IPV6_SELECT ,IPV6 select" "Not selected,Selected" hexmask.long.byte 0x00 0.--7. 0x01 " ADDRESS ,Address of the priority entry to read or write for a frame received on port 1" group.long (0x104+0x80)++0x03 line.long 0x00 "PRIORITY_CFG1,Priority Configuration Register 1" bitfld.long 0x00 4.--5. " DEFAULT_PRIORITY ,The default priority of a frame received on port 1" "Lowest,1,2,Highest" bitfld.long 0x00 3. " TYPE_EN ,Enable TYPE based priority resolution for frame received on port 1" "Disabled,Enabled" bitfld.long 0x00 2. " MAC_EN ,Enable MAC based priority resolution for frame received on port 1" "Disabled,Enabled" bitfld.long 0x00 1. " IP_EN ,Enable IP priority resolution for frame received on port 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VLAN_EN ,Enable VLAN priority resolution for frame received on port 1" "Disabled,Enabled" group.long 0x108++0x03 line.long 0x00 "VLAN_PRIORITY2,VLAN Priority Register 2" bitfld.long 0x00 21.--22. " PRIOIN7 ,VLAN priority 7" "Lowest,1,2,Highest" bitfld.long 0x00 18.--19. " PRIOIN6 ,VLAN priority 6" "Lowest,1,2,Highest" bitfld.long 0x00 15.--16. " PRIOIN5 ,VLAN priority 5" "Lowest,1,2,Highest" bitfld.long 0x00 12.--13. " PRIOIN4 ,VLAN priority 4" "Lowest,1,2,Highest" textline " " bitfld.long 0x00 9.--10. " PRIOIN3 ,VLAN priority 3" "Lowest,1,2,Highest" bitfld.long 0x00 6.--7. " PRIOIN2 ,VLAN priority 2" "Lowest,1,2,Highest" bitfld.long 0x00 3.--4. " PRIOIN1 ,VLAN priority 1" "Lowest,1,2,Highest" bitfld.long 0x00 0.--1. " PRIOIN0 ,VLAN priority 0" "Lowest,1,2,Highest" group.long (0x108+0x40)++0x03 line.long 0x00 "IP_PRIORITY2,IO Priority Register 2" bitfld.long 0x00 31. " READ ,Read enable" "Disabled,Enabled" bitfld.long 0x00 9.--10. " PRIORITY ,Priority information to write into the addressed table entry" "Lowest,1,2,Highest" bitfld.long 0x00 8. " IPV6_SELECT ,IPV6 select" "Not selected,Selected" hexmask.long.byte 0x00 0.--7. 0x01 " ADDRESS ,Address of the priority entry to read or write for a frame received on port 2" group.long (0x108+0x80)++0x03 line.long 0x00 "PRIORITY_CFG2,Priority Configuration Register 2" bitfld.long 0x00 4.--5. " DEFAULT_PRIORITY ,The default priority of a frame received on port 2" "Lowest,1,2,Highest" bitfld.long 0x00 3. " TYPE_EN ,Enable TYPE based priority resolution for frame received on port 2" "Disabled,Enabled" bitfld.long 0x00 2. " MAC_EN ,Enable MAC based priority resolution for frame received on port 2" "Disabled,Enabled" bitfld.long 0x00 1. " IP_EN ,Enable IP priority resolution for frame received on port 2" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VLAN_EN ,Enable VLAN priority resolution for frame received on port 2" "Disabled,Enabled" group.long 0x1B8++0x0F line.long 0x00 "PRIORITY_TYPE1,Priority Type Register 1" bitfld.long 0x00 17.--18. " PRIORITY ,The priority value to use if a match occurs" "Lowest,1,2,Highest" bitfld.long 0x00 16. " VALID ,Register contains valid data" "Not contains,Contains" hexmask.long.word 0x00 0.--15. 1. " TYPEVALUE ,16-bit value compared against the frames type/length field at receive" line.long 0x04 "PRIORITY_TYPE2,Priority Type Register 2" bitfld.long 0x04 17.--18. " PRIORITY ,The priority value to use if a match occurs" "Lowest,1,2,Highest" bitfld.long 0x04 16. " VALID ,Register contains valid data" "Not contains,Contains" hexmask.long.word 0x04 0.--15. 1. " TYPEVALUE ,16-bit value compared against the frames type/length field at receive" line.long 0x08 "MGMT_ADDR0_LO,Lower MAC Address For Bridge Protocol Frame" hexmask.long.byte 0x08 24.--31. 0x01 " BPDU_DST_CUSTOM[3] ,Additional MAC address defining a bridge protocol frame 4th byte" hexmask.long.byte 0x08 16.--23. 0x01 " [2] ,Additional MAC address defining a bridge protocol frame 3rd byte" hexmask.long.byte 0x08 8.--15. 0x01 " [1] ,Additional MAC address defining a bridge protocol frame 2nd byte" hexmask.long.byte 0x08 0.--7. 0x01 " [0] ,Additional MAC address defining a bridge protocol frame 1st byte" line.long 0x0C "MGMT_ADDR0_HI,Higher MAC Address For Bridge Protocol Frame" hexmask.long.byte 0x0C 16.--23. 1. " MASK8BIT ,8 bit mask for comparing the last byte of the MAC address" hexmask.long.byte 0x0C 8.--15. 0x01 " BPDU_DST_CUSTOM[1] ,6th (last) byte" hexmask.long.byte 0x0C 0.--7. 0x01 " BPDU_DST_CUSTOM[0] ,5th byte" textline " " group.long 0x200++0x03 line.long 0x00 "SYSTEM_TAGINFO0,One VLAN ID Field For VLAN Input Manipulation 0" hexmask.long.word 0x00 0.--15. 1. " SYSVLANINFO ,System VLAN Info (prio/cfi/vid) for the port 0" group.long (0x200+0x40)++0x03 line.long 0x00 "AUTH_PORT0,PORT 0 Authentication Control And Configuration" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " GUEST_MASK[4] ,Destination port 4 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 19. " [3] ,Destination port 3 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " GUEST_MASK[2] ,Destination port 2 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Destination port 1 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Destination port 0 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" sif cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,?..." else textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,3,4,?..." endif textline " " bitfld.long 0x00 11. " AUTO_CHANGE_UNAUTHORIZED ,Enable automatic port change to unauthorized" "Disabled,Enabled" bitfld.long 0x00 5. " EAPOL_UNICAST_ENABLE ,Enable unicast enable" "Disabled,Enabled" bitfld.long 0x00 4. " BPDU_ENABLE ,Reception of BPDU frames enable" "Disabled,Enabled" bitfld.long 0x00 3. " GUEST_ENABLE ,Reception of non EAPOL frames enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EAPOL_ENABLE ,Reception of EAPOL frames enable" "Disabled,Enabled" bitfld.long 0x00 1. " CONTROLLED_BOTH ,Port direction mode" "In,Both" bitfld.long 0x00 0. " AUTHORIZED ,Authorized state" "Unauthorized,Authorized" group.long 0x204++0x03 line.long 0x00 "SYSTEM_TAGINFO1,One VLAN ID Field For VLAN Input Manipulation 1" hexmask.long.word 0x00 0.--15. 1. " SYSVLANINFO ,System VLAN Info (prio/cfi/vid) for the port 1" group.long (0x204+0x40)++0x03 line.long 0x00 "AUTH_PORT1,PORT 1 Authentication Control And Configuration" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " GUEST_MASK[4] ,Destination port 4 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 19. " [3] ,Destination port 3 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " GUEST_MASK[2] ,Destination port 2 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Destination port 1 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Destination port 0 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" sif cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,?..." else textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,3,4,?..." endif textline " " bitfld.long 0x00 11. " AUTO_CHANGE_UNAUTHORIZED ,Enable automatic port change to unauthorized" "Disabled,Enabled" bitfld.long 0x00 5. " EAPOL_UNICAST_ENABLE ,Enable unicast enable" "Disabled,Enabled" bitfld.long 0x00 4. " BPDU_ENABLE ,Reception of BPDU frames enable" "Disabled,Enabled" bitfld.long 0x00 3. " GUEST_ENABLE ,Reception of non EAPOL frames enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EAPOL_ENABLE ,Reception of EAPOL frames enable" "Disabled,Enabled" bitfld.long 0x00 1. " CONTROLLED_BOTH ,Port direction mode" "In,Both" bitfld.long 0x00 0. " AUTHORIZED ,Authorized state" "Unauthorized,Authorized" group.long 0x208++0x03 line.long 0x00 "SYSTEM_TAGINFO2,One VLAN ID Field For VLAN Input Manipulation 2" hexmask.long.word 0x00 0.--15. 1. " SYSVLANINFO ,System VLAN Info (prio/cfi/vid) for the port 2" group.long (0x208+0x40)++0x03 line.long 0x00 "AUTH_PORT2,PORT 2 Authentication Control And Configuration" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " GUEST_MASK[4] ,Destination port 4 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 19. " [3] ,Destination port 3 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " GUEST_MASK[2] ,Destination port 2 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Destination port 1 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Destination port 0 mask with all ports that are allowed to receive non EAPOL frames from this port while it is unauthorized and guest is enabled" "Disabled,Enabled" sif cpuis("R9A06G034-CM3") textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,?..." else textline " " bitfld.long 0x00 12.--15. " EAPOL_PORT_NUMBER ,4 bit port number where to send EAPOL frames to" "0,1,2,3,4,?..." endif textline " " bitfld.long 0x00 11. " AUTO_CHANGE_UNAUTHORIZED ,Enable automatic port change to unauthorized" "Disabled,Enabled" bitfld.long 0x00 5. " EAPOL_UNICAST_ENABLE ,Enable unicast enable" "Disabled,Enabled" bitfld.long 0x00 4. " BPDU_ENABLE ,Reception of BPDU frames enable" "Disabled,Enabled" bitfld.long 0x00 3. " GUEST_ENABLE ,Reception of non EAPOL frames enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EAPOL_ENABLE ,Reception of EAPOL frames enable" "Disabled,Enabled" bitfld.long 0x00 1. " CONTROLLED_BOTH ,Port direction mode" "In,Both" bitfld.long 0x00 0. " AUTHORIZED ,Authorized state" "Unauthorized,Authorized" textline " " group.long 0x280++0x03 line.long 0x00 "VLAN_RES_TABLE0,0 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x284++0x03 line.long 0x00 "VLAN_RES_TABLE1,1 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x288++0x03 line.long 0x00 "VLAN_RES_TABLE2,2 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x28C++0x03 line.long 0x00 "VLAN_RES_TABLE3,3 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x290++0x03 line.long 0x00 "VLAN_RES_TABLE4,4 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x294++0x03 line.long 0x00 "VLAN_RES_TABLE5,5 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x298++0x03 line.long 0x00 "VLAN_RES_TABLE6,6 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x29C++0x03 line.long 0x00 "VLAN_RES_TABLE7,7 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2A0++0x03 line.long 0x00 "VLAN_RES_TABLE8,8 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2A4++0x03 line.long 0x00 "VLAN_RES_TABLE9,9 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2A8++0x03 line.long 0x00 "VLAN_RES_TABLE10,10 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2AC++0x03 line.long 0x00 "VLAN_RES_TABLE11,11 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2B0++0x03 line.long 0x00 "VLAN_RES_TABLE12,12 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2B4++0x03 line.long 0x00 "VLAN_RES_TABLE13,13 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2B8++0x03 line.long 0x00 "VLAN_RES_TABLE14,14 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2BC++0x03 line.long 0x00 "VLAN_RES_TABLE15,15 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2C0++0x03 line.long 0x00 "VLAN_RES_TABLE16,16 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2C4++0x03 line.long 0x00 "VLAN_RES_TABLE17,17 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2C8++0x03 line.long 0x00 "VLAN_RES_TABLE18,18 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2CC++0x03 line.long 0x00 "VLAN_RES_TABLE19,19 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2D0++0x03 line.long 0x00 "VLAN_RES_TABLE20,20 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2D4++0x03 line.long 0x00 "VLAN_RES_TABLE21,21 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2D8++0x03 line.long 0x00 "VLAN_RES_TABLE22,22 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2DC++0x03 line.long 0x00 "VLAN_RES_TABLE23,23 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2E0++0x03 line.long 0x00 "VLAN_RES_TABLE24,24 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2E4++0x03 line.long 0x00 "VLAN_RES_TABLE25,25 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2E8++0x03 line.long 0x00 "VLAN_RES_TABLE26,26 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2EC++0x03 line.long 0x00 "VLAN_RES_TABLE27,27 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2F0++0x03 line.long 0x00 "VLAN_RES_TABLE28,28 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2F4++0x03 line.long 0x00 "VLAN_RES_TABLE29,29 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2F8++0x03 line.long 0x00 "VLAN_RES_TABLE30,30 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x2FC++0x03 line.long 0x00 "VLAN_RES_TABLE31,31 VLAN Domain Entries" bitfld.long 0x00 30. " WRITE_PORTMASK ,Write portmask" "Not written,Written" bitfld.long 0x00 29. " WRITE_TAGMASK ,Write tagmask" "Not written,Written" bitfld.long 0x00 28. " READ_TAGMASK ,Read tagmask" "No read,Read" hexmask.long.word 0x00 5.--16. 1. " VLANID ,12 bit VLAN identifier of the entry" textline " " bitfld.long 0x00 0.--4. " PORTMASK ,Portmask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " rgroup.long 0x300++0x0F line.long 0x00 "TOTAL_DISC,Discarded Frame Total Number Register" line.long 0x04 "TOTAL_BYT_DISC,Discarded Frame Total Bytes Register" line.long 0x08 "TOTAL_FRM,Processed Frame Total Number Register" line.long 0x0C "TOTAL_BYT_FRM,Processed Frame Total Bytes Register" rgroup.long 0x310++0x0F line.long 0x00 "ODISC0,PORT 0 Discarded Outgoing Frame Count Register" line.long 0x04 "IDISC_VLAN0,PORT 0 Discarded Incoming VLAN Tagged Frame Count Register" line.long 0x08 "IDISC_UNTAGGED0,PORT 0 Discarded Incoming VLAN Untagged Frame Count Register" line.long 0x0C "IDISC_BLOCKED0,PORT 0 Discarded Incoming Blocked Frame Count Register" rgroup.long (0x310+0xB0)++0x03 line.long 0x00 "IMC_QLEVEL_P0,PORT 0 Queued Frame Count Register" bitfld.long 0x00 12.--15. " QUEUE3 ,A 4 bit value per queue indicating number of frames stored in the queue3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " QUEUE2 ,A 4 bit value per queue indicating number of frames stored in the queue2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " QUEUE1 ,A 4 bit value per queue indicating number of frames stored in the queue1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " QUEUE0 ,A 4 bit value per queue indicating number of frames stored in the queue0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x320++0x0F line.long 0x00 "ODISC1,PORT 1 Discarded Outgoing Frame Count Register" line.long 0x04 "IDISC_VLAN1,PORT 1 Discarded Incoming VLAN Tagged Frame Count Register" line.long 0x08 "IDISC_UNTAGGED1,PORT 1 Discarded Incoming VLAN Untagged Frame Count Register" line.long 0x0C "IDISC_BLOCKED1,PORT 1 Discarded Incoming Blocked Frame Count Register" rgroup.long (0x320+0xB0)++0x03 line.long 0x00 "IMC_QLEVEL_P1,PORT 1 Queued Frame Count Register" bitfld.long 0x00 12.--15. " QUEUE3 ,A 4 bit value per queue indicating number of frames stored in the queue3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " QUEUE2 ,A 4 bit value per queue indicating number of frames stored in the queue2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " QUEUE1 ,A 4 bit value per queue indicating number of frames stored in the queue1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " QUEUE0 ,A 4 bit value per queue indicating number of frames stored in the queue0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x330++0x0F line.long 0x00 "ODISC2,PORT 2 Discarded Outgoing Frame Count Register" line.long 0x04 "IDISC_VLAN2,PORT 2 Discarded Incoming VLAN Tagged Frame Count Register" line.long 0x08 "IDISC_UNTAGGED2,PORT 2 Discarded Incoming VLAN Untagged Frame Count Register" line.long 0x0C "IDISC_BLOCKED2,PORT 2 Discarded Incoming Blocked Frame Count Register" rgroup.long (0x330+0xB0)++0x03 line.long 0x00 "IMC_QLEVEL_P2,PORT 2 Queued Frame Count Register" bitfld.long 0x00 12.--15. " QUEUE3 ,A 4 bit value per queue indicating number of frames stored in the queue3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " QUEUE2 ,A 4 bit value per queue indicating number of frames stored in the queue2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " QUEUE1 ,A 4 bit value per queue indicating number of frames stored in the queue1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " QUEUE0 ,A 4 bit value per queue indicating number of frames stored in the queue0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " group.long 0x400++0x13 line.long 0x00 "LK_CTRL,Learning/Lookup Function Global Configuration Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " DISCARD_UNKNOWN_SOURCE[4] ,Discard if source address not found port 4" "Disabled,Enabled" bitfld.long 0x00 19. " [3] ,Discard if source address not found port 3" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " DISCARD_UNKNOWN_SOURCE[2] ,Discard if source address not found port 2" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Discard if source address not found port 1" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Discard if source address not found port 0" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CLEAR_TABLE ,Write all table entries with 0" "Not cleared,Cleared" bitfld.long 0x00 4. " DISCARD_UNKNOWN_DESTINATION ,Discard frame on destination address not found status" "Disabled,Enabled" bitfld.long 0x00 3. " ALLOW_MIGRATION ,Allow migration of dynamic entries" "Not allowed,Allowed" bitfld.long 0x00 2. " ENABLE_AGING ,Aging process enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ENABLE_LEARNING ,Enable frame source address auto add by hardware" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLE_LOOKUP ,Enable lookup controller" "Disabled,Enabled" line.long 0x04 "LK_STATUS,Status Bits And Table Overflow Counter" bitfld.long 0x04 31. " LEARNEVENT ,New source address was detected" "Not detected,Detected" hexmask.long.word 0x04 16.--29. 1. " OVERFLOWS ,Number of table overflows that occurred" hexmask.long.word 0x04 0.--15. 0x01 " AGEADDRESS ,Address the aging process will inspect when the aging timer expires next time" line.long 0x08 "LK_ADDR_CTRL,Address Table Transaction Control And Read/Write Address" bitfld.long 0x08 31. " BUSY ,Transaction busy indication" "Not busy,Busy" bitfld.long 0x08 30. " DELETE_PORT ,Delete port" "Not deleted,Deleted" bitfld.long 0x08 29. " CLEAR ,Write all zero to the entry selected by the given address" "Not cleared,Cleared" bitfld.long 0x08 28. " LOOKUP ,Lookup of the MAC address given in LK_DATA_LO/HI" "No lookup,Lookup" textline " " bitfld.long 0x08 27. " WAIT_COMPLETE ,Stall the processor bus until the transaction is completed" "Not stalled,Stalled" bitfld.long 0x08 26. " READ ,Perform single read transaction" "Not performed,Performed" bitfld.long 0x08 25. " WRITE ,Perform a single write transaction" "Not performed,Performed" bitfld.long 0x08 24. " GETLASTNEW ,Retrieve last source address that was not found in the table" "Not retrieved,Retrieved" textline " " bitfld.long 0x08 23. " CLEAR_STATIC ,Clear valid static entries" "Not cleared,Cleared" bitfld.long 0x08 22. " CLEAR_DYNAMIC ,Clear valid dynamic entries" "Not cleared,Cleared" hexmask.long.word 0x08 0.--12. 0x01 " ADDRESS_MASK ,Memory address for read and write transactions" line.long 0x0C "LK_DATA_LO,Lower 32-Bit Data Of Lookup Memory Entry" line.long 0x10 "LK_DATA_HI,Higher 26-Bit Data Of Lookup Memory Entry" hexmask.long 0x10 0.--25. 1. " MEMDATA ,Memory data" textline " " group.long 0x418++0x07 line.long 0x00 "LK_LEARNCOUNT,Learned Address Count Register" bitfld.long 0x00 30.--31. " WRITE_MODE ,LEARNCOUNT write mode" "Given value,Inc by 1,Dec by 1,?..." hexmask.long.word 0x00 0.--13. 1. " LEARNCOUNT ,Number of learned addresses" line.long 0x04 "LK_AGETIME,Period Of The Aging Timer" hexmask.long.tbyte 0x04 0.--23. 1. " LK_AGETIME ,24 bit timer value" textline " " group.long 0x480++0x03 line.long 0x00 "MGMT_TAG_CONFIG,Management Tag Configuration Register" hexmask.long.word 0x00 16.--31. 1. " TAGFIELD ,Value of the tag that is found in the first type/length field of the frame" bitfld.long 0x00 5. " ENABLE_TYPE2 ,Frames with a type field that match the value in register PRIORITY_TYPE2[15:0] will get the control tag is inserted" "Disabled,Enabled" bitfld.long 0x00 4. " ENABLE_TYPE1 ,Frames with a type field that match the value in register PRIORITY_TYPE1[15:0] will get the control tag is inserted" "Disabled,Enabled" bitfld.long 0x00 1. " ALL_FRAMES ,Enable tag insertion for all frames" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENABLE ,Enable management port tag insertion module" "Disabled,Enabled" group.long 0x50C++0x03 line.long 0x00 "PEERDELAY0,Peer Delay Value For Port 0" hexmask.long 0x00 0.--29. 1. " PEERDELAY0 ,Peer delay value determined at the port" group.long 0x510++0x03 line.long 0x00 "PEERDELAY1,Peer Delay Value For Port 1" hexmask.long 0x00 0.--29. 1. " PEERDELAY1 ,Peer delay value determined at the port" group.long 0x514++0x03 line.long 0x00 "PEERDELAY2,Peer Delay Value For Port 2" hexmask.long 0x00 0.--29. 1. " PEERDELAY2 ,Peer delay value determined at the port" group.long 0x518++0x03 line.long 0x00 "PEERDELAY3,Peer Delay Value For Port 3" hexmask.long 0x00 0.--29. 1. " PEERDELAY3 ,Peer delay value determined at the port" group.long 0x520++0x03 line.long 0x00 "PORT0_CTRL,PORT 0 Timestamp Control/Status" bitfld.long 0x00 2. " TS_KEEP ,Keep last timestamp in the receive timestamp registers" "Not kept,Kept" bitfld.long 0x00 1. " TS_OVR ,A newer timestamp has overwritten the last stored timestamp" "Not overwritten,Overwritten" bitfld.long 0x00 0. " TS_VALID ,A valid timestamp is available" "Not available,Available" rgroup.long (0x520+0x04)++0x03 line.long 0x00 "PORT0_TIME,PORT 0 Memorized Transmit Timestamp" group.long 0x528++0x03 line.long 0x00 "PORT1_CTRL,PORT 1 Timestamp Control/Status" bitfld.long 0x00 2. " TS_KEEP ,Keep last timestamp in the receive timestamp registers" "Not kept,Kept" bitfld.long 0x00 1. " TS_OVR ,A newer timestamp has overwritten the last stored timestamp" "Not overwritten,Overwritten" bitfld.long 0x00 0. " TS_VALID ,A valid timestamp is available" "Not available,Available" rgroup.long (0x528+0x04)++0x03 line.long 0x00 "PORT1_TIME,PORT 1 Memorized Transmit Timestamp" group.long 0x530++0x03 line.long 0x00 "PORT2_CTRL,PORT 2 Timestamp Control/Status" bitfld.long 0x00 2. " TS_KEEP ,Keep last timestamp in the receive timestamp registers" "Not kept,Kept" bitfld.long 0x00 1. " TS_OVR ,A newer timestamp has overwritten the last stored timestamp" "Not overwritten,Overwritten" bitfld.long 0x00 0. " TS_VALID ,A valid timestamp is available" "Not available,Available" rgroup.long (0x530+0x04)++0x03 line.long 0x00 "PORT2_TIME,PORT 2 Memorized Transmit Timestamp" group.long 0x538++0x03 line.long 0x00 "PORT3_CTRL,PORT 3 Timestamp Control/Status" bitfld.long 0x00 2. " TS_KEEP ,Keep last timestamp in the receive timestamp registers" "Not kept,Kept" bitfld.long 0x00 1. " TS_OVR ,A newer timestamp has overwritten the last stored timestamp" "Not overwritten,Overwritten" bitfld.long 0x00 0. " TS_VALID ,A valid timestamp is available" "Not available,Available" rgroup.long (0x538+0x04)++0x03 line.long 0x00 "PORT3_TIME,PORT 3 Memorized Transmit Timestamp" textline " " group.long 0x600++0x07 line.long 0x00 "INT_CONFIG,Interrupt Enable Configuration Register" bitfld.long 0x00 31. " PATTERN_INT ,RX pattern matcher modules interrupt output wired with host interrupt pin enable" "Disabled,Enabled" bitfld.long 0x00 30. " TDMA_INT ,TDMA scheduler interrupt wired with host interrupt pin enable" "Disabled,Enabled" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 27. " IRQ_MAC_EEE[3] ,Line port 3 MAC interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 26. " IRQ_MAC_EEE[2] ,Line port 2 MAC interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " [1] ,Line port 1 MAC interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " [0] ,Line port 0 MAC interrupt enable" "Disabled,Enabled" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 19. " IRQ_TSM_TX[3] ,Line port 3 transmit timestamp capture interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 18. " IRQ_TSM_TX[2] ,Line port 2 transmit timestamp capture interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " [1] ,Line port 1 transmit timestamp capture interrupt enable" "Disabled,Enabled" bitfld.long 0x00 16. " [0] ,Line port 0 transmit timestamp capture interrupt enable" "Disabled,Enabled" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 11. " IRQ_LINK[3] ,Line port 3 phy link change interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 10. " IRQ_LINK[2] ,Line port 2 phy link change interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " [1] ,Line port 1 phy link change interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " [0] ,Line port 0 phy link change interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HUB_INT ,Hub modules interrupt output wired with host interrupt pin enable" "Disabled,Enabled" bitfld.long 0x00 6. " PRP_INT ,PRP modules interrupt output wired with host interrupt pin enable" "Disabled,Enabled" bitfld.long 0x00 5. " DLR_INT ,DLR modules interrupt output wired with host interrupt pin enable" "Disabled,Enabled" bitfld.long 0x00 4. " IRQ_TEST ,Interrupt trigger enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " LK_NEW_SRC ,Enable interrupt for new source address" "Disabled,Enabled" bitfld.long 0x00 1. " MDIO1 ,Enable interrupt on transaction complete from first MDIO controller" "Disabled,Enabled" bitfld.long 0x00 0. " IRQ_EN ,Interrupt global enable" "Disabled,Enabled" line.long 0x04 "INT_STAT_ACK,Interrupt Status/ACK Register" rbitfld.long 0x04 31. " PATTERN_INT ,Interrupt pending status from RX pattern matcher module" "No interrupt,Interrupt" rbitfld.long 0x04 30. " TDMA_INT ,Interrupt pending status from TDMA scheduler" "No interrupt,Interrupt" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 27. " IRQ_MAC_EEE[3] ,Line port 3 MAC interrupt status" "No interrupt,Interrupt" textline " " endif bitfld.long 0x04 26. " IRQ_MAC_EEE[2] ,Line port 2 MAC interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 25. " [1] ,Line port 1 MAC interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 24. " [0] ,Line port 0 MAC interrupt status" "No interrupt,Interrupt" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 19. " IRQ_TSM_TX[3] ,Line port 3 transmit timestamp capture interrupt status" "No interrupt,Interrupt" textline " " endif bitfld.long 0x04 18. " IRQ_TSM_TX[2] ,Line port 2 transmit timestamp capture interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 17. " [1] ,Line port 1 transmit timestamp capture interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 16. " [0] ,Line port 0 transmit timestamp capture interrupt status" "No interrupt,Interrupt" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 11. " IRQ_LINK[3] ,Line port 3 phy link change interrupt status" "No interrupt,Interrupt" textline " " endif bitfld.long 0x04 10. " IRQ_LINK[2] ,Line port 2 phy link change interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 9. " [1] ,Line port 1 phy link change interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 8. " [0] ,Line port 0 phy link change interrupt status" "No interrupt,Interrupt" textline " " rbitfld.long 0x04 7. " HUB_INT ,Interrupt pending status from hub module" "No interrupt,Interrupt" rbitfld.long 0x04 6. " PRP_INT ,Interrupt pending status from PRP module" "No interrupt,Interrupt" rbitfld.long 0x04 5. " DLR_INT ,Interrupt pending status from DLR module" "No interrupt,Interrupt" rbitfld.long 0x04 4. " IRQ_TEST ,Interrupt status for IRQ_TEST" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " LK_NEW_SRC ,Latched interrupt status for LK_NEW_SRC" "No interrupt,Interrupt" bitfld.long 0x04 1. " MDIO1 ,Latched interrupt status for MDIO1" "No interrupt,Interrupt" rbitfld.long 0x04 0. " IRQ_PEND ,Interrupt pending status" "Disabled,Enabled" textline " " group.long 0x700++0x0B line.long 0x00 "MDIO_CFG_STATUS,MDIO Configuration And Status Register" hexmask.long.word 0x00 7.--15. 1. " CLKDIV ,MDIO clock divisor" bitfld.long 0x00 5. " DISPREAM ,Disable preamble" "No,Yes" bitfld.long 0x00 2.--4. " HOLD ,MDIO hold time setting" "1 AHB,3 AHB,5 AHB,7 AHB,9 AHB,11 AHB,13 AHB,15 AHB" rbitfld.long 0x00 1. " READERR ,MDIO read error" "No error,Error" textline " " rbitfld.long 0x00 0. " BUSY ,MDIO busy" "Not busy,Busy" line.long 0x04 "MDIO_COMMAND,MDIO PHY Command Register" bitfld.long 0x04 15. " TRANINIT ,Read transaction" "Not initialized,Initialized" hexmask.long.word 0x04 5.--9. 0x20 " PHYADDR ,Read transaction" hexmask.long.byte 0x04 0.--4. 0x01 " REGADDR ,Register address" line.long 0x08 "MDIO_DATA,MDIO Data Register" hexmask.long.word 0x08 0.--15. 1. " MDIO_DATA ,MDIO data" textline " " width 35. rgroup.long 0x800++0x03 line.long 0x00 "REV_P0,PORT 0 MAC Core Revision" group.long (0x800+0x08)++0x0B line.long 0x00 "COMMAND_CONFIG_P0,Port 0 Command Configuration Register" bitfld.long 0x00 24. " NO_LGTH_CHECK ,Payload length check disable" "No,Yes" bitfld.long 0x00 23. " CNTL_FRM_ENA ,MAC control frame enable" "Disabled,Enabled" bitfld.long 0x00 13. " SW_RESET ,Self clearing reset command bit" "No reset,Reset" bitfld.long 0x00 11. " TX_CRC_APPEND ,Enable CRC append on transmit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HD_ENA ,Enable auto full/half duplex operation" "Disabled,Enabled" rbitfld.long 0x00 9. " TX_ADDR_INS ,Tx address insert" "0,1" bitfld.long 0x00 8. " PAUSE_IGNORE ,Ignore pause frame quanta" "Not ignored,Ignored" rbitfld.long 0x00 7. " PAUSE_FWD ,Terminate/Forward pause frames" "Terminated,Forwarded" textline " " bitfld.long 0x00 6. " CRC_FWD ,Terminate/Forward received CRC" "Terminated,Forwarded" rbitfld.long 0x00 5. " PAD_EN ,Enable frame padding remove on receive" "Disabled,Enabled" rbitfld.long 0x00 4. " PROMIS_EN ,Enable MAC promiscuous operation" "Disabled,Enabled" bitfld.long 0x00 3. " ETH_SPEED ,Ethernet speed" "10/100,Gigabit" textline " " bitfld.long 0x00 1. " RX_ENA ,Enable MAC transmit path" "Disabled,Enabled" bitfld.long 0x00 0. " TX_ENA ,Enable MAC transmit path" "Disabled,Enabled" line.long 0x04 "MAC_ADDR_0_P0,Port 0 MAC Address Register 0" line.long 0x08 "MAC_ADDR_1_P0,Port 0 MAC Address Register 1" hexmask.long.word 0x08 0.--15. 0x01 " MAC_ADDR ,The last 2 bytes of the ports MAC address" group.long (0x800+0x14)++0x07 line.long 0x00 "FRM_LENGTH_P0,PORT 0 Maximum Frame Length Register" hexmask.long.word 0x00 0.--13. 1. " FRM_LENGTH ,Maximum frame length" line.long 0x04 "PAUSE_QUANT_P0,PORT 0 MAC Pause Quanta" hexmask.long.word 0x04 0.--15. 1. " PAUSE_QUANT ,Pause quanta" group.long (0x800+0x30)++0x0B line.long 0x00 "PTPCLOCKIDENTITY1_P0,PORT 0 PTP Clock Identity1 Register" hexmask.long.byte 0x00 24.--31. 1. " CLOCKIDENTITY3 ,ClockIdentity[3]" hexmask.long.byte 0x00 16.--23. 1. " CLOCKIDENTITY2 ,ClockIdentity[2]" hexmask.long.byte 0x00 8.--15. 1. " CLOCKIDENTITY1 ,ClockIdentity[1]" hexmask.long.byte 0x00 0.--7. 1. " CLOCKIDENTITY0 ,ClockIdentity[0]" line.long 0x04 "PTPCLOCKIDENTITY2_P0,PORT 0 PTP Clock Identity2 Register" hexmask.long.byte 0x04 24.--31. 1. " CLOCKIDENTITY7 ,ClockIdentity[7]" hexmask.long.byte 0x04 16.--23. 1. " CLOCKIDENTITY6 ,ClockIdentity[6]" hexmask.long.byte 0x04 8.--15. 1. " CLOCKIDENTITY5 ,ClockIdentity[5]" hexmask.long.byte 0x04 0.--7. 1. " CLOCKIDENTITY4 ,ClockIdentity[4]" line.long 0x08 "PTPAUTORESPONSE_P0,PORT 0 PTP Auto Response Register" hexmask.long.byte 0x08 24.--31. 1. " PORTNUMBER1 ,PortNumber[1]" hexmask.long.byte 0x08 16.--23. 1. " PORTNUMBER0 ,PortNumber[0]" bitfld.long 0x08 0. " AUTORESPENABLE ,Enable automatic generation of IEEE 1588v2 layer 2 peer delay response messages" "Disabled,Enabled" if (((per.l(ad:0x44050000+0x800+0x40)&0x04)==0x04)) rgroup.long (0x800+0x40)++0x03 line.long 0x00 "STATUS_P0,PORT 0 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" bitfld.long 0x00 0.--1. " PHYSPEED ,Currently active PHY interface speed" "10 Mbps,100 Mbps,1 Gigabit,?..." else rgroup.long (0x800+0x40)++0x03 line.long 0x00 "STATUS_P0,PORT 0 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" endif group.long (0x800+0x44)++0x03 line.long 0x00 "TX_IPG_LENGTH_P0,PORT 0 Transmit IPG Length Register" bitfld.long 0x00 0.--4. " TX_IPG_LENGTH ,Transmit interpacket gap in octets" ",,,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hgroup.long (0x800+0x48)++0x03 hide.long 0x00 "EEE_CTL_STAT_P0,PORT 0 MAC EEE Functions Control And Status" in group.long (0x800+0x4C)++0x07 line.long 0x00 "EEE_IDLE_TIME_P0,PORT 0 EEE Idle Time Register" line.long 0x04 "EEE_TWSYS_TIME_P0,PORT 0 EEE Wake Up Time Register" group.long (0x800+0x54)++0x03 line.long 0x00 "IDLE_SLOPE_P0,PORT 0 MAC Traffic Shaper Bandwidth Control" hexmask.long.word 0x00 0.--10. 1. " IDLE_SLOPE ,Traffic shaper bandwidth control" rgroup.long (0x800+0x68)++0x7C line.long 0x00 "AFRAMESTRANSMITTEDOK_P0,PORT 0 MAC Transmitted Valid Frame Count Register" line.long 0x04 "AFRAMESRECEIVEDOK_P0,PORT 0 MAC Received Valid Frame Count Register" line.long 0x08 "AFRAMECHECKSEQUENCEERRORS_P0,PORT 0 MAC FCS Error Frame Count Register" line.long 0x0C "AALIGNMENTERRORS_P0,PORT 0 MAC Alignment Error Frame Count Register" line.long 0x10 "AOCTETSTRANSMITTEDOK_P0,PORT 0 MAC Transmitted Valid Frame Octets Register" line.long 0x14 "AOCTETSRECEIVEDOK_P0,PORT 0 MAC Received Valid Frame Octets Register" line.long 0x18 "ATXPAUSEMACCTRLFRAMES_P0,PORT 0 MAC Transmitted Pause Frame Count Register" line.long 0x1C "ARXPAUSEMACCTRLFRAMES_P0,PORT 0 MAC Received Pause Frame Count Register" line.long 0x20 "IFINERRORS_P0,PORT 0 MAC Input Error Count Register" line.long 0x24 "IFOUTERRORS_P0,PORT 0 MAC Output Error Count Register" line.long 0x28 "IFINUCASTPKTS_P0,PORT 0 MAC Received Unicast Frame Count Register" line.long 0x2C "IFINMULTICASTPKTS_P0,PORT 0 MAC Received Multicast Frame Count Register" line.long 0x30 "IFINBROADCASTPKTS_P0,PORT 0 MAC Received Broadcast Frame Count Register" line.long 0x34 "IFOUTDISCARDS_P0,PORT 0 MAC Discarded Outbound Frame Count Register" line.long 0x38 "IFOUTUCASTPKTS_P0,PORT 0 MAC Transmitted Unicast Frame Count Register" line.long 0x3C "IFOUTMULTICASTPKTS_P0,PORT 0 MAC Transmitted Multicast Frame Count Register" line.long 0x40 "IFOUTBROADCASTPKTS_P0,PORT 0 MAC Transmitted Broadcast Frame Count Register" line.long 0x44 "ETHERSTATSDROPEVENTS_P0,PORT 0 MAC Dropped Frame Count Register" line.long 0x48 "ETHERSTATSOCTETS_P0,PORT 0 MAC All Frame Octets Register" line.long 0x4C "ETHERSTATSPKTS_P0,PORT 0 MAC All Frame Count Register" line.long 0x50 "ETHERSTATSUNDERSIZEPKTS_P0,PORT 0 MAC Too Short Frame Count Register" line.long 0x54 "ETHERSTATSOVERSIZEPKTS_P0,PORT 0 MAC Too Long Frame Count Register" line.long 0x58 "ETHERSTATSPKTS64OCTETS_P0,PORT 0 MAC 64 Octets Frame Count Register" line.long 0x5C "ETHERSTATSPKTS65TO127OCTETS_P0,PORT 0 MAC 65 to 127 Octets Frame Count Register" line.long 0x60 "ETHERSTATSPKTS128TO255OCTETS_P0,PORT 0 MAC 128 to 255 Octets Frame Count Register" line.long 0x64 "ETHERSTATSPKTS256TO511OCTETS_P0,PORT 0 MAC 256 to 511 Octets Frame Count Register" line.long 0x68 "ETHERSTATSPKTS512TO1023OCTETS_P0,PORT 0 MAC 512 to 1023 Octets Frame Count Register" line.long 0x6C "ETHERSTATSPKTS1024TO1518OCTETS_P0,PORT 0 MAC 1024 to 1519 Octets Frame Count Register" line.long 0x70 "ETHERSTATSPKTS1519TOXOCTETS_P0,PORT 0 MAC Over 1519 Octets Frame Count Register" line.long 0x74 "ETHERSTATSJABBERS_P0,PORT 0 MAC Jabbers Frame Count Register" line.long 0x78 "ETHERSTATSFRAGMENTS_P0,PORT 0 MAC Fragment Frame Count Register" rgroup.long (0x800+0xE8)++0x03 line.long 0x00 "VLANRECEIVEDOK_P0,PORT 0 MAC Received VLAN Tagged Frame Count Register" rgroup.long (0x800+0xF4)++0x07 line.long 0x00 "VLANTRANSMITTEDOK_P0,PORT 0 MAC Transmitted VLAN Tagged Frame Count Register" line.long 0x04 "FRAMESRETRANSMITTED_P0,PORT 0 MAC Retransmitted Frame Count Register" rgroup.long (0x800+0x100)++0x03 line.long 0x00 "STATS_HIWORD_P0,PORT 0 MAC Statistics Counter High Word Register" group.long (0x800+0x104)++0x0B line.long 0x00 "STATS_CTRL_P0,PORT 0 MAC Statistics Control Register" rbitfld.long 0x00 1. " CLEARBUSY ,Clear in progress indication" "Not cleared,Cleared" bitfld.long 0x00 0. " CLEARALL ,Self clearing counter initialize command" "Not cleared,Cleared" line.long 0x04 "STATS_CLEAR_VALUELO_P0,PORT 0 MAC Statistics Clear Value Lower Register" line.long 0x08 "STATS_CLEAR_VALUEHI_P0,PORT 0 MAC Statistics Clear Value Higher Register" rgroup.long (0x800+0x110)++0x17 line.long 0x00 "ADEFERRED_P0,PORT 0 MAC Deferred Count Register" line.long 0x04 "AMULTIPLECOLLISIONS_P0,PORT 0 MAC Multiple Collision Count Register" line.long 0x08 "ASINGLECOLLISIONS_P0,PORT 0 MAC Single CollinsionsCount Register" line.long 0x0C "ALATECOLLISIONS_P0,PORT 0 MAC Late Collision Count Register" line.long 0x10 "AEXCESSIVECOLLISIONS_P0,PORT 0 MAC Excessive Collision Count Register" line.long 0x14 "ACARRIERSENSEERRORS_P0,PORT 0 MAC Carrier Sense Error Count Register" rgroup.long 0xC00++0x03 line.long 0x00 "REV_P1,PORT 1 MAC Core Revision" group.long (0xC00+0x08)++0x0B line.long 0x00 "COMMAND_CONFIG_P1,Port 1 Command Configuration Register" bitfld.long 0x00 24. " NO_LGTH_CHECK ,Payload length check disable" "No,Yes" bitfld.long 0x00 23. " CNTL_FRM_ENA ,MAC control frame enable" "Disabled,Enabled" bitfld.long 0x00 13. " SW_RESET ,Self clearing reset command bit" "No reset,Reset" bitfld.long 0x00 11. " TX_CRC_APPEND ,Enable CRC append on transmit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HD_ENA ,Enable auto full/half duplex operation" "Disabled,Enabled" rbitfld.long 0x00 9. " TX_ADDR_INS ,Tx address insert" "0,1" bitfld.long 0x00 8. " PAUSE_IGNORE ,Ignore pause frame quanta" "Not ignored,Ignored" rbitfld.long 0x00 7. " PAUSE_FWD ,Terminate/Forward pause frames" "Terminated,Forwarded" textline " " bitfld.long 0x00 6. " CRC_FWD ,Terminate/Forward received CRC" "Terminated,Forwarded" rbitfld.long 0x00 5. " PAD_EN ,Enable frame padding remove on receive" "Disabled,Enabled" rbitfld.long 0x00 4. " PROMIS_EN ,Enable MAC promiscuous operation" "Disabled,Enabled" bitfld.long 0x00 3. " ETH_SPEED ,Ethernet speed" "10/100,Gigabit" textline " " bitfld.long 0x00 1. " RX_ENA ,Enable MAC transmit path" "Disabled,Enabled" bitfld.long 0x00 0. " TX_ENA ,Enable MAC transmit path" "Disabled,Enabled" line.long 0x04 "MAC_ADDR_0_P1,Port 1 MAC Address Register 0" line.long 0x08 "MAC_ADDR_1_P1,Port 1 MAC Address Register 1" hexmask.long.word 0x08 0.--15. 0x01 " MAC_ADDR ,The last 2 bytes of the ports MAC address" group.long (0xC00+0x14)++0x07 line.long 0x00 "FRM_LENGTH_P1,PORT 1 Maximum Frame Length Register" hexmask.long.word 0x00 0.--13. 1. " FRM_LENGTH ,Maximum frame length" line.long 0x04 "PAUSE_QUANT_P1,PORT 1 MAC Pause Quanta" hexmask.long.word 0x04 0.--15. 1. " PAUSE_QUANT ,Pause quanta" group.long (0xC00+0x30)++0x0B line.long 0x00 "PTPCLOCKIDENTITY1_P1,PORT 1 PTP Clock Identity1 Register" hexmask.long.byte 0x00 24.--31. 1. " CLOCKIDENTITY3 ,ClockIdentity[3]" hexmask.long.byte 0x00 16.--23. 1. " CLOCKIDENTITY2 ,ClockIdentity[2]" hexmask.long.byte 0x00 8.--15. 1. " CLOCKIDENTITY1 ,ClockIdentity[1]" hexmask.long.byte 0x00 0.--7. 1. " CLOCKIDENTITY0 ,ClockIdentity[0]" line.long 0x04 "PTPCLOCKIDENTITY2_P1,PORT 1 PTP Clock Identity2 Register" hexmask.long.byte 0x04 24.--31. 1. " CLOCKIDENTITY7 ,ClockIdentity[7]" hexmask.long.byte 0x04 16.--23. 1. " CLOCKIDENTITY6 ,ClockIdentity[6]" hexmask.long.byte 0x04 8.--15. 1. " CLOCKIDENTITY5 ,ClockIdentity[5]" hexmask.long.byte 0x04 0.--7. 1. " CLOCKIDENTITY4 ,ClockIdentity[4]" line.long 0x08 "PTPAUTORESPONSE_P1,PORT 1 PTP Auto Response Register" hexmask.long.byte 0x08 24.--31. 1. " PORTNUMBER1 ,PortNumber[1]" hexmask.long.byte 0x08 16.--23. 1. " PORTNUMBER0 ,PortNumber[0]" bitfld.long 0x08 0. " AUTORESPENABLE ,Enable automatic generation of IEEE 1588v2 layer 2 peer delay response messages" "Disabled,Enabled" if (((per.l(ad:0x44050000+0xC00+0x40)&0x04)==0x04)) rgroup.long (0xC00+0x40)++0x03 line.long 0x00 "STATUS_P1,PORT 1 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" bitfld.long 0x00 0.--1. " PHYSPEED ,Currently active PHY interface speed" "10 Mbps,100 Mbps,1 Gigabit,?..." else rgroup.long (0xC00+0x40)++0x03 line.long 0x00 "STATUS_P1,PORT 1 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" endif group.long (0xC00+0x44)++0x03 line.long 0x00 "TX_IPG_LENGTH_P1,PORT 1 Transmit IPG Length Register" bitfld.long 0x00 0.--4. " TX_IPG_LENGTH ,Transmit interpacket gap in octets" ",,,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hgroup.long (0xC00+0x48)++0x03 hide.long 0x00 "EEE_CTL_STAT_P1,PORT 1 MAC EEE Functions Control And Status" in group.long (0xC00+0x4C)++0x07 line.long 0x00 "EEE_IDLE_TIME_P1,PORT 1 EEE Idle Time Register" line.long 0x04 "EEE_TWSYS_TIME_P1,PORT 1 EEE Wake Up Time Register" group.long (0xC00+0x54)++0x03 line.long 0x00 "IDLE_SLOPE_P1,PORT 1 MAC Traffic Shaper Bandwidth Control" hexmask.long.word 0x00 0.--10. 1. " IDLE_SLOPE ,Traffic shaper bandwidth control" rgroup.long (0xC00+0x68)++0x7C line.long 0x00 "AFRAMESTRANSMITTEDOK_P1,PORT 1 MAC Transmitted Valid Frame Count Register" line.long 0x04 "AFRAMESRECEIVEDOK_P1,PORT 1 MAC Received Valid Frame Count Register" line.long 0x08 "AFRAMECHECKSEQUENCEERRORS_P1,PORT 1 MAC FCS Error Frame Count Register" line.long 0x0C "AALIGNMENTERRORS_P1,PORT 1 MAC Alignment Error Frame Count Register" line.long 0x10 "AOCTETSTRANSMITTEDOK_P1,PORT 1 MAC Transmitted Valid Frame Octets Register" line.long 0x14 "AOCTETSRECEIVEDOK_P1,PORT 1 MAC Received Valid Frame Octets Register" line.long 0x18 "ATXPAUSEMACCTRLFRAMES_P1,PORT 1 MAC Transmitted Pause Frame Count Register" line.long 0x1C "ARXPAUSEMACCTRLFRAMES_P1,PORT 1 MAC Received Pause Frame Count Register" line.long 0x20 "IFINERRORS_P1,PORT 1 MAC Input Error Count Register" line.long 0x24 "IFOUTERRORS_P1,PORT 1 MAC Output Error Count Register" line.long 0x28 "IFINUCASTPKTS_P1,PORT 1 MAC Received Unicast Frame Count Register" line.long 0x2C "IFINMULTICASTPKTS_P1,PORT 1 MAC Received Multicast Frame Count Register" line.long 0x30 "IFINBROADCASTPKTS_P1,PORT 1 MAC Received Broadcast Frame Count Register" line.long 0x34 "IFOUTDISCARDS_P1,PORT 1 MAC Discarded Outbound Frame Count Register" line.long 0x38 "IFOUTUCASTPKTS_P1,PORT 1 MAC Transmitted Unicast Frame Count Register" line.long 0x3C "IFOUTMULTICASTPKTS_P1,PORT 1 MAC Transmitted Multicast Frame Count Register" line.long 0x40 "IFOUTBROADCASTPKTS_P1,PORT 1 MAC Transmitted Broadcast Frame Count Register" line.long 0x44 "ETHERSTATSDROPEVENTS_P1,PORT 1 MAC Dropped Frame Count Register" line.long 0x48 "ETHERSTATSOCTETS_P1,PORT 1 MAC All Frame Octets Register" line.long 0x4C "ETHERSTATSPKTS_P1,PORT 1 MAC All Frame Count Register" line.long 0x50 "ETHERSTATSUNDERSIZEPKTS_P1,PORT 1 MAC Too Short Frame Count Register" line.long 0x54 "ETHERSTATSOVERSIZEPKTS_P1,PORT 1 MAC Too Long Frame Count Register" line.long 0x58 "ETHERSTATSPKTS64OCTETS_P1,PORT 1 MAC 64 Octets Frame Count Register" line.long 0x5C "ETHERSTATSPKTS65TO127OCTETS_P1,PORT 1 MAC 65 to 127 Octets Frame Count Register" line.long 0x60 "ETHERSTATSPKTS128TO255OCTETS_P1,PORT 1 MAC 128 to 255 Octets Frame Count Register" line.long 0x64 "ETHERSTATSPKTS256TO511OCTETS_P1,PORT 1 MAC 256 to 511 Octets Frame Count Register" line.long 0x68 "ETHERSTATSPKTS512TO1023OCTETS_P1,PORT 1 MAC 512 to 1023 Octets Frame Count Register" line.long 0x6C "ETHERSTATSPKTS1024TO1518OCTETS_P1,PORT 1 MAC 1024 to 1519 Octets Frame Count Register" line.long 0x70 "ETHERSTATSPKTS1519TOXOCTETS_P1,PORT 1 MAC Over 1519 Octets Frame Count Register" line.long 0x74 "ETHERSTATSJABBERS_P1,PORT 1 MAC Jabbers Frame Count Register" line.long 0x78 "ETHERSTATSFRAGMENTS_P1,PORT 1 MAC Fragment Frame Count Register" rgroup.long (0xC00+0xE8)++0x03 line.long 0x00 "VLANRECEIVEDOK_P1,PORT 1 MAC Received VLAN Tagged Frame Count Register" rgroup.long (0xC00+0xF4)++0x07 line.long 0x00 "VLANTRANSMITTEDOK_P1,PORT 1 MAC Transmitted VLAN Tagged Frame Count Register" line.long 0x04 "FRAMESRETRANSMITTED_P1,PORT 1 MAC Retransmitted Frame Count Register" rgroup.long (0xC00+0x100)++0x03 line.long 0x00 "STATS_HIWORD_P1,PORT 1 MAC Statistics Counter High Word Register" group.long (0xC00+0x104)++0x0B line.long 0x00 "STATS_CTRL_P1,PORT 1 MAC Statistics Control Register" rbitfld.long 0x00 1. " CLEARBUSY ,Clear in progress indication" "Not cleared,Cleared" bitfld.long 0x00 0. " CLEARALL ,Self clearing counter initialize command" "Not cleared,Cleared" line.long 0x04 "STATS_CLEAR_VALUELO_P1,PORT 1 MAC Statistics Clear Value Lower Register" line.long 0x08 "STATS_CLEAR_VALUEHI_P1,PORT 1 MAC Statistics Clear Value Higher Register" rgroup.long (0xC00+0x110)++0x17 line.long 0x00 "ADEFERRED_P1,PORT 1 MAC Deferred Count Register" line.long 0x04 "AMULTIPLECOLLISIONS_P1,PORT 1 MAC Multiple Collision Count Register" line.long 0x08 "ASINGLECOLLISIONS_P1,PORT 1 MAC Single CollinsionsCount Register" line.long 0x0C "ALATECOLLISIONS_P1,PORT 1 MAC Late Collision Count Register" line.long 0x10 "AEXCESSIVECOLLISIONS_P1,PORT 1 MAC Excessive Collision Count Register" line.long 0x14 "ACARRIERSENSEERRORS_P1,PORT 1 MAC Carrier Sense Error Count Register" rgroup.long 0x1000++0x03 line.long 0x00 "REV_P2,PORT 2 MAC Core Revision" group.long (0x1000+0x08)++0x0B line.long 0x00 "COMMAND_CONFIG_P2,Port 2 Command Configuration Register" bitfld.long 0x00 24. " NO_LGTH_CHECK ,Payload length check disable" "No,Yes" bitfld.long 0x00 23. " CNTL_FRM_ENA ,MAC control frame enable" "Disabled,Enabled" bitfld.long 0x00 13. " SW_RESET ,Self clearing reset command bit" "No reset,Reset" bitfld.long 0x00 11. " TX_CRC_APPEND ,Enable CRC append on transmit" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " HD_ENA ,Enable auto full/half duplex operation" "Disabled,Enabled" rbitfld.long 0x00 9. " TX_ADDR_INS ,Tx address insert" "0,1" bitfld.long 0x00 8. " PAUSE_IGNORE ,Ignore pause frame quanta" "Not ignored,Ignored" rbitfld.long 0x00 7. " PAUSE_FWD ,Terminate/Forward pause frames" "Terminated,Forwarded" textline " " bitfld.long 0x00 6. " CRC_FWD ,Terminate/Forward received CRC" "Terminated,Forwarded" rbitfld.long 0x00 5. " PAD_EN ,Enable frame padding remove on receive" "Disabled,Enabled" rbitfld.long 0x00 4. " PROMIS_EN ,Enable MAC promiscuous operation" "Disabled,Enabled" bitfld.long 0x00 3. " ETH_SPEED ,Ethernet speed" "10/100,Gigabit" textline " " bitfld.long 0x00 1. " RX_ENA ,Enable MAC transmit path" "Disabled,Enabled" bitfld.long 0x00 0. " TX_ENA ,Enable MAC transmit path" "Disabled,Enabled" line.long 0x04 "MAC_ADDR_0_P2,Port 2 MAC Address Register 0" line.long 0x08 "MAC_ADDR_1_P2,Port 2 MAC Address Register 1" hexmask.long.word 0x08 0.--15. 0x01 " MAC_ADDR ,The last 2 bytes of the ports MAC address" group.long (0x1000+0x14)++0x07 line.long 0x00 "FRM_LENGTH_P2,PORT 2 Maximum Frame Length Register" hexmask.long.word 0x00 0.--13. 1. " FRM_LENGTH ,Maximum frame length" line.long 0x04 "PAUSE_QUANT_P2,PORT 2 MAC Pause Quanta" hexmask.long.word 0x04 0.--15. 1. " PAUSE_QUANT ,Pause quanta" group.long (0x1000+0x30)++0x0B line.long 0x00 "PTPCLOCKIDENTITY1_P2,PORT 2 PTP Clock Identity1 Register" hexmask.long.byte 0x00 24.--31. 1. " CLOCKIDENTITY3 ,ClockIdentity[3]" hexmask.long.byte 0x00 16.--23. 1. " CLOCKIDENTITY2 ,ClockIdentity[2]" hexmask.long.byte 0x00 8.--15. 1. " CLOCKIDENTITY1 ,ClockIdentity[1]" hexmask.long.byte 0x00 0.--7. 1. " CLOCKIDENTITY0 ,ClockIdentity[0]" line.long 0x04 "PTPCLOCKIDENTITY2_P2,PORT 2 PTP Clock Identity2 Register" hexmask.long.byte 0x04 24.--31. 1. " CLOCKIDENTITY7 ,ClockIdentity[7]" hexmask.long.byte 0x04 16.--23. 1. " CLOCKIDENTITY6 ,ClockIdentity[6]" hexmask.long.byte 0x04 8.--15. 1. " CLOCKIDENTITY5 ,ClockIdentity[5]" hexmask.long.byte 0x04 0.--7. 1. " CLOCKIDENTITY4 ,ClockIdentity[4]" line.long 0x08 "PTPAUTORESPONSE_P2,PORT 2 PTP Auto Response Register" hexmask.long.byte 0x08 24.--31. 1. " PORTNUMBER1 ,PortNumber[1]" hexmask.long.byte 0x08 16.--23. 1. " PORTNUMBER0 ,PortNumber[0]" bitfld.long 0x08 0. " AUTORESPENABLE ,Enable automatic generation of IEEE 1588v2 layer 2 peer delay response messages" "Disabled,Enabled" if (((per.l(ad:0x44050000+0x1000+0x40)&0x04)==0x04)) rgroup.long (0x1000+0x40)++0x03 line.long 0x00 "STATUS_P2,PORT 2 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" bitfld.long 0x00 0.--1. " PHYSPEED ,Currently active PHY interface speed" "10 Mbps,100 Mbps,1 Gigabit,?..." else rgroup.long (0x1000+0x40)++0x03 line.long 0x00 "STATUS_P2,PORT 2 Port Status Register" bitfld.long 0x00 3. " PHYDUPLEX ,Duplex status from PHY interface" "Half duplex,Full duplex" bitfld.long 0x00 2. " PHYLINK ,Link status from PHY interface" "Link down,Link up" endif group.long (0x1000+0x44)++0x03 line.long 0x00 "TX_IPG_LENGTH_P2,PORT 2 Transmit IPG Length Register" bitfld.long 0x00 0.--4. " TX_IPG_LENGTH ,Transmit interpacket gap in octets" ",,,,,,,,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hgroup.long (0x1000+0x48)++0x03 hide.long 0x00 "EEE_CTL_STAT_P2,PORT 2 MAC EEE Functions Control And Status" in group.long (0x1000+0x4C)++0x07 line.long 0x00 "EEE_IDLE_TIME_P2,PORT 2 EEE Idle Time Register" line.long 0x04 "EEE_TWSYS_TIME_P2,PORT 2 EEE Wake Up Time Register" group.long (0x1000+0x54)++0x03 line.long 0x00 "IDLE_SLOPE_P2,PORT 2 MAC Traffic Shaper Bandwidth Control" hexmask.long.word 0x00 0.--10. 1. " IDLE_SLOPE ,Traffic shaper bandwidth control" rgroup.long (0x1000+0x68)++0x7C line.long 0x00 "AFRAMESTRANSMITTEDOK_P2,PORT 2 MAC Transmitted Valid Frame Count Register" line.long 0x04 "AFRAMESRECEIVEDOK_P2,PORT 2 MAC Received Valid Frame Count Register" line.long 0x08 "AFRAMECHECKSEQUENCEERRORS_P2,PORT 2 MAC FCS Error Frame Count Register" line.long 0x0C "AALIGNMENTERRORS_P2,PORT 2 MAC Alignment Error Frame Count Register" line.long 0x10 "AOCTETSTRANSMITTEDOK_P2,PORT 2 MAC Transmitted Valid Frame Octets Register" line.long 0x14 "AOCTETSRECEIVEDOK_P2,PORT 2 MAC Received Valid Frame Octets Register" line.long 0x18 "ATXPAUSEMACCTRLFRAMES_P2,PORT 2 MAC Transmitted Pause Frame Count Register" line.long 0x1C "ARXPAUSEMACCTRLFRAMES_P2,PORT 2 MAC Received Pause Frame Count Register" line.long 0x20 "IFINERRORS_P2,PORT 2 MAC Input Error Count Register" line.long 0x24 "IFOUTERRORS_P2,PORT 2 MAC Output Error Count Register" line.long 0x28 "IFINUCASTPKTS_P2,PORT 2 MAC Received Unicast Frame Count Register" line.long 0x2C "IFINMULTICASTPKTS_P2,PORT 2 MAC Received Multicast Frame Count Register" line.long 0x30 "IFINBROADCASTPKTS_P2,PORT 2 MAC Received Broadcast Frame Count Register" line.long 0x34 "IFOUTDISCARDS_P2,PORT 2 MAC Discarded Outbound Frame Count Register" line.long 0x38 "IFOUTUCASTPKTS_P2,PORT 2 MAC Transmitted Unicast Frame Count Register" line.long 0x3C "IFOUTMULTICASTPKTS_P2,PORT 2 MAC Transmitted Multicast Frame Count Register" line.long 0x40 "IFOUTBROADCASTPKTS_P2,PORT 2 MAC Transmitted Broadcast Frame Count Register" line.long 0x44 "ETHERSTATSDROPEVENTS_P2,PORT 2 MAC Dropped Frame Count Register" line.long 0x48 "ETHERSTATSOCTETS_P2,PORT 2 MAC All Frame Octets Register" line.long 0x4C "ETHERSTATSPKTS_P2,PORT 2 MAC All Frame Count Register" line.long 0x50 "ETHERSTATSUNDERSIZEPKTS_P2,PORT 2 MAC Too Short Frame Count Register" line.long 0x54 "ETHERSTATSOVERSIZEPKTS_P2,PORT 2 MAC Too Long Frame Count Register" line.long 0x58 "ETHERSTATSPKTS64OCTETS_P2,PORT 2 MAC 64 Octets Frame Count Register" line.long 0x5C "ETHERSTATSPKTS65TO127OCTETS_P2,PORT 2 MAC 65 to 127 Octets Frame Count Register" line.long 0x60 "ETHERSTATSPKTS128TO255OCTETS_P2,PORT 2 MAC 128 to 255 Octets Frame Count Register" line.long 0x64 "ETHERSTATSPKTS256TO511OCTETS_P2,PORT 2 MAC 256 to 511 Octets Frame Count Register" line.long 0x68 "ETHERSTATSPKTS512TO1023OCTETS_P2,PORT 2 MAC 512 to 1023 Octets Frame Count Register" line.long 0x6C "ETHERSTATSPKTS1024TO1518OCTETS_P2,PORT 2 MAC 1024 to 1519 Octets Frame Count Register" line.long 0x70 "ETHERSTATSPKTS1519TOXOCTETS_P2,PORT 2 MAC Over 1519 Octets Frame Count Register" line.long 0x74 "ETHERSTATSJABBERS_P2,PORT 2 MAC Jabbers Frame Count Register" line.long 0x78 "ETHERSTATSFRAGMENTS_P2,PORT 2 MAC Fragment Frame Count Register" rgroup.long (0x1000+0xE8)++0x03 line.long 0x00 "VLANRECEIVEDOK_P2,PORT 2 MAC Received VLAN Tagged Frame Count Register" rgroup.long (0x1000+0xF4)++0x07 line.long 0x00 "VLANTRANSMITTEDOK_P2,PORT 2 MAC Transmitted VLAN Tagged Frame Count Register" line.long 0x04 "FRAMESRETRANSMITTED_P2,PORT 2 MAC Retransmitted Frame Count Register" rgroup.long (0x1000+0x100)++0x03 line.long 0x00 "STATS_HIWORD_P2,PORT 2 MAC Statistics Counter High Word Register" group.long (0x1000+0x104)++0x0B line.long 0x00 "STATS_CTRL_P2,PORT 2 MAC Statistics Control Register" rbitfld.long 0x00 1. " CLEARBUSY ,Clear in progress indication" "Not cleared,Cleared" bitfld.long 0x00 0. " CLEARALL ,Self clearing counter initialize command" "Not cleared,Cleared" line.long 0x04 "STATS_CLEAR_VALUELO_P2,PORT 2 MAC Statistics Clear Value Lower Register" line.long 0x08 "STATS_CLEAR_VALUEHI_P2,PORT 2 MAC Statistics Clear Value Higher Register" rgroup.long (0x1000+0x110)++0x17 line.long 0x00 "ADEFERRED_P2,PORT 2 MAC Deferred Count Register" line.long 0x04 "AMULTIPLECOLLISIONS_P2,PORT 2 MAC Multiple Collision Count Register" line.long 0x08 "ASINGLECOLLISIONS_P2,PORT 2 MAC Single CollinsionsCount Register" line.long 0x0C "ALATECOLLISIONS_P2,PORT 2 MAC Late Collision Count Register" line.long 0x10 "AEXCESSIVECOLLISIONS_P2,PORT 2 MAC Excessive Collision Count Register" line.long 0x14 "ACARRIERSENSEERRORS_P2,PORT 2 MAC Carrier Sense Error Count Register" textline " " width 23. group.long 0x3C00++0x03 line.long 0x00 "DLR_CONTROL,DLR Control Register" hexmask.long.word 0x00 8.--19. 1. " US_TIME ,Number of clock cycles required for 1 microsecond for the switch system clock" bitfld.long 0x00 4. " IGNORE_INVTM ,Enable ignore beacon frames with invalid timeout timer" "Disabled,Enabled" bitfld.long 0x00 1. " AUTOFLUSH ,Enable automatic flushing of unicast entries in address table if ring reconfiguration occurs" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENABLE ,Enable DLR extension module" "Disabled,Enabled" rgroup.long 0x3C04++0x07 line.long 0x00 "DLR_STATUS,DLR Status Register" hexmask.long.byte 0x00 24.--31. 1. " TOPOLOGY ,Current network topology" bitfld.long 0x00 17. " LINK_STATUS[1] ,Link status of port 1" "Link down,Link up" bitfld.long 0x00 16. " LINK_STATUS[0] ,Link status of port 0" "Link down,Link up" textline " " hexmask.long.byte 0x00 8.--15. 1. " NODE_STATE ,Local node current state" bitfld.long 0x00 1. " LASTBCNRCVPORT[1] ,Last beacon receive port 1" "Not received,Received" bitfld.long 0x00 0. " LASTBCNRCVPORT[0] ,Last beacon receive port 0" "Not received,Received" line.long 0x04 "DLR_ETH_TYP,DLR Ethernet Type Register" hexmask.long.word 0x04 0.--15. 1. " DLR_ETH_TYP ,Ethernet type for DLR frame detection" group.long 0x3C0C++0x0F line.long 0x00 "DLR_IRQ_CONTROL,DLR Interrupt Control Register" bitfld.long 0x00 31. " ATOMIC_AND ,Atomic AND enable" "Disabled,Enabled" bitfld.long 0x00 30. " ATOMIC_OR ,Atomic OR enable" "Disabled,Enabled" bitfld.long 0x00 29. " LOW_INT_EN ,Enable active low interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " IRQ_FRM_DSCRD1 ,Enable interrupt on frame discard due to source address match with the local address on port 1" "Disabled,Enabled" bitfld.long 0x00 14. " IRQ_FRM_DSCRD0 ,Enable interrupt on frame discard due to source address match with the local address on port 0" "Disabled,Enabled" bitfld.long 0x00 13. " IRQ_BEC_RCV1_ENA ,Enable interrupt on beacon frame detection on port 1" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " IRQ_BEC_RCV0_ENA ,Enable interrupt on beacon frame detection on port 0" "Disabled,Enabled" bitfld.long 0x00 11. " IRQ_INVALID_TMR_ENA ,Enable interrupt on invalid range for beacon timeout timer value detection" "Disabled,Enabled" bitfld.long 0x00 10. " IRQ_IP_ADDR_CHNG_ENA ,Enable interrupt on IP address change detection within beacon frame from ring supervisor" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " IRQ_SUP_IGNORD_ENA ,Enable interrupt on beacon frame detection from a supervisor with lower precedence than the current ring supervisor" "Disabled,Enabled" bitfld.long 0x00 8. " IRQ_LINK_CHNG1_ENA ,Enable link change interrupt event for port 1" "Disabled,Enabled" bitfld.long 0x00 7. " IRQ_LINK_CHNG0_ENA ,Enable link change interrupt event for port 0" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " IRQ_SUPR_CHNG_ENA ,Enable interrupt on ring supervisor change" "Disabled,Enabled" bitfld.long 0x00 5. " IRQ_BEC_TMR1_EXP_ENA ,Enable interrupt on beacon timeout timer expire for port 1" "Disabled,Enabled" bitfld.long 0x00 4. " IRQ_BEC_TMR0_EXP_ENA ,Enable interrupt on beacon timeout timer expire for port 0" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " IRQ_STOP_NBCHK1_ENA ,Enable stop neighbor check timeout timer interrupt for port 1" "Disabled,Enabled" bitfld.long 0x00 2. " IRQ_STOP_NBCHK0_ENA ,Enable stop neighbor check timeout timer interrupt for port 0" "Disabled,Enabled" bitfld.long 0x00 1. " IRQ_FLUSH_MACADDR_ENA ,Enable flush local MAC address table interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " IRQ_STATE_CHNG_ENA ,Enable interrupt for state change" "Disabled,Enabled" line.long 0x04 "DLR_IRQ_STAT_ACK,DLR Interrupt Status/ACK Register" bitfld.long 0x04 15. " FRM_DSCRD1_IRQ_PENDING ,Latched event on frame discard due to source address match with the local address on port 1" "Not occurred,Occurred" bitfld.long 0x04 14. " FRM_DSCRD0_IRQ_PENDING ,Latched event on frame discard due to source address match with the local address on port 0" "Not occurred,Occurred" bitfld.long 0x04 13. " BEC_RCV1_IRQ_PENDING ,Latched event on beacon frame detection on port 1" "Not occurred,Occurred" textline " " bitfld.long 0x04 12. " BEC_RCV0_IRQ_PENDING ,Latched event on beacon frame detection on port 0" "Not occurred,Occurred" bitfld.long 0x04 11. " INVALID_TMR_IRQ_PENDING ,Latched event on invalid beacon timeout timer value detection within beacon frame on port 0 or port 1" "Not occurred,Occurred" bitfld.long 0x04 10. " IP_CHNG_IRQ_PENDING ,Latched IP address change event" "Not occurred,Occurred" textline " " bitfld.long 0x04 9. " SUP_IGNORD_IRQ_PENDING ,Latched event for beacon frame detection from ignored supervisor" "Not occurred,Occurred" bitfld.long 0x04 8. " LINK1_IRQ_PENDING ,Latched link status change event" "Not occurred,Occurred" bitfld.long 0x04 7. " LINK0_IRQ_PENDING ,Latched link status change event" "Not occurred,Occurred" textline " " bitfld.long 0x04 6. " SUPR_CHNG_IRQ_PENDING ,Latched supervisor change event" "Not occurred,Occurred" bitfld.long 0x04 5. " BEC_TMR1_IRQ_PENDING ,Beacon timeout timer expire interrupt for port 1" "Not occurred,Occurred" bitfld.long 0x04 4. " BEC_TMR0_IRQ_PENDING ,Beacon timeout timer expire interrupt for port 0" "Not occurred,Occurred" textline " " bitfld.long 0x04 3. " NBCHK1_IRQ_PENDING ,Stop event for neighbor check timeout timer for port 1" "Not occurred,Occurred" bitfld.long 0x04 2. " NBCHK0_IRQ_PENDING ,Stop event for neighbor check timeout timer for port 0" "Not occurred,Occurred" bitfld.long 0x04 1. " FLUSH_IRQ_PENDING ,Latched flush event for MAC address learning table" "Not occurred,Occurred" textline " " bitfld.long 0x04 0. " STATE_CHNG_IRQ_PENDING ,Latched state change event" "Not occurred,Occurred" line.long 0x08 "DLR_LOC_MACLO,DLR Local MAC Address Low Register" hexmask.long.byte 0x08 24.--31. 0x01 " LOC_MAC[3] ,4th byte of local MAC address" hexmask.long.byte 0x08 16.--23. 0x01 " [2] ,3th byte of local MAC address" hexmask.long.byte 0x08 8.--15. 0x01 " [1] ,2th byte of local MAC address" textline " " hexmask.long.byte 0x08 0.--7. 0x01 " [0] ,1th byte of local MAC address" line.long 0x0C "DLR_LOC_MACHI,DLR Local MAC Address High Register" hexmask.long.byte 0x0C 8.--15. 0x01 " LOC_MAC[1] ,6th byte of local MAC address" hexmask.long.byte 0x0C 0.--7. 0x01 " [0] ,5th byte of local MAC address" rgroup.long 0x3C20++0x23 line.long 0x00 "DLR_SUPR_MACLO,DLR Supervisor MAC Address Low Register" hexmask.long.byte 0x00 24.--31. 0x01 " SUPR_MAC[3] ,4th byte of active ring supervisors MAC address" hexmask.long.byte 0x00 16.--23. 0x01 " [2] ,3th byte of active ring supervisors MAC address" hexmask.long.byte 0x00 8.--15. 0x01 " [1] ,2th byte of active ring supervisors MAC address" textline " " hexmask.long.byte 0x00 0.--7. 0x01 " [0] ,1th byte of active ring supervisors MAC address" line.long 0x04 "DLR_SUPR_MACHI,DLR Supervisor MAC Address High Register" hexmask.long.byte 0x04 16.--23. 1. " PRECE ,Ring supervisors precedence value" hexmask.long.byte 0x04 8.--15. 0x01 " SUPR_MAC[1] ,6th byte of active ring supervisors MAC address" hexmask.long.byte 0x04 0.--7. 0x01 " [0] ,5th byte of active ring supervisors MAC address" line.long 0x08 "DLR_STATE_VLAN,DLR Ring Status/VLAN Register" hexmask.long.word 0x08 16.--31. 1. " VLANTAG ,VLAN Tag control field extracted from the VLAN info field of the beacon frame" bitfld.long 0x08 8. " VLANVALID ,VLAN valid" "Not valid,Valid" hexmask.long.byte 0x08 0.--7. 1. " RINGSTAT ,DLR ring state extracted from the ring state field of the beacon frame" line.long 0x0C "DLR_BEC_TMOUT,DLR Beacon Timeout Register" line.long 0x10 "DLR_BEC_INTRVL,DLR Beacon Interval Register" line.long 0x14 "DLR_SUPR_IPADR,DLR Supervisor IP Address Register" line.long 0x18 "DLR_ETH_STYP_VER,DLR Sub Type/Protocol Version Register" hexmask.long.byte 0x18 16.--23. 1. " SPORT ,Source port extracted from the source port field of the beacon frame" hexmask.long.byte 0x18 8.--15. 1. " PROTVER ,DLR ring protocol version extracted from the ring protocol version field of the beacon frame" hexmask.long.byte 0x18 0.--7. 1. " SUBTYPE ,DLR ring ether sub type extracted from the ring sub type field of the beacon frame" line.long 0x1C "DLR_INV_TMOUT,DLR Beacon Timeout Timer Register" line.long 0x20 "DLR_SEQ_ID,DLR Sequence ID Register CntOutOfSeqLowB" group.long 0x3C58++0x07 line.long 0x00 "DLR_DSTLO,DLR Beacon Destination Address Low Register" hexmask.long.byte 0x00 24.--31. 0x01 " DLR_DST[3] ,4th byte of the beacon frame destination multicast address" hexmask.long.byte 0x00 16.--23. 0x01 " [2] ,3th byte of the beacon frame destination multicast address" hexmask.long.byte 0x00 8.--15. 0x01 " [1] ,2th byte of the beacon frame destination multicast address" textline " " hexmask.long.byte 0x00 0.--7. 0x01 " [0] ,1th byte of the beacon frame destination multicast address" line.long 0x04 "DLR_DSTHI,DLR Beacon Destination Address High Register" hexmask.long.byte 0x04 8.--15. 0x01 " DLR_DST[1] ,6th byte of the beacon frame destination multicast address" hexmask.long.byte 0x04 0.--7. 0x01 " [0] ,5th byte of the beacon frame destination multicast address" rgroup.long 0x3C60++0x0B line.long 0x00 "DLR_RX_STAT0,DLR Received Frame Statistic Register 0" line.long 0x04 "DLR_RX_ERR_STAT0,DLR Received Frame Error Statistic Register 0" line.long 0x08 "DLR_TX_STAT0,DLR Transmitted Frame Statistic Register 0" rgroup.long 0x3C70++0x0B line.long 0x00 "DLR_RX_STAT1,DLR Received Frame Statistic Register 1" line.long 0x04 "DLR_RX_ERR_STAT1,DLR Received Frame Error Statistic Register 1" line.long 0x08 "DLR_TX_STAT1,DLR Transmitted Frame Statistic Register 1" textline " " group.long 0x3D00++0x27 line.long 0x00 "PRP_CONFIG,PRP Configuration Register" bitfld.long 0x00 16. " PRP_AGE_ENA ,Enable history memory aging timer" "Disabled,Enabled" bitfld.long 0x00 8. " TX_RCT_1588 ,Append RCT to IEEE 1588 frames" "Not allowed,Allowed" bitfld.long 0x00 7. " TX_RCT_UNKNOWN ,Append RCT to frames that have unknown destination and are hence flooded" "Not allowed,Allowed" textline " " bitfld.long 0x00 6. " TX_RCT_MULTICAST ,Append RCT to multicast frames" "Not allowed,Allowed" bitfld.long 0x00 5. " TX_RCT_BROADCAST ,Append RCT to broadcast frames" "Not allowed,Allowed" bitfld.long 0x00 3.--4. " TX_RCT_MODE ,Control appending the RCT to transmitted frames on the redundant ports" "Append RCT if group only,Append RCT to group always,Disable RCT append,Append RCT always forced" textline " " bitfld.long 0x00 2. " RX_REMOVE_RCT ,Allow PRP port RX to remove the RCT" "Not allowed,Allowed" bitfld.long 0x00 1. " RX_DUP_ACCEPT ,Enable duplicate accept mode of operation at receive" "Disabled,Enabled" bitfld.long 0x00 0. " PRP_ENA ,Enable PRP operation" "Disabled,Enabled" textline " " line.long 0x04 "PRP_GROUP,PRP Port Group Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 19. " LANB_MASK[3] ,Port 3 LAN B port" "Disabled,Enabled" textline " " endif bitfld.long 0x04 18. " LANB_MASK[2] ,Port 2 LAN B port" "Disabled,Enabled" bitfld.long 0x04 17. " [1] ,Port 1 LAN B port" "Disabled,Enabled" bitfld.long 0x04 16. " [0] ,Port 0 LAN B port" "Disabled,Enabled" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 3. " PRP_GROUP[3] ,Port 3 as redundant port" "Disabled,Enabled" textline " " endif bitfld.long 0x04 2. " PRP_GROUP[2] ,Port 2 as redundant port" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,Port 1 as redundant port" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,Port 0 as redundant port" "Disabled,Enabled" line.long 0x08 "PRP_SUFFIX,PRP RCT Suffix" hexmask.long.word 0x08 0.--15. 1. " PRP_SUFFIX ,The redundancy control trailer suffix" line.long 0x0C "PRP_LANID,PRP LAN Identifier" bitfld.long 0x0C 4.--7. " LANBID ,LAN B identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " LANAID ,LAN A identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "DUP_W,PRP Max Duplicate Detection Window Size" hexmask.long.word 0x10 0.--8. 1. " DUP_W ,Maximum duplicate detect window size" line.long 0x14 "PRP_AGETIME,PRP Aging Time Define Register" hexmask.long.tbyte 0x14 0.--23. 1. " PRP_AGETIME ,Timeout in steps of 32 switch system clock cycles to control aging of duplicate history data" line.long 0x18 "PRP_IRQ_CONTROL,PRP Interrupt Control Register" bitfld.long 0x18 3. " SEQMISSING ,Enable interrupt for frames received and accepted that caused the history to skip a sequence number that was never received" "Disabled,Enabled" bitfld.long 0x18 2. " OUTOFSEQ ,Enable interrupt for frames received and accepted but have an unexpected sequence number" "Disabled,Enabled" bitfld.long 0x18 1. " WRONGLAN ,Enable interrupt for frames received at a redundant port with an invalid LAN identifier in its redundancy trailer" "Disabled,Enabled" textline " " bitfld.long 0x18 0. " MEMTOOLATE ,Enable interrupt for memory error indications" "Disabled,Enabled" line.long 0x1C "PRP_IRQ_STAT_ACK,PRP Interrupt Status/ACK Register" eventfld.long 0x1C 3. " SEQMISSING ,Status of interrupt for frames received and accepted that caused the history to skip a sequence number that was never received" "No interrupt,Interrupt" eventfld.long 0x1C 2. " OUTOFSEQ ,Status of interrupt for frames received and accepted but have an unexpected sequence number" "No interrupt,Interrupt" eventfld.long 0x1C 1. " WRONGLAN ,Status of interrupt for frames received at a redundant port with an invalid LAN identifier in its redundancy trailer" "No interrupt,Interrupt" textline " " eventfld.long 0x1C 0. " MEMTOOLATE ,Status of interrupt for memory error indications" "No interrupt,Interrupt" line.long 0x20 "RM_ADDR_CTRL,PRP History Memory Transactions Control Register" rbitfld.long 0x20 31. " BUSY ,Transaction busy indication" "Not busy,Busy" bitfld.long 0x20 29. " CLEAR ,Write all zero to the entry selected by the given address" "Not cleared,Cleared" bitfld.long 0x20 26. " READ ,Perform single read transaction" "Not performed,Performed" textline " " bitfld.long 0x20 25. " WRITE ,Perform a single write transaction" "Not performed,Performed" bitfld.long 0x20 23. " CLEAR_MEMORY ,Write all memory locations with zero" "Not cleared,Cleared" bitfld.long 0x20 22. " CLEAR_DYNAMIC ,Scan the complete table for valid dynamic history entries and delete them" "Not cleared,Cleared" textline " " hexmask.long.word 0x20 0.--12. 0x01 " ADDRESS ,Memory address for read and write transactions" line.long 0x24 "RM_DATA,PRP Memory Data Register" rgroup.long 0x3D2C++0x03 line.long 0x00 "RM_STATUS,PRP Memory Controller Status Indication" hexmask.long.word 0x00 0.--15. 0x01 " AGEADDRESS ,Address the aging process will inspect when the aging timer expires next time" group.long 0x3D30++0x03 line.long 0x00 "TXSEQTOOLATE,PRP Frame Transmission Retrieval of Failed Sequence" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 4. " TXSEQTOOLATE[4] ,Retrieval of a sequence number failed port 4" "No failure,Failure" bitfld.long 0x00 3. " [3] ,Retrieval of a sequence number failed port 3" "No failure,Failure" textline " " endif bitfld.long 0x00 2. " TXSEQTOOLATE[2] ,Retrieval of a sequence number failed port 2" "No failure,Failure" bitfld.long 0x00 1. " [1] ,Retrieval of a sequence number failed port 1" "No failure,Failure" bitfld.long 0x00 0. " [0] ,Retrieval of a sequence number failed port 0" "No failure,Failure" rgroup.long 0x3D34++0x2B line.long 0x00 "CNTERRWRONGLANA,PRP Wrong ID LAN-A Count Register" line.long 0x04 "CNTERRWRONGLANB,PRP Wrong ID LAN-B Count Register" line.long 0x08 "CNTDUPLANA,PRP Duplicate LAN-A Count Register" line.long 0x0C "CNTDUPLANB,PRP Duplicate LAN-B Count Register" line.long 0x10 "CNTOUTOFSEQLOWA,PRP Sequence Error Low LAN-A Count Register" line.long 0x14 "CNTOUTOFSEQLOWB,PRP Sequence Error Low LAN-B Count Register" line.long 0x18 "CNTOUTOFSEQA,PRP Sequence Error LAN-A Count Register" line.long 0x1C "CNTOUTOFSEQB,PRP Sequence Error LAN-B Count Register" line.long 0x20 "CNTACCEPTA,PRP Valid Frame LAN-A Count Register" line.long 0x24 "CNTACCEPTB,PRP Valid Frame LAN-B Count Register" line.long 0x28 "CNTMISSING,PRP Drop history Adjustment Count" group.long 0x3E00++0x1F line.long 0x00 "HUB_CONFIG,HUB Configuration Register" bitfld.long 0x00 3. " HUB_ISOLATE ,Isolate all hub ports from the other ports of the switch" "Not isolated,Isolated" bitfld.long 0x00 2. " TRIGGER_MODE ,Enable single frame trigger mode" "Disabled,Enabled" bitfld.long 0x00 1. " RETRANSMIT_ENA ,Enable Hub retransmit capability" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HUB_ENA ,Enable integrated HUB operation" "Disabled,Enabled" line.long 0x04 "HUB_GROUP,HUB Port Group Register" sif cpuis("R9A06G034-CM3") bitfld.long 0x04 1. " HUB_GROUP[1] ,Combine port 1 to a hub group" "Not combined,Combined" bitfld.long 0x04 0. " [0] ,Combine port 0 to a hub group" "Not combined,Combined" else bitfld.long 0x04 3. " HUB_GROUP[3] ,Combine port 3 to a hub group" "Not combined,Combined" bitfld.long 0x04 2. " [2] ,Combine port 2 to a hub group" "Not combined,Combined" bitfld.long 0x04 1. " [1] ,Combine port 1 to a hub group" "Not combined,Combined" bitfld.long 0x04 0. " [0] ,Combine port 0 to a hub group" "Not combined,Combined" endif line.long 0x08 "HUB_DEFPORT,HUB Default Port Selection Register" sif cpuis("R9A06G034-CM3") bitfld.long 0x08 0.--3. " HUB_DEFPORT ,Default port within the hub group where all traffic from a port outside the group is forwarded to" ",Port 0,Port 1,?..." else bitfld.long 0x08 0.--3. " HUB_DEFPORT ,Default port within the hub group where all traffic from a port outside the group is forwarded to" ",Port 0,Port 1,,Port 2,,,,Port 3,?..." endif line.long 0x0C "HUB_TRIGGER_IMMEDIATE,HUB Transmission Trigger Immediate Register" sif cpuis("R9A06G034-CM3") bitfld.long 0x0C 0.--3. " HUB_TRIGGER_IMMEDIATE ,Trigger transmission of a single frame from given port within the hub group" ",Port 0,Port 1,?..." else bitfld.long 0x0C 0.--3. " HUB_TRIGGER_IMMEDIATE ,Trigger transmission of a single frame from given port within the hub group" ",Port 0,Port 1,,Port 2,,,,Port 3,?..." endif line.long 0x10 "HUB_TRIGGER_AT,HUB Transmission Trigger At Register" sif cpuis("R9A06G034-CM3") bitfld.long 0x10 0.--3. " HUB_TRIGGER_AT ,Trigger transmission of a single frame at a specific time" ",Port 0,Port 1,?..." else bitfld.long 0x10 0.--3. " HUB_TRIGGER_AT ,Trigger transmission of a single frame at a specific time" ",Port 0,Port 1,,Port 2,,,,Port 3,?..." endif line.long 0x14 "HUB_TTIME,HUB Transmission Time Define Register" textline " " line.long 0x18 "HUB_IRQ_CONTROL,HUB Interrupt Control Register" bitfld.long 0x18 6. " TRIGGER_TIMER_ACK ,Enable interrupt when Hub transmit started after writing the HUB_TRIGGER_AT register and the timeout value has been reached (register HUB_TTIME)" "Disabled,Enabled" bitfld.long 0x18 5. " TRIGGER_IMMEDIATE_ACK ,Enable interrupt when Hub transmit started after writing the HUB_TRIGGER_IMMEDIATE register" "Disabled,Enabled" bitfld.long 0x18 4. " CHANGE_DET ,Enable interrupt for Hub TX state machine port state change request detection" "Disabled,Enabled" textline " " sif !cpuis("R9A06G034-CM3") bitfld.long 0x18 3. " RX_TRIGGER[3] ,Enable interrupt on receive pattern match trigger function port 3" "Disabled,Enabled" bitfld.long 0x18 2. " [2] ,Enable interrupt on receive pattern match trigger function port 2" "Disabled,Enabled" textline " " endif bitfld.long 0x18 1. " RX_TRIGGER[1] ,Enable interrupt on receive pattern match trigger function port 1" "Disabled,Enabled" bitfld.long 0x18 0. " [0] ,Enable interrupt on receive pattern match trigger function port 0" "Disabled,Enabled" line.long 0x1C "HUB_IRQ_STAT_ACK,HUB Interrupt Status/ACK Register" eventfld.long 0x1C 6. " TRIGGER_TIMER_ACK ,Status of interrupt when Hub transmit started after writing the HUB_TRIGGER_AT register and the timeout value has been reached (register HUB_TTIME)" "No interrupt,Interrupt" eventfld.long 0x1C 5. " TRIGGER_IMMEDIATE_ACK ,Status of interrupt when Hub transmit started after writing the HUB_TRIGGER_IMMEDIATE register" "No interrupt,Interrupt" eventfld.long 0x1C 4. " CHANGE_DET ,Status of interrupt for Hub TX state machine port state change request detection" "No interrupt,Interrupt" textline " " sif !cpuis("R9A06G034-CM3") eventfld.long 0x1C 3. " RX_TRIGGER[3] ,Status of interrupt on receive pattern match trigger function port 3" "No interrupt,Interrupt" eventfld.long 0x1C 2. " [2] ,Status of interrupt on receive pattern match trigger function port 2" "No interrupt,Interrupt" textline " " endif eventfld.long 0x1C 1. " RX_TRIGGER[1] ,Status of interrupt on receive pattern match trigger function port 1" "No interrupt,Interrupt" eventfld.long 0x1C 0. " [0] ,Status of interrupt on receive pattern match trigger function port 0" "No interrupt,Interrupt" textline " " rgroup.long 0x3E20++0x07 line.long 0x00 "HUB_STATUS,HUB Status Register" bitfld.long 0x00 12. " TX_CHANGE_PENDING ,Pending change request in the hub transmitter that is unsolved and causes the Hub to stop operation" "Not changed,Changed" bitfld.long 0x00 11. " SPEED_OK ,Port speed of all group ports match" "Not matched,Matched" bitfld.long 0x00 10. " TX_BUSY ,Transmit busy status" "Not busy,Busy" bitfld.long 0x00 9. " TX_ACTIVE ,Hub global transmit state machine hub mode enter" "Not entered,Entered" textline " " sif cpuis("R9A06G034-CM3") bitfld.long 0x00 1. " PORTS_ACTIVE[1] ,Port 1 active" "Not active,Active" bitfld.long 0x00 0. " [0] ,Port 0 active" "Not active,Active" else bitfld.long 0x00 3. " PORTS_ACTIVE[3] ,Port 3 active" "Not active,Active" bitfld.long 0x00 2. " [2] ,Port 2 active" "Not active,Active" bitfld.long 0x00 1. " [1] ,Port 1 active" "Not active,Active" bitfld.long 0x00 0. " [0] ,Port 0 active" "Not active,Active" endif line.long 0x04 "HUB_OPORT_STATUS,HUB Output Port Status Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 3. " HUB_OPORT_STATUS[3] ,Port 3 data available status" "Not available,Available" bitfld.long 0x04 2. " [2] ,Port 2 data available status" "Not available,Available" textline " " endif bitfld.long 0x04 1. " HUB_OPORT_STATUS[1] ,Port 1 data available status" "Not available,Available" bitfld.long 0x04 0. " [0] ,Port 0 data available status" "Not available,Available" textline " " group.long 0x3E80++0x03 line.long 0x00 "RXMATCH_CONFIG0,RX Pattern Match Configuration For PORT 0" bitfld.long 0x00 7. " PATTERN_EN[7] ,Enable pattern 7 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable pattern 6 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable pattern 5 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable pattern 4 on the port (RX)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Enable pattern 3 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable pattern 2 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable pattern 1 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable pattern 0 on the port (RX)" "Disabled,Enabled" group.long 0x3E84++0x03 line.long 0x00 "RXMATCH_CONFIG1,RX Pattern Match Configuration For PORT 1" bitfld.long 0x00 7. " PATTERN_EN[7] ,Enable pattern 7 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable pattern 6 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable pattern 5 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable pattern 4 on the port (RX)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Enable pattern 3 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable pattern 2 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable pattern 1 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable pattern 0 on the port (RX)" "Disabled,Enabled" group.long 0x3E88++0x03 line.long 0x00 "RXMATCH_CONFIG2,RX Pattern Match Configuration For PORT 2" bitfld.long 0x00 7. " PATTERN_EN[7] ,Enable pattern 7 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable pattern 6 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable pattern 5 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable pattern 4 on the port (RX)" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Enable pattern 3 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable pattern 2 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable pattern 1 on the port (RX)" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable pattern 0 on the port (RX)" "Disabled,Enabled" textline " " if (((per.l(ad:0x44050000+0x3EB0)&0x08)==0x08)) group.long 0x3EB0++0x03 line.long 0x00 "PATTERN_CTRL0,RX Pattern Match Function Control For Pattern 0" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EB0++0x03 line.long 0x00 "PATTERN_CTRL0,RX Pattern Match Function Control For Pattern 0" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EB4)&0x08)==0x08)) group.long 0x3EB4++0x03 line.long 0x00 "PATTERN_CTRL1,RX Pattern Match Function Control For Pattern 1" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EB4++0x03 line.long 0x00 "PATTERN_CTRL1,RX Pattern Match Function Control For Pattern 1" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EB8)&0x08)==0x08)) group.long 0x3EB8++0x03 line.long 0x00 "PATTERN_CTRL2,RX Pattern Match Function Control For Pattern 2" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EB8++0x03 line.long 0x00 "PATTERN_CTRL2,RX Pattern Match Function Control For Pattern 2" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EBC)&0x08)==0x08)) group.long 0x3EBC++0x03 line.long 0x00 "PATTERN_CTRL3,RX Pattern Match Function Control For Pattern 3" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EBC++0x03 line.long 0x00 "PATTERN_CTRL3,RX Pattern Match Function Control For Pattern 3" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EC0)&0x08)==0x08)) group.long 0x3EC0++0x03 line.long 0x00 "PATTERN_CTRL4,RX Pattern Match Function Control For Pattern 4" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EC0++0x03 line.long 0x00 "PATTERN_CTRL4,RX Pattern Match Function Control For Pattern 4" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EC4)&0x08)==0x08)) group.long 0x3EC4++0x03 line.long 0x00 "PATTERN_CTRL5,RX Pattern Match Function Control For Pattern 5" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EC4++0x03 line.long 0x00 "PATTERN_CTRL5,RX Pattern Match Function Control For Pattern 5" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3EC8)&0x08)==0x08)) group.long 0x3EC8++0x03 line.long 0x00 "PATTERN_CTRL6,RX Pattern Match Function Control For Pattern 6" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3EC8++0x03 line.long 0x00 "PATTERN_CTRL6,RX Pattern Match Function Control For Pattern 6" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif if (((per.l(ad:0x44050000+0x3ECC)&0x08)==0x08)) group.long 0x3ECC++0x03 line.long 0x00 "PATTERN_CTRL7,RX Pattern Match Function Control For Pattern 7" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 8. " HUBTRIGGER ,Port defined in the PORTMASK setting allowed for transmitting one frame" "Not allowed,Allowed" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" textline " " bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" else group.long 0x3ECC++0x03 line.long 0x00 "PATTERN_CTRL7,RX Pattern Match Function Control For Pattern 7" sif !cpuis("R9A06G034-CM3") bitfld.long 0x00 20. " PORTMASK[4] ,Port 4 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 19. " [3] ,Port 3 mask used depending on the control bits above" "Unmasked,Masked" textline " " endif bitfld.long 0x00 18. " PORTMASK[2] ,Port 2 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 17. " [1] ,Port 1 mask used depending on the control bits above" "Unmasked,Masked" bitfld.long 0x00 16. " [0] ,Port 0 mask used depending on the control bits above" "Unmasked,Masked" textline " " bitfld.long 0x00 12.--13. " PRIORITY ,Priority of the frame" "Lowest,1,2,Highest" bitfld.long 0x00 3. " SET_PRIO ,Set frame priority, overriding normal classification" "Disabled,Enabled" bitfld.long 0x00 2. " DISCARD ,Frame discard" "Not discarded,Discarded" bitfld.long 0x00 1. " MGMTFWD ,Frame forward to management port only" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 0. " MATCH_NOT ,Pattern not matched" "Matched,Not matched" endif textline " " group.long 0x3ED0++0x07 line.long 0x00 "PTN_IRQ_CONTROL,RX Pattern Match Interrupt Control Register" bitfld.long 0x00 7. " MATCHINT[7] ,Enable interrupt on receive pattern 7 match" "Disabled,Enabled" bitfld.long 0x00 6. " [6] ,Enable interrupt on receive pattern 6 match" "Disabled,Enabled" bitfld.long 0x00 5. " [5] ,Enable interrupt on receive pattern 5 match" "Disabled,Enabled" bitfld.long 0x00 4. " [4] ,Enable interrupt on receive pattern 4 match" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " [3] ,Enable interrupt on receive pattern 3 match" "Disabled,Enabled" bitfld.long 0x00 2. " [2] ,Enable interrupt on receive pattern 2 match" "Disabled,Enabled" bitfld.long 0x00 1. " [1] ,Enable interrupt on receive pattern 1 match" "Disabled,Enabled" bitfld.long 0x00 0. " [0] ,Enable interrupt on receive pattern 0 match" "Disabled,Enabled" line.long 0x04 "PTN_IRQ_STAT_ACK,RX Pattern Match Interrupt Status/ACK Register" eventfld.long 0x04 7. " MATCHINT[7] ,Status of interrupt on receive pattern 7 match" "No interrupt,Interrupt" eventfld.long 0x04 6. " [6] ,Status of interrupt on receive pattern 6 match" "No interrupt,Interrupt" eventfld.long 0x04 5. " [5] ,Status of interrupt on receive pattern 5 match" "No interrupt,Interrupt" eventfld.long 0x04 4. " [4] ,Status of interrupt on receive pattern 4 match" "No interrupt,Interrupt" textline " " eventfld.long 0x04 3. " [3] ,Status of interrupt on receive pattern 3 match" "No interrupt,Interrupt" eventfld.long 0x04 2. " [2] ,Status of interrupt on receive pattern 2 match" "No interrupt,Interrupt" eventfld.long 0x04 1. " [1] ,Status of interrupt on receive pattern 1 match" "No interrupt,Interrupt" eventfld.long 0x04 0. " [0] ,Status of interrupt on receive pattern 0 match" "No interrupt,Interrupt" group.long 0x3EDC++0x0F line.long 0x00 "PATTERN_SEL,RX Pattern Number Selection Register" bitfld.long 0x00 0.--2. " PATTERN_SEL ,Pattern number which is selected for read/write through the following registers PTRN_CMP_*, PTRN_MSK_*" "0,1,2,3,4,5,6,7" line.long 0x04 "PTRN_CMP_30,Pattern Compare Value Bytes 3 .. 0" hexmask.long.byte 0x04 24.--31. 1. " PTRN_CMP_30[3] ,Byte 3 of pattern compare value" hexmask.long.byte 0x04 16.--23. 1. " [2] ,Byte 2 of pattern compare value" hexmask.long.byte 0x04 8.--15. 1. " [1] ,Byte 1 of pattern compare value" hexmask.long.byte 0x04 0.--7. 1. " [0] ,Byte 0 of pattern compare value" line.long 0x08 "PTRN_CMP_74,Pattern Compare Value Bytes 7 .. 4" hexmask.long.byte 0x08 24.--31. 1. " PTRN_CMP_74[3] ,Byte 7 of pattern compare value" hexmask.long.byte 0x08 16.--23. 1. " [2] ,Byte 6 of pattern compare value" hexmask.long.byte 0x08 8.--15. 1. " [1] ,Byte 5 of pattern compare value" hexmask.long.byte 0x08 0.--7. 1. " [0] ,Byte 4 of pattern compare value" line.long 0x0C "PTRN_CMP_118,Pattern Compare Value Bytes 11 .. 8" hexmask.long.byte 0x0C 24.--31. 1. " PTRN_CMP_118[3] ,Byte 11 of pattern compare value" hexmask.long.byte 0x0C 16.--23. 1. " [2] ,Byte 10 of pattern compare value" hexmask.long.byte 0x0C 8.--15. 1. " [1] ,Byte 9 of pattern compare value" hexmask.long.byte 0x0C 0.--7. 1. " [0] ,Byte 8 of pattern compare value" textline " " group.long 0x3EF0++0x0B line.long 0x00 "PTRN_MSK_30,Pattern Mask for Bytes 3 .. 0" bitfld.long 0x00 31. "PTRN_MSK_30 ,Pattern mask for byte 3 bit 7" "0,1" bitfld.long 0x00 30. ",Pattern mask for byte 3 bit 6" "0,1" bitfld.long 0x00 29. ",Pattern mask for byte 3 bit 5" "0,1" bitfld.long 0x00 28. ",Pattern mask for byte 3 bit 4" "0,1" bitfld.long 0x00 27. ",Pattern mask for byte 3 bit 3" "0,1" bitfld.long 0x00 26. ",Pattern mask for byte 3 bit 2" "0,1" bitfld.long 0x00 25. ",Pattern mask for byte 3 bit 1" "0,1" bitfld.long 0x00 24. ",Pattern mask for byte 3 bit 0" "0,1" bitfld.long 0x00 23. ",Pattern mask for byte 2 bit 7" "0,1" bitfld.long 0x00 22. ",Pattern mask for byte 2 bit 6" "0,1" bitfld.long 0x00 21. ",Pattern mask for byte 2 bit 5" "0,1" bitfld.long 0x00 20. ",Pattern mask for byte 2 bit 4" "0,1" bitfld.long 0x00 19. ",Pattern mask for byte 2 bit 3" "0,1" bitfld.long 0x00 18. ",Pattern mask for byte 2 bit 2" "0,1" bitfld.long 0x00 17. ",Pattern mask for byte 2 bit 1" "0,1" bitfld.long 0x00 16. ",Pattern mask for byte 2 bit 0" "0,1" bitfld.long 0x00 15. ",Pattern mask for byte 1 bit 7" "0,1" bitfld.long 0x00 14. ",Pattern mask for byte 1 bit 6" "0,1" bitfld.long 0x00 13. ",Pattern mask for byte 1 bit 5" "0,1" bitfld.long 0x00 12. ",Pattern mask for byte 1 bit 4" "0,1" bitfld.long 0x00 11. ",Pattern mask for byte 1 bit 3" "0,1" bitfld.long 0x00 10. ",Pattern mask for byte 1 bit 2" "0,1" bitfld.long 0x00 9. ",Pattern mask for byte 1 bit 1" "0,1" bitfld.long 0x00 8. ",Pattern mask for byte 1 bit 0" "0,1" bitfld.long 0x00 7. ",Pattern mask for byte 0 bit 7" "0,1" bitfld.long 0x00 6. ",Pattern mask for byte 0 bit 6" "0,1" bitfld.long 0x00 5. ",Pattern mask for byte 0 bit 5" "0,1" bitfld.long 0x00 4. ",Pattern mask for byte 0 bit 4" "0,1" bitfld.long 0x00 3. ",Pattern mask for byte 0 bit 3" "0,1" bitfld.long 0x00 2. ",Pattern mask for byte 0 bit 2" "0,1" bitfld.long 0x00 1. ",Pattern mask for byte 0 bit 1" "0,1" bitfld.long 0x00 0. ",Pattern mask for byte 0 bit 0" "0,1" line.long 0x04 "PTRN_MSK_74,Pattern Mask for Bytes 7 .. 4" bitfld.long 0x04 31. "PTRN_MSK_74 ,Pattern mask for byte 7 bit 7" "0,1" bitfld.long 0x04 30. ",Pattern mask for byte 7 bit 6" "0,1" bitfld.long 0x04 29. ",Pattern mask for byte 7 bit 5" "0,1" bitfld.long 0x04 28. ",Pattern mask for byte 7 bit 4" "0,1" bitfld.long 0x04 27. ",Pattern mask for byte 7 bit 3" "0,1" bitfld.long 0x04 26. ",Pattern mask for byte 7 bit 2" "0,1" bitfld.long 0x04 25. ",Pattern mask for byte 7 bit 1" "0,1" bitfld.long 0x04 24. ",Pattern mask for byte 7 bit 0" "0,1" bitfld.long 0x04 23. ",Pattern mask for byte 6 bit 7" "0,1" bitfld.long 0x04 22. ",Pattern mask for byte 6 bit 6" "0,1" bitfld.long 0x04 21. ",Pattern mask for byte 6 bit 5" "0,1" bitfld.long 0x04 20. ",Pattern mask for byte 6 bit 4" "0,1" bitfld.long 0x04 19. ",Pattern mask for byte 6 bit 3" "0,1" bitfld.long 0x04 18. ",Pattern mask for byte 6 bit 2" "0,1" bitfld.long 0x04 17. ",Pattern mask for byte 6 bit 1" "0,1" bitfld.long 0x04 16. ",Pattern mask for byte 6 bit 0" "0,1" bitfld.long 0x04 15. ",Pattern mask for byte 5 bit 7" "0,1" bitfld.long 0x04 14. ",Pattern mask for byte 5 bit 6" "0,1" bitfld.long 0x04 13. ",Pattern mask for byte 5 bit 5" "0,1" bitfld.long 0x04 12. ",Pattern mask for byte 5 bit 4" "0,1" bitfld.long 0x04 11. ",Pattern mask for byte 5 bit 3" "0,1" bitfld.long 0x04 10. ",Pattern mask for byte 5 bit 2" "0,1" bitfld.long 0x04 9. ",Pattern mask for byte 5 bit 1" "0,1" bitfld.long 0x04 8. ",Pattern mask for byte 5 bit 0" "0,1" bitfld.long 0x04 7. ",Pattern mask for byte 4 bit 7" "0,1" bitfld.long 0x04 6. ",Pattern mask for byte 4 bit 6" "0,1" bitfld.long 0x04 5. ",Pattern mask for byte 4 bit 5" "0,1" bitfld.long 0x04 4. ",Pattern mask for byte 4 bit 4" "0,1" bitfld.long 0x04 3. ",Pattern mask for byte 4 bit 3" "0,1" bitfld.long 0x04 2. ",Pattern mask for byte 4 bit 2" "0,1" bitfld.long 0x04 1. ",Pattern mask for byte 4 bit 1" "0,1" bitfld.long 0x04 0. ",Pattern mask for byte 4 bit 0" "0,1" line.long 0x08 "PTRN_MSK_118,Pattern Mask for Bytes 11 .. 8" bitfld.long 0x08 31. "PTRN_MSK_118 ,Pattern mask for byte 11 bit 7" "0,1" bitfld.long 0x08 30. ",Pattern mask for byte 11 bit 6" "0,1" bitfld.long 0x08 29. ",Pattern mask for byte 11 bit 5" "0,1" bitfld.long 0x08 28. ",Pattern mask for byte 11 bit 4" "0,1" bitfld.long 0x08 27. ",Pattern mask for byte 11 bit 3" "0,1" bitfld.long 0x08 26. ",Pattern mask for byte 11 bit 2" "0,1" bitfld.long 0x08 25. ",Pattern mask for byte 11 bit 1" "0,1" bitfld.long 0x08 24. ",Pattern mask for byte 11 bit 0" "0,1" bitfld.long 0x08 23. ",Pattern mask for byte 10 bit 7" "0,1" bitfld.long 0x08 22. ",Pattern mask for byte 10 bit 6" "0,1" bitfld.long 0x08 21. ",Pattern mask for byte 10 bit 5" "0,1" bitfld.long 0x08 20. ",Pattern mask for byte 10 bit 4" "0,1" bitfld.long 0x08 19. ",Pattern mask for byte 10 bit 3" "0,1" bitfld.long 0x08 18. ",Pattern mask for byte 10 bit 2" "0,1" bitfld.long 0x08 17. ",Pattern mask for byte 10 bit 1" "0,1" bitfld.long 0x08 16. ",Pattern mask for byte 10 bit 0" "0,1" bitfld.long 0x08 15. ",Pattern mask for byte 9 bit 7" "0,1" bitfld.long 0x08 14. ",Pattern mask for byte 9 bit 6" "0,1" bitfld.long 0x08 13. ",Pattern mask for byte 9 bit 5" "0,1" bitfld.long 0x08 12. ",Pattern mask for byte 9 bit 4" "0,1" bitfld.long 0x08 11. ",Pattern mask for byte 9 bit 3" "0,1" bitfld.long 0x08 10. ",Pattern mask for byte 9 bit 2" "0,1" bitfld.long 0x08 9. ",Pattern mask for byte 9 bit 1" "0,1" bitfld.long 0x08 8. ",Pattern mask for byte 9 bit 0" "0,1" bitfld.long 0x08 7. ",Pattern mask for byte 8 bit 7" "0,1" bitfld.long 0x08 6. ",Pattern mask for byte 8 bit 6" "0,1" bitfld.long 0x08 5. ",Pattern mask for byte 8 bit 5" "0,1" bitfld.long 0x08 4. ",Pattern mask for byte 8 bit 4" "0,1" bitfld.long 0x08 3. ",Pattern mask for byte 8 bit 3" "0,1" bitfld.long 0x08 2. ",Pattern mask for byte 8 bit 2" "0,1" bitfld.long 0x08 1. ",Pattern mask for byte 8 bit 1" "0,1" bitfld.long 0x08 0. ",Pattern mask for byte 8 bit 0" "0,1" textline " " group.long 0x3F00++0x33 line.long 0x00 "TDMA_CONFIG,TDMA Configuration Register" rbitfld.long 0x00 1. " WAIT_START ,Scheduler is enabled but has not yet reached the time given in register TDMA_START" "Disabled,Enabled" bitfld.long 0x00 0. " TDMA_ENA ,Enable TDMA scheduler" "Disabled,Enabled" line.long 0x04 "TDMA_PORTS,TDMA Scheduling Enable Register" sif !cpuis("R9A06G034-CM3") bitfld.long 0x04 4. " PORT4 ,Port 4 define the ports that should use TDMA scheduling" "Disabled,Enabled" bitfld.long 0x04 3. " PORT3 ,Port 3 define the ports that should use TDMA scheduling" "Disabled,Enabled" textline " " endif bitfld.long 0x04 2. " PORT2 ,Port 2 define the ports that should use TDMA scheduling" "Disabled,Enabled" bitfld.long 0x04 1. " PORT1 ,Port 1 define the ports that should use TDMA scheduling" "Disabled,Enabled" bitfld.long 0x04 0. " PORT0 ,Port 0 define the ports that should use TDMA scheduling" "Disabled,Enabled" line.long 0x08 "TDMA_START,TDMA Start Time Set Register" line.long 0x0C "TDMA_MODULO,TDMA System Timer Modulo" line.long 0x10 "TDMA_CYCLE,TDMA Periodic Cycle Set Register" line.long 0x14 "TDMA_T1,TDMA 1st Time Offset" line.long 0x18 "TDMA_T2,TDMA 2nd Time Offset" line.long 0x1C "TDMA_T3,TDMA 3rd Time Offset" line.long 0x20 "QUEUES_TS,TDMA 1st Slot Transmit Enable" bitfld.long 0x20 3. " QUEUE3 ,Queue 3 allowed for transmit at cycle start (until T1)" "Not allowed,Allowed" bitfld.long 0x20 2. " QUEUE2 ,Queue 2 allowed for transmit at cycle start (until T1)" "Not allowed,Allowed" bitfld.long 0x20 1. " QUEUE1 ,Queue 1 allowed for transmit at cycle start (until T1)" "Not allowed,Allowed" textline " " bitfld.long 0x20 0. " QUEUE0 ,Queue 0 allowed for transmit at cycle start (until T1)" "Not allowed,Allowed" line.long 0x24 "QUEUES_T1,TDMA 2nd Slot Transmit Enable" bitfld.long 0x24 3. " QUEUE3 ,Queue 3 allowed to transmit from time T1 until T2 (2nd slot)" "Not allowed,Allowed" bitfld.long 0x24 2. " QUEUE2 ,Queue 2 allowed to transmit from time T1 until T2 (2nd slot)" "Not allowed,Allowed" bitfld.long 0x24 1. " QUEUE1 ,Queue 1 allowed to transmit from time T1 until T2 (2nd slot)" "Not allowed,Allowed" textline " " bitfld.long 0x24 0. " QUEUE0 ,Queue 0 allowed to transmit from time T1 until T2 (2nd slot)" "Not allowed,Allowed" line.long 0x28 "QUEUES_T2,TDMA 3rd Slot Transmit Enable" bitfld.long 0x28 3. " QUEUE3 ,Queue 3 allowed to transmit from time T2 until T3 (3rd slot)" "Not allowed,Allowed" bitfld.long 0x28 2. " QUEUE2 ,Queue 2 allowed to transmit from time T2 until T3 (3rd slot)" "Not allowed,Allowed" bitfld.long 0x28 1. " QUEUE1 ,Queue 1 allowed to transmit from time T2 until T3 (3rd slot)" "Not allowed,Allowed" textline " " bitfld.long 0x28 0. " QUEUE0 ,Queue 0 allowed to transmit from time T2 until T3 (3rd slot)" "Not allowed,Allowed" line.long 0x2C "QUEUES_T3,TDMA Last Slot Transmit Enable" bitfld.long 0x2C 3. " QUEUE3 ,Queue 3 allowed to transmit from time T3 until end of cycle" "Not allowed,Allowed" bitfld.long 0x2C 2. " QUEUE2 ,Queue 2 allowed to transmit from time T3 until end of cycle" "Not allowed,Allowed" bitfld.long 0x2C 1. " QUEUE1 ,Queue 1 allowed to transmit from time T3 until end of cycle" "Not allowed,Allowed" textline " " bitfld.long 0x2C 0. " QUEUE0 ,Queue 0 allowed to transmit from time T3 until end of cycle" "Not allowed,Allowed" line.long 0x30 "QUEUES_START,TDMA First Cycle Transmit Enable" bitfld.long 0x30 3. " QUEUE3 ,Queue 3 allowed to transmit when the scheduler was enabled until the system timer has reached the first cycle time given in TDMA_START" "Not allowed,Allowed" bitfld.long 0x30 2. " QUEUE2 ,Queue 2 allowed to transmit when the scheduler was enabled until the system timer has reached the first cycle time given in TDMA_START" "Not allowed,Allowed" bitfld.long 0x30 1. " QUEUE1 ,Queue 1 allowed to transmit when the scheduler was enabled until the system timer has reached the first cycle time given in TDMA_START" "Not allowed,Allowed" textline " " bitfld.long 0x30 0. " QUEUE0 ,Queue 0 allowed to transmit when the scheduler was enabled until the system timer has reached the first cycle time given in TDMA_START" "Not allowed,Allowed" rgroup.long 0x3F34++0x03 line.long 0x00 "TIME_LOAD_NEXT,TDMA Calculated Next Loading Time" group.long 0x3F38++0x07 line.long 0x00 "TDMA_IRQ_CONTROL,TDMA Interrupt Control Register" bitfld.long 0x00 3. " T3_EN ,Enable interrupt on TDMA cycle T3 offset reached" "Disabled,Enabled" bitfld.long 0x00 2. " T2_EN ,Enable interrupt on TDMA cycle T2 offset reached" "Disabled,Enabled" bitfld.long 0x00 1. " T1_EN ,Enable interrupt on TDMA cycle T1 offset reached" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CYCLE_EN ,Enable interrupt on TDMA cycle start" "Disabled,Enabled" line.long 0x04 "TDMA_IRQ_STAT_ACK,TDMA Interrupt Status/ACK Register" eventfld.long 0x04 3. " T3_EN ,Status of interrupt on TDMA cycle T3 offset reached" "No interrupt,Interrupt" eventfld.long 0x04 2. " T2_EN ,Status of interrupt on TDMA cycle T2 offset reached" "No interrupt,Interrupt" eventfld.long 0x04 1. " T1_EN ,Status of interrupt on TDMA cycle T1 offset reached" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " CYCLE_EN ,Status of interrupt on TDMA cycle start" "No interrupt,Interrupt" width 0x0B endif tree.end tree "ETHCAT (EtherCAT Slave Controller)" base ad:0x44010000 width 28. sif cpuis("R7S910*") if (((per.l(ad:0x44010000-0x11000))&0x01)==0x00) group.long (0x00000-0x10F00)++0x07 line.long 0x00 "CATOFFADD,EtherCAT PHY Offset Address Setting Register" hexmask.long.byte 0x00 0.--4. 0x01 " OADD0_4 ,PHY offset address setting" line.long 0x04 "CATEMMD,EtherCAT Operation Mode Setting Register" bitfld.long 0x04 0. " EEPROMSIZE ,EEPROM memory size specification" "16Kbits or less,32Kbits to 4Mbits" group.long (0x00000-0x10EF4)++0x03 line.long 0x00 "CATTXCSFT,EtherCAT TXC Shift Setting Register" bitfld.long 0x00 2.--3. " TXSFT10_11 ,ETH1_TXC delay time setting" "0ns,10ns,20ns,30ns" bitfld.long 0x00 0.--1. " TXSFT01_00 ,ETH0_TXC delay time setting" "0ns,10ns,20ns,30ns" else rgroup.long (0x00000-0x10F00)++0x07 line.long 0x00 "CATOFFADD,EtherCAT PHY Offset Address Setting Register" hexmask.long.byte 0x00 0.--4. 0x01 " OADD0_4 ,PHY offset address setting" line.long 0x04 "CATEMMD,EtherCAT Operation Mode Setting Register" bitfld.long 0x04 0. " EEPROMSIZE ,EEPROM memory size specification" "16Kbits or less,32Kbits to 4Mbits" rgroup.long (0x00000-0x10EF4)++0x03 line.long 0x00 "CATTXCSFT,EtherCAT TXC Shift Setting Register" bitfld.long 0x00 2.--3. " TXSFT10_11 ,ETH1_TXC delay time setting" "0ns,10ns,20ns,30ns" bitfld.long 0x00 0.--1. " TXSFT01_00 ,ETH0_TXC delay time setting" "0ns,10ns,20ns,30ns" endif endif if (((per.b(ad:0x44010000+0x21)&0x01)==0x00))&&(((per.b(ad:0x44010000+0x31)&0x01)==0x00))||((((per.b(ad:0x44010000+0x20)&0x01)==0x01))&&(((per.b(ad:0x44010000+0x21)&0x01)==0x01)))||((((per.b(ad:0x44010000+0x30)&0x01)==0x01))&&(((per.b(ad:0x44010000+0x31)&0x01)==0x01))) rgroup.byte 0x00++0x01 "ESC Information Registers" line.byte 0x00 "TYPE,Type Register" line.byte 0x01 "REVISION,Revision Register" rgroup.word 0x02++0x01 line.word 0x00 "BUILD,Build Register" rgroup.byte 0x04++0x03 line.byte 0x00 "FMMU_NUM,FMMUs Supported Register" line.byte 0x01 "SYNC_MANAGER,SyncManagers Supported Register" line.byte 0x02 "RAM_SIZE,RAM Size Register" line.byte 0x03 "PORT_DESC,Port Descriptor Register" bitfld.byte 0x03 6.--7. " P3 ,Port 3 configuration" "Not implemented,Not configured,EBUS,MII" bitfld.byte 0x03 4.--5. " P2 ,Port 2 configuration" "Not implemented,Not configured,EBUS,MII" bitfld.byte 0x03 2.--3. " P1 ,Port 1 configuration" "Not implemented,Not configured,EBUS,MII" newline bitfld.byte 0x03 0.--1. " P0 ,Port 0 configuration" "Not implemented,Not configured,EBUS,MII" rgroup.word 0x08++0x01 line.word 0x00 "FEATURE,ESC Features Supported Register" bitfld.word 0x00 11. " FSCONFIG ,Fixed FMMU/SyncManager configuration" "Variable,Fixed" bitfld.word 0x00 10. " RWSUPP ,EtherCAT read/write command support" "Supported,Not supported" bitfld.word 0x00 9. " LRW ,EtherCAT LRW command support" "Supported,Not supported" newline bitfld.word 0x00 8. " DCSYNC ,Enhanced DC SYNC activation" "Not available,Available" bitfld.word 0x00 7. " FCS ,Separate handling of FCS errors" "Not supported,Supported" bitfld.word 0x00 6. " LINKDECMII ,Enhanced link detection in MII" "Not available,Available" newline bitfld.word 0x00 3. " DCWID ,Distributed clocks (width)" "32 bits,64 bits" bitfld.word 0x00 2. " DC ,Distributed clocks" "Not available,Available" bitfld.word 0x00 0. " FMMU ,FMMU operation" "Bit oriented,Byte oriented" rgroup.word 0x10++0x02 "Station Address Registers" line.word 0x00 "STATION_ADR,Configured Station Address Register" group.word 0x12++0x01 line.word 0x00 "STATION_ALIAS,Configured Station Alias Register" group.byte 0x20++0x01 "Write Protect Registers" line.byte 0x00 "WR_REG_ENABLE,Write Register Enable Register" bitfld.byte 0x00 0. " ENABLE ,Unlock write protection temporarily while registers are write protected" "Locked,Unlocked" line.byte 0x01 "WR_REG_PROTECT,Write Register Protection Register" bitfld.byte 0x01 0. " PROTECT ,Protection of registers against writing" "Disabled,Enabled" group.byte 0x30++0x01 line.byte 0x00 "ESC_WR_ENABLE,ESC Write Enable Register" bitfld.byte 0x00 0. " ENABLE ,Unlock the write protection temporarily while registers and memories are write protected by ESC write protection" "Locked,Unlocked" line.byte 0x01 "ESC_WR_PROTECT,ESC Write Protection Register" bitfld.byte 0x01 0. " PROTECT ,Protection of registers and process memories against writing" "Disabled,Enabled" wgroup.byte 0x40++0x00 "Data Link Layer Registers" line.byte 0x00 "ESC_RESET_ECAT_W,ESC Reset EtherCAT Register" rgroup.byte 0x40++0x00 line.byte 0x00 "ESC_RESET_ECAT_R,ESC Reset EtherCAT Register" bitfld.byte 0x00 0.--1. " RESET_ECAT ,Progress of the reset procedure" "Others,52h,45h,?..." wgroup.byte 0x41++0x00 line.byte 0x00 "ESC_RESET_PDI_W,ESC Reset PDI Register" rgroup.byte 0x41++0x00 line.byte 0x00 "ESC_RESET_PDI_R,ESC Reset PDI Register" bitfld.byte 0x00 0.--1. " RESET_PDI ,Progress of the reset procedure" "Others,52h,45h,?..." sif cpuis("R7S910*") group.long 0x100++0x03 line.long 0x00 "ESC_DL_CONTROL,ESC DL Control Register" bitfld.long 0x00 24. " STAALIAS ,Station alias" "Ignored,Used for all" bitfld.long 0x00 16.--18. " RXFIFO ,Set the RX FIFO size" "-40ns,-40ns,-40ns,-40ns,No change,No change,No change,Default" bitfld.long 0x00 10.--11. " LP1 ,Loop port 1 configuration" "Auto,Auto closed,Opened,Closed" newline bitfld.long 0x00 8.--9. " LP0 ,Loop port 0 configuration" "Auto,Auto closed,Opened,Closed" bitfld.long 0x00 1. " TEMPUSE ,Temporary use of bits 15 to 8 settings" "Permanent,Temporary" bitfld.long 0x00 0. " FWDRULE ,Forwarding rule" "Not forwarded,Not destroyed" else group.long 0x100++0x03 line.long 0x00 "ESC_DL_CONTROL,ESC DL Control Register" bitfld.long 0x00 24. " STAALIAS ,Station alias" "Ignored,Used for all" bitfld.long 0x00 16.--18. " RXFIFO ,Set the RX FIFO size" "-40ns,-40ns,-40ns,-40ns,No change,No change,No change,Default" bitfld.long 0x00 12.--13. " LP2 ,Loop port 2 configuration" "Auto,Auto closed,Opened,Closed" newline bitfld.long 0x00 10.--11. " LP1 ,Loop port 1 configuration" "Auto,Auto closed,Opened,Closed" bitfld.long 0x00 8.--9. " LP0 ,Loop port 0 configuration" "Auto,Auto closed,Opened,Closed" bitfld.long 0x00 1. " TEMPUSE ,Temporary use of bits 15 to 8 settings" "Permanent,Temporary" newline bitfld.long 0x00 0. " FWDRULE ,Forwarding rule" "Not forwarded,Not destroyed" endif group.word 0x108++0x01 line.word 0x00 "PHYSICAL_RW_OFFSET,Physical Read/Write Offset Register" hgroup.word 0x110++0x01 hide.word 0x00 "ESC_DL_STATUS,ESC DL Status Register" in hgroup.word 0x120++0x01 "Application Layer Registers" hide.word 0x00 "AL_CONTROL,AL Control Register" in hgroup.word 0x130++0x01 hide.word 0x00 "AL_STATUS,AL Status Register" in rgroup.word 0x134++0x01 line.word 0x00 "AL_STATUS_CODE,AL Status Code Register" group.byte 0x138++0x01 line.byte 0x00 "RUN_LED_OVERRIDE,RUN LED Override Register" bitfld.byte 0x00 4. " OVERRIDEEN ,Override enable" "Disabled,Enabled" bitfld.byte 0x00 0.--3. " LEDCODE ,LED code" "Off,CH:Flash 1x-12x,,,,,,,,,,,,Blinking,Flickering,On" line.byte 0x01 "ERR_LED_OVERRIDE,ERR LED Override Register" bitfld.byte 0x01 4. " OVERRIDEEN ,Override enable" "Disabled,Enabled" bitfld.byte 0x01 0.--3. " LEDCODE ,LED code" "Off,CH:Flash 1x-12x,,,,,,,,,,,,Blinking,Flickering,On" rgroup.byte 0x140++0x00 "PDI Registers" line.byte 0x00 "PDI_CONTROL,PDI Control Register" rgroup.byte 0x141++0x00 line.byte 0x00 "ESC_CONFIG,ESC Configuration Register" bitfld.byte 0x00 5. " ENLP1 ,Sets enhanced link detection for port 1" "Disabled,Enabled" bitfld.byte 0x00 4. " ENLP0 ,Sets enhanced link detection for port 0" "Disabled,Enabled" bitfld.byte 0x00 3. " DCLATCH ,Latch input unit for distributed clocks" "Disabled,Enabled" newline bitfld.byte 0x00 2. " DCSYNC ,SYNC output unit for distributed clocks" "Disabled,Enabled" bitfld.byte 0x00 1. " ENLALLP ,Sets enhanced link detection for all ports" "Disabled,Enabled" bitfld.byte 0x00 0. " DEVEMU ,Device emulation" "Set by the PDI,Value written to the AL ctrl reg" rgroup.byte 0x150++0x02 line.byte 0x00 "PDI_CONFIG,PDI Configuration Register" bitfld.byte 0x00 5.--7. " ONCHIPBUS ,Type of on-chip bus" ",,2,?..." sif cpuis("R7S910*") bitfld.byte 0x00 0.--4. " ONCHIPBUSCLK ,Frequency of the on-chip bus clock" ",,,,100MHz,?..." else bitfld.byte 0x00 0.--4. " ONCHIPBUSCLK ,Frequency of the on-chip bus clock" ",,,,,5,?..." endif line.byte 0x01 "SYNC_LATCH_CONFIG,SYNC/LATCH PDI Configuration Register" bitfld.byte 0x01 7. " SYNC1MAP ,Enable mapping of the SYNC1 state to bit3 of the AL event request register" "Disabled,Enabled" bitfld.byte 0x01 6. " SYNCLAT1 ,SYNC1/LATCH1 configuration" "LATCH1 input,SYNC1 output" bitfld.byte 0x01 4.--5. " SYNC1OUT ,SYNC1 output driver/polarity" ",,Active high,?..." newline bitfld.byte 0x01 3. " SYNC0MAP ,Enable mapping of the SYNC0 state to bit2 of the AL event request register" "Disabled,Enabled" bitfld.byte 0x01 2. " SYNCLAT0 ,SYNC0/LATCH0 configuration" "LATCH1 input,SYNC1 output" bitfld.byte 0x01 0.--1. " SYNC0OUT ,SYNC0 output driver/polarity" ",,Active high,?..." line.byte 0x02 "EXT_PDI_CONFIG,Extended PDI Configuration Register" bitfld.byte 0x02 0.--1. " DATABUSWID ,Data bus width of the PDI" "4 bytes,1 byte,2 bytes,?..." group.word 0x200++0x02 "Interrupt Registers" line.word 0x00 "ECAT_EVENT_MASK,EtherCAT Event Mask Register" bitfld.word 0x00 11. " SMSTA7 ,Mirror value of SyncManager 7 map" "Not mapped,Mapped" bitfld.word 0x00 10. " SMSTA6 ,Mirror value of SyncManager 6 map" "Not mapped,Mapped" bitfld.word 0x00 9. " SMSTA5 ,Mirror value of SyncManager 5 map" "Not mapped,Mapped" newline bitfld.word 0x00 8. " SMSTA4 ,Mirror value of SyncManager 4 map" "Not mapped,Mapped" bitfld.word 0x00 7. " SMSTA3 ,Mirror value of SyncManager 3 map" "Not mapped,Mapped" bitfld.word 0x00 6. " SMSTA2 ,Mirror value of SyncManager 2 map" "Not mapped,Mapped" newline bitfld.word 0x00 5. " SMSTA1 ,Mirror value of SyncManager 1 map" "Not mapped,Mapped" bitfld.word 0x00 4. " SMSTA0 ,Mirror value of SyncManager 0 map" "Not mapped,Mapped" bitfld.word 0x00 3. " ALSTA ,AL status event map" "Not mapped,Mapped" newline bitfld.word 0x00 2. " DLSTA ,DL status event map" "Not mapped,Mapped" bitfld.word 0x00 0. " DCLATCH ,DC status event map" "Not mapped,Mapped" group.long 0x204++0x03 line.long 0x00 "AL_EVENT_MASK,AL Event Mask Register" bitfld.long 0x00 15. " SMINT7 ,SyncManager 7 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 14. " SMINT6 ,SyncManager 6 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 13. " SMINT5 ,SyncManager 5 interrupt mask" "Unmasked,Masked" newline bitfld.long 0x00 12. " SMINT4 ,SyncManager 4 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 11. " SMINT3 ,SyncManager 3 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 10. " SMINT2 ,SyncManager 2 interrupt mask" "Unmasked,Masked" newline bitfld.long 0x00 9. " SMINT1 ,SyncManager 1 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 8. " SMINT0 ,SyncManager 0 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 6. " WDPD ,Watchdog process data mask" "Unmasked,Masked" newline bitfld.long 0x00 4. " SYNCACT ,Change of the SyncManager activation register mask" "Unmasked,Masked" bitfld.long 0x00 3. " DCSYNC1STA ,State of DC SYNC1 mask" "Unmasked,Masked" bitfld.long 0x00 2. " DCSYNC0STA ,State of DC SYNC0 mask" "Unmasked,Masked" newline bitfld.long 0x00 1. " DCLATCH ,DC latch event mask" "Unmasked,Masked" bitfld.long 0x00 0. " ALCTRL ,AL control event mask" "Unmasked,Masked" rgroup.word 0x210++0x01 line.word 0x00 "ECAT_EVENT_REQ,EtherCAT Event Request Register" bitfld.word 0x00 11. " SMSTA7 ,Mirror value of SyncManager 7 status" "No event,Event pending" bitfld.word 0x00 10. " SMSTA6 ,Mirror value of SyncManager 6 status" "No event,Event pending" bitfld.word 0x00 9. " SMSTA5 ,Mirror value of SyncManager 5 status" "No event,Event pending" newline bitfld.word 0x00 8. " SMSTA4 ,Mirror value of SyncManager 4 status" "No event,Event pending" bitfld.word 0x00 7. " SMSTA3 ,Mirror value of SyncManager 3 status" "No event,Event pending" bitfld.word 0x00 6. " SMSTA2 ,Mirror value of SyncManager 2 status" "No event,Event pending" newline bitfld.word 0x00 5. " SMSTA1 ,Mirror value of SyncManager 1 status" "No event,Event pending" bitfld.word 0x00 4. " SMSTA0 ,Mirror value of SyncManager 0 status" "No event,Event pending" bitfld.word 0x00 3. " ALSTA ,AL status event" "Not changed,Changed" newline bitfld.word 0x00 2. " DLSTA ,DL status event" "Not changed,Changed" bitfld.word 0x00 0. " DCLATCH ,DC latch event" "Not changed,Changed" rgroup.long 0x220++0x03 line.long 0x00 "AL_EVENT_REQ,AL Event Request Register" bitfld.long 0x00 15. " SMINT7 ,SyncManager 7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SMINT6 ,SyncManager 6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SMINT5 ,SyncManager 5 interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " SMINT4 ,SyncManager 4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " SMINT3 ,SyncManager 3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " SMINT2 ,SyncManager 2 interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " SMINT1 ,SyncManager 1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SMINT0 ,SyncManager 0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " WDPD ,Watchdog process data" "Valid,Timeout" newline bitfld.long 0x00 4. " SYNCACT ,Change of the SyncManager activation register" "Not changed,Changed" bitfld.long 0x00 3. " DCSYNC1STA ,State of DC SYNC1" "0,1" bitfld.long 0x00 2. " DCSYNC0STA ,State of DC SYNC0" "0,1" newline bitfld.long 0x00 1. " DCLATCH ,DC latch event" "Not changed,Changed" bitfld.long 0x00 0. " ALCTRL ,AL control event" "Not changed,Written" group.word 0x300++0x03 "Error Count Registers" line.word 0x00 "RX_ERR_COUNT0,Rx Error Counter 0 Register" hexmask.word.byte 0x00 8.--15. 1. " RXERRCNT ,Counter value of RX errors for port 0" hexmask.word.byte 0x00 0.--7. 1. " INVFRMCNT ,Counter value of invalid frames for port 0" line.word 0x02 "RX_ERR_COUNT1,Rx Error Counter 1 Register" hexmask.word.byte 0x02 8.--15. 1. " RXERRCNT ,Counter value of RX errors for port 1" hexmask.word.byte 0x02 0.--7. 1. " INVFRMCNT ,Counter value of invalid frames for port 1" sif !cpuis("R7S910*") group.word 0x304++0x01 line.word 0x00 "RX_ERR_COUNT2,Rx Error Counter 2 Register" hexmask.word.byte 0x00 8.--15. 1. " RXERRCNT ,Counter value of RX errors for port 2" hexmask.word.byte 0x00 0.--7. 1. " INVFRMCNT ,Counter value of invalid frames for port 2" endif sif cpuis("R7S910*") group.byte 0x308++0x00 line.byte 0x00 "FWD_RX_ERR_COUNT0,Forwarded Rx Error Counter 0 Register" group.byte 0x30A++0x00 line.byte 0x00 "FWD_RX_ERR_COUNT1,Forwarded Rx Error Counter 1 Register" else group.byte 0x308++0x00 line.byte 0x00 "FWD_RX_ERR_COUNT0,Forwarded Rx Error Counter 0 Register" group.byte 0x30A++0x00 line.byte 0x00 "FWD_RX_ERR_COUNT1,Forwarded Rx Error Counter 1 Register" group.byte 0x30C++0x00 line.byte 0x00 "FWD_RX_ERR_COUNT2,Forwarded Rx Error Counter 2 Register" endif group.byte 0x30C++0x01 line.byte 0x00 "ECAT_PROC_ERR_COUNT,EtherCAT Processing Unit Error Counter Register" line.byte 0x01 "PDI_ERR_COUNT,PDI Error Counter Register" sif cpuis("R7S910*") group.byte 0x310++0x00 line.byte 0x00 "LOST_LINK_COUNT0,Lost Link Counter 0 Register" group.byte 0x310++0x00 line.byte 0x00 "LOST_LINK_COUNT1,Lost Link Counter 1 Register" else group.byte 0x310++0x00 line.byte 0x00 "LOST_LINK_COUNT0,Lost Link Counter 0 Register" group.byte 0x310++0x00 line.byte 0x00 "LOST_LINK_COUNT1,Lost Link Counter 1 Register" group.byte 0x310++0x00 line.byte 0x00 "LOST_LINK_COUNT2,Lost Link Counter 2 Register" endif group.word 0x400++0x01 "Watchdog Registers" line.word 0x00 "WD_DIVIDE,Watchdog Divider Register" group.word 0x410++0x01 line.word 0x00 "WDT_PDI,Watchdog Time PDI Register" group.word 0x420++0x01 line.word 0x00 "WDT_DATA,Watchdog Time Process Data Register" hgroup.word 0x440++0x01 hide.word 0x00 "WDS_DATA,Watchdog Status Process Data Register" in group.byte 0x442++0x01 line.byte 0x00 "WDC_DATA,Watchdog Counter Process Data Register" line.byte 0x01 "WDC_PDI,Watchdog Counter PDI Register" group.byte 0x500++0x01 "SII EEPROM Interface Registers" line.byte 0x00 "EEP_CONF,EEPROM Configuration Register" bitfld.byte 0x00 1. " FORCEECAT ,Forcibly changes the right of access to the EEPROM by the EtherCAT" "Not changed,Changed" bitfld.byte 0x00 0. " CTRLPDI ,Specifies whether EEPROM control is offered to the PDI" "No EEPROM control,EEPROM control" if (((per.b(ad:0x44010000+0x500)&0x03)==0x01)) group.byte 0x501++0x00 line.byte 0x00 "EEP_STATE,EEPROM PDI Access State Register" bitfld.byte 0x00 0. " PDIACCEES ,Right of access to the EEPROM" "No access,Access" else hgroup.byte 0x501++0x00 hide.byte 0x00 "EEP_STATE,EEPROM PDI Access State Register" endif if (((per.w(ad:0x44010000+0x502)&0x8000)==0x8000)) rgroup.word 0x502++0x03 line.word 0x00 "EEP_CONT_STAT,EEPROM Control/Status Register" bitfld.word 0x00 15. " BUSY ,Indicates a busy state of the EEPROM interface" "Idle,Busy" bitfld.word 0x00 14. " WRENERR ,Indicates error write enable" "No error,Error" bitfld.word 0x00 13. " ACKCMDERR ,Indicates error acknowledge/command" "No error,Error" newline bitfld.word 0x00 12. " LOADSTA ,Indicates EEPROM loading status" "Loaded,Not loaded" bitfld.word 0x00 11. " CKSUMERR ,Indicates checksum error in the ESC configuration area" "No error,Error" bitfld.word 0x00 8.--10. " COMMAND ,Indicates checksum error in the ESC configuration area" "No command/EEPROM idle,Read,Write,,Reload,?..." newline bitfld.word 0x00 7. " PROMSIZE ,Selected EEPROM algorithm" "1 address byte,2 address bytes" bitfld.word 0x00 6. " READBYTE ,Supported EEPROM read bytes" "4 bytes,8 bytes" bitfld.word 0x00 0. " ECATWREN ,EtherCAT write enable" "Disabled,Enabled" line.word 0x02 "EEP_ADR,EEPROM Address Register" rgroup.long 0x508++0x03 line.long 0x00 "EEP_DATA,EEPROM Data Register" hexmask.long.word 0x00 16.--31. 1. " HIDATA ,Data read from the EEPROM" hexmask.long.word 0x00 0.--15. 1. " LODATA ,Data to be written to the EEPROM or data read from the EEPROM" else group.word 0x502++0x03 line.word 0x00 "EEP_CONT_STAT,EEPROM Control/Status Register" rbitfld.word 0x00 15. " BUSY ,Indicates a busy state of the EEPROM interface" "Idle,Busy" rbitfld.word 0x00 14. " WRENERR ,Indicates error write enable" "No error,Error" rbitfld.word 0x00 13. " ACKCMDERR ,Indicates error acknowledge/command" "No error,Error" newline rbitfld.word 0x00 12. " LOADSTA ,Indicates EEPROM loading status" "Loaded,Not loaded" rbitfld.word 0x00 11. " CKSUMERR ,Indicates checksum error in the ESC configuration area" "No error,Error" bitfld.word 0x00 8.--10. " COMMAND ,Indicates checksum error in the ESC configuration area" "No command/EEPROM idle,Read,Write,,Reload,?..." newline rbitfld.word 0x00 7. " PROMSIZE ,Selected EEPROM algorithm" "1 address byte,2 address bytes" rbitfld.word 0x00 6. " READBYTE ,Supported EEPROM read bytes" "4 bytes,8 bytes" bitfld.word 0x00 0. " ECATWREN ,EtherCAT write enable" "Disabled,Enabled" line.word 0x02 "EEP_ADR,EEPROM Address Register" group.long 0x508++0x03 line.long 0x00 "EEP_DATA,EEPROM Data Register" hexmask.long.word 0x00 16.--31. 1. " HIDATA ,Data read from the EEPROM" hexmask.long.word 0x00 0.--15. 1. " LODATA ,Data to be written to the EEPROM or data read from the EEPROM" endif if (((per.w(ad:0x44010000+0x510)&0x8000)==0x8000)) rgroup.word 0x510++0x01 "MII Management Interface Registers" line.word 0x00 "MII_CONT_STAT,MII Management Control/Status Register" bitfld.word 0x00 15. " BUSY ,MII management interface is busy" "Idle,Busy" bitfld.word 0x00 14. " CMDERR ,Command error occurred" "No error,Error" bitfld.word 0x00 13. " READERR ,Read error occurred" "No error,Error" newline bitfld.word 0x00 9. " COMMAND[1] ,Current command/currently executed command" ",Write" bitfld.word 0x00 8. " COMMAND[0] ,Current command/currently executed command" "No command/MI idle,Read" hexmask.word.byte 0x00 3.--7. 0x08 " PHYOFFSET ,Indicate the PHY address offset" newline bitfld.word 0x00 2. " MILINK ,MI link detection" "Not available,Available" bitfld.word 0x00 1. " PDICTRL ,MII management interface can be controlled by the PDI" "EtherCAT control,PDI control" bitfld.word 0x00 0. " WREN ,Write enable" "Disabled,Enabled" rgroup.byte 0x512++0x01 line.byte 0x00 "PHY_ADR,PHY Address Register" hexmask.byte 0x00 0.--4. 0x01 " PHYADDR ,PHY address" line.byte 0x01 "PHY_REG_ADR,PHY Register Address Register" hexmask.byte 0x01 0.--4. 0x01 " PHYREGADDR ,Address of PHY register" rgroup.word 0x514++0x01 line.word 0x00 "PHY_DATA,PHY Data Register" else group.word 0x510++0x01 "MII Management Interface Registers" line.word 0x00 "MII_CONT_STAT,MII Management Control/Status Register" rbitfld.word 0x00 15. " BUSY ,MII management interface is busy" "Idle,Busy" rbitfld.word 0x00 14. " CMDERR ,Command error occurred" "No error,Error" eventfld.word 0x00 13. " READERR ,Read error occurred" "No error,Error" newline eventfld.word 0x00 9. " COMMAND[1] ,Current command/currently executed command" ",Write" eventfld.word 0x00 8. " COMMAND[0] ,Current command/currently executed command" "No command/MI idle,Read" hexmask.word.byte 0x00 3.--7. 0x08 " PHYOFFSET ,Indicate the PHY address offset" newline rbitfld.word 0x00 2. " MILINK ,MI link detection" "Not available,Available" rbitfld.word 0x00 1. " PDICTRL ,MII management interface can be controlled by the PDI" "EtherCAT control,PDI control" bitfld.word 0x00 0. " WREN ,Write enable" "Disabled,Enabled" group.byte 0x512++0x01 line.byte 0x00 "PHY_ADR,PHY Address Register" hexmask.byte 0x00 0.--4. 0x01 " PHYADDR ,PHY address" line.byte 0x01 "PHY_REG_ADR,PHY Register Address Register" hexmask.byte 0x01 0.--4. 0x01 " PHYREGADDR ,Address of PHY register" group.word 0x514++0x01 line.word 0x00 "PHY_DATA,PHY Data Register" endif if (((per.b(ad:0x44010000+0x517)&0x01)==0x01)) group.byte 0x516++0x00 line.byte 0x00 "MII_ECAT_ACS_STAT,MII Management EtherCAT Access State Register" bitfld.byte 0x00 0. " ACSMII ,Right of access to the MII management interface" "Not exclusive,Exclusive" else rgroup.byte 0x516++0x00 line.byte 0x00 "MII_ECAT_ACS_STAT,MII Management EtherCAT Access State Register" bitfld.byte 0x00 0. " ACSMII ,Right of access to the MII management interface" "Not exclusive,Exclusive" endif if (((per.l(ad:0x44010000+0x516)&0x01)==0x00))&&(((per.l(ad:0x44010000+0x517)&0x02)==0x00)) group.byte 0x517++0x00 line.byte 0x00 "MII_PDI_ACS_STAT,MII Management PDI Access State Register" rbitfld.byte 0x00 1. " FORPDI ,Forced change of access by the PDI" "Not forced,Forced" bitfld.byte 0x00 0. " ACSMII ,Right of access to the MII management interface" "By the PDI,By the EtherCAT" else rgroup.byte 0x517++0x00 line.byte 0x00 "MII_PDI_ACS_STAT,MII Management PDI Access State Register" bitfld.byte 0x00 1. " FORPDI ,Forced change of access by the PDI" "Not forced,Forced" bitfld.byte 0x00 0. " ACSMII ,Right of access to the MII management interface" "By the PDI,By the EtherCAT" endif sif !cpuis("R7S910*") group.byte 0x518++0x00 line.byte 0x00 "PHY_STATUS0,PHY Port Status 0 Register" eventfld.byte 0x00 5. " PHYCONFIG ,PHY configuration update" "Not updated,Updated" rbitfld.byte 0x00 4. " LINKPARTERR ,Link partner error" "Not error,Error" eventfld.byte 0x00 3. " READERR ,Read error" "No error,Error" newline rbitfld.byte 0x00 2. " LINKSTAERR ,Link status error" "Not error,Error" rbitfld.byte 0x00 1. " LINKSTA ,Link status" "No link,Link" rbitfld.byte 0x00 0. " PHYLINKSTA ,Physical link status" "Down,Up" group.byte 0x519++0x00 line.byte 0x00 "PHY_STATUS1,PHY Port Status 1 Register" eventfld.byte 0x00 5. " PHYCONFIG ,PHY configuration update" "Not updated,Updated" rbitfld.byte 0x00 4. " LINKPARTERR ,Link partner error" "Not error,Error" eventfld.byte 0x00 3. " READERR ,Read error" "No error,Error" newline rbitfld.byte 0x00 2. " LINKSTAERR ,Link status error" "Not error,Error" rbitfld.byte 0x00 1. " LINKSTA ,Link status" "No link,Link" rbitfld.byte 0x00 0. " PHYLINKSTA ,Physical link status" "Down,Up" group.byte 0x51A++0x00 line.byte 0x00 "PHY_STATUS2,PHY Port Status 2 Register" eventfld.byte 0x00 5. " PHYCONFIG ,PHY configuration update" "Not updated,Updated" rbitfld.byte 0x00 4. " LINKPARTERR ,Link partner error" "Not error,Error" eventfld.byte 0x00 3. " READERR ,Read error" "No error,Error" newline rbitfld.byte 0x00 2. " LINKSTAERR ,Link status error" "Not error,Error" rbitfld.byte 0x00 1. " LINKSTA ,Link status" "No link,Link" rbitfld.byte 0x00 0. " PHYLINKSTA ,Physical link status" "Down,Up" endif newline group.long 0x600++0x03 "FMMU 0 Registers" line.long 0x00 "FMMU0_L_START_ADR,FMMU Logical Start Address 0 Register" group.word (0x600+0x04)++0x01 line.word 0x00 "FMMU0_LEN,FMMU Length 0 Register" group.byte (0x600+0x06)++0x01 line.byte 0x00 "FMMU0_L_START_BIT,FMMU Logical Start Bit 0 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU0" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU0_L_STOP_BIT,FMMU Logical Stop Bit 0 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU0" "0,1,2,3,4,5,6,7" group.word (0x600+0x08)++0x01 line.word 0x00 "FMMU0_P_START_ADR,FMMU Physical Start Address 0 Register" group.byte (0x600+0x0A)++0x02 line.byte 0x00 "FMMU0_P_START_BIT,FMMU Physical Start Bit 0 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU0_TYPE,FMMU Physical Type 0 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU0_ACT,FMMU Activate 0 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU0" "Disabled,Enabled" group.long 0x610++0x03 "FMMU 1 Registers" line.long 0x00 "FMMU1_L_START_ADR,FMMU Logical Start Address 1 Register" group.word (0x610+0x04)++0x01 line.word 0x00 "FMMU1_LEN,FMMU Length 1 Register" group.byte (0x610+0x06)++0x01 line.byte 0x00 "FMMU1_L_START_BIT,FMMU Logical Start Bit 1 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU1" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU1_L_STOP_BIT,FMMU Logical Stop Bit 1 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU1" "0,1,2,3,4,5,6,7" group.word (0x610+0x08)++0x01 line.word 0x00 "FMMU1_P_START_ADR,FMMU Physical Start Address 1 Register" group.byte (0x610+0x0A)++0x02 line.byte 0x00 "FMMU1_P_START_BIT,FMMU Physical Start Bit 1 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU1_TYPE,FMMU Physical Type 1 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU1_ACT,FMMU Activate 1 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU1" "Disabled,Enabled" group.long 0x620++0x03 "FMMU 2 Registers" line.long 0x00 "FMMU2_L_START_ADR,FMMU Logical Start Address 2 Register" group.word (0x620+0x04)++0x01 line.word 0x00 "FMMU2_LEN,FMMU Length 2 Register" group.byte (0x620+0x06)++0x01 line.byte 0x00 "FMMU2_L_START_BIT,FMMU Logical Start Bit 2 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU2" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU2_L_STOP_BIT,FMMU Logical Stop Bit 2 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU2" "0,1,2,3,4,5,6,7" group.word (0x620+0x08)++0x01 line.word 0x00 "FMMU2_P_START_ADR,FMMU Physical Start Address 2 Register" group.byte (0x620+0x0A)++0x02 line.byte 0x00 "FMMU2_P_START_BIT,FMMU Physical Start Bit 2 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU2_TYPE,FMMU Physical Type 2 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU2_ACT,FMMU Activate 2 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU2" "Disabled,Enabled" group.long 0x630++0x03 "FMMU 3 Registers" line.long 0x00 "FMMU3_L_START_ADR,FMMU Logical Start Address 3 Register" group.word (0x630+0x04)++0x01 line.word 0x00 "FMMU3_LEN,FMMU Length 3 Register" group.byte (0x630+0x06)++0x01 line.byte 0x00 "FMMU3_L_START_BIT,FMMU Logical Start Bit 3 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU3" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU3_L_STOP_BIT,FMMU Logical Stop Bit 3 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU3" "0,1,2,3,4,5,6,7" group.word (0x630+0x08)++0x01 line.word 0x00 "FMMU3_P_START_ADR,FMMU Physical Start Address 3 Register" group.byte (0x630+0x0A)++0x02 line.byte 0x00 "FMMU3_P_START_BIT,FMMU Physical Start Bit 3 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU3_TYPE,FMMU Physical Type 3 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU3_ACT,FMMU Activate 3 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU3" "Disabled,Enabled" group.long 0x640++0x03 "FMMU 4 Registers" line.long 0x00 "FMMU4_L_START_ADR,FMMU Logical Start Address 4 Register" group.word (0x640+0x04)++0x01 line.word 0x00 "FMMU4_LEN,FMMU Length 4 Register" group.byte (0x640+0x06)++0x01 line.byte 0x00 "FMMU4_L_START_BIT,FMMU Logical Start Bit 4 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU4" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU4_L_STOP_BIT,FMMU Logical Stop Bit 4 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU4" "0,1,2,3,4,5,6,7" group.word (0x640+0x08)++0x01 line.word 0x00 "FMMU4_P_START_ADR,FMMU Physical Start Address 4 Register" group.byte (0x640+0x0A)++0x02 line.byte 0x00 "FMMU4_P_START_BIT,FMMU Physical Start Bit 4 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU4_TYPE,FMMU Physical Type 4 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU4_ACT,FMMU Activate 4 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU4" "Disabled,Enabled" group.long 0x650++0x03 "FMMU 5 Registers" line.long 0x00 "FMMU5_L_START_ADR,FMMU Logical Start Address 5 Register" group.word (0x650+0x04)++0x01 line.word 0x00 "FMMU5_LEN,FMMU Length 5 Register" group.byte (0x650+0x06)++0x01 line.byte 0x00 "FMMU5_L_START_BIT,FMMU Logical Start Bit 5 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU5" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU5_L_STOP_BIT,FMMU Logical Stop Bit 5 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU5" "0,1,2,3,4,5,6,7" group.word (0x650+0x08)++0x01 line.word 0x00 "FMMU5_P_START_ADR,FMMU Physical Start Address 5 Register" group.byte (0x650+0x0A)++0x02 line.byte 0x00 "FMMU5_P_START_BIT,FMMU Physical Start Bit 5 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU5_TYPE,FMMU Physical Type 5 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU5_ACT,FMMU Activate 5 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU5" "Disabled,Enabled" group.long 0x660++0x03 "FMMU 6 Registers" line.long 0x00 "FMMU6_L_START_ADR,FMMU Logical Start Address 6 Register" group.word (0x660+0x04)++0x01 line.word 0x00 "FMMU6_LEN,FMMU Length 6 Register" group.byte (0x660+0x06)++0x01 line.byte 0x00 "FMMU6_L_START_BIT,FMMU Logical Start Bit 6 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU6" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU6_L_STOP_BIT,FMMU Logical Stop Bit 6 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU6" "0,1,2,3,4,5,6,7" group.word (0x660+0x08)++0x01 line.word 0x00 "FMMU6_P_START_ADR,FMMU Physical Start Address 6 Register" group.byte (0x660+0x0A)++0x02 line.byte 0x00 "FMMU6_P_START_BIT,FMMU Physical Start Bit 6 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU6_TYPE,FMMU Physical Type 6 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU6_ACT,FMMU Activate 6 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU6" "Disabled,Enabled" group.long 0x670++0x03 "FMMU 7 Registers" line.long 0x00 "FMMU7_L_START_ADR,FMMU Logical Start Address 7 Register" group.word (0x670+0x04)++0x01 line.word 0x00 "FMMU7_LEN,FMMU Length 7 Register" group.byte (0x670+0x06)++0x01 line.byte 0x00 "FMMU7_L_START_BIT,FMMU Logical Start Bit 7 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU7" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU7_L_STOP_BIT,FMMU Logical Stop Bit 7 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU7" "0,1,2,3,4,5,6,7" group.word (0x670+0x08)++0x01 line.word 0x00 "FMMU7_P_START_ADR,FMMU Physical Start Address 7 Register" group.byte (0x670+0x0A)++0x02 line.byte 0x00 "FMMU7_P_START_BIT,FMMU Physical Start Bit 7 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU7_TYPE,FMMU Physical Type 7 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU7_ACT,FMMU Activate 7 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU7" "Disabled,Enabled" newline if (((per.l(ad:0x44010000+0x800+0x06)&0x01)==0x00)) group.word 0x800++0x03 "SyncManager 0 Registers" line.word 0x00 "SM0_P_START_ADR,SyncManager Physical Start Address 0 Register" line.word 0x02 "SM0_LEN,SyncManager Length 0 Register" group.byte (0x800+0x04)++0x00 line.byte 0x00 "SM0_CONTROL,SyncManager Control 0 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." else rgroup.word 0x800++0x03 "SyncManager 0 Registers" line.word 0x00 "SM0_P_START_ADR,SyncManager Physical Start Address 0 Register" line.word 0x02 "SM0_LEN,yncManager Length 0 Register" rgroup.byte (0x800+0x04)++0x00 line.byte 0x00 "SM0_CONTROL,SyncManager Control 0 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." endif if (((per.l(ad:0x44010000+0x800+0x04)&0x03)==0x01)) rgroup.byte (0x800+0x05)++0x00 line.byte 0x00 "SM0_STATUS,SyncManager Status 0 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x800+0x05)++0x00 line.byte 0x00 "SM0_STATUS,SyncManager Status 0 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif group.byte (0x800+0x06)++0x01 line.byte 0x00 "SM0_ACT,SyncManager Activate 0 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM0_PDI_CONT,SyncManager PDI Control 0 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" if (((per.l(ad:0x44010000+0x808+0x06)&0x01)==0x00)) group.word 0x808++0x03 "SyncManager 1 Registers" line.word 0x00 "SM1_P_START_ADR,SyncManager Physical Start Address 1 Register" line.word 0x02 "SM1_LEN,SyncManager Length 1 Register" group.byte (0x808+0x04)++0x00 line.byte 0x00 "SM1_CONTROL,SyncManager Control 1 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." else rgroup.word 0x808++0x03 "SyncManager 1 Registers" line.word 0x00 "SM1_P_START_ADR,SyncManager Physical Start Address 1 Register" line.word 0x02 "SM1_LEN,yncManager Length 1 Register" rgroup.byte (0x808+0x04)++0x00 line.byte 0x00 "SM1_CONTROL,SyncManager Control 1 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." endif if (((per.l(ad:0x44010000+0x808+0x04)&0x03)==0x01)) rgroup.byte (0x808+0x05)++0x00 line.byte 0x00 "SM1_STATUS,SyncManager Status 1 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x808+0x05)++0x00 line.byte 0x00 "SM1_STATUS,SyncManager Status 1 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif group.byte (0x808+0x06)++0x01 line.byte 0x00 "SM1_ACT,SyncManager Activate 1 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM1_PDI_CONT,SyncManager PDI Control 1 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" if (((per.l(ad:0x44010000+0x810+0x06)&0x01)==0x00)) group.word 0x810++0x03 "SyncManager 2 Registers" line.word 0x00 "SM2_P_START_ADR,SyncManager Physical Start Address 2 Register" line.word 0x02 "SM2_LEN,SyncManager Length 2 Register" group.byte (0x810+0x04)++0x00 line.byte 0x00 "SM2_CONTROL,SyncManager Control 2 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." else rgroup.word 0x810++0x03 "SyncManager 2 Registers" line.word 0x00 "SM2_P_START_ADR,SyncManager Physical Start Address 2 Register" line.word 0x02 "SM2_LEN,yncManager Length 2 Register" rgroup.byte (0x810+0x04)++0x00 line.byte 0x00 "SM2_CONTROL,SyncManager Control 2 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." endif if (((per.l(ad:0x44010000+0x810+0x04)&0x03)==0x01)) rgroup.byte (0x810+0x05)++0x00 line.byte 0x00 "SM2_STATUS,SyncManager Status 2 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x810+0x05)++0x00 line.byte 0x00 "SM2_STATUS,SyncManager Status 2 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif group.byte (0x810+0x06)++0x01 line.byte 0x00 "SM2_ACT,SyncManager Activate 2 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM2_PDI_CONT,SyncManager PDI Control 2 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" if (((per.l(ad:0x44010000+0x818+0x06)&0x01)==0x00)) group.word 0x818++0x03 "SyncManager 3 Registers" line.word 0x00 "SM3_P_START_ADR,SyncManager Physical Start Address 3 Register" line.word 0x02 "SM3_LEN,SyncManager Length 3 Register" group.byte (0x818+0x04)++0x00 line.byte 0x00 "SM3_CONTROL,SyncManager Control 3 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." else rgroup.word 0x818++0x03 "SyncManager 3 Registers" line.word 0x00 "SM3_P_START_ADR,SyncManager Physical Start Address 3 Register" line.word 0x02 "SM3_LEN,yncManager Length 3 Register" rgroup.byte (0x818+0x04)++0x00 line.byte 0x00 "SM3_CONTROL,SyncManager Control 3 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." endif if (((per.l(ad:0x44010000+0x818+0x04)&0x03)==0x01)) rgroup.byte (0x818+0x05)++0x00 line.byte 0x00 "SM3_STATUS,SyncManager Status 3 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x818+0x05)++0x00 line.byte 0x00 "SM3_STATUS,SyncManager Status 3 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif group.byte (0x818+0x06)++0x01 line.byte 0x00 "SM3_ACT,SyncManager Activate 3 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM3_PDI_CONT,SyncManager PDI Control 3 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" if (((per.l(ad:0x44010000+0x820+0x06)&0x01)==0x00)) group.word 0x820++0x03 "SyncManager 4 Registers" line.word 0x00 "SM4_P_START_ADR,SyncManager Physical Start Address 4 Register" line.word 0x02 "SM4_LEN,SyncManager Length 4 Register" group.byte (0x820+0x04)++0x00 line.byte 0x00 "SM4_CONTROL,SyncManager Control 4 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." else rgroup.word 0x820++0x03 "SyncManager 4 Registers" line.word 0x00 "SM4_P_START_ADR,SyncManager Physical Start Address 4 Register" line.word 0x02 "SM4_LEN,yncManager Length 4 Register" rgroup.byte (0x820+0x04)++0x00 line.byte 0x00 "SM4_CONTROL,SyncManager Control 4 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." endif if (((per.l(ad:0x44010000+0x820+0x04)&0x03)==0x01)) rgroup.byte (0x820+0x05)++0x00 line.byte 0x00 "SM4_STATUS,SyncManager Status 4 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x820+0x05)++0x00 line.byte 0x00 "SM4_STATUS,SyncManager Status 4 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif group.byte (0x820+0x06)++0x01 line.byte 0x00 "SM4_ACT,SyncManager Activate 4 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM4_PDI_CONT,SyncManager PDI Control 4 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" if (((per.l(ad:0x44010000+0x828+0x06)&0x01)==0x00)) group.word 0x828++0x03 "SyncManager 5 Registers" line.word 0x00 "SM5_P_START_ADR,SyncManager Physical Start Address 5 Register" line.word 0x02 "SM5_LEN,SyncManager Length 5 Register" group.byte (0x828+0x04)++0x00 line.byte 0x00 "SM5_CONTROL,SyncManager Control 5 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." else rgroup.word 0x828++0x03 "SyncManager 5 Registers" line.word 0x00 "SM5_P_START_ADR,SyncManager Physical Start Address 5 Register" line.word 0x02 "SM5_LEN,yncManager Length 5 Register" rgroup.byte (0x828+0x04)++0x00 line.byte 0x00 "SM5_CONTROL,SyncManager Control 5 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." endif if (((per.l(ad:0x44010000+0x828+0x04)&0x03)==0x01)) rgroup.byte (0x828+0x05)++0x00 line.byte 0x00 "SM5_STATUS,SyncManager Status 5 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x828+0x05)++0x00 line.byte 0x00 "SM5_STATUS,SyncManager Status 5 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif group.byte (0x828+0x06)++0x01 line.byte 0x00 "SM5_ACT,SyncManager Activate 5 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM5_PDI_CONT,SyncManager PDI Control 5 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" if (((per.l(ad:0x44010000+0x830+0x06)&0x01)==0x00)) group.word 0x830++0x03 "SyncManager 6 Registers" line.word 0x00 "SM6_P_START_ADR,SyncManager Physical Start Address 6 Register" line.word 0x02 "SM6_LEN,SyncManager Length 6 Register" group.byte (0x830+0x04)++0x00 line.byte 0x00 "SM6_CONTROL,SyncManager Control 6 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." else rgroup.word 0x830++0x03 "SyncManager 6 Registers" line.word 0x00 "SM6_P_START_ADR,SyncManager Physical Start Address 6 Register" line.word 0x02 "SM6_LEN,yncManager Length 6 Register" rgroup.byte (0x830+0x04)++0x00 line.byte 0x00 "SM6_CONTROL,SyncManager Control 6 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." endif if (((per.l(ad:0x44010000+0x830+0x04)&0x03)==0x01)) rgroup.byte (0x830+0x05)++0x00 line.byte 0x00 "SM6_STATUS,SyncManager Status 6 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x830+0x05)++0x00 line.byte 0x00 "SM6_STATUS,SyncManager Status 6 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif group.byte (0x830+0x06)++0x01 line.byte 0x00 "SM6_ACT,SyncManager Activate 6 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM6_PDI_CONT,SyncManager PDI Control 6 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" if (((per.l(ad:0x44010000+0x838+0x06)&0x01)==0x00)) group.word 0x838++0x03 "SyncManager 7 Registers" line.word 0x00 "SM7_P_START_ADR,SyncManager Physical Start Address 7 Register" line.word 0x02 "SM7_LEN,SyncManager Length 7 Register" group.byte (0x838+0x04)++0x00 line.byte 0x00 "SM7_CONTROL,SyncManager Control 7 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." else rgroup.word 0x838++0x03 "SyncManager 7 Registers" line.word 0x00 "SM7_P_START_ADR,SyncManager Physical Start Address 7 Register" line.word 0x02 "SM7_LEN,yncManager Length 7 Register" rgroup.byte (0x838+0x04)++0x00 line.byte 0x00 "SM7_CONTROL,SyncManager Control 7 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." endif if (((per.l(ad:0x44010000+0x838+0x04)&0x03)==0x01)) rgroup.byte (0x838+0x05)++0x00 line.byte 0x00 "SM7_STATUS,SyncManager Status 7 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x838+0x05)++0x00 line.byte 0x00 "SM7_STATUS,SyncManager Status 7 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif group.byte (0x838+0x06)++0x01 line.byte 0x00 "SM7_ACT,SyncManager Activate 7 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM7_PDI_CONT,SyncManager PDI Control 7 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" group.long 0x900++0x03 "Distributed Clock Registers" line.long 0x00 "DC_RCV_TIME_PORT0,Receive Times Port0 Register" sif cpuis("R7S910*") rgroup.long 0x904++0x07 line.long 0x00 "DC_RCV_TIME_PORT1,Receive Times Port1 Register" else rgroup.long 0x904++0x07 line.long 0x00 "DC_RCV_TIME_PORT1,Receive Times Port1 Register" line.long 0x04 "DC_RCV_TIME_PORT2,Receive Times Port2 Register" endif group.quad 0x910++0x07 line.quad 0x00 "DC_SYS_TIME,System Time Register" rgroup.quad 0x918++0x0F line.quad 0x00 "DC_RCV_TIME_UNIT,Receive Time EtherCAT Processing Unit Register" line.quad 0x08 "DC_SYS_TIME_OFFSET,System Time Offset Register" rgroup.long 0x928++0x07 line.long 0x00 "DC_SYS_TIME_DELAY,System Time Delay Register" line.long 0x04 "DC_SYS_TIME_DIFF,System Time Difference Register" bitfld.long 0x04 31. " LOCALCOPY ,Local copy of the system time is greater than or equal to, or is less than, the latest received copy of the system time" "Greater,Less" hexmask.long 0x04 0.--30. 1. " DIFF ,Indicates a mean difference between the local copy of the system time and received system time" group.word 0x930++0x01 line.word 0x00 "DC_SPEED_COUNT_START,Speed Counter Start Register" hexmask.word 0x00 0.--14. 1. " SPDCNTSTRT ,Bandwidth for adjustment of the local copy of the system time" rgroup.word 0x932++0x01 line.word 0x00 "DC_SPEED_COUNT_DIFF,Speed Counter Diff Register" group.byte 0x934++0x01 line.byte 0x00 "DC_SYS_TIME_DIFF_FIL_DEPTH,System Time Difference Filter Depth Register" bitfld.byte 0x00 0.--3. " SYSTIMDEP ,Filter depth for averaging the received system time deviation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x01 "DC_SPEED_COUNT_FIL_DEPTH,Speed Counter Filter Depth Register" bitfld.byte 0x01 0.--3. " CLKPERDEP ,Filter depth for averaging the clock period deviation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x980++0x01 line.byte 0x00 "DC_CYC_CONT,Cyclic Unit Control Register" bitfld.byte 0x00 5. " LATCH1 ,Control of latch input unit 1" "EtherCAT control,PDI control" bitfld.byte 0x00 4. " LATCH0 ,Control of latch input unit 0" "EtherCAT control,PDI control" bitfld.byte 0x00 0. " SYNCOUT ,Control of the SYNC output unit" "EtherCAT control,PDI control" line.byte 0x01 "DC_ACT,Activation Register" eventfld.byte 0x01 7. " DBGPULSE ,Sync signal debug pulse" "Deactivated,Activated" bitfld.byte 0x01 6. " NEARFUTURE ,Range to be considered the near future" "Up to 263 ns,Up to 261 ns" bitfld.byte 0x01 5. " STARTTIME ,Selects whether checking the plausibility of the start time and response to implausible start times is to proceed" "Start time reached,Start time outside the range of the near future" newline bitfld.byte 0x01 4. " EXTSTARTTIME ,Extends start time cyclic operation" "Not extended,Extended" bitfld.byte 0x01 3. " AUTOACT ,Activate the Sync output unit automatically" "Deactivated,Activated" bitfld.byte 0x01 2. " SYNC1 ,SYNC1 output" "Deactivated,Pulse generated" newline bitfld.byte 0x01 1. " SYNC0 ,SYNC0 output" "Deactivated,Pulse generated" bitfld.byte 0x01 0. " SYNCACT ,Sync output unit activate" "Deactivated,Activated" rgroup.word 0x982++0x01 line.word 0x00 "DC_PULSE_LEN,Pulse Length Of SyncSignals Register" rgroup.byte 0x984++0x00 line.byte 0x00 "DC_ACT_STAT,Activation Status Register" bitfld.byte 0x00 2. " STARTTIME ,Plausibility check result of the start time cyclic operation register" "Within the near future,Out of the near future" bitfld.byte 0x00 1. " SYNC1ACT ,Activation state of SYNC1" "Not pending,Pending" bitfld.byte 0x00 0. " SYNC0ACT ,Activation state of SYNC0" "Not pending,Pending" rgroup.byte 0x98E++0x01 line.byte 0x00 "DC_SYNC0_STAT,SYNC0 Status Register" bitfld.byte 0x00 0. " SYNC0STA ,SYNC0 state for acknowledge mode" "0,1" line.byte 0x01 "DC_SYNC1_STAT,SYNC1 Status Register" bitfld.byte 0x01 0. " SYNC1STA ,SYNC1 state for acknowledge mode" "0,1" if (((per.b(ad:0x44010000+0x981)&0x01)==0x01)) rgroup.quad 0x990++0x07 line.quad 0x00 "DC_CYC_START_TIME,Start Time Cyclic Operation/Next SYNC0 Pulse Register" else group.quad 0x990++0x07 line.quad 0x00 "DC_CYC_START_TIME,Start Time Cyclic Operation/Next SYNC0 Pulse Register" endif rgroup.quad 0x998++0x07 line.quad 0x00 "DC_NEXT_SYNC1_PULSE,Next SYNC1 Pulse Register" group.long 0x9A0++0x07 line.long 0x00 "DC_SYNC0_CYC_TIME,SYNC0 Cycle Time Register" line.long 0x04 "DC_SYNC1_CYC_TIME,SYNC1 Cycle Time Register" group.byte 0x9A8++0x01 line.byte 0x00 "DC_LATCH0_CONT,Latch0 Control Register" bitfld.byte 0x00 1. " NEGEDGE ,Function of the falling edge of the latch 0 input signal" "Continuous,Single event" bitfld.byte 0x00 0. " POSEDGE ,Function of the rising edge of the latch 0 input signal" "Continuous,Single event" line.byte 0x01 "DC_LATCH1_CONT,Latch1 Control Register" bitfld.byte 0x01 1. " NEGEDGE ,Function of the falling edge of the latch 1 input signal" "Continuous,Single event" bitfld.byte 0x01 0. " POSEDGE ,Function of the rising edge of the latch 1 input signal" "Continuous,Single event" rgroup.byte 0x9AE++0x01 line.byte 0x00 "DC_LATCH0_STAT,Latch0 Status Register" bitfld.byte 0x00 2. " PINSTATE ,State of the latch 0 input pin" "0,1" bitfld.byte 0x00 1. " EVENTNEG ,Detection of falling edges of the event latch 0 signal" "Not detected,Detected" bitfld.byte 0x00 0. " EVENTPOS ,Detection of rising edges of the event latch 0 signal" "Not detected,Detected" line.byte 0x01 "DC_LATCH1_STAT,Latch1 Status Register" bitfld.byte 0x01 2. " PINSTATE ,State of the latch 1 input pin" "0,1" bitfld.byte 0x01 1. " EVENTNEG ,Detection of falling edges of the event latch 1 signal" "Not detected,Detected" bitfld.byte 0x01 0. " EVENTPOS ,Detection of rising edges of the event latch 1 signal" "Not detected,Detected" rgroup.quad 0x9B0++0x1F line.quad 0x00 "DC_LATCH0_TIME_POS,Latch0 Time Positive Edge Register" line.quad 0x08 "DC_LATCH0_TIME_NEG,Latch0 Time Negative Edge Register" line.quad 0x10 "DC_LATCH1_TIME_POS,Latch1 Time Positive Edge Register" line.quad 0x18 "DC_LATCH1_TIME_NEG,Latch1 Time Negative Edge Register" rgroup.long 0x9F0++0x03 line.long 0x00 "DC_ECAT_CNG_EV_TIME,Buffer Change Event Time Register" rgroup.long 0x9F8++0x07 line.long 0x00 "DC_PDI_START_EV_TIME,PDI Buffer Start Event Time Register" line.long 0x04 "DC_PDI_CNG_EV_TIME,PDI Buffer Change Event Time Register" rgroup.quad 0xE00++0x0F "Other Registers" line.quad 0x00 "PRODUCT_ID,PRODUCT ID Register" line.quad 0x08 "VENDOR_ID,Vendor ID Register" hexmask.quad.long 0x08 0.--31. 1. " VENDORID ,Vendor ID" sif cpuis("R7S910*") group.long 0xF80++0x03 line.long 0x00 "USER_RAM,User RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0xF80)--ad:((ad:0x44010000)+0xFFF) /Long" group.long 0x1000++0x03 line.long 0x00 "DATA_RAM,Process Data RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0x1000)--ad:((ad:0x44010000)+0x2FFF) /Long" else group.long 0xF80++0x03 line.long 0x00 "USER_RAM,User RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0xF80)--ad:((ad:0x44010000)+0xFFF) /Long" group.long 0x1000++0x03 line.long 0x00 "DATA_RAM,Process Data RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0x1000)--ad:((ad:0x44010000)+0x2FFF) /Long" endif else rgroup.byte 0x00++0x01 "ESC Information Registers" line.byte 0x00 "TYPE,Type Register" line.byte 0x01 "REVISION,Revision Register" rgroup.word 0x02++0x01 line.word 0x00 "BUILD,Build Register" rgroup.byte 0x04++0x03 line.byte 0x00 "FMMU_NUM,FMMUs Supported Register" line.byte 0x01 "SYNC_MANAGER,SyncManagers Supported Register" line.byte 0x02 "RAM_SIZE,RAM Size Register" line.byte 0x03 "PORT_DESC,Port Descriptor Register" bitfld.byte 0x03 6.--7. " P3 ,Port 3 configuration" "Not implemented,Not configured,EBUS,MII" bitfld.byte 0x03 4.--5. " P2 ,Port 2 configuration" "Not implemented,Not configured,EBUS,MII" bitfld.byte 0x03 2.--3. " P1 ,Port 1 configuration" "Not implemented,Not configured,EBUS,MII" newline bitfld.byte 0x03 0.--1. " P0 ,Port 0 configuration" "Not implemented,Not configured,EBUS,MII" rgroup.word 0x08++0x01 line.word 0x00 "FEATURE,ESC Features Supported Register" bitfld.word 0x00 11. " FSCONFIG ,Fixed FMMU/SyncManager configuration" "Variable,Fixed" bitfld.word 0x00 10. " RWSUPP ,EtherCAT read/write command support" "Supported,Not supported" bitfld.word 0x00 9. " LRW ,EtherCAT LRW command support" "Supported,Not supported" newline bitfld.word 0x00 8. " DCSYNC ,Enhanced DC SYNC activation" "Not available,Available" bitfld.word 0x00 7. " FCS ,Separate handling of FCS errors" "Not supported,Supported" bitfld.word 0x00 6. " LINKDECMII ,Enhanced link detection in MII" "Not available,Available" newline bitfld.word 0x00 3. " DCWID ,Distributed clocks (width)" "32 bits,64 bits" bitfld.word 0x00 2. " DC ,Distributed clocks" "Not available,Available" bitfld.word 0x00 0. " FMMU ,FMMU operation" "Bit oriented,Byte oriented" rgroup.word 0x10++0x03 "Station Address Registers" line.word 0x00 "STATION_ADR,Configured Station Address Register" line.word 0x02 "STATION_ALIAS,Configured Station Alias Register" group.byte 0x20++0x01 "Write Protect Registers" line.byte 0x00 "WR_REG_ENABLE,Write Register Enable Register" bitfld.byte 0x00 0. " ENABLE ,Unlock write protection temporarily while registers are write protected" "Locked,Unlocked" line.byte 0x01 "WR_REG_PROTECT,Write Register Protection Register" bitfld.byte 0x01 0. " PROTECT ,Protection of registers against writing" "Disabled,Enabled" group.byte 0x30++0x01 line.byte 0x00 "ESC_WR_ENABLE,ESC Write Enable Register" bitfld.byte 0x00 0. " ENABLE ,Unlock the write protection temporarily while registers and memories are write protected by ESC write protection" "Locked,Unlocked" line.byte 0x01 "ESC_WR_PROTECT,ESC Write Protection Register" bitfld.byte 0x01 0. " PROTECT ,Protection of registers and process memories against writing" "Disabled,Enabled" rgroup.byte 0x40++0x01 "Data Link Layer Registers" line.byte 0x00 "ESC_RESET_ECAT_R,ESC Reset EtherCAT Register" bitfld.byte 0x00 0.--1. " RESET_ECAT ,Progress of the reset procedure" "Others,52h,45h,?..." line.byte 0x01 "ESC_RESET_PDI_R,ESC Reset PDI Register" bitfld.byte 0x01 0.--1. " RESET_PDI ,Progress of the reset procedure" "Others,52h,45h,?..." sif cpuis("R7S910*") rgroup.long 0x100++0x03 line.long 0x00 "ESC_DL_CONTROL,ESC DL Control Register" bitfld.long 0x00 24. " STAALIAS ,Station alias" "Ignored,Used for all" bitfld.long 0x00 16.--18. " RXFIFO ,Set the RX FIFO size" "-40ns,-40ns,-40ns,-40ns,No change,No change,No change,Default" bitfld.long 0x00 10.--11. " LP1 ,Loop port 1 configuration" "Auto,Auto closed,Opened,Closed" newline bitfld.long 0x00 8.--9. " LP0 ,Loop port 0 configuration" "Auto,Auto closed,Opened,Closed" bitfld.long 0x00 1. " TEMPUSE ,Temporary use of bits 15 to 8 settings" "Permanent,Temporary" bitfld.long 0x00 0. " FWDRULE ,Forwarding rule" "Non EtherCAT frames forwarded,Non EtherCAT frames destroyed" else rgroup.long 0x100++0x03 line.long 0x00 "ESC_DL_CONTROL,ESC DL Control Register" bitfld.long 0x00 24. " STAALIAS ,Station alias" "Ignored,Used for all" bitfld.long 0x00 16.--18. " RXFIFO ,Set the RX FIFO size" "-40ns,-40ns,-40ns,-40ns,No change,No change,No change,Default" bitfld.long 0x00 12.--13. " LP2 ,Loop port 2 configuration" "Auto,Auto closed,Opened,Closed" newline bitfld.long 0x00 10.--11. " LP1 ,Loop port 1 configuration" "Auto,Auto closed,Opened,Closed" bitfld.long 0x00 8.--9. " LP0 ,Loop port 0 configuration" "Auto,Auto closed,Opened,Closed" bitfld.long 0x00 1. " TEMPUSE ,Temporary use of bits 15 to 8 settings" "Permanent,Temporary" newline bitfld.long 0x00 0. " FWDRULE ,Forwarding rule" "Non EtherCAT frames forwarded,Non EtherCAT frames destroyed" endif rgroup.word 0x108++0x01 line.word 0x00 "PHYSICAL_RW_OFFSET,Physical Read/Write Offset Register" hgroup.word 0x110++0x01 hide.word 0x00 "ESC_DL_STATUS,ESC DL Status Register" in hgroup.word 0x120++0x01 "Application Layer Registers" hide.word 0x00 "AL_CONTROL,AL Control Register" in hgroup.word 0x130++0x01 hide.word 0x00 "AL_STATUS,AL Status Register" in rgroup.word 0x134++0x01 line.word 0x00 "AL_STATUS_CODE,AL Status Code Register" rgroup.byte 0x138++0x01 line.byte 0x00 "RUN_LED_OVERRIDE,RUN LED Override Register" bitfld.byte 0x00 4. " OVERRIDEEN ,Override enable" "Disabled,Enabled" bitfld.byte 0x00 0.--3. " LEDCODE ,LED code" "Off,CH:Flash 1x-12x,,,,,,,,,,,,Blinking,Flickering,On" line.byte 0x01 "ERR_LED_OVERRIDE,ERR LED Override Register" bitfld.byte 0x01 4. " OVERRIDEEN ,Override enable" "Disabled,Enabled" bitfld.byte 0x01 0.--3. " LEDCODE ,LED code" "Off,CH:Flash 1x-12x,,,,,,,,,,,,Blinking,Flickering,On" rgroup.byte 0x140++0x00 "PDI Registers" line.byte 0x00 "PDI_CONTROL,PDI Control Register" rgroup.byte 0x141++0x00 line.byte 0x00 "ESC_CONFIG,ESC Configuration Register" bitfld.byte 0x00 5. " ENLP1 ,Sets enhanced link detection for port 1" "Disabled,Enabled" bitfld.byte 0x00 4. " ENLP0 ,Sets enhanced link detection for port 0" "Disabled,Enabled" bitfld.byte 0x00 3. " DCLATCH ,Latch input unit for distributed clocks" ",Enabled" newline bitfld.byte 0x00 2. " DCSYNC ,SYNC output unit for distributed clocks" ",Enabled" bitfld.byte 0x00 1. " ENLALLP ,Sets enhanced link detection for all ports" "Disabled,Enabled" bitfld.byte 0x00 0. " DEVEMU ,Device emulation" "Set by the PDI,Value written to the AL ctrl reg" rgroup.byte 0x150++0x02 line.byte 0x00 "PDI_CONFIG,PDI Configuration Register" bitfld.byte 0x00 5.--7. " ONCHIPBUS ,Type of on-chip bus" ",,2,?..." sif cpuis("R7S910*") bitfld.byte 0x00 0.--4. " ONCHIPBUSCLK ,Frequency of the on-chip bus clock" ",,,,100MHz,?..." else bitfld.byte 0x00 0.--4. " ONCHIPBUSCLK ,Frequency of the on-chip bus clock" ",,,,,5,?..." endif line.byte 0x01 "SYNC_LATCH_CONFIG,SYNC/LATCH PDI Configuration Register" bitfld.byte 0x01 7. " SYNC1MAP ,Enable mapping of the SYNC1 state to bit3 of the AL event request register" "Disabled,Enabled" bitfld.byte 0x01 6. " SYNCLAT1 ,SYNC1/LATCH1 configuration" "LATCH1 input,SYNC1 output" bitfld.byte 0x01 4.--5. " SYNC1OUT ,SYNC1 output driver/polarity" ",,Active high,?..." newline bitfld.byte 0x01 3. " SYNC0MAP ,Enable mapping of the SYNC0 state to bit2 of the AL event request register" "Disabled,Enabled" bitfld.byte 0x01 2. " SYNCLAT0 ,SYNC0/LATCH0 configuration" "LATCH1 input,SYNC1 output" bitfld.byte 0x01 0.--1. " SYNC0OUT ,SYNC0 output driver/polarity" ",,Active high,?..." line.byte 0x02 "EXT_PDI_CONFIG,Extended PDI Configuration Register" bitfld.byte 0x02 0.--1. " DATABUSWID ,Data bus width of the PDI" "4 bytes,1 byte,2 bytes,?..." rgroup.word 0x200++0x01 "Interrupt Registers" line.word 0x00 "ECAT_EVENT_MASK,EtherCAT Event Mask Register" bitfld.word 0x00 11. " SMSTA7 ,Mirror value of SyncManager 7 map" "Not mapped,Mapped" bitfld.word 0x00 10. " SMSTA6 ,Mirror value of SyncManager 6 map" "Not mapped,Mapped" bitfld.word 0x00 9. " SMSTA5 ,Mirror value of SyncManager 5 map" "Not mapped,Mapped" newline bitfld.word 0x00 8. " SMSTA4 ,Mirror value of SyncManager 4 map" "Not mapped,Mapped" bitfld.word 0x00 7. " SMSTA3 ,Mirror value of SyncManager 3 map" "Not mapped,Mapped" bitfld.word 0x00 6. " SMSTA2 ,Mirror value of SyncManager 2 map" "Not mapped,Mapped" newline bitfld.word 0x00 5. " SMSTA1 ,Mirror value of SyncManager 1 map" "Not mapped,Mapped" bitfld.word 0x00 4. " SMSTA0 ,Mirror value of SyncManager 0 map" "Not mapped,Mapped" bitfld.word 0x00 3. " ALSTA ,AL status event map" "Not mapped,Mapped" newline bitfld.word 0x00 2. " DLSTA ,DL status event map" "Not mapped,Mapped" bitfld.word 0x00 0. " DCLATCH ,DC status event map" "Not mapped,Mapped" rgroup.long 0x204++0x03 line.long 0x00 "AL_EVENT_MASK,AL Event Mask Register" bitfld.long 0x00 15. " SMINT7 ,SyncManager 7 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 14. " SMINT6 ,SyncManager 6 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 13. " SMINT5 ,SyncManager 5 interrupt mask" "Unmasked,Masked" newline bitfld.long 0x00 12. " SMINT4 ,SyncManager 4 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 11. " SMINT3 ,SyncManager 3 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 10. " SMINT2 ,SyncManager 2 interrupt mask" "Unmasked,Masked" newline bitfld.long 0x00 9. " SMINT1 ,SyncManager 1 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 8. " SMINT0 ,SyncManager 0 interrupt mask" "Unmasked,Masked" bitfld.long 0x00 6. " WDPD ,Watchdog process data mask" "Unmasked,Masked" newline bitfld.long 0x00 4. " SYNCACT ,Change of the SyncManager activation register mask" "Unmasked,Masked" bitfld.long 0x00 3. " DCSYNC1STA ,State of DC SYNC1 mask" "Unmasked,Masked" bitfld.long 0x00 2. " DCSYNC0STA ,State of DC SYNC0 mask" "Unmasked,Masked" newline bitfld.long 0x00 1. " DCLATCH ,DC latch event mask" "Unmasked,Masked" bitfld.long 0x00 0. " ALCTRL ,AL control event mask" "Unmasked,Masked" rgroup.word 0x210++0x01 line.word 0x00 "ECAT_EVENT_REQ,EtherCAT Event Request Register" bitfld.word 0x00 11. " SMSTA7 ,Mirror value of SyncManager 7 status" "No event,Event pending" bitfld.word 0x00 10. " SMSTA6 ,Mirror value of SyncManager 6 status" "No event,Event pending" bitfld.word 0x00 9. " SMSTA5 ,Mirror value of SyncManager 5 status" "No event,Event pending" newline bitfld.word 0x00 8. " SMSTA4 ,Mirror value of SyncManager 4 status" "No event,Event pending" bitfld.word 0x00 7. " SMSTA3 ,Mirror value of SyncManager 3 status" "No event,Event pending" bitfld.word 0x00 6. " SMSTA2 ,Mirror value of SyncManager 2 status" "No event,Event pending" newline bitfld.word 0x00 5. " SMSTA1 ,Mirror value of SyncManager 1 status" "No event,Event pending" bitfld.word 0x00 4. " SMSTA0 ,Mirror value of SyncManager 0 status" "No event,Event pending" bitfld.word 0x00 3. " ALSTA ,AL status event" "Not changed,Changed" newline bitfld.word 0x00 2. " DLSTA ,DL status event" "Not changed,Changed" bitfld.word 0x00 0. " DCLATCH ,DC latch event" "Not changed,Changed" rgroup.long 0x220++0x03 line.long 0x00 "AL_EVENT_REQ,AL Event Request Register" bitfld.long 0x00 15. " SMINT7 ,SyncManager 7 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 14. " SMINT6 ,SyncManager 6 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " SMINT5 ,SyncManager 5 interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " SMINT4 ,SyncManager 4 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " SMINT3 ,SyncManager 3 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 10. " SMINT2 ,SyncManager 2 interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " SMINT1 ,SyncManager 1 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " SMINT0 ,SyncManager 0 interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " WDPD ,Watchdog process data" "Valid,Timeout" newline bitfld.long 0x00 4. " SYNCACT ,Change of the SyncManager activation register" "Not changed,Changed" bitfld.long 0x00 3. " DCSYNC1STA ,State of DC SYNC1" "0,1" bitfld.long 0x00 2. " DCSYNC0STA ,State of DC SYNC0" "0,1" newline bitfld.long 0x00 1. " DCLATCH ,DC latch event" "Not changed,Changed" bitfld.long 0x00 0. " ALCTRL ,AL control event" "Not changed,Written" rgroup.word 0x300++0x03 "Error Count Registers" line.word 0x00 "RX_ERR_COUNT0,Rx Error Counter 0 Register" hexmask.word.byte 0x00 8.--15. 1. " RXERRCNT ,Counter value of RX errors for port 0" hexmask.word.byte 0x00 0.--7. 1. " INVFRMCNT ,Counter value of invalid frames for port 0" line.word 0x02 "RX_ERR_COUNT1,Rx Error Counter 1 Register" hexmask.word.byte 0x02 8.--15. 1. " RXERRCNT ,Counter value of RX errors for port 1" hexmask.word.byte 0x02 0.--7. 1. " INVFRMCNT ,Counter value of invalid frames for port 1" sif !cpuis("R7S910*") rgroup.word 0x306++0x01 line.word 0x00 "RX_ERR_COUNT0,Rx Error Counter 2 Register" hexmask.word.byte 0x00 8.--15. 1. " RXERRCNT ,Counter value of RX errors for port 2" hexmask.word.byte 0x00 0.--7. 1. " INVFRMCNT ,Counter value of invalid frames for port 2" endif sif cpuis("R7S910*") rgroup.byte 0x308++0x00 line.byte 0x00 "FWD_RX_ERR_COUNT0,Forwarded Rx Error Counter 0 Register" rgroup.byte 0x30A++0x00 line.byte 0x00 "FWD_RX_ERR_COUNT1,Forwarded Rx Error Counter 1 Register" else rgroup.byte 0x308++0x00 line.byte 0x00 "FWD_RX_ERR_COUNT0,Forwarded Rx Error Counter 0 Register" rgroup.byte 0x30A++0x00 line.byte 0x00 "FWD_RX_ERR_COUNT1,Forwarded Rx Error Counter 1 Register" rgroup.byte 0x30C++0x00 line.byte 0x00 "FWD_RX_ERR_COUNT2,Forwarded Rx Error Counter 2 Register" endif rgroup.byte 0x30C++0x01 line.byte 0x00 "ECAT_PROC_ERR_COUNT,EtherCAT Processing Unit Error Counter Register" line.byte 0x01 "PDI_ERR_COUNT,PDI Error Counter Register" sif cpuis("R7S910*") rgroup.byte 0x310++0x00 line.byte 0x00 "LOST_LINK_COUNT0,Lost Link Counter 0 Register" rgroup.byte 0x310++0x00 line.byte 0x00 "LOST_LINK_COUNT1,Lost Link Counter 1 Register" else rgroup.byte 0x310++0x00 line.byte 0x00 "LOST_LINK_COUNT0,Lost Link Counter 0 Register" rgroup.byte 0x310++0x00 line.byte 0x00 "LOST_LINK_COUNT1,Lost Link Counter 1 Register" rgroup.byte 0x310++0x00 line.byte 0x00 "LOST_LINK_COUNT2,Lost Link Counter 2 Register" endif rgroup.word 0x400++0x01 "Watchdog Registers" line.word 0x00 "WD_DIVIDE,Watchdog Divider Register" rgroup.word 0x410++0x01 line.word 0x00 "WDT_PDI,Watchdog Time PDI Register" rgroup.word 0x420++0x01 line.word 0x00 "WDT_DATA,Watchdog Time Process Data Register" hgroup.word 0x440++0x01 hide.word 0x00 "WDS_DATA,Watchdog Status Process Data Register" in rgroup.byte 0x442++0x01 line.byte 0x00 "WDC_DATA,Watchdog Counter Process Data Register" line.byte 0x01 "WDC_PDI,Watchdog Counter PDI Register" rgroup.byte 0x500++0x01 "SII EEPROM Interface Registers" line.byte 0x00 "EEP_CONF,EEPROM Configuration Register" bitfld.byte 0x00 1. " FORCEECAT ,Forcibly changes the right of access to the EEPROM by the EtherCAT" "Not changed,Changed" bitfld.byte 0x00 0. " CTRLPDI ,Specifies whether EEPROM control is offered to the PDI" "No EEPROM control,EEPROM control" line.byte 0x01 "EEP_STATE,EEPROM PDI Access State Register" bitfld.byte 0x01 0. " PDIACCEES ,Right of access to the EEPROM" "No access,Access" rgroup.word 0x502++0x03 line.word 0x00 "EEP_CONT_STAT,EEPROM Control/Status Register" bitfld.word 0x00 15. " BUSY ,Indicates a busy state of the EEPROM interface" "Idle,Busy" bitfld.word 0x00 14. " WRENERR ,Indicates error write enable" "No error,Error" bitfld.word 0x00 13. " ACKCMDERR ,Indicates error acknowledge/command" "No error,Error" newline bitfld.word 0x00 12. " LOADSTA ,Indicates EEPROM loading status" "Loaded,Not loaded" bitfld.word 0x00 11. " CKSUMERR ,Indicates checksum error in the ESC configuration area" "No error,Error" bitfld.word 0x00 8.--10. " COMMAND ,Indicates checksum error in the ESC configuration area" "No command/EEPROM idle,Read,Write,,Reload,?..." newline bitfld.word 0x00 7. " PROMSIZE ,Selected EEPROM algorithm" "1 address byte,2 address bytes" bitfld.word 0x00 6. " READBYTE ,Supported EEPROM read bytes" "4 bytes,8 bytes" bitfld.word 0x00 0. " ECATWREN ,EtherCAT write enable" "Disabled,Enabled" line.word 0x02 "EEP_ADR,EEPROM Address Register" rgroup.long 0x508++0x03 line.long 0x00 "EEP_DATA,EEPROM Data Register" hexmask.long.word 0x00 16.--31. 1. " HIDATA ,Data read from the EEPROM" hexmask.long.word 0x00 0.--15. 1. " LODATA ,Data to be written to the EEPROM or data read from the EEPROM" rgroup.word 0x510++0x01 "MII Management Interface Registers" line.word 0x00 "MII_CONT_STAT,MII Management Control/Status Register" bitfld.word 0x00 15. " BUSY ,MII management interface is busy" "Idle,Busy" bitfld.word 0x00 14. " CMDERR ,Command error occurred" "No error,Error" bitfld.word 0x00 13. " READERR ,Read error occurred" "No error,Error" newline bitfld.word 0x00 9. " COMMAND[1] ,Current command/currently executed command" ",Write" bitfld.word 0x00 8. " COMMAND[0] ,Current command/currently executed command" "No command/MI idle,Read" bitfld.word 0x00 3.--7. " PHYOFFSET ,Indicate the PHY address offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.word 0x00 2. " MILINK ,MI link detection" "Not available,Available" bitfld.word 0x00 1. " PDICTRL ,MII management interface can be controlled by the PDI" "EtherCAT control,PDI control" bitfld.word 0x00 0. " WREN ,Write enable" "Disabled,Enabled" rgroup.byte 0x512++0x01 line.byte 0x00 "PHY_ADR,PHY Address Register" hexmask.byte 0x00 0.--4. 0x01 " PHYADDR ,PHY address" line.byte 0x01 "PHY_REG_ADR,PHY Register Address Register" hexmask.byte 0x01 0.--4. 0x01 " PHYREGADDR ,Address of PHY register" rgroup.word 0x514++0x01 line.word 0x00 "PHY_DATA,PHY Data Register" rgroup.byte 0x516++0x01 line.byte 0x00 "MII_ECAT_ACS_STAT,MII Management EtherCAT Access State Register" bitfld.byte 0x00 0. " ACSMII ,Right of access to the MII management interface" "Not exclusive,Exclusive" line.byte 0x01 "MII_PDI_ACS_STAT,MII Management PDI Access State Register" bitfld.byte 0x01 1. " FORPDI ,Forced change of access by the PDI" "Not forced,Forced" bitfld.byte 0x01 0. " ACSMII ,Right of access to the MII management interface" "By the PDI,By the EtherCAT" sif !cpuis("R7S910*") rgroup.byte 0x518++0x00 line.byte 0x00 "PHY_STATUS0,PHY Port Status 0 Register" bitfld.byte 0x00 5. " PHYCONFIG ,PHY configuration update" "Not updated,Updated" bitfld.byte 0x00 4. " LINKPARTERR ,Link partner error" "Not error,Error" bitfld.byte 0x00 3. " PHYCONFIG ,PHY configuration update" "Not updated,Updated" newline bitfld.byte 0x00 2. " LINKSTAERR ,Link status error" "Not error,Error" bitfld.byte 0x00 1. " LINKSTA ,Link status" "No link,Link" bitfld.byte 0x00 0. " PHYLINKSTA ,Physical link status" "Down,Up" rgroup.byte 0x519++0x00 line.byte 0x00 "PHY_STATUS1,PHY Port Status 1 Register" bitfld.byte 0x00 5. " PHYCONFIG ,PHY configuration update" "Not updated,Updated" bitfld.byte 0x00 4. " LINKPARTERR ,Link partner error" "Not error,Error" bitfld.byte 0x00 3. " PHYCONFIG ,PHY configuration update" "Not updated,Updated" newline bitfld.byte 0x00 2. " LINKSTAERR ,Link status error" "Not error,Error" bitfld.byte 0x00 1. " LINKSTA ,Link status" "No link,Link" bitfld.byte 0x00 0. " PHYLINKSTA ,Physical link status" "Down,Up" rgroup.byte 0x51A++0x00 line.byte 0x00 "PHY_STATUS2,PHY Port Status 2 Register" bitfld.byte 0x00 5. " PHYCONFIG ,PHY configuration update" "Not updated,Updated" bitfld.byte 0x00 4. " LINKPARTERR ,Link partner error" "Not error,Error" bitfld.byte 0x00 3. " PHYCONFIG ,PHY configuration update" "Not updated,Updated" newline bitfld.byte 0x00 2. " LINKSTAERR ,Link status error" "Not error,Error" bitfld.byte 0x00 1. " LINKSTA ,Link status" "No link,Link" bitfld.byte 0x00 0. " PHYLINKSTA ,Physical link status" "Down,Up" endif rgroup.long 0x600++0x03 "FMMU 0 Registers" line.long 0x00 "FMMU0_L_START_ADR,FMMU Logical Start Address 0 Register" rgroup.word (0x600+0x04)++0x01 line.word 0x00 "FMMU0_LEN,FMMU Length 0 Register" rgroup.byte (0x600+0x06)++0x01 line.byte 0x00 "FMMU0_L_START_BIT,FMMU Logical Start Bit 0 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU0" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU0_L_STOP_BIT,FMMU Logical Stop Bit 0 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU0" "0,1,2,3,4,5,6,7" rgroup.word (0x600+0x08)++0x01 line.word 0x00 "FMMU0_P_START_ADR,FMMU Physical Start Address 0 Register" rgroup.byte (0x600+0x0A)++0x02 line.byte 0x00 "FMMU0_P_START_BIT,FMMU Physical Start Bit 0 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU0_TYPE,FMMU Physical Type 0 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU0_ACT,FMMU Activate 0 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU0" "Disabled,Enabled" rgroup.long 0x610++0x03 "FMMU 1 Registers" line.long 0x00 "FMMU1_L_START_ADR,FMMU Logical Start Address 1 Register" rgroup.word (0x610+0x04)++0x01 line.word 0x00 "FMMU1_LEN,FMMU Length 1 Register" rgroup.byte (0x610+0x06)++0x01 line.byte 0x00 "FMMU1_L_START_BIT,FMMU Logical Start Bit 1 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU1" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU1_L_STOP_BIT,FMMU Logical Stop Bit 1 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU1" "0,1,2,3,4,5,6,7" rgroup.word (0x610+0x08)++0x01 line.word 0x00 "FMMU1_P_START_ADR,FMMU Physical Start Address 1 Register" rgroup.byte (0x610+0x0A)++0x02 line.byte 0x00 "FMMU1_P_START_BIT,FMMU Physical Start Bit 1 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU1_TYPE,FMMU Physical Type 1 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU1_ACT,FMMU Activate 1 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU1" "Disabled,Enabled" rgroup.long 0x620++0x03 "FMMU 2 Registers" line.long 0x00 "FMMU2_L_START_ADR,FMMU Logical Start Address 2 Register" rgroup.word (0x620+0x04)++0x01 line.word 0x00 "FMMU2_LEN,FMMU Length 2 Register" rgroup.byte (0x620+0x06)++0x01 line.byte 0x00 "FMMU2_L_START_BIT,FMMU Logical Start Bit 2 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU2" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU2_L_STOP_BIT,FMMU Logical Stop Bit 2 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU2" "0,1,2,3,4,5,6,7" rgroup.word (0x620+0x08)++0x01 line.word 0x00 "FMMU2_P_START_ADR,FMMU Physical Start Address 2 Register" rgroup.byte (0x620+0x0A)++0x02 line.byte 0x00 "FMMU2_P_START_BIT,FMMU Physical Start Bit 2 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU2_TYPE,FMMU Physical Type 2 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU2_ACT,FMMU Activate 2 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU2" "Disabled,Enabled" rgroup.long 0x630++0x03 "FMMU 3 Registers" line.long 0x00 "FMMU3_L_START_ADR,FMMU Logical Start Address 3 Register" rgroup.word (0x630+0x04)++0x01 line.word 0x00 "FMMU3_LEN,FMMU Length 3 Register" rgroup.byte (0x630+0x06)++0x01 line.byte 0x00 "FMMU3_L_START_BIT,FMMU Logical Start Bit 3 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU3" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU3_L_STOP_BIT,FMMU Logical Stop Bit 3 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU3" "0,1,2,3,4,5,6,7" rgroup.word (0x630+0x08)++0x01 line.word 0x00 "FMMU3_P_START_ADR,FMMU Physical Start Address 3 Register" rgroup.byte (0x630+0x0A)++0x02 line.byte 0x00 "FMMU3_P_START_BIT,FMMU Physical Start Bit 3 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU3_TYPE,FMMU Physical Type 3 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU3_ACT,FMMU Activate 3 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU3" "Disabled,Enabled" rgroup.long 0x640++0x03 "FMMU 4 Registers" line.long 0x00 "FMMU4_L_START_ADR,FMMU Logical Start Address 4 Register" rgroup.word (0x640+0x04)++0x01 line.word 0x00 "FMMU4_LEN,FMMU Length 4 Register" rgroup.byte (0x640+0x06)++0x01 line.byte 0x00 "FMMU4_L_START_BIT,FMMU Logical Start Bit 4 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU4" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU4_L_STOP_BIT,FMMU Logical Stop Bit 4 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU4" "0,1,2,3,4,5,6,7" rgroup.word (0x640+0x08)++0x01 line.word 0x00 "FMMU4_P_START_ADR,FMMU Physical Start Address 4 Register" rgroup.byte (0x640+0x0A)++0x02 line.byte 0x00 "FMMU4_P_START_BIT,FMMU Physical Start Bit 4 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU4_TYPE,FMMU Physical Type 4 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU4_ACT,FMMU Activate 4 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU4" "Disabled,Enabled" rgroup.long 0x650++0x03 "FMMU 5 Registers" line.long 0x00 "FMMU5_L_START_ADR,FMMU Logical Start Address 5 Register" rgroup.word (0x650+0x04)++0x01 line.word 0x00 "FMMU5_LEN,FMMU Length 5 Register" rgroup.byte (0x650+0x06)++0x01 line.byte 0x00 "FMMU5_L_START_BIT,FMMU Logical Start Bit 5 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU5" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU5_L_STOP_BIT,FMMU Logical Stop Bit 5 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU5" "0,1,2,3,4,5,6,7" rgroup.word (0x650+0x08)++0x01 line.word 0x00 "FMMU5_P_START_ADR,FMMU Physical Start Address 5 Register" rgroup.byte (0x650+0x0A)++0x02 line.byte 0x00 "FMMU5_P_START_BIT,FMMU Physical Start Bit 5 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU5_TYPE,FMMU Physical Type 5 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU5_ACT,FMMU Activate 5 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU5" "Disabled,Enabled" rgroup.long 0x660++0x03 "FMMU 6 Registers" line.long 0x00 "FMMU6_L_START_ADR,FMMU Logical Start Address 6 Register" rgroup.word (0x660+0x04)++0x01 line.word 0x00 "FMMU6_LEN,FMMU Length 6 Register" rgroup.byte (0x660+0x06)++0x01 line.byte 0x00 "FMMU6_L_START_BIT,FMMU Logical Start Bit 6 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU6" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU6_L_STOP_BIT,FMMU Logical Stop Bit 6 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU6" "0,1,2,3,4,5,6,7" rgroup.word (0x660+0x08)++0x01 line.word 0x00 "FMMU6_P_START_ADR,FMMU Physical Start Address 6 Register" rgroup.byte (0x660+0x0A)++0x02 line.byte 0x00 "FMMU6_P_START_BIT,FMMU Physical Start Bit 6 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU6_TYPE,FMMU Physical Type 6 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU6_ACT,FMMU Activate 6 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU6" "Disabled,Enabled" rgroup.long 0x670++0x03 "FMMU 7 Registers" line.long 0x00 "FMMU7_L_START_ADR,FMMU Logical Start Address 7 Register" rgroup.word (0x670+0x04)++0x01 line.word 0x00 "FMMU7_LEN,FMMU Length 7 Register" rgroup.byte (0x670+0x06)++0x01 line.byte 0x00 "FMMU7_L_START_BIT,FMMU Logical Start Bit 7 Register" bitfld.byte 0x00 0.--2. " LSTABIT ,Start bits of the logical start address for FMMU7" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU7_L_STOP_BIT,FMMU Logical Stop Bit 7 Register" bitfld.byte 0x01 0.--2. " LSTPBIT ,Last bits of the logical end address for FMMU7" "0,1,2,3,4,5,6,7" rgroup.word (0x670+0x08)++0x01 line.word 0x00 "FMMU7_P_START_ADR,FMMU Physical Start Address 7 Register" rgroup.byte (0x670+0x0A)++0x02 line.byte 0x00 "FMMU7_P_START_BIT,FMMU Physical Start Bit 7 Register" bitfld.byte 0x00 0.--2. " PHYSTABIT ,Start bits of the physical start address to which the start bits of the logical start address will be mapped" "0,1,2,3,4,5,6,7" line.byte 0x01 "FMMU7_TYPE,FMMU Physical Type 7 Register" bitfld.byte 0x01 1. " WRITE ,Mapping for write access" "Disabled,Enabled" bitfld.byte 0x01 0. " READ ,Mapping for read access" "Disabled,Enabled" line.byte 0x02 "FMMU7_ACT,FMMU Activate 7 Register" bitfld.byte 0x02 0. " ACTIVATE ,Enables or disables FMMU7" "Disabled,Enabled" rgroup.word 0x800++0x03 "SyncManager 0 Registers" line.word 0x00 "SM0_P_START_ADR,SyncManager Physical Start Address 0 Register" line.word 0x02 "SM0_LEN,SyncManager Length 0 Register" rgroup.byte (0x800+0x04)++0x00 line.byte 0x00 "SM0_CONTROL,SyncManager Control 0 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." if (((per.l(ad:0x44010000+0x800+0x04)&0x03)==0x01)) rgroup.byte (0x800+0x05)++0x00 line.byte 0x00 "SM0_STATUS,SyncManager Status 0 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x800+0x05)++0x00 line.byte 0x00 "SM0_STATUS,SyncManager Status 0 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif rgroup.byte (0x800+0x06)++0x01 line.byte 0x00 "SM0_ACT,SyncManager Activate 0 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM0_PDI_CONT,SyncManager PDI Control 0 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" rgroup.word 0x808++0x03 "SyncManager 1 Registers" line.word 0x00 "SM1_P_START_ADR,SyncManager Physical Start Address 1 Register" line.word 0x02 "SM1_LEN,SyncManager Length 1 Register" rgroup.byte (0x808+0x04)++0x00 line.byte 0x00 "SM1_CONTROL,SyncManager Control 1 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." if (((per.l(ad:0x44010000+0x808+0x04)&0x03)==0x01)) rgroup.byte (0x808+0x05)++0x00 line.byte 0x00 "SM1_STATUS,SyncManager Status 1 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x808+0x05)++0x00 line.byte 0x00 "SM1_STATUS,SyncManager Status 1 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif rgroup.byte (0x808+0x06)++0x01 line.byte 0x00 "SM1_ACT,SyncManager Activate 1 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM1_PDI_CONT,SyncManager PDI Control 1 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" rgroup.word 0x810++0x03 "SyncManager 2 Registers" line.word 0x00 "SM2_P_START_ADR,SyncManager Physical Start Address 2 Register" line.word 0x02 "SM2_LEN,SyncManager Length 2 Register" rgroup.byte (0x810+0x04)++0x00 line.byte 0x00 "SM2_CONTROL,SyncManager Control 2 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." if (((per.l(ad:0x44010000+0x810+0x04)&0x03)==0x01)) rgroup.byte (0x810+0x05)++0x00 line.byte 0x00 "SM2_STATUS,SyncManager Status 2 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x810+0x05)++0x00 line.byte 0x00 "SM2_STATUS,SyncManager Status 2 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif rgroup.byte (0x810+0x06)++0x01 line.byte 0x00 "SM2_ACT,SyncManager Activate 2 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM2_PDI_CONT,SyncManager PDI Control 2 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" rgroup.word 0x818++0x03 "SyncManager 3 Registers" line.word 0x00 "SM3_P_START_ADR,SyncManager Physical Start Address 3 Register" line.word 0x02 "SM3_LEN,SyncManager Length 3 Register" rgroup.byte (0x818+0x04)++0x00 line.byte 0x00 "SM3_CONTROL,SyncManager Control 3 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." if (((per.l(ad:0x44010000+0x818+0x04)&0x03)==0x01)) rgroup.byte (0x818+0x05)++0x00 line.byte 0x00 "SM3_STATUS,SyncManager Status 3 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x818+0x05)++0x00 line.byte 0x00 "SM3_STATUS,SyncManager Status 3 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif rgroup.byte (0x818+0x06)++0x01 line.byte 0x00 "SM3_ACT,SyncManager Activate 3 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM3_PDI_CONT,SyncManager PDI Control 3 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" rgroup.word 0x820++0x03 "SyncManager 4 Registers" line.word 0x00 "SM4_P_START_ADR,SyncManager Physical Start Address 4 Register" line.word 0x02 "SM4_LEN,SyncManager Length 4 Register" rgroup.byte (0x820+0x04)++0x00 line.byte 0x00 "SM4_CONTROL,SyncManager Control 4 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." if (((per.l(ad:0x44010000+0x820+0x04)&0x03)==0x01)) rgroup.byte (0x820+0x05)++0x00 line.byte 0x00 "SM4_STATUS,SyncManager Status 4 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x820+0x05)++0x00 line.byte 0x00 "SM4_STATUS,SyncManager Status 4 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif rgroup.byte (0x820+0x06)++0x01 line.byte 0x00 "SM4_ACT,SyncManager Activate 4 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM4_PDI_CONT,SyncManager PDI Control 4 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" rgroup.word 0x828++0x03 "SyncManager 5 Registers" line.word 0x00 "SM5_P_START_ADR,SyncManager Physical Start Address 5 Register" line.word 0x02 "SM5_LEN,SyncManager Length 5 Register" rgroup.byte (0x828+0x04)++0x00 line.byte 0x00 "SM5_CONTROL,SyncManager Control 5 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." if (((per.l(ad:0x44010000+0x828+0x04)&0x03)==0x01)) rgroup.byte (0x828+0x05)++0x00 line.byte 0x00 "SM5_STATUS,SyncManager Status 5 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x828+0x05)++0x00 line.byte 0x00 "SM5_STATUS,SyncManager Status 5 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif rgroup.byte (0x828+0x06)++0x01 line.byte 0x00 "SM5_ACT,SyncManager Activate 5 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM5_PDI_CONT,SyncManager PDI Control 5 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" rgroup.word 0x830++0x03 "SyncManager 6 Registers" line.word 0x00 "SM6_P_START_ADR,SyncManager Physical Start Address 6 Register" line.word 0x02 "SM6_LEN,SyncManager Length 6 Register" rgroup.byte (0x830+0x04)++0x00 line.byte 0x00 "SM6_CONTROL,SyncManager Control 6 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." if (((per.l(ad:0x44010000+0x830+0x04)&0x03)==0x01)) rgroup.byte (0x830+0x05)++0x00 line.byte 0x00 "SM6_STATUS,SyncManager Status 6 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x830+0x05)++0x00 line.byte 0x00 "SM6_STATUS,SyncManager Status 6 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif rgroup.byte (0x830+0x06)++0x01 line.byte 0x00 "SM6_ACT,SyncManager Activate 6 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM6_PDI_CONT,SyncManager PDI Control 6 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" rgroup.word 0x838++0x03 "SyncManager 7 Registers" line.word 0x00 "SM7_P_START_ADR,SyncManager Physical Start Address 7 Register" line.word 0x02 "SM7_LEN,SyncManager Length 7 Register" rgroup.byte (0x838+0x04)++0x00 line.byte 0x00 "SM7_CONTROL,SyncManager Control 7 Register" bitfld.byte 0x00 6. " WDTRGEN ,Enables or disables watchdog trigger" "Disabled,Enabled" bitfld.byte 0x00 5. " IRQPDI ,Enables or disables interrupts (PDI interrupts) by the AL event request register" "Disabled,Enabled" bitfld.byte 0x00 4. " IRQECAT ,Enables or disables interrupts (ECAT interrupts) by the EtherCAT event request register" "Disabled,Enabled" newline bitfld.byte 0x00 2.--3. " DIR ,Transfer direction" "Read,Write,?..." bitfld.byte 0x00 0.--1. " OPEMODE ,Operating mode" "Buffer,Mailbox,?..." if (((per.l(ad:0x44010000+0x838+0x04)&0x03)==0x01)) rgroup.byte (0x838+0x05)++0x00 line.byte 0x00 "SM7_STATUS,SyncManager Status 7 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 3. " MAILBOX ,Indicates the mailbox status in mailbox mode" "Empty,Full" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" else rgroup.byte (0x838+0x05)++0x00 line.byte 0x00 "SM7_STATUS,SyncManager Status 7 Register" bitfld.byte 0x00 7. " WRBUF ,Indicates that the buffer is being written" "Not written,Written" bitfld.byte 0x00 6. " RDBUF ,Indicates that the buffer is being read" "No read,Read" bitfld.byte 0x00 4.--5. " BUFFERED ,Indicates the buffer status in buffer mode" "1st buffer,2nd buffer,3rd buffer,No buffer" newline bitfld.byte 0x00 1. " INTRD ,Indicates read complete interrupt" "Not completed,Completed" bitfld.byte 0x00 0. " INTWR ,Indicates write complete interrupt" "Not completed,Completed" endif rgroup.byte (0x838+0x06)++0x01 line.byte 0x00 "SM7_ACT,SyncManager Activate 7 Register" bitfld.byte 0x00 7. " LATCHPDI ,PDI latch event" "No latch event,Latch event" bitfld.byte 0x00 6. " LATCHECAT ,ECAT latch event" "No latch event,Latch event" bitfld.byte 0x00 1. " REPEATREQ ,Repeat request" "Not requested,Requested" newline bitfld.byte 0x00 0. " SMEN ,Enables or disables SyncManager" "Disabled,Enabled" line.byte 0x01 "SM7_PDI_CONT,SyncManager PDI Control 7 Register" bitfld.byte 0x01 1. " REPEATACK ,Repeat acknowledge" "Not repeated,Repeated" bitfld.byte 0x01 0. " DEACTIVE ,Deactivates SyncManager" "Activated,Deactivated" rgroup.long 0x900++0x03 "Distributed Clock Registers" line.long 0x00 "DC_RCV_TIME_PORT0,Receive Times Port0 Register" sif cpuis("R7S910*") rgroup.long 0x904++0x03 line.long 0x00 "DC_RCV_TIME_PORT1,Receive Times Port1 Register" else rgroup.long 0x904++0x07 line.long 0x00 "DC_RCV_TIME_PORT1,Receive Times Port1 Register" line.long 0x04 "DC_RCV_TIME_PORT2,Receive Times Port2 Register" endif rgroup.quad 0x910++0x07 line.quad 0x00 "DC_SYS_TIME,System Time Register" rgroup.quad 0x918++0x0F line.quad 0x00 "DC_RCV_TIME_UNIT,Receive Time EtherCAT Processing Unit Register" line.quad 0x08 "DC_SYS_TIME_OFFSET,System Time Offset Register" rgroup.long 0x928++0x07 line.long 0x00 "DC_SYS_TIME_DELAY,System Time Delay Register" line.long 0x04 "DC_SYS_TIME_DIFF,System Time Difference Register" bitfld.long 0x04 31. " LOCALCOPY ,Local copy of the system time is greater than or equal to, or is less than, the latest received copy of the system time" "Greater,Less" hexmask.long 0x04 0.--30. 1. " DIFF ,Indicates a mean difference between the local copy of the system time and received system time" rgroup.word 0x930++0x01 line.word 0x00 "DC_SPEED_COUNT_START,Speed Counter Start Register" hexmask.word 0x00 0.--14. 1. " SPDCNTSTRT ,Bandwidth for adjustment of the local copy of the system time" rgroup.word 0x932++0x01 line.word 0x00 "DC_SPEED_COUNT_DIFF,Speed Counter Diff Register" rgroup.byte 0x934++0x01 line.byte 0x00 "DC_SYS_TIME_DIFF_FIL_DEPTH,System Time Difference Filter Depth Register" bitfld.byte 0x00 0.--3. " SYSTIMDEP ,Filter depth for averaging the received system time deviation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.byte 0x01 "DC_SPEED_COUNT_FIL_DEPTH,Speed Counter Filter Depth Register" bitfld.byte 0x01 0.--3. " CLKPERDEP ,Filter depth for averaging the clock period deviation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x980++0x01 line.byte 0x00 "DC_CYC_CONT,Cyclic Unit Control Register" bitfld.byte 0x00 5. " LATCH1 ,Control of latch input unit 1" "EtherCAT control,PDI control" bitfld.byte 0x00 4. " LATCH0 ,Control of latch input unit 0" "EtherCAT control,PDI control" bitfld.byte 0x00 0. " SYNCOUT ,Control of the SYNC output unit" "EtherCAT control,PDI control" newline line.byte 0x01 "DC_ACT,Activation Register" bitfld.byte 0x01 7. " DBGPULSE ,Sync signal debug pulse" "Deactivated,Activated" bitfld.byte 0x01 6. " NEARFUTURE ,Range to be considered the near future" "Up to 263 ns,Up to 261 ns" bitfld.byte 0x01 5. " STARTTIME ,Selects whether checking the plausibility of the start time and response to implausible start times is to proceed" "Start time reached,Start time outside the range of the near future" newline bitfld.byte 0x01 4. " EXTSTARTTIME ,Extends start time cyclic operation" "Not extended,Extended" bitfld.byte 0x01 3. " AUTOACT ,Activate the Sync output unit automatically" "Deactivated,Activated" bitfld.byte 0x01 2. " SYNC1 ,SYNC1 output" "Deactivated,Pulse generated" newline bitfld.byte 0x01 1. " SYNC0 ,SYNC0 output" "Deactivated,Pulse generated" bitfld.byte 0x01 0. " SYNCACT ,Sync output unit activate" "Deactivated,Activated" rgroup.word 0x982++0x01 line.word 0x00 "DC_PULSE_LEN,Pulse Length Of SyncSignals Register" rgroup.byte 0x984++0x00 line.byte 0x00 "DC_ACT_STAT,Activation Status Register" bitfld.byte 0x00 2. " STARTTIME ,Plausibility check result of the start time cyclic operation register" "Within the near future,Out of the near future" bitfld.byte 0x00 1. " SYNC1ACT ,Activation state of SYNC1" "Not pending,Pending" bitfld.byte 0x00 0. " SYNC0ACT ,Activation state of SYNC0" "Not pending,Pending" rgroup.byte 0x98E++0x01 line.byte 0x00 "DC_SYNC0_STAT,SYNC0 Status Register" bitfld.byte 0x00 0. " SYNC0STA ,SYNC0 state for acknowledge mode" "0,1" line.byte 0x01 "DC_SYNC1_STAT,SYNC1 Status Register" bitfld.byte 0x01 0. " SYNC1STA ,SYNC1 state for acknowledge mode" "0,1" rgroup.quad 0x990++0x07 line.quad 0x00 "DC_CYC_START_TIME,Start Time Cyclic Operation/Next SYNC0 Pulse Register" rgroup.quad 0x998++0x07 line.quad 0x00 "DC_NEXT_SYNC1_PULSE,Next SYNC1 Pulse Register" rgroup.long 0x9A0++0x07 line.long 0x00 "DC_SYNC0_CYC_TIME,SYNC0 Cycle Time Register" line.long 0x04 "DC_SYNC1_CYC_TIME,SYNC1 Cycle Time Register" rgroup.byte 0x9A8++0x01 line.byte 0x00 "DC_LATCH0_CONT,Latch0 Control Register" bitfld.byte 0x00 1. " NEGEDGE ,Function of the falling edge of the latch 0 input signal" "Continuous,Single event" bitfld.byte 0x00 0. " POSEDGE ,Function of the rising edge of the latch 0 input signal" "Continuous,Single event" line.byte 0x01 "DC_LATCH1_CONT,Latch1 Control Register" bitfld.byte 0x01 1. " NEGEDGE ,Function of the falling edge of the latch 1 input signal" "Continuous,Single event" bitfld.byte 0x01 0. " POSEDGE ,Function of the rising edge of the latch 1 input signal" "Continuous,Single event" rgroup.byte 0x9AE++0x01 line.byte 0x00 "DC_LATCH0_STAT,Latch0 Status Register" bitfld.byte 0x00 2. " PINSTATE ,State of the latch 0 input pin" "0,1" bitfld.byte 0x00 1. " EVENTNEG ,Detection of falling edges of the event latch 0 signal" "Not detected,Detected" bitfld.byte 0x00 0. " EVENTPOS ,Detection of rising edges of the event latch 0 signal" "Not detected,Detected" line.byte 0x01 "DC_LATCH1_STAT,Latch1 Status Register" bitfld.byte 0x01 2. " PINSTATE ,State of the latch 1 input pin" "0,1" bitfld.byte 0x01 1. " EVENTNEG ,Detection of falling edges of the event latch 1 signal" "Not detected,Detected" bitfld.byte 0x01 0. " EVENTPOS ,Detection of rising edges of the event latch 1 signal" "Not detected,Detected" rgroup.quad 0x9B0++0x1F line.quad 0x00 "DC_LATCH0_TIME_POS,Latch0 Time Positive Edge Register" line.quad 0x08 "DC_LATCH0_TIME_NEG,Latch0 Time Negative Edge Register" line.quad 0x10 "DC_LATCH1_TIME_POS,Latch1 Time Positive Edge Register" line.quad 0x18 "DC_LATCH1_TIME_NEG,Latch1 Time Negative Edge Register" rgroup.long 0x9F0++0x03 line.long 0x00 "DC_ECAT_CNG_EV_TIME,Buffer Change Event Time Register" rgroup.long 0x9F8++0x07 line.long 0x00 "DC_PDI_START_EV_TIME,PDI Buffer Start Event Time Register" line.long 0x04 "DC_PDI_CNG_EV_TIME,PDI Buffer Change Event Time Register" rgroup.quad 0xE00++0x0F "Other Registers" line.quad 0x00 "PRODUCT_ID,PRODUCT ID Register" line.quad 0x08 "VENDOR_ID,Vendor ID Register" hexmask.quad.long 0x08 0.--31. 1. " VENDORID ,Vendor ID" sif cpuis("R7S910*") if ((((per.b(ad:0x44010000+0x20)&0x01)==0x00))&&(((per.b(ad:0x44010000+0x21)&0x01)==0x01)))||((((per.b(ad:0x44010000+0x30)&0x01)==0x00))&&(((per.b(ad:0x44010000+0x31)&0x01)==0x01))) rgroup.long 0xF80++0x03 line.long 0x00 "USER_RAM,User RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0xF80)--ad:((ad:0x44010000)+0xFFF) /Long" else group.long 0xF80++0x03 line.long 0x00 "USER_RAM,User RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0xF80)--ad:((ad:0x44010000)+0xFFF) /Long" endif if ((((per.b(ad:0x44010000+0x30)&0x01)==0x00))&&(((per.b(ad:0x44010000+0x31)&0x01)==0x01))) rgroup.long 0x1000++0x03 line.long 0x00 "DATA_RAM,Process Data RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0x1000)--ad:((ad:0x44010000)+0x2FFF) /Long" else group.long 0x1000++0x03 line.long 0x00 "DATA_RAM,Process Data RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0x1000)--ad:((ad:0x44010000)+0x2FFF) /Long" endif else if ((((per.b(ad:0x44010000+0x20)&0x01)==0x00))&&(((per.b(ad:0x44010000+0x21)&0x01)==0x01)))||((((per.b(ad:0x44010000+0x30)&0x01)==0x00))&&(((per.b(ad:0x44010000+0x31)&0x01)==0x01))) rgroup.long 0xF80++0x03 line.long 0x00 "USER_RAM,User RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0xF80)--ad:((ad:0x44010000)+0xFFF) /Long" else group.long 0xF80++0x03 line.long 0x00 "USER_RAM,User RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0xF80)--ad:((ad:0x44010000)+0xFFF) /Long" endif if ((((per.b(ad:0x44010000+0x30)&0x01)==0x00))&&(((per.b(ad:0x44010000+0x31)&0x01)==0x01))) rgroup.long 0x1000++0x03 line.long 0x00 "DATA_RAM,Process Data RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0x1000)--ad:((ad:0x44010000)+0x2FFF) /Long" else group.long 0x1000++0x03 line.long 0x00 "DATA_RAM,Process Data RAM" button "USER_RAM" "d ad:((ad:0x44010000)+0x1000)--ad:((ad:0x44010000)+0x2FFF) /Long" endif endif endif width 0x0B tree.end tree "GMAC (Ethernet MAC 10/100/1000)" tree "MAC1" base ad:0x44000000 width 19. if (((per.l(ad:0x44000000)&0x8000)==0x8000)) if (((per.l(ad:0x44000000)&0x800)==0x800)) group.long 0x00++0x03 line.long 0x00 "MAC_CONFIGURATION,MAC Configuration Register" bitfld.long 0x00 27. " TWOKPE ,IEEE 802.3as support for 2K packets" "Not supported,Supported" bitfld.long 0x00 25. " CST ,CRC stripping for type frames" "Not stripped,Stripped" bitfld.long 0x00 23. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber disable" "No,Yes" textline " " textline " " bitfld.long 0x00 20. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter-frame gap" "96 bit,88 bit,80 bit,72 bit,64 bit,56 bit,48 bit,40 bit" textline " " bitfld.long 0x00 15. " PS ,Port select" "1000 Mbps op,10 || 100 Mbps op" bitfld.long 0x00 14. " FES ,Speed" "10 Mbps,100 Mbps" textline " " textline " " bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" rbitfld.long 0x00 11. " DM ,Duplex mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IPC ,Checksum offload" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 7. " ACS ,Automatic pad or CRC stripping" "Not stripped,Stripped" textline " " textline " " bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PRELEN ,Preamble length for transmit frames" "7 bytes,5 bytes,3 bytes,?..." else group.long 0x00++0x03 line.long 0x00 "MAC_CONFIGURATION,MAC Configuration Register" bitfld.long 0x00 27. " TWOKPE ,IEEE 802.3as support for 2K packets" "Not supported,Supported" bitfld.long 0x00 25. " CST ,CRC stripping for type frames" "Not stripped,Stripped" bitfld.long 0x00 23. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber disable" "No,Yes" textline " " textline " " bitfld.long 0x00 20. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter-frame gap" "96 bit,88 bit,80 bit,72 bit,64 bit,?..." bitfld.long 0x00 16. " DCRS ,Disable carrier sense during transmission" "No,Yes" textline " " bitfld.long 0x00 15. " PS ,Port select" "1000 Mbps op,10 || 100 Mbps op" bitfld.long 0x00 14. " FES ,Speed" "10 Mbps,100 Mbps" textline " " bitfld.long 0x00 13. " DO ,Disable receive own" "No,Yes" textline " " bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" bitfld.long 0x00 11. " DM ,Duplex mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IPC ,Checksum offload" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " DR ,Disable retry" "No,Yes" textline " " bitfld.long 0x00 7. " ACS ,Automatic pad or CRC stripping" "Not stripped,Stripped" textline " " bitfld.long 0x00 5.--6. " BL ,Back-off limit" "Min(n;10),Min(n;8),Min(n;4),Min(n;1)" bitfld.long 0x00 4. " DC ,Deferral check" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PRELEN ,Preamble length for transmit frames" "7 bytes,5 bytes,3 bytes,?..." endif else if (((per.l(ad:0x44000000)&0x800)==0x800)) group.long 0x00++0x03 line.long 0x00 "MAC_CONFIGURATION,MAC Configuration Register" bitfld.long 0x00 27. " TWOKPE ,IEEE 802.3as support for 2K packets" "Not supported,Supported" bitfld.long 0x00 25. " CST ,CRC stripping for type frames" "Not stripped,Stripped" bitfld.long 0x00 23. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber disable" "No,Yes" textline " " textline " " bitfld.long 0x00 20. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter-frame gap" "96 bit,88 bit,80 bit,?..." textline " " bitfld.long 0x00 15. " PS ,Port select" "1000 Mbps op,10 || 100 Mbps op" bitfld.long 0x00 14. " FES ,Speed" "10 Mbps,100 Mbps" textline " " textline " " bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" rbitfld.long 0x00 11. " DM ,Duplex mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IPC ,Checksum offload" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 7. " ACS ,Automatic pad or CRC stripping" "Not stripped,Stripped" textline " " textline " " bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PRELEN ,Preamble length for transmit frames" "7 bytes,5 bytes,3 bytes,?..." else group.long 0x00++0x03 line.long 0x00 "MAC_CONFIGURATION,MAC Configuration Register" bitfld.long 0x00 27. " TWOKPE ,IEEE 802.3as support for 2K packets" "Not supported,Supported" bitfld.long 0x00 25. " CST ,CRC stripping for type frames" "Not stripped,Stripped" bitfld.long 0x00 23. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber disable" "No,Yes" textline " " bitfld.long 0x00 21. " BE ,Frame burst enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter-frame gap" "96 bit,88 bit,80 bit,?..." bitfld.long 0x00 16. " DCRS ,Disable carrier sense during transmission" "No,Yes" textline " " bitfld.long 0x00 15. " PS ,Port select" "1000 Mbps op,10 || 100 Mbps op" bitfld.long 0x00 14. " FES ,Speed" "10 Mbps,100 Mbps" textline " " bitfld.long 0x00 13. " DO ,Disable receive own" "No,Yes" textline " " bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" bitfld.long 0x00 11. " DM ,Duplex mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IPC ,Checksum offload" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " DR ,Disable retry" "No,Yes" textline " " bitfld.long 0x00 7. " ACS ,Automatic pad or CRC stripping" "Not stripped,Stripped" textline " " bitfld.long 0x00 5.--6. " BL ,Back-off limit" "Min(n;10),Min(n;8),Min(n;4),Min(n;1)" bitfld.long 0x00 4. " DC ,Deferral check" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PRELEN ,Preamble length for transmit frames" "7 bytes,5 bytes,3 bytes,?..." endif endif textline " " group.long 0x04++0x03 line.long 0x00 "MAC_FRAME_FILTER,MAC Frame Filter" bitfld.long 0x00 31. " RA ,Receive all" "Disabled,Enabled" bitfld.long 0x00 16. " VTFE ,VLAN tag filter enable" "Disabled,Enabled" bitfld.long 0x00 10. " HPF ,Hash or perfect filter" "Hash filter,Perfect filter" textline " " bitfld.long 0x00 9. " SAF ,Source address filter enable" "Disabled,Enabled" bitfld.long 0x00 8. " SAIF ,SA inverse filtering" "Disabled,Enabled" bitfld.long 0x00 6.--7. " PCF ,Pass control frames" "Filtered all,Forwarded all (except PAUSE),Forwarded all,Forwarded frames that passed Address Filter" textline " " bitfld.long 0x00 5. " DBF ,Disable broadcast frames" "No,Yes" bitfld.long 0x00 4. " PM ,Pass all multicast" "Not passed,Passed" bitfld.long 0x00 3. " DAIF ,DA inverse filtering" "Not inversed,Inversed" textline " " bitfld.long 0x00 2. " HMC ,Hash multicast" "No hash,Hash" bitfld.long 0x00 1. " HUC ,Hash unicast" "No hash,Hash" bitfld.long 0x00 0. " PR ,Promiscuous mode" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "GMII_ADDRESS,GMII Address Register" bitfld.long 0x00 11.--15. " PA ,Physical layer address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 6.--10. " GR ,GMII register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--5. " CR ,CSR clock range" "60-100 MHz,100-150 MHz,20-35 MHz,35-60 MHz,150-250 MHz,250-300 MHz,,,Clk/4,Clk/6,Clk/8,Clk/10,Clk/12,Clk/14,Clk/16,Clk/18" textline " " bitfld.long 0x00 1. " GW ,GMII write" "No write,Write" bitfld.long 0x00 0. " GB ,GMII busy" "Not busy,Busy" line.long 0x04 "GMII_DATA,GMII Data Register" hexmask.long.word 0x04 0.--15. 1. " GD ,GMII data" if (((per.l(ad:0x44000000)&0x800)==0x800)) group.long 0x18++0x03 line.long 0x00 "FLOW_CONTROL,Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Disable zero-quanta pause" "No,Yes" bitfld.long 0x00 4.--5. " PLT ,Pause low threshold" "PT-4 slot times,PT-28 slot times,PT-144 slot times,PT-256 slot times" textline " " bitfld.long 0x00 3. " UP ,Unicast pause frame detect" "Disabled,Enabled" bitfld.long 0x00 2. " RFE ,Receive flow control enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FCA_BPA ,Flow control busy or backpressure activate" "Not busy/Not activated,Busy/Activated" else if (((per.l(ad:0x44000000+0x18)&0x02)==0x02)) group.long 0x18++0x03 line.long 0x00 "FLOW_CONTROL,Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Disable zero-quanta pause" "No,Yes" bitfld.long 0x00 4.--5. " PLT ,Pause low threshold" "PT-4 slot times,PT-28 slot times,PT-144 slot times,PT-256 slot times" textline " " bitfld.long 0x00 3. " UP ,Unicast pause frame detect" "Disabled,Enabled" bitfld.long 0x00 2. " RFE ,Receive flow control enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FCA_BPA ,Flow control busy or backpressure activate" "Not busy/Not activated,Busy/Activated" else group.long 0x18++0x03 line.long 0x00 "FLOW_CONTROL,Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Disable zero-quanta pause" "No,Yes" bitfld.long 0x00 4.--5. " PLT ,Pause low threshold" "PT-4 slot times,PT-28 slot times,PT-144 slot times,PT-256 slot times" textline " " bitfld.long 0x00 3. " UP ,Unicast pause frame detect" "Disabled,Enabled" bitfld.long 0x00 2. " RFE ,Receive flow control enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" endif endif if (((per.l(ad:0x44000000+0x1C)&0x10000)==0x10000)) group.long 0x1C++0x03 line.long 0x00 "VLAN_TAG,VLAN Tag Register" bitfld.long 0x00 19. " VTHM ,VLAN tag hash table match enable" "Disabled,Enabled" bitfld.long 0x00 18. " ESVL ,Enable S-VLAN" "Disabled,Enabled" bitfld.long 0x00 17. " VTIM ,VLAN tag inverse match enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ETV ,Enable 12-Bit VLAN tag comparison" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--11. 1. " VL[0] ,VLAN tags VLAN identifier field" else group.long 0x1C++0x03 line.long 0x00 "VLAN_TAG,VLAN Tag Register" bitfld.long 0x00 19. " VTHM ,VLAN tag hash table match enable" "Disabled,Enabled" bitfld.long 0x00 18. " ESVL ,Enable S-VLAN" "Disabled,Enabled" bitfld.long 0x00 17. " VTIM ,VLAN tag inverse match enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ETV ,Enable 12-Bit VLAN tag comparison" "Disabled,Enabled" textline " " bitfld.long 0x00 13.--15. " VL[2] ,User priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12. " [1] ,Canonical format indicator or drop eligible indicator DEI" "Disabled,Enabled" hexmask.long.word 0x00 0.--11. 1. " [0] ,VLAN tags VLAN identifier field" endif textline " " rgroup.long 0x20++0x07 line.long 0x00 "VERSION,Version Register" hexmask.long.word 0x00 0.--15. 1. " VER ,Version MAC1: 0x2037 MAC2: 0x2137" line.long 0x04 "DEBUG,Debug Register" bitfld.long 0x04 25. " TXSTSFSTS ,MTL TxStatus FIFO full status" "Not full,Full" bitfld.long 0x04 24. " TXFSTS ,MTL Tx FIFO not empty status" "Empty,Not empty" textline " " bitfld.long 0x04 22. " TWCSTS ,MTL Tx FIFO write controller active status" "Not active,Active" bitfld.long 0x04 20.--21. " TRCSTS ,MTL Tx FIFO read controller status" "Idle,Read,Wait for Tx status from MAC,Write received Tx status || flush the Tx FIFO" textline " " bitfld.long 0x04 19. " TXPAUSED ,MAC transmitter in PAUSE" "Not paused,Paused" bitfld.long 0x04 17.--18. " TFCSTS ,MAC transmit frame controller status" "Idle,Wait for status of prev frame || IFG or backoff period to be over,Generate and transmit pause control frame,Transfer input frame for transmission" textline " " bitfld.long 0x04 16. " TPESTS ,MAC GMII or MII transmit protocol engine status" "Not active,Active" bitfld.long 0x04 8.--9. " RXFSTS ,MTL Rx FIFO fill-level status" "Empty,Below threshold,Above threshold,Full" textline " " bitfld.long 0x04 5.--6. " RRCSTS ,MTL Rx FIFO read controller state" "Idle,Read frame data,Read frame status,Flush frame data and status" bitfld.long 0x04 4. " RWCSTS ,MTL Rx FIFO write controller active status" "Not active,Active" textline " " bitfld.long 0x04 1.--2. " RFCFCSTS ,MAC receive frame controller FIFO status" "0,1,2,3" bitfld.long 0x04 0. " RPESTS ,MAC GMII or MII receive protocol engine status" "Not received,Received" textline " " width 29. group.long 0x28++0x0F line.long 0x00 "REMOTE_WAKE_UP_FRAME_FILTER,Remote Wake Up Frame Filter Register" line.long 0x04 "PMT_CONTROL_STATUS,PMT Control and Status Register" bitfld.long 0x04 31. " RWKFILTRST ,Wake-Up frame filter register pointer reset" "No reset,Reset" bitfld.long 0x04 24.--26. " RWKPTR ,Remote wake-up FIFO pointer" "0,1,2,3,4,5,6,7" bitfld.long 0x04 10. " RWKPFE ,Remote wake-up packet forwarding enable" "Disabled,Enabled" bitfld.long 0x04 9. " GLBLUCAST ,Global unicast" "Disabled,Enabled" textline " " rbitfld.long 0x04 6. " RWKPRCVD ,Wake-Up frame received" "Not received,Received" rbitfld.long 0x04 5. " MGKPRCVD ,Magic packet received" "Not received,Received" bitfld.long 0x04 2. " RWKPKTEN ,Wake-Up frame enable" "Disabled,Enabled" bitfld.long 0x04 1. " MGKPKTEN ,Magic packet enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " PWRDWN ,Power down" "Powered up,Powered down" line.long 0x08 "LPI_CONTROL_STATUS,LPI Control and Status Register" bitfld.long 0x08 19. " LPITXA ,LPI TX automate" "Disabled,Enabled" bitfld.long 0x08 17. " PLS ,PHY link status" "Down,Up" bitfld.long 0x08 16. " LPIEN ,LPI Enable" "Disabled,Enabled" rbitfld.long 0x08 9. " RLPIST ,Receive LPI state" "Not received,Received" textline " " rbitfld.long 0x08 8. " TLPIST ,Transmit LPI state" "Not transmitted,Transmitted" rbitfld.long 0x08 3. " RLPIEX ,Receive LPI exit" "Not stopped,Stopped" rbitfld.long 0x08 2. " RLPIEN ,Receive LPI entry" "Not received,Received" rbitfld.long 0x08 1. " TLPIEX ,Transmit LPI exit" "No exit,Exit" textline " " rbitfld.long 0x08 0. " TLPIEN ,Transmit LPI entry" "No entry,Entry" line.long 0x0C "LPI_TIMERS_CONTROL,LPI Timers Control Register" hexmask.long.word 0x0C 16.--25. 1. " LST ,LPI LS timer" hexmask.long.word 0x0C 0.--15. 1. " TWT ,LPI TW timer" rgroup.long 0x38++0x03 line.long 0x00 "INTERRUPT_STATUS,Interrupt Status Register" bitfld.long 0x00 10. " LPIIS ,LPI interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " TSIS ,Timestamp interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 7. " MMCRXIPIS ,MMC receive checksum offload interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " MMCTXIS ,MMC transmit interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " MMCRXIS ,MMC receive interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " MMCIS ,MMC interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " PMTIS ,PMT interrupt status" "No interrupt,Interrupt" group.long 0x3C++0x0F line.long 0x00 "INTERRUPT_MASK,Interrupt Mask Register" bitfld.long 0x00 10. " LPIIM ,LPI interrupt mask" "Unmasked,Masked" bitfld.long 0x00 9. " TSIM ,Timestamp interrupt mask" "Unmasked,Masked" bitfld.long 0x00 3. " PMTIM ,PMT interrupt mask" "Unmasked,Masked" line.long 0x04 "MAC_ADDRESS0_HIGH,MAC Address 0 High Register" bitfld.long 0x04 31. " AE ,Address enable" "Disabled,Enabled" hexmask.long.word 0x04 0.--15. 0x01 " ADDRHI ,MAC address 0 [47:32]" line.long 0x08 "MAC_ADDRESS0_LOW,MAC Address 0 Low Register" textline " " group.long 0x48++0x03 line.long 0x00 "MAC_ADDRESS1_HIGH,MAC Address 1 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[1]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[1]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[1]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[1]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[1]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[1]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 1 [47:32]" group.long 0x50++0x03 line.long 0x00 "MAC_ADDRESS2_HIGH,MAC Address 2 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[2]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[2]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[2]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[2]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[2]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[2]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 2 [47:32]" group.long 0x58++0x03 line.long 0x00 "MAC_ADDRESS3_HIGH,MAC Address 3 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[3]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[3]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[3]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[3]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[3]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[3]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 3 [47:32]" group.long 0x60++0x03 line.long 0x00 "MAC_ADDRESS4_HIGH,MAC Address 4 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[4]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[4]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[4]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[4]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[4]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[4]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 4 [47:32]" group.long 0x68++0x03 line.long 0x00 "MAC_ADDRESS5_HIGH,MAC Address 5 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[5]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[5]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[5]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[5]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[5]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[5]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 5 [47:32]" group.long 0x70++0x03 line.long 0x00 "MAC_ADDRESS6_HIGH,MAC Address 6 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[6]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[6]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[6]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[6]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[6]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[6]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 6 [47:32]" group.long 0x78++0x03 line.long 0x00 "MAC_ADDRESS7_HIGH,MAC Address 7 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[7]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[7]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[7]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[7]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[7]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[7]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 7 [47:32]" group.long 0x80++0x03 line.long 0x00 "MAC_ADDRESS8_HIGH,MAC Address 8 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[8]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[8]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[8]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[8]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[8]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[8]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 8 [47:32]" group.long 0x88++0x03 line.long 0x00 "MAC_ADDRESS9_HIGH,MAC Address 9 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[9]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[9]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[9]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[9]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[9]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[9]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 9 [47:32]" group.long 0x90++0x03 line.long 0x00 "MAC_ADDRESS10_HIGH,MAC Address 10 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[10]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[10]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[10]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[10]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[10]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[10]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 10 [47:32]" group.long 0x98++0x03 line.long 0x00 "MAC_ADDRESS11_HIGH,MAC Address 11 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[11]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[11]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[11]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[11]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[11]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[11]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 11 [47:32]" group.long 0xA0++0x03 line.long 0x00 "MAC_ADDRESS12_HIGH,MAC Address 12 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[12]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[12]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[12]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[12]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[12]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[12]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 12 [47:32]" group.long 0xA8++0x03 line.long 0x00 "MAC_ADDRESS13_HIGH,MAC Address 13 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[13]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[13]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[13]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[13]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[13]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[13]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 13 [47:32]" group.long 0xB0++0x03 line.long 0x00 "MAC_ADDRESS14_HIGH,MAC Address 14 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[14]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[14]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[14]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[14]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[14]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[14]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 14 [47:32]" group.long 0xB8++0x03 line.long 0x00 "MAC_ADDRESS15_HIGH,MAC Address 15 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[15]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[15]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[15]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[15]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[15]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[15]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 15 [47:32]" group.long 0x880++0x03 line.long 0x00 "MAC_ADDRESS16_HIGH,MAC Address 16 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[16]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[16]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[16]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[16]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[16]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[16]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 16 [47:32]" group.long 0x888++0x03 line.long 0x00 "MAC_ADDRESS17_HIGH,MAC Address 17 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[17]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[17]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[17]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[17]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[17]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[17]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 17 [47:32]" group.long 0x4C++0x03 line.long 0x00 "MAC_ADDRESS1_LOW,MAC Address 1 Low Register" group.long 0x54++0x03 line.long 0x00 "MAC_ADDRESS2_LOW,MAC Address 2 Low Register" group.long 0x5C++0x03 line.long 0x00 "MAC_ADDRESS3_LOW,MAC Address 3 Low Register" group.long 0x64++0x03 line.long 0x00 "MAC_ADDRESS4_LOW,MAC Address 4 Low Register" group.long 0x6C++0x03 line.long 0x00 "MAC_ADDRESS5_LOW,MAC Address 5 Low Register" group.long 0x74++0x03 line.long 0x00 "MAC_ADDRESS6_LOW,MAC Address 6 Low Register" group.long 0x7C++0x03 line.long 0x00 "MAC_ADDRESS7_LOW,MAC Address 7 Low Register" group.long 0x84++0x03 line.long 0x00 "MAC_ADDRESS8_LOW,MAC Address 8 Low Register" group.long 0x8C++0x03 line.long 0x00 "MAC_ADDRESS9_LOW,MAC Address 9 Low Register" group.long 0x94++0x03 line.long 0x00 "MAC_ADDRESS10_LOW,MAC Address 10 Low Register" group.long 0x9C++0x03 line.long 0x00 "MAC_ADDRESS11_LOW,MAC Address 11 Low Register" group.long 0xA4++0x03 line.long 0x00 "MAC_ADDRESS12_LOW,MAC Address 12 Low Register" group.long 0xAC++0x03 line.long 0x00 "MAC_ADDRESS13_LOW,MAC Address 13 Low Register" group.long 0xB4++0x03 line.long 0x00 "MAC_ADDRESS14_LOW,MAC Address 14 Low Register" group.long 0xBC++0x03 line.long 0x00 "MAC_ADDRESS15_LOW,MAC Address 15 Low Register" group.long 0x884++0x03 line.long 0x00 "MAC_ADDRESS16_LOW,MAC Address 16 Low Register" group.long 0x88C++0x03 line.long 0x00 "MAC_ADDRESS17_LOW,MAC Address 17 Low Register" textline " " group.long 0xDC++0x03 line.long 0x00 "WDOG_TIMEOUT,Watchdog Timeout Register" bitfld.long 0x00 16. " PWE ,Programmable watchdog enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--13. 1. " WTO ,Watchdog timeout" group.long 0x100++0x03 line.long 0x00 "MMC_CONTROL,MMC Control Register" bitfld.long 0x00 8. " UCDBC ,Update MMC counters for dropped broadcast frames" "Not updated,Updated" bitfld.long 0x00 5. " CNTPRSTLVL ,Full-half preset" "Disabled,Enabled" bitfld.long 0x00 4. " CNTPRST ,Counters preset" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CNTFREEZ ,MMC counter freeze" "No freeze,Freeze" bitfld.long 0x00 2. " RSTONRD ,Reset on read" "No reset,Reset" bitfld.long 0x00 1. " CNTSTOPRO ,Counters stop rollover" "Rollover,Not rollover" textline " " bitfld.long 0x00 0. " CNTRST ,Counters reset" "No reset,Reset" rgroup.long 0x104++0x07 line.long 0x00 "MMC_RECEIVE_INTERRUPT,MMC Receive Interrupt Register" bitfld.long 0x00 25. " RXCTRLFIS ,MMC receive control frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " RXRCVERRFIS ,MMC receive error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 23. " RXWDOGFIS ,MMC receive watchdog error frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " RXVLANGBFIS ,MMC receive VLAN good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 21. " RXFOVFIS ,MMC receive FIFO overflow frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 20. " RXPAUSFIS ,MMC receive pause frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " RXORANGEFIS ,MMC receive out of range error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " RXLENERFIS ,MMC receive length error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " RXUCGFIS ,MMC receive unicast good frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " RX1024TMAXOCTGBFIS ,MMC receive 1024 to maximum octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 15. " RX512T1023OCTGBFIS ,MMC receive 512 to 1023 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 14. " RX256T511OCTGBFIS ,MMC receive 256 to 511 octet good bad frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " RX128T255OCTGBFIS ,MMC receive 128 to 255 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " RX65T127OCTGBFIS ,MMC receive 65 to 127 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 11. " RX64OCTGBFIS ,MMC receive 64 octet good bad frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " RXOSIZEGFIS ,MMC receive oversize good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " RXUSIZEGFIS ,MMC receive undersize good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RXJABERFIS ,MMC receive jabber error frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " RXRUNTFIS ,MMC receive runt frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " RXALGNERFIS ,MMC receive alignment error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " RXCRCERFIS ,MMC receive CRC error frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " RXMCGFIS ,MMC receive multicast good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " RXBCGFIS ,MMC receive broadcast good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " RXGOCTIS ,MMC receive good octet counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " RXGBOCTIS ,MMC receive good bad octet counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXGBFRMIS ,MMC receive good bad frame counter interrupt Status" "No interrupt,Interrupt" line.long 0x04 "MMC_TRANSMIT_INTERRUPT,MMC Transmit Interrupt Register" bitfld.long 0x04 25. " TXOSIZEGFIS ,MMC transmit oversize good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 24. " TXVLANGFIS ,MMC transmit VLAN good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 23. " TXPAUSFIS ,MMC transmit pause frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " TXEXDEFFIS ,MMC transmit excessive deferral frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 21. " TXGFRMIS ,MMC transmit good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 20. " TXGOCTIS ,MMC transmit good octet counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " TXCARERFIS ,MMC transmit carrier error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 18. " TXEXCOLFIS ,MMC transmit excessive collision frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 17. " TXLATCOLFIS ,MMC transmit late collision frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " TXDEFFIS ,MMC transmit deferred frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 15. " TXMCOLGFIS ,MMC transmit multiple collision good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 14. " TXSCOLGFIS ,MMC transmit single collision good frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " TXUFLOWERFIS ,MMC transmit underflow error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 12. " TXBCGBFIS ,MMC transmit broadcast good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 11. " TXMCGBFIS ,MMC transmit multicast good bad frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " TXUCGBFIS ,MMC transmit unicast good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 9. " TX1024TMAXOCTGBFIS ,MMC transmit 1024 to maximum octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 8. " TX512T1023OCTGBFIS ,MMC transmit 512 to 1023 octet good bad frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " TX256T511OCTGBFIS ,MMC transmit 256 to 511 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 6. " TX128T255OCTGBFIS ,MMC transmit 128 to 255 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 5. " TX65T127OCTGBFIS ,MMC transmit 65 to 127 octet good bad frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " TX64OCTGBFIS ,MMC transmit 64 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 3. " TXMCGFIS ,MMC transmit multicast good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " TXBCGFIS ,MMC transmit broadcast good frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " TXGBFRMIS ,MMC transmit good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " TXGBOCTIS ,MMC transmit good bad octet counter interrupt status" "No interrupt,Interrupt" group.long 0x10C++0x07 line.long 0x00 "MMC_RECEIVE_INTERRUPT_MASK,MMC Receive Interrupt Mask Register" bitfld.long 0x00 25. " RXCTRLFIM ,MMC receive control frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 24. " RXRCVERRFIM ,MMC receive error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 23. " RXWDOGFIM ,MMC receive watchdog error frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 22. " RXVLANGBFIM ,MMC receive VLAN good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 21. " RXFOVFIM ,MMC receive FIFO overflow frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 20. " RXPAUSFIM ,MMC receive pause frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 19. " RXORANGEFIM ,MMC receive out of range error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 18. " RXLENERFIM ,MMC receive length error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 17. " RXUCGFIM ,MMC receive unicast good frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 16. " RX1024TMAXOCTGBFIM ,MMC receive 1024 to maximum octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 15. " RX512T1023OCTGBFIM ,MMC receive 512 to 1023 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 14. " RX256T511OCTGBFIM ,MMC receive 256 to 511 octet good bad frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 13. " RX128T255OCTGBFIM ,MMC receive 128 to 255 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 12. " RX65T127OCTGBFIM ,MMC receive 65 to 127 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 11. " RX64OCTGBFIM ,MMC receive 64 octet good bad frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 10. " RXOSIZEGFIM ,MMC receive oversize good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 9. " RXUSIZEGFIM ,MMC receive undersize good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 8. " RXJABERFIM ,MMC receive jabber error frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 7. " RXRUNTFIM ,MMC receive runt frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 6. " RXALGNERFIM ,MMC receive alignment error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 5. " RXCRCERFIM ,MMC receive CRC error frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 4. " RXMCGFIM ,MMC receive multicast good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 3. " RXBCGFIM ,MMC receive broadcast good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 2. " RXGOCTIM ,MMC receive good octet counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 1. " RXGBOCTIM ,MMC receive good bad octet counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 0. " RXGBFRMIM ,MMC receive good bad frame counter interrupt mask" "Unmasked,Masked" line.long 0x04 "MMC_TRANSMIT_INTERRUPT_MASK,MMC Transmit Interrupt Mask Register" bitfld.long 0x04 25. " TXOSIZEGFIM ,MMC transmit oversize good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 24. " TXVLANGFIM ,MMC transmit VLAN good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 23. " TXPAUSFIM ,MMC transmit pause frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 22. " TXEXDEFFIM ,MMC transmit excessive deferral frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 21. " TXGFRMIM ,MMC transmit good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 20. " TXGOCTIM ,MMC transmit good octet counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 19. " TXCARERFIM ,MMC transmit carrier error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 18. " TXEXCOLFIM ,MMC transmit excessive collision frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 17. " TXLATCOLFIM ,MMC transmit late collision frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 16. " TXDEFFIM ,MMC transmit deferred frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 15. " TXMCOLGFIM ,MMC transmit multiple collision good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 14. " TXSCOLGFIM ,MMC transmit single collision good frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 13. " TXUFLOWERFIM ,MMC transmit underflow error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 12. " TXBCGBFIM ,MMC transmit broadcast good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 11. " TXMCGBFIM ,MMC transmit multicast good bad frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 10. " TXUCGBFIM ,MMC transmit unicast good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 9. " TX1024TMAXOCTGBFIM ,MMC transmit 1024 to maximum octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 8. " TX512T1023OCTGBFIM ,MMC transmit 512 to 1023 octet good bad frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 7. " TX256T511OCTGBFIM ,MMC transmit 256 to 511 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 6. " TX128T255OCTGBFIM ,MMC transmit 128 to 255 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 5. " TX65T127OCTGBFIM ,MMC transmit 65 to 127 octet good bad frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 4. " TX64OCTGBFIM ,MMC transmit 64 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 3. " TXMCGFIM ,MMC transmit multicast good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 2. " TXBCGFIM ,MMC transmit broadcast good frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 1. " TXGBFRMIM ,MMC transmit good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 0. " TXGBOCTIM ,MMC transmit good bad octet counter interrupt mask" "Unmasked,Masked" textline " " width 36. rgroup.long 0x114++0x67 line.long 0x00 "TX_OCTET_COUNT_GOOD_BAD,Transmit Octet Count For Good And Bad Frames" line.long 0x04 "TX_FRAME_COUNT_GOOD_BAD,Transmit Frame Count For Good And Bad Frames" line.long 0x08 "TX_BROADCAST_FRAMES_GOOD,Transmit Frame Count For Good Broadcast Frames" line.long 0x0C "TX_MULTICAST_FRAMES_GOOD,Transmit Frame Count For Good Multicast Frames" line.long 0x10 "TX_64OCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 64 Byte Frames" line.long 0x14 "TX_65TO127OCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 65 to 127 Bytes Frames" line.long 0x18 "TX_128TO255OCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 128 to 255 Bytes Frames" line.long 0x1C "TX_256TO511OCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 256 to 511 Bytes Frames" line.long 0x20 "TX_512TO1023OCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 512 to 1023 Bytes Frames" line.long 0x24 "TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 1024 to Maxsize Bytes Frames" line.long 0x28 "TX_UNICAST_FRAMES_GOOD_BAD,Transmit Frame Count For Good And Bad Unicast Frames" line.long 0x2C "TX_MULTICAST_FRAMES_GOOD_BAD,Transmit Frame Count For Good And Bad Multicast Frames" line.long 0x30 "TX_BROADCAST_FRAMES_GOOD_BAD,Transmit Frame Count For Good And Bad Broadcast Frames" line.long 0x34 "TX_UNDERFLOW_ERROR_FRAMES,Transmit Frame Count For Underflow Error Frames" hexmask.long.word 0x34 0.--15. 1. " TXUNDRFLW ,Number of frames aborted because of frame underflow error" line.long 0x38 "TX_SINGLE_COLLISION_GOOD_FRAMES,Transmit Frame Count For Frames Transmitted after Single Collision" hexmask.long.word 0x38 0.--15. 1. " TXSNGLCOLG ,Number of successfully transmitted frames after a single collision in the half-duplex mode" line.long 0x3C "TX_MULTIPLE_COLLISION_GOOD_FRAMES,Transmit Frame Count For Frames Transmitted after Multiple Collision" hexmask.long.word 0x3C 0.--15. 1. " TXMULTCOLG ,Number of successfully transmitted frames after multiple collisions in the half-duplex mode" line.long 0x40 "TX_DEFERRED_FRAMES,Transmit Frame Count For Deferred Frames" hexmask.long.word 0x40 0.--15. 1. " TXDEFRD ,Number of successfully transmitted frames after a deferral in the half-duplex mode" line.long 0x44 "TX_LATE_COLLISION_FRAMES,Transmit Frame Count For Late Collision Error Frames" hexmask.long.word 0x44 0.--15. 1. " TXLATECOL ,Number of frames aborted because of late collision error" line.long 0x48 "TX_EXCESSIVE_COLLISION_FRAMES,Transmit Frame Count For Excessive Collision Error Frames" hexmask.long.word 0x48 0.--15. 1. " TXEXSCOL ,Number of frames aborted because of excessive 16 collision error" line.long 0x4C "TX_CARRIER_ERROR_FRAMES,Transmit Frame Count For Carrier Sense Error Frames" hexmask.long.word 0x4C 0.--15. 1. " TXCARR ,Number of frames aborted because of carrier sense error" line.long 0x50 "TX_OCTET_COUNT_GOOD,Transmit Octet Count For Good Frames" line.long 0x54 "TX_FRAME_COUNT_GOOD,Transmit Frame Count For Good Frames" line.long 0x58 "TX_EXCESSIVE_DEFERRAL_ERROR,Transmit Frame Count For Excessive Deferral Error Frames" hexmask.long.word 0x58 0.--15. 1. " TXEXSDEF ,Number of frames aborted because of excessive deferral error" line.long 0x5C "TX_PAUSE_FRAMES,Transmit Frame Count For Good PAUSE Frames" hexmask.long.word 0x5C 0.--15. 1. " TXPAUSE ,Number of transmitted good PAUSE frames" line.long 0x60 "TX_VLAN_FRAMES_GOOD,Transmit Frame Count For Good VLAN Frames" line.long 0x64 "TX_OSIZE_FRAMES_GOOD,Transmit Frame Count For Good Oversize Frames" hexmask.long.word 0x64 0.--15. 1. " TXOSIZG ,Number of frames transmitted without errors And with length greater than the maxsize" rgroup.long 0x180++0x67 line.long 0x00 "RX_FRAMES_COUNT_GOOD_BAD,Receive Frame Count For Good And Bad Frames" line.long 0x04 "RX_OCTET_COUNT_GOOD_BAD,Receive Octet Count For Good And Bad Frames" line.long 0x08 "RX_OCTET_COUNT_GOOD,Receive Octet Count For Good Frames" line.long 0x0C "RX_BROADCAST_FRAMES_GOOD,Receive Frame Count For Good Broadcast Frames" line.long 0x10 "RX_MULTICAST_FRAMES_GOOD,Receive Frame Count For Good Multicast Frames" line.long 0x14 "RX_CRC_ERROR_FRAMES,Receive Frame Count For CRC Error Frames" hexmask.long.word 0x14 0.--15. 1. " RXCRCERR ,Number of frames received with CRC error" line.long 0x18 "RX_ALIGNMENT_ERROR_FRAMES,Receive Frame Count For Alignment Error Frames" hexmask.long.word 0x18 0.--15. 1. " RXALGNERR ,Number of frames received with alignment error" line.long 0x1C "RX_RUNT_ERROR_FRAMES,Receive Frame Count For Runt Error Frames" hexmask.long.word 0x1C 0.--15. 1. " RXRUNTERR ,Number of frames received with runt error" line.long 0x20 "RX_JABBER_ERROR_FRAMES,Receive Frame Count For Jabber Error Frames" hexmask.long.word 0x20 0.--15. 1. " RXJABERR ,Number of giant frames received with length greater than 1,518 bytes" line.long 0x24 "RX_UNDERSIZE_FRAMES_GOOD,Receive Frame Count For Undersize Frames" hexmask.long.word 0x24 0.--15. 1. " RXUNDERSZG ,Number of frames received with length less than 64 bytes And without errors" line.long 0x28 "RX_OVERSIZE_FRAMES_GOOD,Receive Frame Count For Oversize Frames" hexmask.long.word 0x28 0.--15. 1. " RXOVERSZG ,Number of frames received without errors with length greater than the maxsize" line.long 0x2C "RX_64OCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 64 Byte Frames" line.long 0x30 "RX_65TO127OCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 65 to 127 Bytes Frames" line.long 0x34 "RX_128TO255OCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 128 to 255 Bytes Frames" line.long 0x38 "RX_256TO511OCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 256 to 511 Bytes Frames" line.long 0x3C "RX_512TO1023OCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 512 to 1023 Bytes Frames" line.long 0x40 "RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 1024 to Maxsize Bytes Frames" line.long 0x44 "RX_UNICAST_FRAMES_GOOD,Receive Frame Count For Good Unicast Frames" line.long 0x48 "RX_LENGTH_ERROR_FRAMES,Receive Frame Count For Length Error Frames" hexmask.long.word 0x48 0.--15. 1. " RXLENERR ,Number of frames received with length error" line.long 0x4C "RX_OUT_OF_RANGE_TYPE_FRAMES,Receive Frame Count For Out of Range Frames" hexmask.long.word 0x4C 0.--15. 1. " RXOUTOFRNG ,Number of received frames with length field not equal to the valid frame size" line.long 0x50 "RX_PAUSE_FRAMES,Receive Frame Count For PAUSE Frames" hexmask.long.word 0x50 0.--15. 1. " RXPAUSEFRM ,Number of received good And valid PAUSE frames" line.long 0x54 "RX_FIFO_OVERFLOW_FRAMES,Receive Frame Count For FIFO Overflow Frames" hexmask.long.word 0x54 0.--15. 1. " RXFIFOOVFL ,Number of received frames missed because of FIFO overflow" line.long 0x58 "RX_VLAN_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad VLAN Frames" line.long 0x5C "RX_WATCHDOG_ERROR_FRAMES,Receive Frame Count For Watchdog Error Frames" hexmask.long.word 0x5C 0.--15. 1. " RXWDGERR ,Number of frames received with error because of the watchdog timeout error" line.long 0x60 "RX_RECEIVE_ERROR_FRAMES,Receive Frame Count For Receive Error Frames" hexmask.long.word 0x60 0.--15. 1. " RXRCVERR ,Number of frames received with error because of the GMII/MII RXER error or frame extension error on GMII" line.long 0x64 "RX_CONTROL_FRAMES_GOOD,Receive Frame Count For Good Control Frames" group.long 0x500++0x03 line.long 0x00 "HASH_TABLE_REG0,Hash Table Register 0" group.long 0x504++0x03 line.long 0x00 "HASH_TABLE_REG1,Hash Table Register 1" group.long 0x508++0x03 line.long 0x00 "HASH_TABLE_REG2,Hash Table Register 2" group.long 0x50C++0x03 line.long 0x00 "HASH_TABLE_REG3,Hash Table Register 3" group.long 0x510++0x03 line.long 0x00 "HASH_TABLE_REG4,Hash Table Register 4" group.long 0x514++0x03 line.long 0x00 "HASH_TABLE_REG5,Hash Table Register 5" group.long 0x518++0x03 line.long 0x00 "HASH_TABLE_REG6,Hash Table Register 6" group.long 0x51C++0x03 line.long 0x00 "HASH_TABLE_REG7,Hash Table Register 7" group.long 0x588++0x03 line.long 0x00 "VLAN_HASH_TABLE_REG,VLAN Hash Table Register" hexmask.long.word 0x00 0.--15. 1. " VLHT ,VLAN hash table" group.long 0x700++0x07 line.long 0x00 "TIMESTAMP_CONTROL,Timestamp Control Register" bitfld.long 0x00 25. " ATSEN0 ,Auxiliary snapshot 0 enable" "Disabled,Enabled" bitfld.long 0x00 24. " ATSFC ,Auxiliary snapshot FIFO clear" "No clear,Clear" textline " " bitfld.long 0x00 18. " TSENMACADDR ,Enable MAC address for PTP frame filtering" "Disabled,Enabled" bitfld.long 0x00 16.--17. " SNAPTYPSEL ,Select PTP packets for taking snapshots" "0,1,2,3" textline " " bitfld.long 0x00 15. " TSMSTRENA ,Enable snapshot for messages relevant to master" "Disabled,Enabled" bitfld.long 0x00 14. " TSEVNTENA ,Enable timestamp snapshot for event messages" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " TSIPV4ENA ,Enable processing of PTP frames sent over IPv4-UDP" "Disabled,Enabled" bitfld.long 0x00 12. " TSIPV6ENA ,Enable processing of PTP frames sent over IPv6-UDP" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TSIPENA ,Enable processing of PTP over ethernet frames" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TSVER2ENA ,Enable PTP packet processing for version 2 format" "Disabled,Enabled" bitfld.long 0x00 9. " TSCTRLSSR ,Timestamp digital or binary rollover control" "Not incremented && not rolled over,Incremented && rolled over" textline " " bitfld.long 0x00 8. " TSENALL ,Enable timestamp for all frames" "Disabled,Enabled" bitfld.long 0x00 5. " TSADDREG ,Addend Reg update" "Not updated,Updated" textline " " bitfld.long 0x00 4. " TSTRIG ,Timestamp interrupt trigger enable" "Disabled,Enabled" bitfld.long 0x00 3. " TSUPDT ,Timestamp update" "Not updated,Updated" textline " " bitfld.long 0x00 2. " TSINIT ,Timestamp initialize" "Not initialized,Initialized" bitfld.long 0x00 1. " TSCFUPDT ,Timestamp fine or coarse update" "Not updated,Updated" textline " " bitfld.long 0x00 0. " TSENA ,Timestamp enable" "Disabled,Enabled" line.long 0x04 "SUB_SECOND_INCREMENT,Sub-Second Increment Register" hexmask.long.byte 0x04 0.--7. 1. " SSINC ,Sub-second increment value" rgroup.long 0x708++0x07 line.long 0x00 "SYSTEM_TIME_SECONDS,System Time - Seconds Register" line.long 0x04 "SYSTEM_TIME_NANOSECONDS,System Time - Nanoseconds Register" hexmask.long 0x04 0.--30. 1. " TSSS ,Timestamp sub seconds" group.long 0x710++0x13 line.long 0x00 "SYSTEM_TIME_SECONDS_UPDATE,System Time - Seconds Update Register" line.long 0x04 "SYSTEM_TIME_NANOSECONDS_UPDATE,System Time - Nanoseconds Update Register" bitfld.long 0x04 31. " ADDSUB ,Add or subtract time" "Add,Subtract" hexmask.long 0x04 0.--30. 1. " TSSS ,Timestamp sub second" line.long 0x08 "TIMESTAMP_ADDEND,Timestamp Addend Register" line.long 0x0C "TARGET_TIME_SECONDS,Target Time Seconds Register" line.long 0x10 "TARGET_TIME_NANOSECONDS,Target Time Nanoseconds Register" bitfld.long 0x10 31. " TRGTBUSY ,Target time register busy" "Not busy,Busy" hexmask.long 0x10 0.--30. 1. " TTSLO ,Target timestamp low register" rgroup.long 0x728++0x0F line.long 0x00 "TIMESTAMP_STATUS,Timestamp Status Register" bitfld.long 0x00 25.--29. " ATSNS ,Number of auxiliary timestamp snapshots" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " ATSSTM ,Auxiliary timestamp snapshot trigger missed" "Not missed,Missed" textline " " bitfld.long 0x00 19. " ATSSTN[3] ,Auxiliary trigger 3 identifier" "Not triggered,Triggered" bitfld.long 0x00 18. " [2] ,Auxiliary trigger 2 identifier" "Not triggered,Triggered" textline " " bitfld.long 0x00 17. " [1] ,Auxiliary trigger 1 identifier" "Not triggered,Triggered" bitfld.long 0x00 16. " [0] ,Auxiliary trigger 0 identifier" "Not triggered,Triggered" textline " " bitfld.long 0x00 5. " TSTRGTERR1 ,Timestamp target time error" "No error,Error" bitfld.long 0x00 4. " TSTARGT1 ,Timestamp target time reached for target time PPS1" "Not reached,Reached" textline " " bitfld.long 0x00 3. " TSTRGTERR ,Timestamp target time error" "No error,Error" bitfld.long 0x00 2. " AUXTSTRIG ,Auxiliary timestamp trigger snapshot" "Not triggered,Triggered" textline " " bitfld.long 0x00 1. " TSTARGT ,Timestamp target time reached" "Not reached,Reached" bitfld.long 0x00 0. " TSSOVF ,Timestamp seconds overflow" "Not overflowed,Overflowed" textline " " line.long 0x04 "PPS_CONTROL,PPS Control Register" bitfld.long 0x04 13.--14. " TRGTMODSEL1 ,Target time register mode for PPS1 output" "Irq event generate,,(Irq event || start/stop PPS1 signal) generate,Start/stop PPS1 signal generate" textline " " bitfld.long 0x04 8.--10. " PPSCMD1 ,Flexible PPS1 output control" "No Command,Start single pulse,Start pulse train,Cancel start,Stop pulse train at time,Stop pulse train immediately,Cancel stop pulse train,?..." textline " " bitfld.long 0x04 5.--6. " TRGTMODSEL0 ,Target time register mode for PPS0 output" "Irq event generate,,(Irq event || start/stop PPS0 signal) generate,Start/stop PPS0 signal generate" textline " " bitfld.long 0x04 4. " PPSEN0 ,Flexible PPS output mode enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--3. " PPSCTRL_PPSCMD ,Flexible PPS0 output || frequency control" "Binary rollover 1Hz && Digital rollover 1Hz / No Command,Binary rollover 2Hz && Digital rollover 1Hz / Start single pulse,Binary rollover 4Hz && Digital rollover 2Hz / Start pulse train,Binary rollover 8Hz && Digital rollover 4Hz / Cancel start,Binary rollover 16Hz && Digital rollover 8Hz / Stop pulse train at time,Stop pulse train immediately,Cancel stop pulse train,,,,,,,,,Binary rollover 32KHz && Digital rollover 16KHz" line.long 0x08 "AUXILIARY_TIMESTAMP_NANOSECONDS,Auxiliary Timestamp - Nanoseconds Register" hexmask.long 0x08 0.--30. 1. " AUXTSLO ,Contains the lower 32 bits (nano seconds field) of the auxiliary timestamp" line.long 0x0C "AUXILIARY_TIMESTAMP_SECONDS,Auxiliary Timestamp - Seconds Register" group.long 0x760++0x07 line.long 0x00 "PPS0_INTERVAL,PPS0 Interval Register" line.long 0x04 "PPS0_WIDTH,PPS0 Width Register" group.long 0x780++0x0F line.long 0x00 "PPS1_TARGET_TIME_SECONDS,PPS1 Target Time Seconds Register" line.long 0x04 "PPS1_TARGET_TIME_NANOSECONDS,PPS1 Target Time Nanoseconds Register" bitfld.long 0x04 31. " TRGTBUSY1 ,PPS1 target time register busy" "Not busy,Busy" textline " " hexmask.long 0x04 0.--30. 1. " TTSL1 ,Target time low for PPS1 register" line.long 0x08 "PPS1_INTERVAL,PPS1 Interval Register" line.long 0x0C "PPS1_WIDTH,PPS1 Width Register" textline " " if (((per.l(ad:0x44000000+0x1000)&0x800000)==0x800000)) group.long 0x1000++0x03 line.long 0x00 "BUS_MODE,Bus Mode Register" rbitfld.long 0x00 31. " RIB ,Rebuild INCRx burst" "No burst,Burst" rbitfld.long 0x00 28.--29. " PRWG ,Channel priority weights" "1,2,3,4" rbitfld.long 0x00 27. " TXPR ,Transmit priority" "Low,High" textline " " rbitfld.long 0x00 26. " MB ,Mixed burst" "No burst,Burst" bitfld.long 0x00 25. " AAL ,Address aligned beats" "Not aligned,Aligned" bitfld.long 0x00 24. " PBLX8 ,PBLx8 mode" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " USP ,Use seperate PBL" "Not used,Used" textline " " bitfld.long 0x00 17.--22. " RPBL ,Rx DMA PBL" ",1,2,,4,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32,?..." textline " " bitfld.long 0x00 16. " FB ,Fixed burst" "No burst,Burst" rbitfld.long 0x00 14.--15. " PR ,Priority ratio" "1:1,2:1,3:1,4:1" bitfld.long 0x00 8.--13. " PBL ,Programmable burst length" ",1,2,,4,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32,?..." textline " " bitfld.long 0x00 7. " ATDS ,Alternate descriptor size" "16 bytes,32 bytes" bitfld.long 0x00 2.--6. " DSL ,Descriptor skip length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1. " DA ,DMA arbitration scheme" "Weighted round-robin,Fixed priority" textline " " bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset" else group.long 0x1000++0x03 line.long 0x00 "BUS_MODE,Bus Mode Register" rbitfld.long 0x00 31. " RIB ,Rebuild INCRx burst" "No burst,Burst" rbitfld.long 0x00 28.--29. " PRWG ,Channel priority weights" "1,2,3,4" rbitfld.long 0x00 27. " TXPR ,Transmit priority" "Low,High" textline " " rbitfld.long 0x00 26. " MB ,Mixed burst" "No burst,Burst" bitfld.long 0x00 25. " AAL ,Address aligned beats" "Not aligned,Aligned" bitfld.long 0x00 24. " PBLX8 ,PBLx8 mode" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " USP ,Use seperate PBL" "Not used,Used" textline " " textline " " bitfld.long 0x00 16. " FB ,Fixed burst" "No burst,Burst" rbitfld.long 0x00 14.--15. " PR ,Priority ratio" "1:1,2:1,3:1,4:1" bitfld.long 0x00 8.--13. " PBL ,Programmable burst length" ",1,2,,4,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32,?..." textline " " bitfld.long 0x00 7. " ATDS ,Alternate descriptor size" "16 bytes,32 bytes" bitfld.long 0x00 2.--6. " DSL ,Descriptor skip length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1. " DA ,DMA arbitration scheme" "Weighted round-robin,Fixed priority" textline " " bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset" endif textline " " group.long 0x1004++0x0F line.long 0x00 "TRANSMIT_POLL_DEMAND,Transmit Poll Demand Register" line.long 0x04 "RECEIVE_POLL_DEMAND,Receive Poll Demand Register" line.long 0x08 "RECEIVE_DESCRIPTOR_LIST_ADDRESS,Receive Descriptor List Address Register" hexmask.long 0x08 2.--31. 1. " RDESLA_32BIT ,Start of receive list" line.long 0x0C "TRANSMIT_DESCRIPTOR_LIST_ADDRESS,Transmit Descriptor List Address Register" hexmask.long 0x0C 2.--31. 1. " TDESLA_32BIT ,Start of transmit list" if (((per.l(ad:0x44000000+0x1014)&0x2000)==0x2000)) group.long 0x1014++0x03 line.long 0x00 "STATUS,Status Register" rbitfld.long 0x00 30. " GLPII ,GMAC LPI interrupt (for Channel 0)" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " TTI ,Timestamp trigger interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 28. " GPI ,GMAC PMT interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 27. " GMI ,GMAC MMC interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 23.--25. " EB ,Error bits" "RX DMA Write Data Transfer,,,TX DMA Read Data Transfer,RX DMA Descriptor Write Access,TX DMA Descriptor Write Access,RX DMA Descriptor Read Access,TX DMA Descriptor Read Access" textline " " rbitfld.long 0x00 20.--22. " TS ,Transmit process state" "Reset or Stop Transmit Command issued,Fetching Transmit Transfer Descriptor,Waiting for status,Reading from host memory buffer and queuing to Tx FIFO,TIME_STAMP write,,Transmit Descriptor Unavailable or Transmit Buffer Underflow,Closing Transmit Descriptor" textline " " rbitfld.long 0x00 17.--19. " RS ,Received process state" "Reset or Stop Receive Command issued,Fetching Receive Transfer Descriptor,,Waiting for receive packet,Receive Descriptor Unavailable,Closing Receive Descriptor,TIME_STAMP write state,Transferring from receive buffer to host memory" textline " " bitfld.long 0x00 16. " NIS ,Normal interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " AIS ,Abnormal interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " ERI ,Early receive interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " FBI ,Fatal bus error interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " ETI ,Early transmit interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RWT ,Receive watchdog timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 8. " RPS ,Receive process stopped" "Not stopped,Stopped" textline " " bitfld.long 0x00 7. " RU ,Receive buffer unavailable" "Available,Unavailable" textline " " bitfld.long 0x00 6. " RI ,Receive interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " UNF ,Transmit underflow" "Not underflowed,Underflowed" textline " " bitfld.long 0x00 4. " OVF ,Receive overflow" "Not overflowed,Overflowed" textline " " bitfld.long 0x00 3. " TJT ,Transmit jabber timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 2. " TU ,Transmit buffer unavailable" "Available,Unavailable" textline " " bitfld.long 0x00 1. " TPS ,Transmit process stopped" "Not stopped,Stopped" textline " " bitfld.long 0x00 0. " TI ,Transmit interrupt" "No interrupt,Interrupt" else group.long 0x1014++0x03 line.long 0x00 "STATUS,Status Register" rbitfld.long 0x00 30. " GLPII ,GMAC LPI interrupt (for Channel 0)" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " TTI ,Timestamp trigger interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 28. " GPI ,GMAC PMT interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 27. " GMI ,GMAC MMC interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 20.--22. " TS ,Transmit process state" "Reset or Stop Transmit Command issued,Fetching Transmit Transfer Descriptor,Waiting for status,Reading from host memory buffer and queuing to Tx FIFO,TIME_STAMP write,,Transmit Descriptor Unavailable or Transmit Buffer Underflow,Closing Transmit Descriptor" textline " " rbitfld.long 0x00 17.--19. " RS ,Received process state" "Reset or Stop Receive Command issued,Fetching Receive Transfer Descriptor,,Waiting for receive packet,Receive Descriptor Unavailable,Closing Receive Descriptor,TIME_STAMP write state,Transferring from receive buffer to host memory" textline " " bitfld.long 0x00 16. " NIS ,Normal interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " AIS ,Abnormal interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " ERI ,Early receive interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " FBI ,Fatal bus error interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " ETI ,Early transmit interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RWT ,Receive watchdog timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 8. " RPS ,Receive process stopped" "Not stopped,Stopped" textline " " bitfld.long 0x00 7. " RU ,Receive buffer unavailable" "Available,Unavailable" textline " " bitfld.long 0x00 6. " RI ,Receive interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " UNF ,Transmit underflow" "Not underflowed,Underflowed" textline " " bitfld.long 0x00 4. " OVF ,Receive overflow" "Not overflowed,Overflowed" textline " " bitfld.long 0x00 3. " TJT ,Transmit jabber timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 2. " TU ,Transmit buffer unavailable" "Available,Unavailable" textline " " bitfld.long 0x00 1. " TPS ,Transmit process stopped" "Not stopped,Stopped" textline " " bitfld.long 0x00 0. " TI ,Transmit interrupt" "No interrupt,Interrupt" endif textline " " if (((per.l(ad:0x44000000+0x1018)&0x2200000)==0x00)) group.long 0x1018++0x03 line.long 0x00 "OPERATION_MODE,Operation Mode Register" bitfld.long 0x00 26. " DT ,Disable dropping of TCP/IP checksum error frames" "No,Yes" bitfld.long 0x00 25. " RSF ,Receive store and forward" "Not received,Received" bitfld.long 0x00 22. 11.--12. " RFD ,Threshold for deactivating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." bitfld.long 0x00 21. " TSF ,Transmit store and forward" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 20. " FTF ,Flush transmit FIFO" "Not flushed,Flushed" textline " " bitfld.long 0x00 14.--16. " TTC ,Transmit threshold control" "64,128,192,256,40,32,24,16" textline " " bitfld.long 0x00 13. " ST ,Start or stop transmission command" "Stopped,Started" bitfld.long 0x00 9.--10. " RFA ,Threshold for activating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB" bitfld.long 0x00 8. " EFC ,Enable HW flow control" "Disabled,Enabled" bitfld.long 0x00 7. " FEF ,Forward error frames" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 6. " FUF ,Forward undersized good frames" "Not forwarded,Forwarded" bitfld.long 0x00 5. " DGF ,Drop giant frames" "Not dropped,Dropped" bitfld.long 0x00 3.--4. " RTC ,Receive threshold control" "64,32,96,128" textline " " bitfld.long 0x00 2. " OSF ,Operate on second frame" "No operate,Operate" bitfld.long 0x00 1. " SR ,Start or stop receive" "Stopped,Started" elif (((per.l(ad:0x44000000+0x1018)&0x2200000)==0x200000)) group.long 0x1018++0x03 line.long 0x00 "OPERATION_MODE,Operation Mode Register" bitfld.long 0x00 26. " DT ,Disable dropping of TCP/IP checksum error frames" "No,Yes" bitfld.long 0x00 25. " RSF ,Receive store and forward" "Not received,Received" bitfld.long 0x00 22. 11.--12. " RFD ,Threshold for deactivating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." bitfld.long 0x00 21. " TSF ,Transmit store and forward" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 20. " FTF ,Flush transmit FIFO" "Not flushed,Flushed" textline " " textline " " bitfld.long 0x00 13. " ST ,Start or stop transmission command" "Stopped,Started" bitfld.long 0x00 9.--10. " RFA ,Threshold for activating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB" bitfld.long 0x00 8. " EFC ,Enable HW flow control" "Disabled,Enabled" bitfld.long 0x00 7. " FEF ,Forward error frames" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 6. " FUF ,Forward undersized good frames" "Not forwarded,Forwarded" bitfld.long 0x00 5. " DGF ,Drop giant frames" "Not dropped,Dropped" bitfld.long 0x00 3.--4. " RTC ,Receive threshold control" "64,32,96,128" textline " " bitfld.long 0x00 2. " OSF ,Operate on second frame" "No operate,Operate" bitfld.long 0x00 1. " SR ,Start or stop receive" "Stopped,Started" elif (((per.l(ad:0x44000000+0x1018)&0x2200000)==0x2000000)) group.long 0x1018++0x03 line.long 0x00 "OPERATION_MODE,Operation Mode Register" bitfld.long 0x00 26. " DT ,Disable dropping of TCP/IP checksum error frames" "No,Yes" bitfld.long 0x00 25. " RSF ,Receive store and forward" "Not received,Received" bitfld.long 0x00 22. 11.--12. " RFD ,Threshold for deactivating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." bitfld.long 0x00 21. " TSF ,Transmit store and forward" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 20. " FTF ,Flush transmit FIFO" "Not flushed,Flushed" textline " " bitfld.long 0x00 14.--16. " TTC ,Transmit threshold control" "64,128,192,256,40,32,24,16" textline " " bitfld.long 0x00 13. " ST ,Start or stop transmission command" "Stopped,Started" bitfld.long 0x00 9.--10. " RFA ,Threshold for activating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB" bitfld.long 0x00 8. " EFC ,Enable HW flow control" "Disabled,Enabled" bitfld.long 0x00 7. " FEF ,Forward error frames" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 6. " FUF ,Forward undersized good frames" "Not forwarded,Forwarded" bitfld.long 0x00 5. " DGF ,Drop giant frames" "Not dropped,Dropped" textline " " bitfld.long 0x00 2. " OSF ,Operate on second frame" "No operate,Operate" bitfld.long 0x00 1. " SR ,Start or stop receive" "Stopped,Started" else group.long 0x1018++0x03 line.long 0x00 "OPERATION_MODE,Operation Mode Register" bitfld.long 0x00 26. " DT ,Disable dropping of TCP/IP checksum error frames" "No,Yes" bitfld.long 0x00 25. " RSF ,Receive store and forward" "Not received,Received" bitfld.long 0x00 22. 11.--12. " RFD ,Threshold for deactivating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." bitfld.long 0x00 21. " TSF ,Transmit store and forward" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 20. " FTF ,Flush transmit FIFO" "Not flushed,Flushed" textline " " textline " " bitfld.long 0x00 13. " ST ,Start or stop transmission command" "Stopped,Started" bitfld.long 0x00 9.--10. " RFA ,Threshold for activating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB" bitfld.long 0x00 8. " EFC ,Enable HW flow control" "Disabled,Enabled" bitfld.long 0x00 7. " FEF ,Forward error frames" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 6. " FUF ,Forward undersized good frames" "Not forwarded,Forwarded" bitfld.long 0x00 5. " DGF ,Drop giant frames" "Not dropped,Dropped" textline " " bitfld.long 0x00 2. " OSF ,Operate on second frame" "No operate,Operate" bitfld.long 0x00 1. " SR ,Start or stop receive" "Stopped,Started" endif group.long 0x101C++0x03 line.long 0x00 "INTERRUPT_ENABLE,Interrupt Enable Register" bitfld.long 0x00 16. " NIE ,Normal interrupt summary enable" "Disabled,Enabled" bitfld.long 0x00 15. " AIE ,Abnormal interrupt summary enable" "Disabled,Enabled" bitfld.long 0x00 14. " ERE ,Early receive interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " FBE ,Fatal bus error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ETE ,Early transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " RWE ,Receive watchdog timeout enable" "Disabled,Enabled" bitfld.long 0x00 8. " RSE ,Receive stopped enable" "Disabled,Enabled" bitfld.long 0x00 7. " RUE ,Receive buffer unavailable enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " UNE ,Underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " OVE ,Overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " TJE ,Transmit jabber timeout enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " TUE ,Transmit buffer unavailable enable" "Disabled,Enabled" bitfld.long 0x00 1. " TSE ,Transmit stopped enable" "Disabled,Enabled" bitfld.long 0x00 0. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " width 42. rgroup.long 0x1020++0x03 line.long 0x00 "MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER,Missed Frame and Buffer Overflow Counter Register" bitfld.long 0x00 28. " OVFCNTOVF ,Overflow bit for FIFO overflow counter" "Not overflowed,Overflowed" hexmask.long.word 0x00 17.--27. 1. " OVFFRMCNT ,Overflow frame counter" bitfld.long 0x00 16. " MISCNTOVF ,Overflow bit for missed frame counter" "Not overflowed,Overflowed" hexmask.long.word 0x00 0.--15. 1. " MISFRMCNT ,Missed frame counter" textline " " group.long 0x1024++0x07 line.long 0x00 "RECEIVE_INTERRUPT_WATCHDOG_TIMER,Receive Interrupt Watchdog Timer Register" hexmask.long.byte 0x00 0.--7. 1. " RIWT ,RI watchdog timer count" line.long 0x04 "AXI_BUS_MODE,AXI Bus Mode Register" bitfld.long 0x04 31. " EN_LPI ,Enable low power interface" "Disabled,Enabled" bitfld.long 0x04 30. " LPI_XIT_FRM ,Unlock on magic packet or remote wake up frame" "Any frame,Magic packet || Remote wake up frame" textline " " bitfld.long 0x04 20.--21. " WR_OSR_LMT ,AXI maximum write OutStanding request limit" "0,1,2,3" bitfld.long 0x04 16.--17. " RD_OSR_LMT ,AXI maximum read OutStanding request limit" "0,1,2,3" textline " " bitfld.long 0x04 13. " ONEKBBE ,1 KB boundary crossing enable for the GMAC-AXI master" "Disabled,Enabled" rbitfld.long 0x04 12. " AXI_AAL ,Address-aligned beats" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " BLEN16 ,AXI burst length 16" "Disabled,Enabled" bitfld.long 0x04 2. " BLEN8 ,AXI burst length 8" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " BLEN4 ,AXI burst length 4" "Disabled,Enabled" rbitfld.long 0x04 0. " UNDEF ,AXI undefined burst length" "Fixed burst length,Equal or below maximum" rgroup.long 0x102C++0x03 line.long 0x00 "AXI_STATUS,AXI Status Register" bitfld.long 0x00 1. " AXIRDSTS ,AXI master read channel status" "Not active,Active" bitfld.long 0x00 0. " AXWHSTS ,AXI master write channel" "Not active,Active" textline " " rgroup.long 0x1048++0x13 line.long 0x00 "CURRENT_HOST_TRANSMIT_DESCRIPTOR,Current Host Transmit Descriptor Register" line.long 0x04 "CURRENT_HOST_RECEIVE_DESCRIPTOR,Current Host Receive Descriptor Register" line.long 0x08 "CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS,Current Host Transmit Buffer Address Register" line.long 0x0C "CURRENT_HOST_RECEIVE_BUFFER_ADDRESS,Current Host Receive Buffer Address Register" line.long 0x10 "HW_FEATURE,HW Feature Register" bitfld.long 0x10 28.--30. " ACTPHYIF ,Active or selected PHY interface" "GMII || MII,?..." bitfld.long 0x10 27. " SAVLANINS ,Source address or VLAN insertion" "0,1" bitfld.long 0x10 26. " FLEXIPPSEN ,Flexible pulse-per-second output" "0,1" bitfld.long 0x10 25. " INTTSEN ,Timestamping with internal system time" "0,1" textline " " bitfld.long 0x10 24. " ENHDESSEL ,Alternate enhanced descriptor" "0,1" bitfld.long 0x10 22.--23. " TXCHCNT ,Number of additional Tx channels" "0,1,2,3" bitfld.long 0x10 20.--21. " RXCHCNT ,Number of additional Rx channels" "0,1,2,3" bitfld.long 0x10 19. " RXFIFOSIZE ,Rx FIFO > 2048 Bytes" "0,1" textline " " bitfld.long 0x10 18. " RXTYP2COE ,IP checksum offload type 2 in Rx" "0,1" bitfld.long 0x10 17. " RXTYP1COE ,IP checksum offload type 1 in Rx" "0,1" bitfld.long 0x10 16. " TXCOESEL ,Checksum offload in Tx" "0,1" bitfld.long 0x10 15. " AVSEL ,AV feature" "0,1" textline " " bitfld.long 0x10 14. " EEESEL ,Energy efficient ethernet" "0,1" bitfld.long 0x10 13. " TSVER2SEL ,IEEE 1588-2008 advanced timestamp" "0,1" bitfld.long 0x10 12. " TSVER1SEL ,Only IEEE 1588-2002 timestamp" "0,1" bitfld.long 0x10 11. " MMCSEL ,RMON module" "0,1" textline " " bitfld.long 0x10 10. " MGKSEL ,PMT magic packet" "0,1" bitfld.long 0x10 9. " RWKSEL ,PMT remote wakeup" "0,1" bitfld.long 0x10 8. " SMASEL ,SMA MDIO interface" "0,1" bitfld.long 0x10 7. " L3L4FLTREN ,Layer 3 and layer 4 filter feature" "0,1" textline " " bitfld.long 0x10 5. " ADDMACADRSEL ,Multiple MAC address registers" "0,1" bitfld.long 0x10 4. " HASHSEL ,HASH filter" "0,1" bitfld.long 0x10 3. " EXTHASHEN ,Expanded DA hash filter" "0,1" bitfld.long 0x10 2. " HDSEL ,Half-Duplex support" "0,1" textline " " bitfld.long 0x10 1. " GMIISEL ,1000 Mbps support" "0,1" bitfld.long 0x10 0. " MIISEL ,10 or 100 Mbps support" "0,1" width 0x0B tree.end tree "MAC2" base ad:0x44002000 width 19. if (((per.l(ad:0x44002000)&0x8000)==0x8000)) if (((per.l(ad:0x44002000)&0x800)==0x800)) group.long 0x00++0x03 line.long 0x00 "MAC_CONFIGURATION,MAC Configuration Register" bitfld.long 0x00 27. " TWOKPE ,IEEE 802.3as support for 2K packets" "Not supported,Supported" bitfld.long 0x00 25. " CST ,CRC stripping for type frames" "Not stripped,Stripped" bitfld.long 0x00 23. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber disable" "No,Yes" textline " " textline " " bitfld.long 0x00 20. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter-frame gap" "96 bit,88 bit,80 bit,72 bit,64 bit,56 bit,48 bit,40 bit" textline " " bitfld.long 0x00 15. " PS ,Port select" "1000 Mbps op,10 || 100 Mbps op" bitfld.long 0x00 14. " FES ,Speed" "10 Mbps,100 Mbps" textline " " textline " " bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" rbitfld.long 0x00 11. " DM ,Duplex mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IPC ,Checksum offload" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 7. " ACS ,Automatic pad or CRC stripping" "Not stripped,Stripped" textline " " textline " " bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PRELEN ,Preamble length for transmit frames" "7 bytes,5 bytes,3 bytes,?..." else group.long 0x00++0x03 line.long 0x00 "MAC_CONFIGURATION,MAC Configuration Register" bitfld.long 0x00 27. " TWOKPE ,IEEE 802.3as support for 2K packets" "Not supported,Supported" bitfld.long 0x00 25. " CST ,CRC stripping for type frames" "Not stripped,Stripped" bitfld.long 0x00 23. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber disable" "No,Yes" textline " " textline " " bitfld.long 0x00 20. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter-frame gap" "96 bit,88 bit,80 bit,72 bit,64 bit,?..." bitfld.long 0x00 16. " DCRS ,Disable carrier sense during transmission" "No,Yes" textline " " bitfld.long 0x00 15. " PS ,Port select" "1000 Mbps op,10 || 100 Mbps op" bitfld.long 0x00 14. " FES ,Speed" "10 Mbps,100 Mbps" textline " " bitfld.long 0x00 13. " DO ,Disable receive own" "No,Yes" textline " " bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" bitfld.long 0x00 11. " DM ,Duplex mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IPC ,Checksum offload" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " DR ,Disable retry" "No,Yes" textline " " bitfld.long 0x00 7. " ACS ,Automatic pad or CRC stripping" "Not stripped,Stripped" textline " " bitfld.long 0x00 5.--6. " BL ,Back-off limit" "Min(n;10),Min(n;8),Min(n;4),Min(n;1)" bitfld.long 0x00 4. " DC ,Deferral check" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PRELEN ,Preamble length for transmit frames" "7 bytes,5 bytes,3 bytes,?..." endif else if (((per.l(ad:0x44002000)&0x800)==0x800)) group.long 0x00++0x03 line.long 0x00 "MAC_CONFIGURATION,MAC Configuration Register" bitfld.long 0x00 27. " TWOKPE ,IEEE 802.3as support for 2K packets" "Not supported,Supported" bitfld.long 0x00 25. " CST ,CRC stripping for type frames" "Not stripped,Stripped" bitfld.long 0x00 23. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber disable" "No,Yes" textline " " textline " " bitfld.long 0x00 20. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter-frame gap" "96 bit,88 bit,80 bit,?..." textline " " bitfld.long 0x00 15. " PS ,Port select" "1000 Mbps op,10 || 100 Mbps op" bitfld.long 0x00 14. " FES ,Speed" "10 Mbps,100 Mbps" textline " " textline " " bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" rbitfld.long 0x00 11. " DM ,Duplex mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IPC ,Checksum offload" "Disabled,Enabled" textline " " textline " " bitfld.long 0x00 7. " ACS ,Automatic pad or CRC stripping" "Not stripped,Stripped" textline " " textline " " bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PRELEN ,Preamble length for transmit frames" "7 bytes,5 bytes,3 bytes,?..." else group.long 0x00++0x03 line.long 0x00 "MAC_CONFIGURATION,MAC Configuration Register" bitfld.long 0x00 27. " TWOKPE ,IEEE 802.3as support for 2K packets" "Not supported,Supported" bitfld.long 0x00 25. " CST ,CRC stripping for type frames" "Not stripped,Stripped" bitfld.long 0x00 23. " WD ,Watchdog disable" "No,Yes" bitfld.long 0x00 22. " JD ,Jabber disable" "No,Yes" textline " " bitfld.long 0x00 21. " BE ,Frame burst enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " JE ,Jumbo frame enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG ,Inter-frame gap" "96 bit,88 bit,80 bit,?..." bitfld.long 0x00 16. " DCRS ,Disable carrier sense during transmission" "No,Yes" textline " " bitfld.long 0x00 15. " PS ,Port select" "1000 Mbps op,10 || 100 Mbps op" bitfld.long 0x00 14. " FES ,Speed" "10 Mbps,100 Mbps" textline " " bitfld.long 0x00 13. " DO ,Disable receive own" "No,Yes" textline " " bitfld.long 0x00 12. " LM ,Loopback mode" "Disabled,Enabled" bitfld.long 0x00 11. " DM ,Duplex mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IPC ,Checksum offload" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " DR ,Disable retry" "No,Yes" textline " " bitfld.long 0x00 7. " ACS ,Automatic pad or CRC stripping" "Not stripped,Stripped" textline " " bitfld.long 0x00 5.--6. " BL ,Back-off limit" "Min(n;10),Min(n;8),Min(n;4),Min(n;1)" bitfld.long 0x00 4. " DC ,Deferral check" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TE ,Transmitter enable" "Disabled,Enabled" bitfld.long 0x00 2. " RE ,Receiver enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " PRELEN ,Preamble length for transmit frames" "7 bytes,5 bytes,3 bytes,?..." endif endif textline " " group.long 0x04++0x03 line.long 0x00 "MAC_FRAME_FILTER,MAC Frame Filter" bitfld.long 0x00 31. " RA ,Receive all" "Disabled,Enabled" bitfld.long 0x00 16. " VTFE ,VLAN tag filter enable" "Disabled,Enabled" bitfld.long 0x00 10. " HPF ,Hash or perfect filter" "Hash filter,Perfect filter" textline " " bitfld.long 0x00 9. " SAF ,Source address filter enable" "Disabled,Enabled" bitfld.long 0x00 8. " SAIF ,SA inverse filtering" "Disabled,Enabled" bitfld.long 0x00 6.--7. " PCF ,Pass control frames" "Filtered all,Forwarded all (except PAUSE),Forwarded all,Forwarded frames that passed Address Filter" textline " " bitfld.long 0x00 5. " DBF ,Disable broadcast frames" "No,Yes" bitfld.long 0x00 4. " PM ,Pass all multicast" "Not passed,Passed" bitfld.long 0x00 3. " DAIF ,DA inverse filtering" "Not inversed,Inversed" textline " " bitfld.long 0x00 2. " HMC ,Hash multicast" "No hash,Hash" bitfld.long 0x00 1. " HUC ,Hash unicast" "No hash,Hash" bitfld.long 0x00 0. " PR ,Promiscuous mode" "Disabled,Enabled" group.long 0x10++0x07 line.long 0x00 "GMII_ADDRESS,GMII Address Register" bitfld.long 0x00 11.--15. " PA ,Physical layer address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 6.--10. " GR ,GMII register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--5. " CR ,CSR clock range" "60-100 MHz,100-150 MHz,20-35 MHz,35-60 MHz,150-250 MHz,250-300 MHz,,,Clk/4,Clk/6,Clk/8,Clk/10,Clk/12,Clk/14,Clk/16,Clk/18" textline " " bitfld.long 0x00 1. " GW ,GMII write" "No write,Write" bitfld.long 0x00 0. " GB ,GMII busy" "Not busy,Busy" line.long 0x04 "GMII_DATA,GMII Data Register" hexmask.long.word 0x04 0.--15. 1. " GD ,GMII data" if (((per.l(ad:0x44002000)&0x800)==0x800)) group.long 0x18++0x03 line.long 0x00 "FLOW_CONTROL,Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Disable zero-quanta pause" "No,Yes" bitfld.long 0x00 4.--5. " PLT ,Pause low threshold" "PT-4 slot times,PT-28 slot times,PT-144 slot times,PT-256 slot times" textline " " bitfld.long 0x00 3. " UP ,Unicast pause frame detect" "Disabled,Enabled" bitfld.long 0x00 2. " RFE ,Receive flow control enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FCA_BPA ,Flow control busy or backpressure activate" "Not busy/Not activated,Busy/Activated" else if (((per.l(ad:0x44002000+0x18)&0x02)==0x02)) group.long 0x18++0x03 line.long 0x00 "FLOW_CONTROL,Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Disable zero-quanta pause" "No,Yes" bitfld.long 0x00 4.--5. " PLT ,Pause low threshold" "PT-4 slot times,PT-28 slot times,PT-144 slot times,PT-256 slot times" textline " " bitfld.long 0x00 3. " UP ,Unicast pause frame detect" "Disabled,Enabled" bitfld.long 0x00 2. " RFE ,Receive flow control enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FCA_BPA ,Flow control busy or backpressure activate" "Not busy/Not activated,Busy/Activated" else group.long 0x18++0x03 line.long 0x00 "FLOW_CONTROL,Flow Control Register" hexmask.long.word 0x00 16.--31. 1. " PT ,Pause time" bitfld.long 0x00 7. " DZPQ ,Disable zero-quanta pause" "No,Yes" bitfld.long 0x00 4.--5. " PLT ,Pause low threshold" "PT-4 slot times,PT-28 slot times,PT-144 slot times,PT-256 slot times" textline " " bitfld.long 0x00 3. " UP ,Unicast pause frame detect" "Disabled,Enabled" bitfld.long 0x00 2. " RFE ,Receive flow control enable" "Disabled,Enabled" bitfld.long 0x00 1. " TFE ,Transmit flow control enable" "Disabled,Enabled" endif endif if (((per.l(ad:0x44002000+0x1C)&0x10000)==0x10000)) group.long 0x1C++0x03 line.long 0x00 "VLAN_TAG,VLAN Tag Register" bitfld.long 0x00 19. " VTHM ,VLAN tag hash table match enable" "Disabled,Enabled" bitfld.long 0x00 18. " ESVL ,Enable S-VLAN" "Disabled,Enabled" bitfld.long 0x00 17. " VTIM ,VLAN tag inverse match enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ETV ,Enable 12-Bit VLAN tag comparison" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--11. 1. " VL[0] ,VLAN tags VLAN identifier field" else group.long 0x1C++0x03 line.long 0x00 "VLAN_TAG,VLAN Tag Register" bitfld.long 0x00 19. " VTHM ,VLAN tag hash table match enable" "Disabled,Enabled" bitfld.long 0x00 18. " ESVL ,Enable S-VLAN" "Disabled,Enabled" bitfld.long 0x00 17. " VTIM ,VLAN tag inverse match enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ETV ,Enable 12-Bit VLAN tag comparison" "Disabled,Enabled" textline " " bitfld.long 0x00 13.--15. " VL[2] ,User priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12. " [1] ,Canonical format indicator or drop eligible indicator DEI" "Disabled,Enabled" hexmask.long.word 0x00 0.--11. 1. " [0] ,VLAN tags VLAN identifier field" endif textline " " rgroup.long 0x20++0x07 line.long 0x00 "VERSION,Version Register" hexmask.long.word 0x00 0.--15. 1. " VER ,Version MAC1: 0x2037 MAC2: 0x2137" line.long 0x04 "DEBUG,Debug Register" bitfld.long 0x04 25. " TXSTSFSTS ,MTL TxStatus FIFO full status" "Not full,Full" bitfld.long 0x04 24. " TXFSTS ,MTL Tx FIFO not empty status" "Empty,Not empty" textline " " bitfld.long 0x04 22. " TWCSTS ,MTL Tx FIFO write controller active status" "Not active,Active" bitfld.long 0x04 20.--21. " TRCSTS ,MTL Tx FIFO read controller status" "Idle,Read,Wait for Tx status from MAC,Write received Tx status || flush the Tx FIFO" textline " " bitfld.long 0x04 19. " TXPAUSED ,MAC transmitter in PAUSE" "Not paused,Paused" bitfld.long 0x04 17.--18. " TFCSTS ,MAC transmit frame controller status" "Idle,Wait for status of prev frame || IFG or backoff period to be over,Generate and transmit pause control frame,Transfer input frame for transmission" textline " " bitfld.long 0x04 16. " TPESTS ,MAC GMII or MII transmit protocol engine status" "Not active,Active" bitfld.long 0x04 8.--9. " RXFSTS ,MTL Rx FIFO fill-level status" "Empty,Below threshold,Above threshold,Full" textline " " bitfld.long 0x04 5.--6. " RRCSTS ,MTL Rx FIFO read controller state" "Idle,Read frame data,Read frame status,Flush frame data and status" bitfld.long 0x04 4. " RWCSTS ,MTL Rx FIFO write controller active status" "Not active,Active" textline " " bitfld.long 0x04 1.--2. " RFCFCSTS ,MAC receive frame controller FIFO status" "0,1,2,3" bitfld.long 0x04 0. " RPESTS ,MAC GMII or MII receive protocol engine status" "Not received,Received" textline " " width 29. group.long 0x28++0x0F line.long 0x00 "REMOTE_WAKE_UP_FRAME_FILTER,Remote Wake Up Frame Filter Register" line.long 0x04 "PMT_CONTROL_STATUS,PMT Control and Status Register" bitfld.long 0x04 31. " RWKFILTRST ,Wake-Up frame filter register pointer reset" "No reset,Reset" bitfld.long 0x04 24.--26. " RWKPTR ,Remote wake-up FIFO pointer" "0,1,2,3,4,5,6,7" bitfld.long 0x04 10. " RWKPFE ,Remote wake-up packet forwarding enable" "Disabled,Enabled" bitfld.long 0x04 9. " GLBLUCAST ,Global unicast" "Disabled,Enabled" textline " " rbitfld.long 0x04 6. " RWKPRCVD ,Wake-Up frame received" "Not received,Received" rbitfld.long 0x04 5. " MGKPRCVD ,Magic packet received" "Not received,Received" bitfld.long 0x04 2. " RWKPKTEN ,Wake-Up frame enable" "Disabled,Enabled" bitfld.long 0x04 1. " MGKPKTEN ,Magic packet enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " PWRDWN ,Power down" "Powered up,Powered down" line.long 0x08 "LPI_CONTROL_STATUS,LPI Control and Status Register" bitfld.long 0x08 19. " LPITXA ,LPI TX automate" "Disabled,Enabled" bitfld.long 0x08 17. " PLS ,PHY link status" "Down,Up" bitfld.long 0x08 16. " LPIEN ,LPI Enable" "Disabled,Enabled" rbitfld.long 0x08 9. " RLPIST ,Receive LPI state" "Not received,Received" textline " " rbitfld.long 0x08 8. " TLPIST ,Transmit LPI state" "Not transmitted,Transmitted" rbitfld.long 0x08 3. " RLPIEX ,Receive LPI exit" "Not stopped,Stopped" rbitfld.long 0x08 2. " RLPIEN ,Receive LPI entry" "Not received,Received" rbitfld.long 0x08 1. " TLPIEX ,Transmit LPI exit" "No exit,Exit" textline " " rbitfld.long 0x08 0. " TLPIEN ,Transmit LPI entry" "No entry,Entry" line.long 0x0C "LPI_TIMERS_CONTROL,LPI Timers Control Register" hexmask.long.word 0x0C 16.--25. 1. " LST ,LPI LS timer" hexmask.long.word 0x0C 0.--15. 1. " TWT ,LPI TW timer" rgroup.long 0x38++0x03 line.long 0x00 "INTERRUPT_STATUS,Interrupt Status Register" bitfld.long 0x00 10. " LPIIS ,LPI interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " TSIS ,Timestamp interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 7. " MMCRXIPIS ,MMC receive checksum offload interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " MMCTXIS ,MMC transmit interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " MMCRXIS ,MMC receive interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " MMCIS ,MMC interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " PMTIS ,PMT interrupt status" "No interrupt,Interrupt" group.long 0x3C++0x0F line.long 0x00 "INTERRUPT_MASK,Interrupt Mask Register" bitfld.long 0x00 10. " LPIIM ,LPI interrupt mask" "Unmasked,Masked" bitfld.long 0x00 9. " TSIM ,Timestamp interrupt mask" "Unmasked,Masked" bitfld.long 0x00 3. " PMTIM ,PMT interrupt mask" "Unmasked,Masked" line.long 0x04 "MAC_ADDRESS0_HIGH,MAC Address 0 High Register" bitfld.long 0x04 31. " AE ,Address enable" "Disabled,Enabled" hexmask.long.word 0x04 0.--15. 0x01 " ADDRHI ,MAC address 0 [47:32]" line.long 0x08 "MAC_ADDRESS0_LOW,MAC Address 0 Low Register" textline " " group.long 0x48++0x03 line.long 0x00 "MAC_ADDRESS1_HIGH,MAC Address 1 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[1]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[1]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[1]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[1]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[1]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[1]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 1 [47:32]" group.long 0x50++0x03 line.long 0x00 "MAC_ADDRESS2_HIGH,MAC Address 2 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[2]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[2]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[2]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[2]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[2]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[2]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 2 [47:32]" group.long 0x58++0x03 line.long 0x00 "MAC_ADDRESS3_HIGH,MAC Address 3 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[3]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[3]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[3]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[3]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[3]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[3]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 3 [47:32]" group.long 0x60++0x03 line.long 0x00 "MAC_ADDRESS4_HIGH,MAC Address 4 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[4]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[4]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[4]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[4]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[4]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[4]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 4 [47:32]" group.long 0x68++0x03 line.long 0x00 "MAC_ADDRESS5_HIGH,MAC Address 5 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[5]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[5]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[5]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[5]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[5]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[5]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 5 [47:32]" group.long 0x70++0x03 line.long 0x00 "MAC_ADDRESS6_HIGH,MAC Address 6 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[6]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[6]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[6]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[6]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[6]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[6]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 6 [47:32]" group.long 0x78++0x03 line.long 0x00 "MAC_ADDRESS7_HIGH,MAC Address 7 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[7]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[7]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[7]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[7]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[7]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[7]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 7 [47:32]" group.long 0x80++0x03 line.long 0x00 "MAC_ADDRESS8_HIGH,MAC Address 8 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[8]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[8]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[8]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[8]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[8]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[8]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 8 [47:32]" group.long 0x88++0x03 line.long 0x00 "MAC_ADDRESS9_HIGH,MAC Address 9 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[9]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[9]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[9]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[9]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[9]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[9]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 9 [47:32]" group.long 0x90++0x03 line.long 0x00 "MAC_ADDRESS10_HIGH,MAC Address 10 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[10]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[10]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[10]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[10]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[10]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[10]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 10 [47:32]" group.long 0x98++0x03 line.long 0x00 "MAC_ADDRESS11_HIGH,MAC Address 11 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[11]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[11]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[11]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[11]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[11]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[11]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 11 [47:32]" group.long 0xA0++0x03 line.long 0x00 "MAC_ADDRESS12_HIGH,MAC Address 12 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[12]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[12]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[12]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[12]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[12]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[12]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 12 [47:32]" group.long 0xA8++0x03 line.long 0x00 "MAC_ADDRESS13_HIGH,MAC Address 13 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[13]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[13]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[13]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[13]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[13]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[13]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 13 [47:32]" group.long 0xB0++0x03 line.long 0x00 "MAC_ADDRESS14_HIGH,MAC Address 14 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[14]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[14]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[14]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[14]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[14]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[14]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 14 [47:32]" group.long 0xB8++0x03 line.long 0x00 "MAC_ADDRESS15_HIGH,MAC Address 15 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source address enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[15]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[15]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[15]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[15]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[15]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[15]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 15 [47:32]" group.long 0x880++0x03 line.long 0x00 "MAC_ADDRESS16_HIGH,MAC Address 16 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[16]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[16]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[16]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[16]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[16]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[16]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 16 [47:32]" group.long 0x888++0x03 line.long 0x00 "MAC_ADDRESS17_HIGH,MAC Address 17 High Register" bitfld.long 0x00 31. " AE ,Address enable" "Disabled,Enabled" bitfld.long 0x00 30. " SA ,Source enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " MBC[5] ,MAC_Address[17]_High [15:8] mask" "Unmasked,Masked" bitfld.long 0x00 28. " [4] ,MAC_Address[17]_High [7:0] mask" "Unmasked,Masked" bitfld.long 0x00 27. " [3] ,MAC_Address[17]_Low [31:24] mask" "Unmasked,Masked" bitfld.long 0x00 26. " [2] ,MAC_Address[17]_Low [16:23] mask" "Unmasked,Masked" textline " " bitfld.long 0x00 25. " [1] ,MAC_Address[17]_Low [8:15] mask" "Unmasked,Masked" bitfld.long 0x00 24. " [0] ,MAC_Address[17]_Low [0:7] mask" "Unmasked,Masked" textline " " hexmask.long.word 0x00 0.--15. 0x01 " ADDRHI ,MAC address 17 [47:32]" group.long 0x4C++0x03 line.long 0x00 "MAC_ADDRESS1_LOW,MAC Address 1 Low Register" group.long 0x54++0x03 line.long 0x00 "MAC_ADDRESS2_LOW,MAC Address 2 Low Register" group.long 0x5C++0x03 line.long 0x00 "MAC_ADDRESS3_LOW,MAC Address 3 Low Register" group.long 0x64++0x03 line.long 0x00 "MAC_ADDRESS4_LOW,MAC Address 4 Low Register" group.long 0x6C++0x03 line.long 0x00 "MAC_ADDRESS5_LOW,MAC Address 5 Low Register" group.long 0x74++0x03 line.long 0x00 "MAC_ADDRESS6_LOW,MAC Address 6 Low Register" group.long 0x7C++0x03 line.long 0x00 "MAC_ADDRESS7_LOW,MAC Address 7 Low Register" group.long 0x84++0x03 line.long 0x00 "MAC_ADDRESS8_LOW,MAC Address 8 Low Register" group.long 0x8C++0x03 line.long 0x00 "MAC_ADDRESS9_LOW,MAC Address 9 Low Register" group.long 0x94++0x03 line.long 0x00 "MAC_ADDRESS10_LOW,MAC Address 10 Low Register" group.long 0x9C++0x03 line.long 0x00 "MAC_ADDRESS11_LOW,MAC Address 11 Low Register" group.long 0xA4++0x03 line.long 0x00 "MAC_ADDRESS12_LOW,MAC Address 12 Low Register" group.long 0xAC++0x03 line.long 0x00 "MAC_ADDRESS13_LOW,MAC Address 13 Low Register" group.long 0xB4++0x03 line.long 0x00 "MAC_ADDRESS14_LOW,MAC Address 14 Low Register" group.long 0xBC++0x03 line.long 0x00 "MAC_ADDRESS15_LOW,MAC Address 15 Low Register" group.long 0x884++0x03 line.long 0x00 "MAC_ADDRESS16_LOW,MAC Address 16 Low Register" group.long 0x88C++0x03 line.long 0x00 "MAC_ADDRESS17_LOW,MAC Address 17 Low Register" textline " " group.long 0xDC++0x03 line.long 0x00 "WDOG_TIMEOUT,Watchdog Timeout Register" bitfld.long 0x00 16. " PWE ,Programmable watchdog enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--13. 1. " WTO ,Watchdog timeout" group.long 0x100++0x03 line.long 0x00 "MMC_CONTROL,MMC Control Register" bitfld.long 0x00 8. " UCDBC ,Update MMC counters for dropped broadcast frames" "Not updated,Updated" bitfld.long 0x00 5. " CNTPRSTLVL ,Full-half preset" "Disabled,Enabled" bitfld.long 0x00 4. " CNTPRST ,Counters preset" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CNTFREEZ ,MMC counter freeze" "No freeze,Freeze" bitfld.long 0x00 2. " RSTONRD ,Reset on read" "No reset,Reset" bitfld.long 0x00 1. " CNTSTOPRO ,Counters stop rollover" "Rollover,Not rollover" textline " " bitfld.long 0x00 0. " CNTRST ,Counters reset" "No reset,Reset" rgroup.long 0x104++0x07 line.long 0x00 "MMC_RECEIVE_INTERRUPT,MMC Receive Interrupt Register" bitfld.long 0x00 25. " RXCTRLFIS ,MMC receive control frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 24. " RXRCVERRFIS ,MMC receive error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 23. " RXWDOGFIS ,MMC receive watchdog error frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " RXVLANGBFIS ,MMC receive VLAN good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 21. " RXFOVFIS ,MMC receive FIFO overflow frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 20. " RXPAUSFIS ,MMC receive pause frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " RXORANGEFIS ,MMC receive out of range error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 18. " RXLENERFIS ,MMC receive length error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 17. " RXUCGFIS ,MMC receive unicast good frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 16. " RX1024TMAXOCTGBFIS ,MMC receive 1024 to maximum octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 15. " RX512T1023OCTGBFIS ,MMC receive 512 to 1023 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 14. " RX256T511OCTGBFIS ,MMC receive 256 to 511 octet good bad frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " RX128T255OCTGBFIS ,MMC receive 128 to 255 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " RX65T127OCTGBFIS ,MMC receive 65 to 127 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 11. " RX64OCTGBFIS ,MMC receive 64 octet good bad frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " RXOSIZEGFIS ,MMC receive oversize good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " RXUSIZEGFIS ,MMC receive undersize good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " RXJABERFIS ,MMC receive jabber error frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " RXRUNTFIS ,MMC receive runt frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " RXALGNERFIS ,MMC receive alignment error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " RXCRCERFIS ,MMC receive CRC error frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " RXMCGFIS ,MMC receive multicast good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " RXBCGFIS ,MMC receive broadcast good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " RXGOCTIS ,MMC receive good octet counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " RXGBOCTIS ,MMC receive good bad octet counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXGBFRMIS ,MMC receive good bad frame counter interrupt Status" "No interrupt,Interrupt" line.long 0x04 "MMC_TRANSMIT_INTERRUPT,MMC Transmit Interrupt Register" bitfld.long 0x04 25. " TXOSIZEGFIS ,MMC transmit oversize good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 24. " TXVLANGFIS ,MMC transmit VLAN good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 23. " TXPAUSFIS ,MMC transmit pause frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " TXEXDEFFIS ,MMC transmit excessive deferral frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 21. " TXGFRMIS ,MMC transmit good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 20. " TXGOCTIS ,MMC transmit good octet counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " TXCARERFIS ,MMC transmit carrier error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 18. " TXEXCOLFIS ,MMC transmit excessive collision frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 17. " TXLATCOLFIS ,MMC transmit late collision frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " TXDEFFIS ,MMC transmit deferred frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 15. " TXMCOLGFIS ,MMC transmit multiple collision good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 14. " TXSCOLGFIS ,MMC transmit single collision good frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " TXUFLOWERFIS ,MMC transmit underflow error frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 12. " TXBCGBFIS ,MMC transmit broadcast good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 11. " TXMCGBFIS ,MMC transmit multicast good bad frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " TXUCGBFIS ,MMC transmit unicast good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 9. " TX1024TMAXOCTGBFIS ,MMC transmit 1024 to maximum octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 8. " TX512T1023OCTGBFIS ,MMC transmit 512 to 1023 octet good bad frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " TX256T511OCTGBFIS ,MMC transmit 256 to 511 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 6. " TX128T255OCTGBFIS ,MMC transmit 128 to 255 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 5. " TX65T127OCTGBFIS ,MMC transmit 65 to 127 octet good bad frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " TX64OCTGBFIS ,MMC transmit 64 octet good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 3. " TXMCGFIS ,MMC transmit multicast good frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " TXBCGFIS ,MMC transmit broadcast good frame counter interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " TXGBFRMIS ,MMC transmit good bad frame counter interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " TXGBOCTIS ,MMC transmit good bad octet counter interrupt status" "No interrupt,Interrupt" group.long 0x10C++0x07 line.long 0x00 "MMC_RECEIVE_INTERRUPT_MASK,MMC Receive Interrupt Mask Register" bitfld.long 0x00 25. " RXCTRLFIM ,MMC receive control frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 24. " RXRCVERRFIM ,MMC receive error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 23. " RXWDOGFIM ,MMC receive watchdog error frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 22. " RXVLANGBFIM ,MMC receive VLAN good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 21. " RXFOVFIM ,MMC receive FIFO overflow frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 20. " RXPAUSFIM ,MMC receive pause frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 19. " RXORANGEFIM ,MMC receive out of range error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 18. " RXLENERFIM ,MMC receive length error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 17. " RXUCGFIM ,MMC receive unicast good frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 16. " RX1024TMAXOCTGBFIM ,MMC receive 1024 to maximum octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 15. " RX512T1023OCTGBFIM ,MMC receive 512 to 1023 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 14. " RX256T511OCTGBFIM ,MMC receive 256 to 511 octet good bad frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 13. " RX128T255OCTGBFIM ,MMC receive 128 to 255 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 12. " RX65T127OCTGBFIM ,MMC receive 65 to 127 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 11. " RX64OCTGBFIM ,MMC receive 64 octet good bad frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 10. " RXOSIZEGFIM ,MMC receive oversize good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 9. " RXUSIZEGFIM ,MMC receive undersize good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 8. " RXJABERFIM ,MMC receive jabber error frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 7. " RXRUNTFIM ,MMC receive runt frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 6. " RXALGNERFIM ,MMC receive alignment error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 5. " RXCRCERFIM ,MMC receive CRC error frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 4. " RXMCGFIM ,MMC receive multicast good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 3. " RXBCGFIM ,MMC receive broadcast good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 2. " RXGOCTIM ,MMC receive good octet counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x00 1. " RXGBOCTIM ,MMC receive good bad octet counter interrupt mask" "Unmasked,Masked" bitfld.long 0x00 0. " RXGBFRMIM ,MMC receive good bad frame counter interrupt mask" "Unmasked,Masked" line.long 0x04 "MMC_TRANSMIT_INTERRUPT_MASK,MMC Transmit Interrupt Mask Register" bitfld.long 0x04 25. " TXOSIZEGFIM ,MMC transmit oversize good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 24. " TXVLANGFIM ,MMC transmit VLAN good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 23. " TXPAUSFIM ,MMC transmit pause frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 22. " TXEXDEFFIM ,MMC transmit excessive deferral frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 21. " TXGFRMIM ,MMC transmit good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 20. " TXGOCTIM ,MMC transmit good octet counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 19. " TXCARERFIM ,MMC transmit carrier error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 18. " TXEXCOLFIM ,MMC transmit excessive collision frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 17. " TXLATCOLFIM ,MMC transmit late collision frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 16. " TXDEFFIM ,MMC transmit deferred frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 15. " TXMCOLGFIM ,MMC transmit multiple collision good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 14. " TXSCOLGFIM ,MMC transmit single collision good frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 13. " TXUFLOWERFIM ,MMC transmit underflow error frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 12. " TXBCGBFIM ,MMC transmit broadcast good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 11. " TXMCGBFIM ,MMC transmit multicast good bad frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 10. " TXUCGBFIM ,MMC transmit unicast good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 9. " TX1024TMAXOCTGBFIM ,MMC transmit 1024 to maximum octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 8. " TX512T1023OCTGBFIM ,MMC transmit 512 to 1023 octet good bad frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 7. " TX256T511OCTGBFIM ,MMC transmit 256 to 511 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 6. " TX128T255OCTGBFIM ,MMC transmit 128 to 255 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 5. " TX65T127OCTGBFIM ,MMC transmit 65 to 127 octet good bad frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 4. " TX64OCTGBFIM ,MMC transmit 64 octet good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 3. " TXMCGFIM ,MMC transmit multicast good frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 2. " TXBCGFIM ,MMC transmit broadcast good frame counter interrupt mask" "Unmasked,Masked" textline " " bitfld.long 0x04 1. " TXGBFRMIM ,MMC transmit good bad frame counter interrupt mask" "Unmasked,Masked" bitfld.long 0x04 0. " TXGBOCTIM ,MMC transmit good bad octet counter interrupt mask" "Unmasked,Masked" textline " " width 36. rgroup.long 0x114++0x67 line.long 0x00 "TX_OCTET_COUNT_GOOD_BAD,Transmit Octet Count For Good And Bad Frames" line.long 0x04 "TX_FRAME_COUNT_GOOD_BAD,Transmit Frame Count For Good And Bad Frames" line.long 0x08 "TX_BROADCAST_FRAMES_GOOD,Transmit Frame Count For Good Broadcast Frames" line.long 0x0C "TX_MULTICAST_FRAMES_GOOD,Transmit Frame Count For Good Multicast Frames" line.long 0x10 "TX_64OCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 64 Byte Frames" line.long 0x14 "TX_65TO127OCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 65 to 127 Bytes Frames" line.long 0x18 "TX_128TO255OCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 128 to 255 Bytes Frames" line.long 0x1C "TX_256TO511OCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 256 to 511 Bytes Frames" line.long 0x20 "TX_512TO1023OCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 512 to 1023 Bytes Frames" line.long 0x24 "TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD,Transmit Octet Count For Good And Bad 1024 to Maxsize Bytes Frames" line.long 0x28 "TX_UNICAST_FRAMES_GOOD_BAD,Transmit Frame Count For Good And Bad Unicast Frames" line.long 0x2C "TX_MULTICAST_FRAMES_GOOD_BAD,Transmit Frame Count For Good And Bad Multicast Frames" line.long 0x30 "TX_BROADCAST_FRAMES_GOOD_BAD,Transmit Frame Count For Good And Bad Broadcast Frames" line.long 0x34 "TX_UNDERFLOW_ERROR_FRAMES,Transmit Frame Count For Underflow Error Frames" hexmask.long.word 0x34 0.--15. 1. " TXUNDRFLW ,Number of frames aborted because of frame underflow error" line.long 0x38 "TX_SINGLE_COLLISION_GOOD_FRAMES,Transmit Frame Count For Frames Transmitted after Single Collision" hexmask.long.word 0x38 0.--15. 1. " TXSNGLCOLG ,Number of successfully transmitted frames after a single collision in the half-duplex mode" line.long 0x3C "TX_MULTIPLE_COLLISION_GOOD_FRAMES,Transmit Frame Count For Frames Transmitted after Multiple Collision" hexmask.long.word 0x3C 0.--15. 1. " TXMULTCOLG ,Number of successfully transmitted frames after multiple collisions in the half-duplex mode" line.long 0x40 "TX_DEFERRED_FRAMES,Transmit Frame Count For Deferred Frames" hexmask.long.word 0x40 0.--15. 1. " TXDEFRD ,Number of successfully transmitted frames after a deferral in the half-duplex mode" line.long 0x44 "TX_LATE_COLLISION_FRAMES,Transmit Frame Count For Late Collision Error Frames" hexmask.long.word 0x44 0.--15. 1. " TXLATECOL ,Number of frames aborted because of late collision error" line.long 0x48 "TX_EXCESSIVE_COLLISION_FRAMES,Transmit Frame Count For Excessive Collision Error Frames" hexmask.long.word 0x48 0.--15. 1. " TXEXSCOL ,Number of frames aborted because of excessive 16 collision error" line.long 0x4C "TX_CARRIER_ERROR_FRAMES,Transmit Frame Count For Carrier Sense Error Frames" hexmask.long.word 0x4C 0.--15. 1. " TXCARR ,Number of frames aborted because of carrier sense error" line.long 0x50 "TX_OCTET_COUNT_GOOD,Transmit Octet Count For Good Frames" line.long 0x54 "TX_FRAME_COUNT_GOOD,Transmit Frame Count For Good Frames" line.long 0x58 "TX_EXCESSIVE_DEFERRAL_ERROR,Transmit Frame Count For Excessive Deferral Error Frames" hexmask.long.word 0x58 0.--15. 1. " TXEXSDEF ,Number of frames aborted because of excessive deferral error" line.long 0x5C "TX_PAUSE_FRAMES,Transmit Frame Count For Good PAUSE Frames" hexmask.long.word 0x5C 0.--15. 1. " TXPAUSE ,Number of transmitted good PAUSE frames" line.long 0x60 "TX_VLAN_FRAMES_GOOD,Transmit Frame Count For Good VLAN Frames" line.long 0x64 "TX_OSIZE_FRAMES_GOOD,Transmit Frame Count For Good Oversize Frames" hexmask.long.word 0x64 0.--15. 1. " TXOSIZG ,Number of frames transmitted without errors And with length greater than the maxsize" rgroup.long 0x180++0x67 line.long 0x00 "RX_FRAMES_COUNT_GOOD_BAD,Receive Frame Count For Good And Bad Frames" line.long 0x04 "RX_OCTET_COUNT_GOOD_BAD,Receive Octet Count For Good And Bad Frames" line.long 0x08 "RX_OCTET_COUNT_GOOD,Receive Octet Count For Good Frames" line.long 0x0C "RX_BROADCAST_FRAMES_GOOD,Receive Frame Count For Good Broadcast Frames" line.long 0x10 "RX_MULTICAST_FRAMES_GOOD,Receive Frame Count For Good Multicast Frames" line.long 0x14 "RX_CRC_ERROR_FRAMES,Receive Frame Count For CRC Error Frames" hexmask.long.word 0x14 0.--15. 1. " RXCRCERR ,Number of frames received with CRC error" line.long 0x18 "RX_ALIGNMENT_ERROR_FRAMES,Receive Frame Count For Alignment Error Frames" hexmask.long.word 0x18 0.--15. 1. " RXALGNERR ,Number of frames received with alignment error" line.long 0x1C "RX_RUNT_ERROR_FRAMES,Receive Frame Count For Runt Error Frames" hexmask.long.word 0x1C 0.--15. 1. " RXRUNTERR ,Number of frames received with runt error" line.long 0x20 "RX_JABBER_ERROR_FRAMES,Receive Frame Count For Jabber Error Frames" hexmask.long.word 0x20 0.--15. 1. " RXJABERR ,Number of giant frames received with length greater than 1,518 bytes" line.long 0x24 "RX_UNDERSIZE_FRAMES_GOOD,Receive Frame Count For Undersize Frames" hexmask.long.word 0x24 0.--15. 1. " RXUNDERSZG ,Number of frames received with length less than 64 bytes And without errors" line.long 0x28 "RX_OVERSIZE_FRAMES_GOOD,Receive Frame Count For Oversize Frames" hexmask.long.word 0x28 0.--15. 1. " RXOVERSZG ,Number of frames received without errors with length greater than the maxsize" line.long 0x2C "RX_64OCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 64 Byte Frames" line.long 0x30 "RX_65TO127OCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 65 to 127 Bytes Frames" line.long 0x34 "RX_128TO255OCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 128 to 255 Bytes Frames" line.long 0x38 "RX_256TO511OCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 256 to 511 Bytes Frames" line.long 0x3C "RX_512TO1023OCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 512 to 1023 Bytes Frames" line.long 0x40 "RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad 1024 to Maxsize Bytes Frames" line.long 0x44 "RX_UNICAST_FRAMES_GOOD,Receive Frame Count For Good Unicast Frames" line.long 0x48 "RX_LENGTH_ERROR_FRAMES,Receive Frame Count For Length Error Frames" hexmask.long.word 0x48 0.--15. 1. " RXLENERR ,Number of frames received with length error" line.long 0x4C "RX_OUT_OF_RANGE_TYPE_FRAMES,Receive Frame Count For Out of Range Frames" hexmask.long.word 0x4C 0.--15. 1. " RXOUTOFRNG ,Number of received frames with length field not equal to the valid frame size" line.long 0x50 "RX_PAUSE_FRAMES,Receive Frame Count For PAUSE Frames" hexmask.long.word 0x50 0.--15. 1. " RXPAUSEFRM ,Number of received good And valid PAUSE frames" line.long 0x54 "RX_FIFO_OVERFLOW_FRAMES,Receive Frame Count For FIFO Overflow Frames" hexmask.long.word 0x54 0.--15. 1. " RXFIFOOVFL ,Number of received frames missed because of FIFO overflow" line.long 0x58 "RX_VLAN_FRAMES_GOOD_BAD,Receive Frame Count For Good And Bad VLAN Frames" line.long 0x5C "RX_WATCHDOG_ERROR_FRAMES,Receive Frame Count For Watchdog Error Frames" hexmask.long.word 0x5C 0.--15. 1. " RXWDGERR ,Number of frames received with error because of the watchdog timeout error" line.long 0x60 "RX_RECEIVE_ERROR_FRAMES,Receive Frame Count For Receive Error Frames" hexmask.long.word 0x60 0.--15. 1. " RXRCVERR ,Number of frames received with error because of the GMII/MII RXER error or frame extension error on GMII" line.long 0x64 "RX_CONTROL_FRAMES_GOOD,Receive Frame Count For Good Control Frames" group.long 0x500++0x03 line.long 0x00 "HASH_TABLE_REG0,Hash Table Register 0" group.long 0x504++0x03 line.long 0x00 "HASH_TABLE_REG1,Hash Table Register 1" group.long 0x508++0x03 line.long 0x00 "HASH_TABLE_REG2,Hash Table Register 2" group.long 0x50C++0x03 line.long 0x00 "HASH_TABLE_REG3,Hash Table Register 3" group.long 0x510++0x03 line.long 0x00 "HASH_TABLE_REG4,Hash Table Register 4" group.long 0x514++0x03 line.long 0x00 "HASH_TABLE_REG5,Hash Table Register 5" group.long 0x518++0x03 line.long 0x00 "HASH_TABLE_REG6,Hash Table Register 6" group.long 0x51C++0x03 line.long 0x00 "HASH_TABLE_REG7,Hash Table Register 7" group.long 0x588++0x03 line.long 0x00 "VLAN_HASH_TABLE_REG,VLAN Hash Table Register" hexmask.long.word 0x00 0.--15. 1. " VLHT ,VLAN hash table" group.long 0x700++0x07 line.long 0x00 "TIMESTAMP_CONTROL,Timestamp Control Register" bitfld.long 0x00 25. " ATSEN0 ,Auxiliary snapshot 0 enable" "Disabled,Enabled" bitfld.long 0x00 24. " ATSFC ,Auxiliary snapshot FIFO clear" "No clear,Clear" textline " " bitfld.long 0x00 18. " TSENMACADDR ,Enable MAC address for PTP frame filtering" "Disabled,Enabled" bitfld.long 0x00 16.--17. " SNAPTYPSEL ,Select PTP packets for taking snapshots" "0,1,2,3" textline " " bitfld.long 0x00 15. " TSMSTRENA ,Enable snapshot for messages relevant to master" "Disabled,Enabled" bitfld.long 0x00 14. " TSEVNTENA ,Enable timestamp snapshot for event messages" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " TSIPV4ENA ,Enable processing of PTP frames sent over IPv4-UDP" "Disabled,Enabled" bitfld.long 0x00 12. " TSIPV6ENA ,Enable processing of PTP frames sent over IPv6-UDP" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TSIPENA ,Enable processing of PTP over ethernet frames" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TSVER2ENA ,Enable PTP packet processing for version 2 format" "Disabled,Enabled" bitfld.long 0x00 9. " TSCTRLSSR ,Timestamp digital or binary rollover control" "Not incremented && not rolled over,Incremented && rolled over" textline " " bitfld.long 0x00 8. " TSENALL ,Enable timestamp for all frames" "Disabled,Enabled" bitfld.long 0x00 5. " TSADDREG ,Addend Reg update" "Not updated,Updated" textline " " bitfld.long 0x00 4. " TSTRIG ,Timestamp interrupt trigger enable" "Disabled,Enabled" bitfld.long 0x00 3. " TSUPDT ,Timestamp update" "Not updated,Updated" textline " " bitfld.long 0x00 2. " TSINIT ,Timestamp initialize" "Not initialized,Initialized" bitfld.long 0x00 1. " TSCFUPDT ,Timestamp fine or coarse update" "Not updated,Updated" textline " " bitfld.long 0x00 0. " TSENA ,Timestamp enable" "Disabled,Enabled" line.long 0x04 "SUB_SECOND_INCREMENT,Sub-Second Increment Register" hexmask.long.byte 0x04 0.--7. 1. " SSINC ,Sub-second increment value" rgroup.long 0x708++0x07 line.long 0x00 "SYSTEM_TIME_SECONDS,System Time - Seconds Register" line.long 0x04 "SYSTEM_TIME_NANOSECONDS,System Time - Nanoseconds Register" hexmask.long 0x04 0.--30. 1. " TSSS ,Timestamp sub seconds" group.long 0x710++0x13 line.long 0x00 "SYSTEM_TIME_SECONDS_UPDATE,System Time - Seconds Update Register" line.long 0x04 "SYSTEM_TIME_NANOSECONDS_UPDATE,System Time - Nanoseconds Update Register" bitfld.long 0x04 31. " ADDSUB ,Add or subtract time" "Add,Subtract" hexmask.long 0x04 0.--30. 1. " TSSS ,Timestamp sub second" line.long 0x08 "TIMESTAMP_ADDEND,Timestamp Addend Register" line.long 0x0C "TARGET_TIME_SECONDS,Target Time Seconds Register" line.long 0x10 "TARGET_TIME_NANOSECONDS,Target Time Nanoseconds Register" bitfld.long 0x10 31. " TRGTBUSY ,Target time register busy" "Not busy,Busy" hexmask.long 0x10 0.--30. 1. " TTSLO ,Target timestamp low register" rgroup.long 0x728++0x0F line.long 0x00 "TIMESTAMP_STATUS,Timestamp Status Register" bitfld.long 0x00 25.--29. " ATSNS ,Number of auxiliary timestamp snapshots" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " ATSSTM ,Auxiliary timestamp snapshot trigger missed" "Not missed,Missed" textline " " bitfld.long 0x00 19. " ATSSTN[3] ,Auxiliary trigger 3 identifier" "Not triggered,Triggered" bitfld.long 0x00 18. " [2] ,Auxiliary trigger 2 identifier" "Not triggered,Triggered" textline " " bitfld.long 0x00 17. " [1] ,Auxiliary trigger 1 identifier" "Not triggered,Triggered" bitfld.long 0x00 16. " [0] ,Auxiliary trigger 0 identifier" "Not triggered,Triggered" textline " " bitfld.long 0x00 5. " TSTRGTERR1 ,Timestamp target time error" "No error,Error" bitfld.long 0x00 4. " TSTARGT1 ,Timestamp target time reached for target time PPS1" "Not reached,Reached" textline " " bitfld.long 0x00 3. " TSTRGTERR ,Timestamp target time error" "No error,Error" bitfld.long 0x00 2. " AUXTSTRIG ,Auxiliary timestamp trigger snapshot" "Not triggered,Triggered" textline " " bitfld.long 0x00 1. " TSTARGT ,Timestamp target time reached" "Not reached,Reached" bitfld.long 0x00 0. " TSSOVF ,Timestamp seconds overflow" "Not overflowed,Overflowed" textline " " line.long 0x04 "PPS_CONTROL,PPS Control Register" bitfld.long 0x04 13.--14. " TRGTMODSEL1 ,Target time register mode for PPS1 output" "Irq event generate,,(Irq event || start/stop PPS1 signal) generate,Start/stop PPS1 signal generate" textline " " bitfld.long 0x04 8.--10. " PPSCMD1 ,Flexible PPS1 output control" "No Command,Start single pulse,Start pulse train,Cancel start,Stop pulse train at time,Stop pulse train immediately,Cancel stop pulse train,?..." textline " " bitfld.long 0x04 5.--6. " TRGTMODSEL0 ,Target time register mode for PPS0 output" "Irq event generate,,(Irq event || start/stop PPS0 signal) generate,Start/stop PPS0 signal generate" textline " " bitfld.long 0x04 4. " PPSEN0 ,Flexible PPS output mode enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--3. " PPSCTRL_PPSCMD ,Flexible PPS0 output || frequency control" "Binary rollover 1Hz && Digital rollover 1Hz / No Command,Binary rollover 2Hz && Digital rollover 1Hz / Start single pulse,Binary rollover 4Hz && Digital rollover 2Hz / Start pulse train,Binary rollover 8Hz && Digital rollover 4Hz / Cancel start,Binary rollover 16Hz && Digital rollover 8Hz / Stop pulse train at time,Stop pulse train immediately,Cancel stop pulse train,,,,,,,,,Binary rollover 32KHz && Digital rollover 16KHz" line.long 0x08 "AUXILIARY_TIMESTAMP_NANOSECONDS,Auxiliary Timestamp - Nanoseconds Register" hexmask.long 0x08 0.--30. 1. " AUXTSLO ,Contains the lower 32 bits (nano seconds field) of the auxiliary timestamp" line.long 0x0C "AUXILIARY_TIMESTAMP_SECONDS,Auxiliary Timestamp - Seconds Register" group.long 0x760++0x07 line.long 0x00 "PPS0_INTERVAL,PPS0 Interval Register" line.long 0x04 "PPS0_WIDTH,PPS0 Width Register" textline " " if (((per.l(ad:0x44002000+0x1000)&0x800000)==0x800000)) group.long 0x1000++0x03 line.long 0x00 "BUS_MODE,Bus Mode Register" rbitfld.long 0x00 31. " RIB ,Rebuild INCRx burst" "No burst,Burst" rbitfld.long 0x00 28.--29. " PRWG ,Channel priority weights" "1,2,3,4" rbitfld.long 0x00 27. " TXPR ,Transmit priority" "Low,High" textline " " rbitfld.long 0x00 26. " MB ,Mixed burst" "No burst,Burst" bitfld.long 0x00 25. " AAL ,Address aligned beats" "Not aligned,Aligned" bitfld.long 0x00 24. " PBLX8 ,PBLx8 mode" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " USP ,Use seperate PBL" "Not used,Used" textline " " bitfld.long 0x00 17.--22. " RPBL ,Rx DMA PBL" ",1,2,,4,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32,?..." textline " " bitfld.long 0x00 16. " FB ,Fixed burst" "No burst,Burst" rbitfld.long 0x00 14.--15. " PR ,Priority ratio" "1:1,2:1,3:1,4:1" bitfld.long 0x00 8.--13. " PBL ,Programmable burst length" ",1,2,,4,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32,?..." textline " " bitfld.long 0x00 7. " ATDS ,Alternate descriptor size" "16 bytes,32 bytes" bitfld.long 0x00 2.--6. " DSL ,Descriptor skip length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1. " DA ,DMA arbitration scheme" "Weighted round-robin,Fixed priority" textline " " bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset" else group.long 0x1000++0x03 line.long 0x00 "BUS_MODE,Bus Mode Register" rbitfld.long 0x00 31. " RIB ,Rebuild INCRx burst" "No burst,Burst" rbitfld.long 0x00 28.--29. " PRWG ,Channel priority weights" "1,2,3,4" rbitfld.long 0x00 27. " TXPR ,Transmit priority" "Low,High" textline " " rbitfld.long 0x00 26. " MB ,Mixed burst" "No burst,Burst" bitfld.long 0x00 25. " AAL ,Address aligned beats" "Not aligned,Aligned" bitfld.long 0x00 24. " PBLX8 ,PBLx8 mode" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " USP ,Use seperate PBL" "Not used,Used" textline " " textline " " bitfld.long 0x00 16. " FB ,Fixed burst" "No burst,Burst" rbitfld.long 0x00 14.--15. " PR ,Priority ratio" "1:1,2:1,3:1,4:1" bitfld.long 0x00 8.--13. " PBL ,Programmable burst length" ",1,2,,4,,,,8,,,,,,,,16,,,,,,,,,,,,,,,,32,?..." textline " " bitfld.long 0x00 7. " ATDS ,Alternate descriptor size" "16 bytes,32 bytes" bitfld.long 0x00 2.--6. " DSL ,Descriptor skip length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1. " DA ,DMA arbitration scheme" "Weighted round-robin,Fixed priority" textline " " bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset" endif textline " " group.long 0x1004++0x0F line.long 0x00 "TRANSMIT_POLL_DEMAND,Transmit Poll Demand Register" line.long 0x04 "RECEIVE_POLL_DEMAND,Receive Poll Demand Register" line.long 0x08 "RECEIVE_DESCRIPTOR_LIST_ADDRESS,Receive Descriptor List Address Register" hexmask.long 0x08 2.--31. 1. " RDESLA_32BIT ,Start of receive list" line.long 0x0C "TRANSMIT_DESCRIPTOR_LIST_ADDRESS,Transmit Descriptor List Address Register" hexmask.long 0x0C 2.--31. 1. " TDESLA_32BIT ,Start of transmit list" if (((per.l(ad:0x44002000+0x1014)&0x2000)==0x2000)) group.long 0x1014++0x03 line.long 0x00 "STATUS,Status Register" rbitfld.long 0x00 30. " GLPII ,GMAC LPI interrupt (for Channel 0)" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " TTI ,Timestamp trigger interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 28. " GPI ,GMAC PMT interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 27. " GMI ,GMAC MMC interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 23.--25. " EB ,Error bits" "RX DMA Write Data Transfer,,,TX DMA Read Data Transfer,RX DMA Descriptor Write Access,TX DMA Descriptor Write Access,RX DMA Descriptor Read Access,TX DMA Descriptor Read Access" textline " " rbitfld.long 0x00 20.--22. " TS ,Transmit process state" "Reset or Stop Transmit Command issued,Fetching Transmit Transfer Descriptor,Waiting for status,Reading from host memory buffer and queuing to Tx FIFO,TIME_STAMP write,,Transmit Descriptor Unavailable or Transmit Buffer Underflow,Closing Transmit Descriptor" textline " " rbitfld.long 0x00 17.--19. " RS ,Received process state" "Reset or Stop Receive Command issued,Fetching Receive Transfer Descriptor,,Waiting for receive packet,Receive Descriptor Unavailable,Closing Receive Descriptor,TIME_STAMP write state,Transferring from receive buffer to host memory" textline " " bitfld.long 0x00 16. " NIS ,Normal interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " AIS ,Abnormal interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " ERI ,Early receive interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " FBI ,Fatal bus error interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " ETI ,Early transmit interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RWT ,Receive watchdog timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 8. " RPS ,Receive process stopped" "Not stopped,Stopped" textline " " bitfld.long 0x00 7. " RU ,Receive buffer unavailable" "Available,Unavailable" textline " " bitfld.long 0x00 6. " RI ,Receive interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " UNF ,Transmit underflow" "Not underflowed,Underflowed" textline " " bitfld.long 0x00 4. " OVF ,Receive overflow" "Not overflowed,Overflowed" textline " " bitfld.long 0x00 3. " TJT ,Transmit jabber timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 2. " TU ,Transmit buffer unavailable" "Available,Unavailable" textline " " bitfld.long 0x00 1. " TPS ,Transmit process stopped" "Not stopped,Stopped" textline " " bitfld.long 0x00 0. " TI ,Transmit interrupt" "No interrupt,Interrupt" else group.long 0x1014++0x03 line.long 0x00 "STATUS,Status Register" rbitfld.long 0x00 30. " GLPII ,GMAC LPI interrupt (for Channel 0)" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 29. " TTI ,Timestamp trigger interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 28. " GPI ,GMAC PMT interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 27. " GMI ,GMAC MMC interrupt" "No interrupt,Interrupt" textline " " rbitfld.long 0x00 20.--22. " TS ,Transmit process state" "Reset or Stop Transmit Command issued,Fetching Transmit Transfer Descriptor,Waiting for status,Reading from host memory buffer and queuing to Tx FIFO,TIME_STAMP write,,Transmit Descriptor Unavailable or Transmit Buffer Underflow,Closing Transmit Descriptor" textline " " rbitfld.long 0x00 17.--19. " RS ,Received process state" "Reset or Stop Receive Command issued,Fetching Receive Transfer Descriptor,,Waiting for receive packet,Receive Descriptor Unavailable,Closing Receive Descriptor,TIME_STAMP write state,Transferring from receive buffer to host memory" textline " " bitfld.long 0x00 16. " NIS ,Normal interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " AIS ,Abnormal interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " ERI ,Early receive interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " FBI ,Fatal bus error interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " ETI ,Early transmit interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " RWT ,Receive watchdog timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 8. " RPS ,Receive process stopped" "Not stopped,Stopped" textline " " bitfld.long 0x00 7. " RU ,Receive buffer unavailable" "Available,Unavailable" textline " " bitfld.long 0x00 6. " RI ,Receive interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " UNF ,Transmit underflow" "Not underflowed,Underflowed" textline " " bitfld.long 0x00 4. " OVF ,Receive overflow" "Not overflowed,Overflowed" textline " " bitfld.long 0x00 3. " TJT ,Transmit jabber timeout" "No timeout,Timeout" textline " " bitfld.long 0x00 2. " TU ,Transmit buffer unavailable" "Available,Unavailable" textline " " bitfld.long 0x00 1. " TPS ,Transmit process stopped" "Not stopped,Stopped" textline " " bitfld.long 0x00 0. " TI ,Transmit interrupt" "No interrupt,Interrupt" endif textline " " if (((per.l(ad:0x44002000+0x1018)&0x2200000)==0x00)) group.long 0x1018++0x03 line.long 0x00 "OPERATION_MODE,Operation Mode Register" bitfld.long 0x00 26. " DT ,Disable dropping of TCP/IP checksum error frames" "No,Yes" bitfld.long 0x00 25. " RSF ,Receive store and forward" "Not received,Received" bitfld.long 0x00 22. 11.--12. " RFD ,Threshold for deactivating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." bitfld.long 0x00 21. " TSF ,Transmit store and forward" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 20. " FTF ,Flush transmit FIFO" "Not flushed,Flushed" textline " " bitfld.long 0x00 14.--16. " TTC ,Transmit threshold control" "64,128,192,256,40,32,24,16" textline " " bitfld.long 0x00 13. " ST ,Start or stop transmission command" "Stopped,Started" bitfld.long 0x00 9.--10. " RFA ,Threshold for activating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB" bitfld.long 0x00 8. " EFC ,Enable HW flow control" "Disabled,Enabled" bitfld.long 0x00 7. " FEF ,Forward error frames" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 6. " FUF ,Forward undersized good frames" "Not forwarded,Forwarded" bitfld.long 0x00 5. " DGF ,Drop giant frames" "Not dropped,Dropped" bitfld.long 0x00 3.--4. " RTC ,Receive threshold control" "64,32,96,128" textline " " bitfld.long 0x00 2. " OSF ,Operate on second frame" "No operate,Operate" bitfld.long 0x00 1. " SR ,Start or stop receive" "Stopped,Started" elif (((per.l(ad:0x44002000+0x1018)&0x2200000)==0x200000)) group.long 0x1018++0x03 line.long 0x00 "OPERATION_MODE,Operation Mode Register" bitfld.long 0x00 26. " DT ,Disable dropping of TCP/IP checksum error frames" "No,Yes" bitfld.long 0x00 25. " RSF ,Receive store and forward" "Not received,Received" bitfld.long 0x00 22. 11.--12. " RFD ,Threshold for deactivating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." bitfld.long 0x00 21. " TSF ,Transmit store and forward" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 20. " FTF ,Flush transmit FIFO" "Not flushed,Flushed" textline " " textline " " bitfld.long 0x00 13. " ST ,Start or stop transmission command" "Stopped,Started" bitfld.long 0x00 9.--10. " RFA ,Threshold for activating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB" bitfld.long 0x00 8. " EFC ,Enable HW flow control" "Disabled,Enabled" bitfld.long 0x00 7. " FEF ,Forward error frames" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 6. " FUF ,Forward undersized good frames" "Not forwarded,Forwarded" bitfld.long 0x00 5. " DGF ,Drop giant frames" "Not dropped,Dropped" bitfld.long 0x00 3.--4. " RTC ,Receive threshold control" "64,32,96,128" textline " " bitfld.long 0x00 2. " OSF ,Operate on second frame" "No operate,Operate" bitfld.long 0x00 1. " SR ,Start or stop receive" "Stopped,Started" elif (((per.l(ad:0x44002000+0x1018)&0x2200000)==0x2000000)) group.long 0x1018++0x03 line.long 0x00 "OPERATION_MODE,Operation Mode Register" bitfld.long 0x00 26. " DT ,Disable dropping of TCP/IP checksum error frames" "No,Yes" bitfld.long 0x00 25. " RSF ,Receive store and forward" "Not received,Received" bitfld.long 0x00 22. 11.--12. " RFD ,Threshold for deactivating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." bitfld.long 0x00 21. " TSF ,Transmit store and forward" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 20. " FTF ,Flush transmit FIFO" "Not flushed,Flushed" textline " " bitfld.long 0x00 14.--16. " TTC ,Transmit threshold control" "64,128,192,256,40,32,24,16" textline " " bitfld.long 0x00 13. " ST ,Start or stop transmission command" "Stopped,Started" bitfld.long 0x00 9.--10. " RFA ,Threshold for activating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB" bitfld.long 0x00 8. " EFC ,Enable HW flow control" "Disabled,Enabled" bitfld.long 0x00 7. " FEF ,Forward error frames" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 6. " FUF ,Forward undersized good frames" "Not forwarded,Forwarded" bitfld.long 0x00 5. " DGF ,Drop giant frames" "Not dropped,Dropped" textline " " bitfld.long 0x00 2. " OSF ,Operate on second frame" "No operate,Operate" bitfld.long 0x00 1. " SR ,Start or stop receive" "Stopped,Started" else group.long 0x1018++0x03 line.long 0x00 "OPERATION_MODE,Operation Mode Register" bitfld.long 0x00 26. " DT ,Disable dropping of TCP/IP checksum error frames" "No,Yes" bitfld.long 0x00 25. " RSF ,Receive store and forward" "Not received,Received" bitfld.long 0x00 22. 11.--12. " RFD ,Threshold for deactivating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." bitfld.long 0x00 21. " TSF ,Transmit store and forward" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 20. " FTF ,Flush transmit FIFO" "Not flushed,Flushed" textline " " textline " " bitfld.long 0x00 13. " ST ,Start or stop transmission command" "Stopped,Started" bitfld.long 0x00 9.--10. " RFA ,Threshold for activating flow control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB" bitfld.long 0x00 8. " EFC ,Enable HW flow control" "Disabled,Enabled" bitfld.long 0x00 7. " FEF ,Forward error frames" "Not forwarded,Forwarded" textline " " bitfld.long 0x00 6. " FUF ,Forward undersized good frames" "Not forwarded,Forwarded" bitfld.long 0x00 5. " DGF ,Drop giant frames" "Not dropped,Dropped" textline " " bitfld.long 0x00 2. " OSF ,Operate on second frame" "No operate,Operate" bitfld.long 0x00 1. " SR ,Start or stop receive" "Stopped,Started" endif group.long 0x101C++0x03 line.long 0x00 "INTERRUPT_ENABLE,Interrupt Enable Register" bitfld.long 0x00 16. " NIE ,Normal interrupt summary enable" "Disabled,Enabled" bitfld.long 0x00 15. " AIE ,Abnormal interrupt summary enable" "Disabled,Enabled" bitfld.long 0x00 14. " ERE ,Early receive interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " FBE ,Fatal bus error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ETE ,Early transmit interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " RWE ,Receive watchdog timeout enable" "Disabled,Enabled" bitfld.long 0x00 8. " RSE ,Receive stopped enable" "Disabled,Enabled" bitfld.long 0x00 7. " RUE ,Receive buffer unavailable enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " UNE ,Underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " OVE ,Overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " TJE ,Transmit jabber timeout enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " TUE ,Transmit buffer unavailable enable" "Disabled,Enabled" bitfld.long 0x00 1. " TSE ,Transmit stopped enable" "Disabled,Enabled" bitfld.long 0x00 0. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " width 42. rgroup.long 0x1020++0x03 line.long 0x00 "MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER,Missed Frame and Buffer Overflow Counter Register" bitfld.long 0x00 28. " OVFCNTOVF ,Overflow bit for FIFO overflow counter" "Not overflowed,Overflowed" hexmask.long.word 0x00 17.--27. 1. " OVFFRMCNT ,Overflow frame counter" bitfld.long 0x00 16. " MISCNTOVF ,Overflow bit for missed frame counter" "Not overflowed,Overflowed" hexmask.long.word 0x00 0.--15. 1. " MISFRMCNT ,Missed frame counter" textline " " group.long 0x1024++0x07 line.long 0x00 "RECEIVE_INTERRUPT_WATCHDOG_TIMER,Receive Interrupt Watchdog Timer Register" hexmask.long.byte 0x00 0.--7. 1. " RIWT ,RI watchdog timer count" line.long 0x04 "AXI_BUS_MODE,AXI Bus Mode Register" bitfld.long 0x04 31. " EN_LPI ,Enable low power interface" "Disabled,Enabled" bitfld.long 0x04 30. " LPI_XIT_FRM ,Unlock on magic packet or remote wake up frame" "Any frame,Magic packet || Remote wake up frame" textline " " bitfld.long 0x04 20.--21. " WR_OSR_LMT ,AXI maximum write OutStanding request limit" "0,1,2,3" bitfld.long 0x04 16.--17. " RD_OSR_LMT ,AXI maximum read OutStanding request limit" "0,1,2,3" textline " " bitfld.long 0x04 13. " ONEKBBE ,1 KB boundary crossing enable for the GMAC-AXI master" "Disabled,Enabled" rbitfld.long 0x04 12. " AXI_AAL ,Address-aligned beats" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " BLEN16 ,AXI burst length 16" "Disabled,Enabled" bitfld.long 0x04 2. " BLEN8 ,AXI burst length 8" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " BLEN4 ,AXI burst length 4" "Disabled,Enabled" rbitfld.long 0x04 0. " UNDEF ,AXI undefined burst length" "Fixed burst length,Equal or below maximum" rgroup.long 0x102C++0x03 line.long 0x00 "AXI_STATUS,AXI Status Register" bitfld.long 0x00 1. " AXIRDSTS ,AXI master read channel status" "Not active,Active" bitfld.long 0x00 0. " AXWHSTS ,AXI master write channel" "Not active,Active" textline " " rgroup.long 0x1048++0x13 line.long 0x00 "CURRENT_HOST_TRANSMIT_DESCRIPTOR,Current Host Transmit Descriptor Register" line.long 0x04 "CURRENT_HOST_RECEIVE_DESCRIPTOR,Current Host Receive Descriptor Register" line.long 0x08 "CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS,Current Host Transmit Buffer Address Register" line.long 0x0C "CURRENT_HOST_RECEIVE_BUFFER_ADDRESS,Current Host Receive Buffer Address Register" line.long 0x10 "HW_FEATURE,HW Feature Register" bitfld.long 0x10 28.--30. " ACTPHYIF ,Active or selected PHY interface" "GMII || MII,?..." bitfld.long 0x10 27. " SAVLANINS ,Source address or VLAN insertion" "0,1" bitfld.long 0x10 26. " FLEXIPPSEN ,Flexible pulse-per-second output" "0,1" bitfld.long 0x10 25. " INTTSEN ,Timestamping with internal system time" "0,1" textline " " bitfld.long 0x10 24. " ENHDESSEL ,Alternate enhanced descriptor" "0,1" bitfld.long 0x10 22.--23. " TXCHCNT ,Number of additional Tx channels" "0,1,2,3" bitfld.long 0x10 20.--21. " RXCHCNT ,Number of additional Rx channels" "0,1,2,3" bitfld.long 0x10 19. " RXFIFOSIZE ,Rx FIFO > 2048 Bytes" "0,1" textline " " bitfld.long 0x10 18. " RXTYP2COE ,IP checksum offload type 2 in Rx" "0,1" bitfld.long 0x10 17. " RXTYP1COE ,IP checksum offload type 1 in Rx" "0,1" bitfld.long 0x10 16. " TXCOESEL ,Checksum offload in Tx" "0,1" bitfld.long 0x10 15. " AVSEL ,AV feature" "0,1" textline " " bitfld.long 0x10 14. " EEESEL ,Energy efficient ethernet" "0,1" bitfld.long 0x10 13. " TSVER2SEL ,IEEE 1588-2008 advanced timestamp" "0,1" bitfld.long 0x10 12. " TSVER1SEL ,Only IEEE 1588-2002 timestamp" "0,1" bitfld.long 0x10 11. " MMCSEL ,RMON module" "0,1" textline " " bitfld.long 0x10 10. " MGKSEL ,PMT magic packet" "0,1" bitfld.long 0x10 9. " RWKSEL ,PMT remote wakeup" "0,1" bitfld.long 0x10 8. " SMASEL ,SMA MDIO interface" "0,1" bitfld.long 0x10 7. " L3L4FLTREN ,Layer 3 and layer 4 filter feature" "0,1" textline " " bitfld.long 0x10 5. " ADDMACADRSEL ,Multiple MAC address registers" "0,1" bitfld.long 0x10 4. " HASHSEL ,HASH filter" "0,1" bitfld.long 0x10 3. " EXTHASHEN ,Expanded DA hash filter" "0,1" bitfld.long 0x10 2. " HDSEL ,Half-Duplex support" "0,1" textline " " bitfld.long 0x10 1. " GMIISEL ,1000 Mbps support" "0,1" bitfld.long 0x10 0. " MIISEL ,10 or 100 Mbps support" "0,1" width 0x0B tree.end tree.end sif cpuis("R9A06G032*") tree "HSRS (HSR Switch)" base ad:0x44040000 width 20. group.long 0x00++0x07 line.long 0x00 "RCI_WCONFIG,Send Config Register" bitfld.long 0x00 31. " SB ,Start sending the frame" "Not started,Started" bitfld.long 0x00 28. " END ,Endian swap" "Not swapped,Swapped" bitfld.long 0x00 20.--23. " PTH ,Path field of the HSR tag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 19. " TAG ,Send with tag" "Not send,Send" textline " " bitfld.long 0x00 18. " B ,Send to port B" "Not send,Send" bitfld.long 0x00 17. " A ,Send to port A" "Not send,Send" bitfld.long 0x00 16. " I ,Send to interlink" "Not send,Send" hexmask.long.word 0x00 0.--11. 1. " WFS ,Write frame size" line.long 0x04 "RCI_RCONFIG,Receive Config Register" bitfld.long 0x04 31. " RFD ,Read frame done" "Not done,Done" rbitfld.long 0x04 30. " FP ,Frame pending" "Not pending,Pending" bitfld.long 0x04 28. " END ,Endian swap" "Not swapped,Swapped" rbitfld.long 0x04 18.--19. " TAG ,Received with tag" "No tag,HSR header,PRP-1 trailer,?..." textline " " rbitfld.long 0x04 16.--17. " RPT ,Receive port" ",Interlink,Port A,Port B" hexmask.long.word 0x04 0.--11. 1. " RFS ,Read frame size" rgroup.long 0x08++0x03 line.long 0x00 "RCI_INT,Interrupt Register" bitfld.long 0x00 1. " TXI ,TX interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " RXI ,RX interrupt" "No interrupt,Interrupt" textline " " tree "Frame Data Send / Receive Registers" group.long 0xC++0x03 line.long 0x00 "RCI_TXRX_DATA0,Frame Data Send / Receive Register 0" hexmask.long.byte 0x00 24.--31. 1. " BYTE[4] ,Byte [4]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[3] ,Byte [3]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[2] ,Byte [2]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1] ,Byte [1]" group.long 0x10++0x03 line.long 0x00 "RCI_TXRX_DATA1,Frame Data Send / Receive Register 1" hexmask.long.byte 0x00 24.--31. 1. " BYTE[8] ,Byte [8]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[7] ,Byte [7]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[6] ,Byte [6]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[5] ,Byte [5]" group.long 0x14++0x03 line.long 0x00 "RCI_TXRX_DATA2,Frame Data Send / Receive Register 2" hexmask.long.byte 0x00 24.--31. 1. " BYTE[12] ,Byte [12]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[11] ,Byte [11]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[10] ,Byte [10]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[9] ,Byte [9]" group.long 0x18++0x03 line.long 0x00 "RCI_TXRX_DATA3,Frame Data Send / Receive Register 3" hexmask.long.byte 0x00 24.--31. 1. " BYTE[16] ,Byte [16]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[15] ,Byte [15]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[14] ,Byte [14]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[13] ,Byte [13]" group.long 0x1C++0x03 line.long 0x00 "RCI_TXRX_DATA4,Frame Data Send / Receive Register 4" hexmask.long.byte 0x00 24.--31. 1. " BYTE[20] ,Byte [20]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[19] ,Byte [19]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[18] ,Byte [18]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[17] ,Byte [17]" group.long 0x20++0x03 line.long 0x00 "RCI_TXRX_DATA5,Frame Data Send / Receive Register 5" hexmask.long.byte 0x00 24.--31. 1. " BYTE[24] ,Byte [24]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[23] ,Byte [23]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[22] ,Byte [22]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[21] ,Byte [21]" group.long 0x24++0x03 line.long 0x00 "RCI_TXRX_DATA6,Frame Data Send / Receive Register 6" hexmask.long.byte 0x00 24.--31. 1. " BYTE[28] ,Byte [28]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[27] ,Byte [27]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[26] ,Byte [26]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[25] ,Byte [25]" group.long 0x28++0x03 line.long 0x00 "RCI_TXRX_DATA7,Frame Data Send / Receive Register 7" hexmask.long.byte 0x00 24.--31. 1. " BYTE[32] ,Byte [32]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[31] ,Byte [31]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[30] ,Byte [30]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[29] ,Byte [29]" group.long 0x2C++0x03 line.long 0x00 "RCI_TXRX_DATA8,Frame Data Send / Receive Register 8" hexmask.long.byte 0x00 24.--31. 1. " BYTE[36] ,Byte [36]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[35] ,Byte [35]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[34] ,Byte [34]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[33] ,Byte [33]" group.long 0x30++0x03 line.long 0x00 "RCI_TXRX_DATA9,Frame Data Send / Receive Register 9" hexmask.long.byte 0x00 24.--31. 1. " BYTE[40] ,Byte [40]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[39] ,Byte [39]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[38] ,Byte [38]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[37] ,Byte [37]" group.long 0x34++0x03 line.long 0x00 "RCI_TXRX_DATA10,Frame Data Send / Receive Register 10" hexmask.long.byte 0x00 24.--31. 1. " BYTE[44] ,Byte [44]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[43] ,Byte [43]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[42] ,Byte [42]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[41] ,Byte [41]" group.long 0x38++0x03 line.long 0x00 "RCI_TXRX_DATA11,Frame Data Send / Receive Register 11" hexmask.long.byte 0x00 24.--31. 1. " BYTE[48] ,Byte [48]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[47] ,Byte [47]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[46] ,Byte [46]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[45] ,Byte [45]" group.long 0x3C++0x03 line.long 0x00 "RCI_TXRX_DATA12,Frame Data Send / Receive Register 12" hexmask.long.byte 0x00 24.--31. 1. " BYTE[52] ,Byte [52]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[51] ,Byte [51]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[50] ,Byte [50]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[49] ,Byte [49]" group.long 0x40++0x03 line.long 0x00 "RCI_TXRX_DATA13,Frame Data Send / Receive Register 13" hexmask.long.byte 0x00 24.--31. 1. " BYTE[56] ,Byte [56]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[55] ,Byte [55]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[54] ,Byte [54]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[53] ,Byte [53]" group.long 0x44++0x03 line.long 0x00 "RCI_TXRX_DATA14,Frame Data Send / Receive Register 14" hexmask.long.byte 0x00 24.--31. 1. " BYTE[60] ,Byte [60]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[59] ,Byte [59]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[58] ,Byte [58]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[57] ,Byte [57]" group.long 0x48++0x03 line.long 0x00 "RCI_TXRX_DATA15,Frame Data Send / Receive Register 15" hexmask.long.byte 0x00 24.--31. 1. " BYTE[64] ,Byte [64]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[63] ,Byte [63]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[62] ,Byte [62]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[61] ,Byte [61]" group.long 0x4C++0x03 line.long 0x00 "RCI_TXRX_DATA16,Frame Data Send / Receive Register 16" hexmask.long.byte 0x00 24.--31. 1. " BYTE[68] ,Byte [68]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[67] ,Byte [67]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[66] ,Byte [66]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[65] ,Byte [65]" group.long 0x50++0x03 line.long 0x00 "RCI_TXRX_DATA17,Frame Data Send / Receive Register 17" hexmask.long.byte 0x00 24.--31. 1. " BYTE[72] ,Byte [72]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[71] ,Byte [71]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[70] ,Byte [70]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[69] ,Byte [69]" group.long 0x54++0x03 line.long 0x00 "RCI_TXRX_DATA18,Frame Data Send / Receive Register 18" hexmask.long.byte 0x00 24.--31. 1. " BYTE[76] ,Byte [76]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[75] ,Byte [75]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[74] ,Byte [74]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[73] ,Byte [73]" group.long 0x58++0x03 line.long 0x00 "RCI_TXRX_DATA19,Frame Data Send / Receive Register 19" hexmask.long.byte 0x00 24.--31. 1. " BYTE[80] ,Byte [80]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[79] ,Byte [79]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[78] ,Byte [78]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[77] ,Byte [77]" group.long 0x5C++0x03 line.long 0x00 "RCI_TXRX_DATA20,Frame Data Send / Receive Register 20" hexmask.long.byte 0x00 24.--31. 1. " BYTE[84] ,Byte [84]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[83] ,Byte [83]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[82] ,Byte [82]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[81] ,Byte [81]" group.long 0x60++0x03 line.long 0x00 "RCI_TXRX_DATA21,Frame Data Send / Receive Register 21" hexmask.long.byte 0x00 24.--31. 1. " BYTE[88] ,Byte [88]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[87] ,Byte [87]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[86] ,Byte [86]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[85] ,Byte [85]" group.long 0x64++0x03 line.long 0x00 "RCI_TXRX_DATA22,Frame Data Send / Receive Register 22" hexmask.long.byte 0x00 24.--31. 1. " BYTE[92] ,Byte [92]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[91] ,Byte [91]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[90] ,Byte [90]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[89] ,Byte [89]" group.long 0x68++0x03 line.long 0x00 "RCI_TXRX_DATA23,Frame Data Send / Receive Register 23" hexmask.long.byte 0x00 24.--31. 1. " BYTE[96] ,Byte [96]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[95] ,Byte [95]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[94] ,Byte [94]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[93] ,Byte [93]" group.long 0x6C++0x03 line.long 0x00 "RCI_TXRX_DATA24,Frame Data Send / Receive Register 24" hexmask.long.byte 0x00 24.--31. 1. " BYTE[100] ,Byte [100]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[99] ,Byte [99]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[98] ,Byte [98]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[97] ,Byte [97]" group.long 0x70++0x03 line.long 0x00 "RCI_TXRX_DATA25,Frame Data Send / Receive Register 25" hexmask.long.byte 0x00 24.--31. 1. " BYTE[104] ,Byte [104]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[103] ,Byte [103]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[102] ,Byte [102]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[101] ,Byte [101]" group.long 0x74++0x03 line.long 0x00 "RCI_TXRX_DATA26,Frame Data Send / Receive Register 26" hexmask.long.byte 0x00 24.--31. 1. " BYTE[108] ,Byte [108]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[107] ,Byte [107]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[106] ,Byte [106]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[105] ,Byte [105]" group.long 0x78++0x03 line.long 0x00 "RCI_TXRX_DATA27,Frame Data Send / Receive Register 27" hexmask.long.byte 0x00 24.--31. 1. " BYTE[112] ,Byte [112]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[111] ,Byte [111]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[110] ,Byte [110]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[109] ,Byte [109]" group.long 0x7C++0x03 line.long 0x00 "RCI_TXRX_DATA28,Frame Data Send / Receive Register 28" hexmask.long.byte 0x00 24.--31. 1. " BYTE[116] ,Byte [116]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[115] ,Byte [115]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[114] ,Byte [114]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[113] ,Byte [113]" group.long 0x80++0x03 line.long 0x00 "RCI_TXRX_DATA29,Frame Data Send / Receive Register 29" hexmask.long.byte 0x00 24.--31. 1. " BYTE[120] ,Byte [120]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[119] ,Byte [119]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[118] ,Byte [118]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[117] ,Byte [117]" group.long 0x84++0x03 line.long 0x00 "RCI_TXRX_DATA30,Frame Data Send / Receive Register 30" hexmask.long.byte 0x00 24.--31. 1. " BYTE[124] ,Byte [124]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[123] ,Byte [123]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[122] ,Byte [122]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[121] ,Byte [121]" group.long 0x88++0x03 line.long 0x00 "RCI_TXRX_DATA31,Frame Data Send / Receive Register 31" hexmask.long.byte 0x00 24.--31. 1. " BYTE[128] ,Byte [128]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[127] ,Byte [127]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[126] ,Byte [126]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[125] ,Byte [125]" group.long 0x8C++0x03 line.long 0x00 "RCI_TXRX_DATA32,Frame Data Send / Receive Register 32" hexmask.long.byte 0x00 24.--31. 1. " BYTE[132] ,Byte [132]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[131] ,Byte [131]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[130] ,Byte [130]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[129] ,Byte [129]" group.long 0x90++0x03 line.long 0x00 "RCI_TXRX_DATA33,Frame Data Send / Receive Register 33" hexmask.long.byte 0x00 24.--31. 1. " BYTE[136] ,Byte [136]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[135] ,Byte [135]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[134] ,Byte [134]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[133] ,Byte [133]" group.long 0x94++0x03 line.long 0x00 "RCI_TXRX_DATA34,Frame Data Send / Receive Register 34" hexmask.long.byte 0x00 24.--31. 1. " BYTE[140] ,Byte [140]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[139] ,Byte [139]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[138] ,Byte [138]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[137] ,Byte [137]" group.long 0x98++0x03 line.long 0x00 "RCI_TXRX_DATA35,Frame Data Send / Receive Register 35" hexmask.long.byte 0x00 24.--31. 1. " BYTE[144] ,Byte [144]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[143] ,Byte [143]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[142] ,Byte [142]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[141] ,Byte [141]" group.long 0x9C++0x03 line.long 0x00 "RCI_TXRX_DATA36,Frame Data Send / Receive Register 36" hexmask.long.byte 0x00 24.--31. 1. " BYTE[148] ,Byte [148]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[147] ,Byte [147]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[146] ,Byte [146]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[145] ,Byte [145]" group.long 0xA0++0x03 line.long 0x00 "RCI_TXRX_DATA37,Frame Data Send / Receive Register 37" hexmask.long.byte 0x00 24.--31. 1. " BYTE[152] ,Byte [152]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[151] ,Byte [151]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[150] ,Byte [150]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[149] ,Byte [149]" group.long 0xA4++0x03 line.long 0x00 "RCI_TXRX_DATA38,Frame Data Send / Receive Register 38" hexmask.long.byte 0x00 24.--31. 1. " BYTE[156] ,Byte [156]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[155] ,Byte [155]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[154] ,Byte [154]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[153] ,Byte [153]" group.long 0xA8++0x03 line.long 0x00 "RCI_TXRX_DATA39,Frame Data Send / Receive Register 39" hexmask.long.byte 0x00 24.--31. 1. " BYTE[160] ,Byte [160]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[159] ,Byte [159]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[158] ,Byte [158]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[157] ,Byte [157]" group.long 0xAC++0x03 line.long 0x00 "RCI_TXRX_DATA40,Frame Data Send / Receive Register 40" hexmask.long.byte 0x00 24.--31. 1. " BYTE[164] ,Byte [164]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[163] ,Byte [163]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[162] ,Byte [162]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[161] ,Byte [161]" group.long 0xB0++0x03 line.long 0x00 "RCI_TXRX_DATA41,Frame Data Send / Receive Register 41" hexmask.long.byte 0x00 24.--31. 1. " BYTE[168] ,Byte [168]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[167] ,Byte [167]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[166] ,Byte [166]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[165] ,Byte [165]" group.long 0xB4++0x03 line.long 0x00 "RCI_TXRX_DATA42,Frame Data Send / Receive Register 42" hexmask.long.byte 0x00 24.--31. 1. " BYTE[172] ,Byte [172]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[171] ,Byte [171]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[170] ,Byte [170]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[169] ,Byte [169]" group.long 0xB8++0x03 line.long 0x00 "RCI_TXRX_DATA43,Frame Data Send / Receive Register 43" hexmask.long.byte 0x00 24.--31. 1. " BYTE[176] ,Byte [176]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[175] ,Byte [175]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[174] ,Byte [174]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[173] ,Byte [173]" group.long 0xBC++0x03 line.long 0x00 "RCI_TXRX_DATA44,Frame Data Send / Receive Register 44" hexmask.long.byte 0x00 24.--31. 1. " BYTE[180] ,Byte [180]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[179] ,Byte [179]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[178] ,Byte [178]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[177] ,Byte [177]" group.long 0xC0++0x03 line.long 0x00 "RCI_TXRX_DATA45,Frame Data Send / Receive Register 45" hexmask.long.byte 0x00 24.--31. 1. " BYTE[184] ,Byte [184]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[183] ,Byte [183]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[182] ,Byte [182]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[181] ,Byte [181]" group.long 0xC4++0x03 line.long 0x00 "RCI_TXRX_DATA46,Frame Data Send / Receive Register 46" hexmask.long.byte 0x00 24.--31. 1. " BYTE[188] ,Byte [188]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[187] ,Byte [187]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[186] ,Byte [186]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[185] ,Byte [185]" group.long 0xC8++0x03 line.long 0x00 "RCI_TXRX_DATA47,Frame Data Send / Receive Register 47" hexmask.long.byte 0x00 24.--31. 1. " BYTE[192] ,Byte [192]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[191] ,Byte [191]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[190] ,Byte [190]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[189] ,Byte [189]" group.long 0xCC++0x03 line.long 0x00 "RCI_TXRX_DATA48,Frame Data Send / Receive Register 48" hexmask.long.byte 0x00 24.--31. 1. " BYTE[196] ,Byte [196]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[195] ,Byte [195]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[194] ,Byte [194]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[193] ,Byte [193]" group.long 0xD0++0x03 line.long 0x00 "RCI_TXRX_DATA49,Frame Data Send / Receive Register 49" hexmask.long.byte 0x00 24.--31. 1. " BYTE[200] ,Byte [200]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[199] ,Byte [199]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[198] ,Byte [198]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[197] ,Byte [197]" group.long 0xD4++0x03 line.long 0x00 "RCI_TXRX_DATA50,Frame Data Send / Receive Register 50" hexmask.long.byte 0x00 24.--31. 1. " BYTE[204] ,Byte [204]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[203] ,Byte [203]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[202] ,Byte [202]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[201] ,Byte [201]" group.long 0xD8++0x03 line.long 0x00 "RCI_TXRX_DATA51,Frame Data Send / Receive Register 51" hexmask.long.byte 0x00 24.--31. 1. " BYTE[208] ,Byte [208]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[207] ,Byte [207]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[206] ,Byte [206]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[205] ,Byte [205]" group.long 0xDC++0x03 line.long 0x00 "RCI_TXRX_DATA52,Frame Data Send / Receive Register 52" hexmask.long.byte 0x00 24.--31. 1. " BYTE[212] ,Byte [212]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[211] ,Byte [211]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[210] ,Byte [210]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[209] ,Byte [209]" group.long 0xE0++0x03 line.long 0x00 "RCI_TXRX_DATA53,Frame Data Send / Receive Register 53" hexmask.long.byte 0x00 24.--31. 1. " BYTE[216] ,Byte [216]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[215] ,Byte [215]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[214] ,Byte [214]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[213] ,Byte [213]" group.long 0xE4++0x03 line.long 0x00 "RCI_TXRX_DATA54,Frame Data Send / Receive Register 54" hexmask.long.byte 0x00 24.--31. 1. " BYTE[220] ,Byte [220]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[219] ,Byte [219]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[218] ,Byte [218]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[217] ,Byte [217]" group.long 0xE8++0x03 line.long 0x00 "RCI_TXRX_DATA55,Frame Data Send / Receive Register 55" hexmask.long.byte 0x00 24.--31. 1. " BYTE[224] ,Byte [224]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[223] ,Byte [223]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[222] ,Byte [222]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[221] ,Byte [221]" group.long 0xEC++0x03 line.long 0x00 "RCI_TXRX_DATA56,Frame Data Send / Receive Register 56" hexmask.long.byte 0x00 24.--31. 1. " BYTE[228] ,Byte [228]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[227] ,Byte [227]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[226] ,Byte [226]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[225] ,Byte [225]" group.long 0xF0++0x03 line.long 0x00 "RCI_TXRX_DATA57,Frame Data Send / Receive Register 57" hexmask.long.byte 0x00 24.--31. 1. " BYTE[232] ,Byte [232]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[231] ,Byte [231]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[230] ,Byte [230]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[229] ,Byte [229]" group.long 0xF4++0x03 line.long 0x00 "RCI_TXRX_DATA58,Frame Data Send / Receive Register 58" hexmask.long.byte 0x00 24.--31. 1. " BYTE[236] ,Byte [236]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[235] ,Byte [235]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[234] ,Byte [234]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[233] ,Byte [233]" group.long 0xF8++0x03 line.long 0x00 "RCI_TXRX_DATA59,Frame Data Send / Receive Register 59" hexmask.long.byte 0x00 24.--31. 1. " BYTE[240] ,Byte [240]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[239] ,Byte [239]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[238] ,Byte [238]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[237] ,Byte [237]" group.long 0xFC++0x03 line.long 0x00 "RCI_TXRX_DATA60,Frame Data Send / Receive Register 60" hexmask.long.byte 0x00 24.--31. 1. " BYTE[244] ,Byte [244]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[243] ,Byte [243]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[242] ,Byte [242]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[241] ,Byte [241]" group.long 0x100++0x03 line.long 0x00 "RCI_TXRX_DATA61,Frame Data Send / Receive Register 61" hexmask.long.byte 0x00 24.--31. 1. " BYTE[248] ,Byte [248]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[247] ,Byte [247]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[246] ,Byte [246]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[245] ,Byte [245]" group.long 0x104++0x03 line.long 0x00 "RCI_TXRX_DATA62,Frame Data Send / Receive Register 62" hexmask.long.byte 0x00 24.--31. 1. " BYTE[252] ,Byte [252]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[251] ,Byte [251]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[250] ,Byte [250]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[249] ,Byte [249]" group.long 0x108++0x03 line.long 0x00 "RCI_TXRX_DATA63,Frame Data Send / Receive Register 63" hexmask.long.byte 0x00 24.--31. 1. " BYTE[256] ,Byte [256]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[255] ,Byte [255]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[254] ,Byte [254]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[253] ,Byte [253]" group.long 0x10C++0x03 line.long 0x00 "RCI_TXRX_DATA64,Frame Data Send / Receive Register 64" hexmask.long.byte 0x00 24.--31. 1. " BYTE[260] ,Byte [260]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[259] ,Byte [259]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[258] ,Byte [258]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[257] ,Byte [257]" group.long 0x110++0x03 line.long 0x00 "RCI_TXRX_DATA65,Frame Data Send / Receive Register 65" hexmask.long.byte 0x00 24.--31. 1. " BYTE[264] ,Byte [264]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[263] ,Byte [263]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[262] ,Byte [262]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[261] ,Byte [261]" group.long 0x114++0x03 line.long 0x00 "RCI_TXRX_DATA66,Frame Data Send / Receive Register 66" hexmask.long.byte 0x00 24.--31. 1. " BYTE[268] ,Byte [268]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[267] ,Byte [267]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[266] ,Byte [266]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[265] ,Byte [265]" group.long 0x118++0x03 line.long 0x00 "RCI_TXRX_DATA67,Frame Data Send / Receive Register 67" hexmask.long.byte 0x00 24.--31. 1. " BYTE[272] ,Byte [272]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[271] ,Byte [271]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[270] ,Byte [270]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[269] ,Byte [269]" group.long 0x11C++0x03 line.long 0x00 "RCI_TXRX_DATA68,Frame Data Send / Receive Register 68" hexmask.long.byte 0x00 24.--31. 1. " BYTE[276] ,Byte [276]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[275] ,Byte [275]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[274] ,Byte [274]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[273] ,Byte [273]" group.long 0x120++0x03 line.long 0x00 "RCI_TXRX_DATA69,Frame Data Send / Receive Register 69" hexmask.long.byte 0x00 24.--31. 1. " BYTE[280] ,Byte [280]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[279] ,Byte [279]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[278] ,Byte [278]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[277] ,Byte [277]" group.long 0x124++0x03 line.long 0x00 "RCI_TXRX_DATA70,Frame Data Send / Receive Register 70" hexmask.long.byte 0x00 24.--31. 1. " BYTE[284] ,Byte [284]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[283] ,Byte [283]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[282] ,Byte [282]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[281] ,Byte [281]" group.long 0x128++0x03 line.long 0x00 "RCI_TXRX_DATA71,Frame Data Send / Receive Register 71" hexmask.long.byte 0x00 24.--31. 1. " BYTE[288] ,Byte [288]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[287] ,Byte [287]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[286] ,Byte [286]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[285] ,Byte [285]" group.long 0x12C++0x03 line.long 0x00 "RCI_TXRX_DATA72,Frame Data Send / Receive Register 72" hexmask.long.byte 0x00 24.--31. 1. " BYTE[292] ,Byte [292]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[291] ,Byte [291]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[290] ,Byte [290]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[289] ,Byte [289]" group.long 0x130++0x03 line.long 0x00 "RCI_TXRX_DATA73,Frame Data Send / Receive Register 73" hexmask.long.byte 0x00 24.--31. 1. " BYTE[296] ,Byte [296]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[295] ,Byte [295]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[294] ,Byte [294]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[293] ,Byte [293]" group.long 0x134++0x03 line.long 0x00 "RCI_TXRX_DATA74,Frame Data Send / Receive Register 74" hexmask.long.byte 0x00 24.--31. 1. " BYTE[300] ,Byte [300]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[299] ,Byte [299]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[298] ,Byte [298]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[297] ,Byte [297]" group.long 0x138++0x03 line.long 0x00 "RCI_TXRX_DATA75,Frame Data Send / Receive Register 75" hexmask.long.byte 0x00 24.--31. 1. " BYTE[304] ,Byte [304]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[303] ,Byte [303]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[302] ,Byte [302]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[301] ,Byte [301]" group.long 0x13C++0x03 line.long 0x00 "RCI_TXRX_DATA76,Frame Data Send / Receive Register 76" hexmask.long.byte 0x00 24.--31. 1. " BYTE[308] ,Byte [308]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[307] ,Byte [307]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[306] ,Byte [306]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[305] ,Byte [305]" group.long 0x140++0x03 line.long 0x00 "RCI_TXRX_DATA77,Frame Data Send / Receive Register 77" hexmask.long.byte 0x00 24.--31. 1. " BYTE[312] ,Byte [312]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[311] ,Byte [311]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[310] ,Byte [310]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[309] ,Byte [309]" group.long 0x144++0x03 line.long 0x00 "RCI_TXRX_DATA78,Frame Data Send / Receive Register 78" hexmask.long.byte 0x00 24.--31. 1. " BYTE[316] ,Byte [316]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[315] ,Byte [315]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[314] ,Byte [314]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[313] ,Byte [313]" group.long 0x148++0x03 line.long 0x00 "RCI_TXRX_DATA79,Frame Data Send / Receive Register 79" hexmask.long.byte 0x00 24.--31. 1. " BYTE[320] ,Byte [320]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[319] ,Byte [319]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[318] ,Byte [318]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[317] ,Byte [317]" group.long 0x14C++0x03 line.long 0x00 "RCI_TXRX_DATA80,Frame Data Send / Receive Register 80" hexmask.long.byte 0x00 24.--31. 1. " BYTE[324] ,Byte [324]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[323] ,Byte [323]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[322] ,Byte [322]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[321] ,Byte [321]" group.long 0x150++0x03 line.long 0x00 "RCI_TXRX_DATA81,Frame Data Send / Receive Register 81" hexmask.long.byte 0x00 24.--31. 1. " BYTE[328] ,Byte [328]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[327] ,Byte [327]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[326] ,Byte [326]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[325] ,Byte [325]" group.long 0x154++0x03 line.long 0x00 "RCI_TXRX_DATA82,Frame Data Send / Receive Register 82" hexmask.long.byte 0x00 24.--31. 1. " BYTE[332] ,Byte [332]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[331] ,Byte [331]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[330] ,Byte [330]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[329] ,Byte [329]" group.long 0x158++0x03 line.long 0x00 "RCI_TXRX_DATA83,Frame Data Send / Receive Register 83" hexmask.long.byte 0x00 24.--31. 1. " BYTE[336] ,Byte [336]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[335] ,Byte [335]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[334] ,Byte [334]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[333] ,Byte [333]" group.long 0x15C++0x03 line.long 0x00 "RCI_TXRX_DATA84,Frame Data Send / Receive Register 84" hexmask.long.byte 0x00 24.--31. 1. " BYTE[340] ,Byte [340]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[339] ,Byte [339]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[338] ,Byte [338]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[337] ,Byte [337]" group.long 0x160++0x03 line.long 0x00 "RCI_TXRX_DATA85,Frame Data Send / Receive Register 85" hexmask.long.byte 0x00 24.--31. 1. " BYTE[344] ,Byte [344]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[343] ,Byte [343]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[342] ,Byte [342]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[341] ,Byte [341]" group.long 0x164++0x03 line.long 0x00 "RCI_TXRX_DATA86,Frame Data Send / Receive Register 86" hexmask.long.byte 0x00 24.--31. 1. " BYTE[348] ,Byte [348]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[347] ,Byte [347]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[346] ,Byte [346]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[345] ,Byte [345]" group.long 0x168++0x03 line.long 0x00 "RCI_TXRX_DATA87,Frame Data Send / Receive Register 87" hexmask.long.byte 0x00 24.--31. 1. " BYTE[352] ,Byte [352]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[351] ,Byte [351]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[350] ,Byte [350]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[349] ,Byte [349]" group.long 0x16C++0x03 line.long 0x00 "RCI_TXRX_DATA88,Frame Data Send / Receive Register 88" hexmask.long.byte 0x00 24.--31. 1. " BYTE[356] ,Byte [356]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[355] ,Byte [355]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[354] ,Byte [354]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[353] ,Byte [353]" group.long 0x170++0x03 line.long 0x00 "RCI_TXRX_DATA89,Frame Data Send / Receive Register 89" hexmask.long.byte 0x00 24.--31. 1. " BYTE[360] ,Byte [360]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[359] ,Byte [359]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[358] ,Byte [358]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[357] ,Byte [357]" group.long 0x174++0x03 line.long 0x00 "RCI_TXRX_DATA90,Frame Data Send / Receive Register 90" hexmask.long.byte 0x00 24.--31. 1. " BYTE[364] ,Byte [364]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[363] ,Byte [363]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[362] ,Byte [362]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[361] ,Byte [361]" group.long 0x178++0x03 line.long 0x00 "RCI_TXRX_DATA91,Frame Data Send / Receive Register 91" hexmask.long.byte 0x00 24.--31. 1. " BYTE[368] ,Byte [368]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[367] ,Byte [367]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[366] ,Byte [366]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[365] ,Byte [365]" group.long 0x17C++0x03 line.long 0x00 "RCI_TXRX_DATA92,Frame Data Send / Receive Register 92" hexmask.long.byte 0x00 24.--31. 1. " BYTE[372] ,Byte [372]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[371] ,Byte [371]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[370] ,Byte [370]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[369] ,Byte [369]" group.long 0x180++0x03 line.long 0x00 "RCI_TXRX_DATA93,Frame Data Send / Receive Register 93" hexmask.long.byte 0x00 24.--31. 1. " BYTE[376] ,Byte [376]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[375] ,Byte [375]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[374] ,Byte [374]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[373] ,Byte [373]" group.long 0x184++0x03 line.long 0x00 "RCI_TXRX_DATA94,Frame Data Send / Receive Register 94" hexmask.long.byte 0x00 24.--31. 1. " BYTE[380] ,Byte [380]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[379] ,Byte [379]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[378] ,Byte [378]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[377] ,Byte [377]" group.long 0x188++0x03 line.long 0x00 "RCI_TXRX_DATA95,Frame Data Send / Receive Register 95" hexmask.long.byte 0x00 24.--31. 1. " BYTE[384] ,Byte [384]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[383] ,Byte [383]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[382] ,Byte [382]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[381] ,Byte [381]" group.long 0x18C++0x03 line.long 0x00 "RCI_TXRX_DATA96,Frame Data Send / Receive Register 96" hexmask.long.byte 0x00 24.--31. 1. " BYTE[388] ,Byte [388]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[387] ,Byte [387]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[386] ,Byte [386]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[385] ,Byte [385]" group.long 0x190++0x03 line.long 0x00 "RCI_TXRX_DATA97,Frame Data Send / Receive Register 97" hexmask.long.byte 0x00 24.--31. 1. " BYTE[392] ,Byte [392]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[391] ,Byte [391]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[390] ,Byte [390]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[389] ,Byte [389]" group.long 0x194++0x03 line.long 0x00 "RCI_TXRX_DATA98,Frame Data Send / Receive Register 98" hexmask.long.byte 0x00 24.--31. 1. " BYTE[396] ,Byte [396]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[395] ,Byte [395]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[394] ,Byte [394]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[393] ,Byte [393]" group.long 0x198++0x03 line.long 0x00 "RCI_TXRX_DATA99,Frame Data Send / Receive Register 99" hexmask.long.byte 0x00 24.--31. 1. " BYTE[400] ,Byte [400]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[399] ,Byte [399]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[398] ,Byte [398]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[397] ,Byte [397]" group.long 0x19C++0x03 line.long 0x00 "RCI_TXRX_DATA100,Frame Data Send / Receive Register 100" hexmask.long.byte 0x00 24.--31. 1. " BYTE[404] ,Byte [404]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[403] ,Byte [403]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[402] ,Byte [402]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[401] ,Byte [401]" group.long 0x1A0++0x03 line.long 0x00 "RCI_TXRX_DATA101,Frame Data Send / Receive Register 101" hexmask.long.byte 0x00 24.--31. 1. " BYTE[408] ,Byte [408]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[407] ,Byte [407]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[406] ,Byte [406]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[405] ,Byte [405]" group.long 0x1A4++0x03 line.long 0x00 "RCI_TXRX_DATA102,Frame Data Send / Receive Register 102" hexmask.long.byte 0x00 24.--31. 1. " BYTE[412] ,Byte [412]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[411] ,Byte [411]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[410] ,Byte [410]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[409] ,Byte [409]" group.long 0x1A8++0x03 line.long 0x00 "RCI_TXRX_DATA103,Frame Data Send / Receive Register 103" hexmask.long.byte 0x00 24.--31. 1. " BYTE[416] ,Byte [416]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[415] ,Byte [415]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[414] ,Byte [414]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[413] ,Byte [413]" group.long 0x1AC++0x03 line.long 0x00 "RCI_TXRX_DATA104,Frame Data Send / Receive Register 104" hexmask.long.byte 0x00 24.--31. 1. " BYTE[420] ,Byte [420]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[419] ,Byte [419]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[418] ,Byte [418]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[417] ,Byte [417]" group.long 0x1B0++0x03 line.long 0x00 "RCI_TXRX_DATA105,Frame Data Send / Receive Register 105" hexmask.long.byte 0x00 24.--31. 1. " BYTE[424] ,Byte [424]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[423] ,Byte [423]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[422] ,Byte [422]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[421] ,Byte [421]" group.long 0x1B4++0x03 line.long 0x00 "RCI_TXRX_DATA106,Frame Data Send / Receive Register 106" hexmask.long.byte 0x00 24.--31. 1. " BYTE[428] ,Byte [428]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[427] ,Byte [427]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[426] ,Byte [426]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[425] ,Byte [425]" group.long 0x1B8++0x03 line.long 0x00 "RCI_TXRX_DATA107,Frame Data Send / Receive Register 107" hexmask.long.byte 0x00 24.--31. 1. " BYTE[432] ,Byte [432]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[431] ,Byte [431]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[430] ,Byte [430]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[429] ,Byte [429]" group.long 0x1BC++0x03 line.long 0x00 "RCI_TXRX_DATA108,Frame Data Send / Receive Register 108" hexmask.long.byte 0x00 24.--31. 1. " BYTE[436] ,Byte [436]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[435] ,Byte [435]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[434] ,Byte [434]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[433] ,Byte [433]" group.long 0x1C0++0x03 line.long 0x00 "RCI_TXRX_DATA109,Frame Data Send / Receive Register 109" hexmask.long.byte 0x00 24.--31. 1. " BYTE[440] ,Byte [440]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[439] ,Byte [439]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[438] ,Byte [438]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[437] ,Byte [437]" group.long 0x1C4++0x03 line.long 0x00 "RCI_TXRX_DATA110,Frame Data Send / Receive Register 110" hexmask.long.byte 0x00 24.--31. 1. " BYTE[444] ,Byte [444]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[443] ,Byte [443]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[442] ,Byte [442]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[441] ,Byte [441]" group.long 0x1C8++0x03 line.long 0x00 "RCI_TXRX_DATA111,Frame Data Send / Receive Register 111" hexmask.long.byte 0x00 24.--31. 1. " BYTE[448] ,Byte [448]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[447] ,Byte [447]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[446] ,Byte [446]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[445] ,Byte [445]" group.long 0x1CC++0x03 line.long 0x00 "RCI_TXRX_DATA112,Frame Data Send / Receive Register 112" hexmask.long.byte 0x00 24.--31. 1. " BYTE[452] ,Byte [452]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[451] ,Byte [451]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[450] ,Byte [450]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[449] ,Byte [449]" group.long 0x1D0++0x03 line.long 0x00 "RCI_TXRX_DATA113,Frame Data Send / Receive Register 113" hexmask.long.byte 0x00 24.--31. 1. " BYTE[456] ,Byte [456]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[455] ,Byte [455]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[454] ,Byte [454]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[453] ,Byte [453]" group.long 0x1D4++0x03 line.long 0x00 "RCI_TXRX_DATA114,Frame Data Send / Receive Register 114" hexmask.long.byte 0x00 24.--31. 1. " BYTE[460] ,Byte [460]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[459] ,Byte [459]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[458] ,Byte [458]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[457] ,Byte [457]" group.long 0x1D8++0x03 line.long 0x00 "RCI_TXRX_DATA115,Frame Data Send / Receive Register 115" hexmask.long.byte 0x00 24.--31. 1. " BYTE[464] ,Byte [464]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[463] ,Byte [463]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[462] ,Byte [462]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[461] ,Byte [461]" group.long 0x1DC++0x03 line.long 0x00 "RCI_TXRX_DATA116,Frame Data Send / Receive Register 116" hexmask.long.byte 0x00 24.--31. 1. " BYTE[468] ,Byte [468]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[467] ,Byte [467]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[466] ,Byte [466]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[465] ,Byte [465]" group.long 0x1E0++0x03 line.long 0x00 "RCI_TXRX_DATA117,Frame Data Send / Receive Register 117" hexmask.long.byte 0x00 24.--31. 1. " BYTE[472] ,Byte [472]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[471] ,Byte [471]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[470] ,Byte [470]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[469] ,Byte [469]" group.long 0x1E4++0x03 line.long 0x00 "RCI_TXRX_DATA118,Frame Data Send / Receive Register 118" hexmask.long.byte 0x00 24.--31. 1. " BYTE[476] ,Byte [476]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[475] ,Byte [475]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[474] ,Byte [474]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[473] ,Byte [473]" group.long 0x1E8++0x03 line.long 0x00 "RCI_TXRX_DATA119,Frame Data Send / Receive Register 119" hexmask.long.byte 0x00 24.--31. 1. " BYTE[480] ,Byte [480]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[479] ,Byte [479]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[478] ,Byte [478]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[477] ,Byte [477]" group.long 0x1EC++0x03 line.long 0x00 "RCI_TXRX_DATA120,Frame Data Send / Receive Register 120" hexmask.long.byte 0x00 24.--31. 1. " BYTE[484] ,Byte [484]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[483] ,Byte [483]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[482] ,Byte [482]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[481] ,Byte [481]" group.long 0x1F0++0x03 line.long 0x00 "RCI_TXRX_DATA121,Frame Data Send / Receive Register 121" hexmask.long.byte 0x00 24.--31. 1. " BYTE[488] ,Byte [488]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[487] ,Byte [487]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[486] ,Byte [486]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[485] ,Byte [485]" group.long 0x1F4++0x03 line.long 0x00 "RCI_TXRX_DATA122,Frame Data Send / Receive Register 122" hexmask.long.byte 0x00 24.--31. 1. " BYTE[492] ,Byte [492]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[491] ,Byte [491]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[490] ,Byte [490]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[489] ,Byte [489]" group.long 0x1F8++0x03 line.long 0x00 "RCI_TXRX_DATA123,Frame Data Send / Receive Register 123" hexmask.long.byte 0x00 24.--31. 1. " BYTE[496] ,Byte [496]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[495] ,Byte [495]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[494] ,Byte [494]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[493] ,Byte [493]" group.long 0x1FC++0x03 line.long 0x00 "RCI_TXRX_DATA124,Frame Data Send / Receive Register 124" hexmask.long.byte 0x00 24.--31. 1. " BYTE[500] ,Byte [500]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[499] ,Byte [499]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[498] ,Byte [498]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[497] ,Byte [497]" group.long 0x200++0x03 line.long 0x00 "RCI_TXRX_DATA125,Frame Data Send / Receive Register 125" hexmask.long.byte 0x00 24.--31. 1. " BYTE[504] ,Byte [504]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[503] ,Byte [503]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[502] ,Byte [502]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[501] ,Byte [501]" group.long 0x204++0x03 line.long 0x00 "RCI_TXRX_DATA126,Frame Data Send / Receive Register 126" hexmask.long.byte 0x00 24.--31. 1. " BYTE[508] ,Byte [508]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[507] ,Byte [507]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[506] ,Byte [506]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[505] ,Byte [505]" group.long 0x208++0x03 line.long 0x00 "RCI_TXRX_DATA127,Frame Data Send / Receive Register 127" hexmask.long.byte 0x00 24.--31. 1. " BYTE[512] ,Byte [512]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[511] ,Byte [511]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[510] ,Byte [510]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[509] ,Byte [509]" group.long 0x20C++0x03 line.long 0x00 "RCI_TXRX_DATA128,Frame Data Send / Receive Register 128" hexmask.long.byte 0x00 24.--31. 1. " BYTE[516] ,Byte [516]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[515] ,Byte [515]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[514] ,Byte [514]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[513] ,Byte [513]" group.long 0x210++0x03 line.long 0x00 "RCI_TXRX_DATA129,Frame Data Send / Receive Register 129" hexmask.long.byte 0x00 24.--31. 1. " BYTE[520] ,Byte [520]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[519] ,Byte [519]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[518] ,Byte [518]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[517] ,Byte [517]" group.long 0x214++0x03 line.long 0x00 "RCI_TXRX_DATA130,Frame Data Send / Receive Register 130" hexmask.long.byte 0x00 24.--31. 1. " BYTE[524] ,Byte [524]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[523] ,Byte [523]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[522] ,Byte [522]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[521] ,Byte [521]" group.long 0x218++0x03 line.long 0x00 "RCI_TXRX_DATA131,Frame Data Send / Receive Register 131" hexmask.long.byte 0x00 24.--31. 1. " BYTE[528] ,Byte [528]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[527] ,Byte [527]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[526] ,Byte [526]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[525] ,Byte [525]" group.long 0x21C++0x03 line.long 0x00 "RCI_TXRX_DATA132,Frame Data Send / Receive Register 132" hexmask.long.byte 0x00 24.--31. 1. " BYTE[532] ,Byte [532]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[531] ,Byte [531]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[530] ,Byte [530]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[529] ,Byte [529]" group.long 0x220++0x03 line.long 0x00 "RCI_TXRX_DATA133,Frame Data Send / Receive Register 133" hexmask.long.byte 0x00 24.--31. 1. " BYTE[536] ,Byte [536]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[535] ,Byte [535]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[534] ,Byte [534]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[533] ,Byte [533]" group.long 0x224++0x03 line.long 0x00 "RCI_TXRX_DATA134,Frame Data Send / Receive Register 134" hexmask.long.byte 0x00 24.--31. 1. " BYTE[540] ,Byte [540]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[539] ,Byte [539]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[538] ,Byte [538]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[537] ,Byte [537]" group.long 0x228++0x03 line.long 0x00 "RCI_TXRX_DATA135,Frame Data Send / Receive Register 135" hexmask.long.byte 0x00 24.--31. 1. " BYTE[544] ,Byte [544]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[543] ,Byte [543]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[542] ,Byte [542]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[541] ,Byte [541]" group.long 0x22C++0x03 line.long 0x00 "RCI_TXRX_DATA136,Frame Data Send / Receive Register 136" hexmask.long.byte 0x00 24.--31. 1. " BYTE[548] ,Byte [548]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[547] ,Byte [547]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[546] ,Byte [546]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[545] ,Byte [545]" group.long 0x230++0x03 line.long 0x00 "RCI_TXRX_DATA137,Frame Data Send / Receive Register 137" hexmask.long.byte 0x00 24.--31. 1. " BYTE[552] ,Byte [552]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[551] ,Byte [551]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[550] ,Byte [550]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[549] ,Byte [549]" group.long 0x234++0x03 line.long 0x00 "RCI_TXRX_DATA138,Frame Data Send / Receive Register 138" hexmask.long.byte 0x00 24.--31. 1. " BYTE[556] ,Byte [556]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[555] ,Byte [555]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[554] ,Byte [554]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[553] ,Byte [553]" group.long 0x238++0x03 line.long 0x00 "RCI_TXRX_DATA139,Frame Data Send / Receive Register 139" hexmask.long.byte 0x00 24.--31. 1. " BYTE[560] ,Byte [560]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[559] ,Byte [559]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[558] ,Byte [558]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[557] ,Byte [557]" group.long 0x23C++0x03 line.long 0x00 "RCI_TXRX_DATA140,Frame Data Send / Receive Register 140" hexmask.long.byte 0x00 24.--31. 1. " BYTE[564] ,Byte [564]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[563] ,Byte [563]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[562] ,Byte [562]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[561] ,Byte [561]" group.long 0x240++0x03 line.long 0x00 "RCI_TXRX_DATA141,Frame Data Send / Receive Register 141" hexmask.long.byte 0x00 24.--31. 1. " BYTE[568] ,Byte [568]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[567] ,Byte [567]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[566] ,Byte [566]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[565] ,Byte [565]" group.long 0x244++0x03 line.long 0x00 "RCI_TXRX_DATA142,Frame Data Send / Receive Register 142" hexmask.long.byte 0x00 24.--31. 1. " BYTE[572] ,Byte [572]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[571] ,Byte [571]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[570] ,Byte [570]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[569] ,Byte [569]" group.long 0x248++0x03 line.long 0x00 "RCI_TXRX_DATA143,Frame Data Send / Receive Register 143" hexmask.long.byte 0x00 24.--31. 1. " BYTE[576] ,Byte [576]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[575] ,Byte [575]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[574] ,Byte [574]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[573] ,Byte [573]" group.long 0x24C++0x03 line.long 0x00 "RCI_TXRX_DATA144,Frame Data Send / Receive Register 144" hexmask.long.byte 0x00 24.--31. 1. " BYTE[580] ,Byte [580]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[579] ,Byte [579]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[578] ,Byte [578]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[577] ,Byte [577]" group.long 0x250++0x03 line.long 0x00 "RCI_TXRX_DATA145,Frame Data Send / Receive Register 145" hexmask.long.byte 0x00 24.--31. 1. " BYTE[584] ,Byte [584]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[583] ,Byte [583]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[582] ,Byte [582]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[581] ,Byte [581]" group.long 0x254++0x03 line.long 0x00 "RCI_TXRX_DATA146,Frame Data Send / Receive Register 146" hexmask.long.byte 0x00 24.--31. 1. " BYTE[588] ,Byte [588]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[587] ,Byte [587]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[586] ,Byte [586]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[585] ,Byte [585]" group.long 0x258++0x03 line.long 0x00 "RCI_TXRX_DATA147,Frame Data Send / Receive Register 147" hexmask.long.byte 0x00 24.--31. 1. " BYTE[592] ,Byte [592]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[591] ,Byte [591]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[590] ,Byte [590]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[589] ,Byte [589]" group.long 0x25C++0x03 line.long 0x00 "RCI_TXRX_DATA148,Frame Data Send / Receive Register 148" hexmask.long.byte 0x00 24.--31. 1. " BYTE[596] ,Byte [596]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[595] ,Byte [595]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[594] ,Byte [594]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[593] ,Byte [593]" group.long 0x260++0x03 line.long 0x00 "RCI_TXRX_DATA149,Frame Data Send / Receive Register 149" hexmask.long.byte 0x00 24.--31. 1. " BYTE[600] ,Byte [600]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[599] ,Byte [599]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[598] ,Byte [598]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[597] ,Byte [597]" group.long 0x264++0x03 line.long 0x00 "RCI_TXRX_DATA150,Frame Data Send / Receive Register 150" hexmask.long.byte 0x00 24.--31. 1. " BYTE[604] ,Byte [604]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[603] ,Byte [603]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[602] ,Byte [602]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[601] ,Byte [601]" group.long 0x268++0x03 line.long 0x00 "RCI_TXRX_DATA151,Frame Data Send / Receive Register 151" hexmask.long.byte 0x00 24.--31. 1. " BYTE[608] ,Byte [608]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[607] ,Byte [607]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[606] ,Byte [606]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[605] ,Byte [605]" group.long 0x26C++0x03 line.long 0x00 "RCI_TXRX_DATA152,Frame Data Send / Receive Register 152" hexmask.long.byte 0x00 24.--31. 1. " BYTE[612] ,Byte [612]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[611] ,Byte [611]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[610] ,Byte [610]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[609] ,Byte [609]" group.long 0x270++0x03 line.long 0x00 "RCI_TXRX_DATA153,Frame Data Send / Receive Register 153" hexmask.long.byte 0x00 24.--31. 1. " BYTE[616] ,Byte [616]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[615] ,Byte [615]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[614] ,Byte [614]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[613] ,Byte [613]" group.long 0x274++0x03 line.long 0x00 "RCI_TXRX_DATA154,Frame Data Send / Receive Register 154" hexmask.long.byte 0x00 24.--31. 1. " BYTE[620] ,Byte [620]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[619] ,Byte [619]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[618] ,Byte [618]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[617] ,Byte [617]" group.long 0x278++0x03 line.long 0x00 "RCI_TXRX_DATA155,Frame Data Send / Receive Register 155" hexmask.long.byte 0x00 24.--31. 1. " BYTE[624] ,Byte [624]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[623] ,Byte [623]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[622] ,Byte [622]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[621] ,Byte [621]" group.long 0x27C++0x03 line.long 0x00 "RCI_TXRX_DATA156,Frame Data Send / Receive Register 156" hexmask.long.byte 0x00 24.--31. 1. " BYTE[628] ,Byte [628]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[627] ,Byte [627]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[626] ,Byte [626]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[625] ,Byte [625]" group.long 0x280++0x03 line.long 0x00 "RCI_TXRX_DATA157,Frame Data Send / Receive Register 157" hexmask.long.byte 0x00 24.--31. 1. " BYTE[632] ,Byte [632]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[631] ,Byte [631]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[630] ,Byte [630]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[629] ,Byte [629]" group.long 0x284++0x03 line.long 0x00 "RCI_TXRX_DATA158,Frame Data Send / Receive Register 158" hexmask.long.byte 0x00 24.--31. 1. " BYTE[636] ,Byte [636]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[635] ,Byte [635]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[634] ,Byte [634]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[633] ,Byte [633]" group.long 0x288++0x03 line.long 0x00 "RCI_TXRX_DATA159,Frame Data Send / Receive Register 159" hexmask.long.byte 0x00 24.--31. 1. " BYTE[640] ,Byte [640]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[639] ,Byte [639]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[638] ,Byte [638]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[637] ,Byte [637]" group.long 0x28C++0x03 line.long 0x00 "RCI_TXRX_DATA160,Frame Data Send / Receive Register 160" hexmask.long.byte 0x00 24.--31. 1. " BYTE[644] ,Byte [644]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[643] ,Byte [643]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[642] ,Byte [642]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[641] ,Byte [641]" group.long 0x290++0x03 line.long 0x00 "RCI_TXRX_DATA161,Frame Data Send / Receive Register 161" hexmask.long.byte 0x00 24.--31. 1. " BYTE[648] ,Byte [648]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[647] ,Byte [647]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[646] ,Byte [646]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[645] ,Byte [645]" group.long 0x294++0x03 line.long 0x00 "RCI_TXRX_DATA162,Frame Data Send / Receive Register 162" hexmask.long.byte 0x00 24.--31. 1. " BYTE[652] ,Byte [652]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[651] ,Byte [651]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[650] ,Byte [650]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[649] ,Byte [649]" group.long 0x298++0x03 line.long 0x00 "RCI_TXRX_DATA163,Frame Data Send / Receive Register 163" hexmask.long.byte 0x00 24.--31. 1. " BYTE[656] ,Byte [656]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[655] ,Byte [655]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[654] ,Byte [654]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[653] ,Byte [653]" group.long 0x29C++0x03 line.long 0x00 "RCI_TXRX_DATA164,Frame Data Send / Receive Register 164" hexmask.long.byte 0x00 24.--31. 1. " BYTE[660] ,Byte [660]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[659] ,Byte [659]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[658] ,Byte [658]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[657] ,Byte [657]" group.long 0x2A0++0x03 line.long 0x00 "RCI_TXRX_DATA165,Frame Data Send / Receive Register 165" hexmask.long.byte 0x00 24.--31. 1. " BYTE[664] ,Byte [664]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[663] ,Byte [663]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[662] ,Byte [662]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[661] ,Byte [661]" group.long 0x2A4++0x03 line.long 0x00 "RCI_TXRX_DATA166,Frame Data Send / Receive Register 166" hexmask.long.byte 0x00 24.--31. 1. " BYTE[668] ,Byte [668]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[667] ,Byte [667]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[666] ,Byte [666]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[665] ,Byte [665]" group.long 0x2A8++0x03 line.long 0x00 "RCI_TXRX_DATA167,Frame Data Send / Receive Register 167" hexmask.long.byte 0x00 24.--31. 1. " BYTE[672] ,Byte [672]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[671] ,Byte [671]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[670] ,Byte [670]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[669] ,Byte [669]" group.long 0x2AC++0x03 line.long 0x00 "RCI_TXRX_DATA168,Frame Data Send / Receive Register 168" hexmask.long.byte 0x00 24.--31. 1. " BYTE[676] ,Byte [676]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[675] ,Byte [675]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[674] ,Byte [674]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[673] ,Byte [673]" group.long 0x2B0++0x03 line.long 0x00 "RCI_TXRX_DATA169,Frame Data Send / Receive Register 169" hexmask.long.byte 0x00 24.--31. 1. " BYTE[680] ,Byte [680]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[679] ,Byte [679]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[678] ,Byte [678]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[677] ,Byte [677]" group.long 0x2B4++0x03 line.long 0x00 "RCI_TXRX_DATA170,Frame Data Send / Receive Register 170" hexmask.long.byte 0x00 24.--31. 1. " BYTE[684] ,Byte [684]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[683] ,Byte [683]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[682] ,Byte [682]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[681] ,Byte [681]" group.long 0x2B8++0x03 line.long 0x00 "RCI_TXRX_DATA171,Frame Data Send / Receive Register 171" hexmask.long.byte 0x00 24.--31. 1. " BYTE[688] ,Byte [688]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[687] ,Byte [687]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[686] ,Byte [686]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[685] ,Byte [685]" group.long 0x2BC++0x03 line.long 0x00 "RCI_TXRX_DATA172,Frame Data Send / Receive Register 172" hexmask.long.byte 0x00 24.--31. 1. " BYTE[692] ,Byte [692]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[691] ,Byte [691]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[690] ,Byte [690]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[689] ,Byte [689]" group.long 0x2C0++0x03 line.long 0x00 "RCI_TXRX_DATA173,Frame Data Send / Receive Register 173" hexmask.long.byte 0x00 24.--31. 1. " BYTE[696] ,Byte [696]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[695] ,Byte [695]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[694] ,Byte [694]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[693] ,Byte [693]" group.long 0x2C4++0x03 line.long 0x00 "RCI_TXRX_DATA174,Frame Data Send / Receive Register 174" hexmask.long.byte 0x00 24.--31. 1. " BYTE[700] ,Byte [700]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[699] ,Byte [699]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[698] ,Byte [698]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[697] ,Byte [697]" group.long 0x2C8++0x03 line.long 0x00 "RCI_TXRX_DATA175,Frame Data Send / Receive Register 175" hexmask.long.byte 0x00 24.--31. 1. " BYTE[704] ,Byte [704]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[703] ,Byte [703]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[702] ,Byte [702]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[701] ,Byte [701]" group.long 0x2CC++0x03 line.long 0x00 "RCI_TXRX_DATA176,Frame Data Send / Receive Register 176" hexmask.long.byte 0x00 24.--31. 1. " BYTE[708] ,Byte [708]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[707] ,Byte [707]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[706] ,Byte [706]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[705] ,Byte [705]" group.long 0x2D0++0x03 line.long 0x00 "RCI_TXRX_DATA177,Frame Data Send / Receive Register 177" hexmask.long.byte 0x00 24.--31. 1. " BYTE[712] ,Byte [712]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[711] ,Byte [711]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[710] ,Byte [710]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[709] ,Byte [709]" group.long 0x2D4++0x03 line.long 0x00 "RCI_TXRX_DATA178,Frame Data Send / Receive Register 178" hexmask.long.byte 0x00 24.--31. 1. " BYTE[716] ,Byte [716]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[715] ,Byte [715]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[714] ,Byte [714]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[713] ,Byte [713]" group.long 0x2D8++0x03 line.long 0x00 "RCI_TXRX_DATA179,Frame Data Send / Receive Register 179" hexmask.long.byte 0x00 24.--31. 1. " BYTE[720] ,Byte [720]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[719] ,Byte [719]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[718] ,Byte [718]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[717] ,Byte [717]" group.long 0x2DC++0x03 line.long 0x00 "RCI_TXRX_DATA180,Frame Data Send / Receive Register 180" hexmask.long.byte 0x00 24.--31. 1. " BYTE[724] ,Byte [724]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[723] ,Byte [723]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[722] ,Byte [722]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[721] ,Byte [721]" group.long 0x2E0++0x03 line.long 0x00 "RCI_TXRX_DATA181,Frame Data Send / Receive Register 181" hexmask.long.byte 0x00 24.--31. 1. " BYTE[728] ,Byte [728]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[727] ,Byte [727]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[726] ,Byte [726]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[725] ,Byte [725]" group.long 0x2E4++0x03 line.long 0x00 "RCI_TXRX_DATA182,Frame Data Send / Receive Register 182" hexmask.long.byte 0x00 24.--31. 1. " BYTE[732] ,Byte [732]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[731] ,Byte [731]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[730] ,Byte [730]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[729] ,Byte [729]" group.long 0x2E8++0x03 line.long 0x00 "RCI_TXRX_DATA183,Frame Data Send / Receive Register 183" hexmask.long.byte 0x00 24.--31. 1. " BYTE[736] ,Byte [736]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[735] ,Byte [735]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[734] ,Byte [734]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[733] ,Byte [733]" group.long 0x2EC++0x03 line.long 0x00 "RCI_TXRX_DATA184,Frame Data Send / Receive Register 184" hexmask.long.byte 0x00 24.--31. 1. " BYTE[740] ,Byte [740]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[739] ,Byte [739]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[738] ,Byte [738]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[737] ,Byte [737]" group.long 0x2F0++0x03 line.long 0x00 "RCI_TXRX_DATA185,Frame Data Send / Receive Register 185" hexmask.long.byte 0x00 24.--31. 1. " BYTE[744] ,Byte [744]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[743] ,Byte [743]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[742] ,Byte [742]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[741] ,Byte [741]" group.long 0x2F4++0x03 line.long 0x00 "RCI_TXRX_DATA186,Frame Data Send / Receive Register 186" hexmask.long.byte 0x00 24.--31. 1. " BYTE[748] ,Byte [748]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[747] ,Byte [747]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[746] ,Byte [746]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[745] ,Byte [745]" group.long 0x2F8++0x03 line.long 0x00 "RCI_TXRX_DATA187,Frame Data Send / Receive Register 187" hexmask.long.byte 0x00 24.--31. 1. " BYTE[752] ,Byte [752]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[751] ,Byte [751]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[750] ,Byte [750]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[749] ,Byte [749]" group.long 0x2FC++0x03 line.long 0x00 "RCI_TXRX_DATA188,Frame Data Send / Receive Register 188" hexmask.long.byte 0x00 24.--31. 1. " BYTE[756] ,Byte [756]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[755] ,Byte [755]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[754] ,Byte [754]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[753] ,Byte [753]" group.long 0x300++0x03 line.long 0x00 "RCI_TXRX_DATA189,Frame Data Send / Receive Register 189" hexmask.long.byte 0x00 24.--31. 1. " BYTE[760] ,Byte [760]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[759] ,Byte [759]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[758] ,Byte [758]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[757] ,Byte [757]" group.long 0x304++0x03 line.long 0x00 "RCI_TXRX_DATA190,Frame Data Send / Receive Register 190" hexmask.long.byte 0x00 24.--31. 1. " BYTE[764] ,Byte [764]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[763] ,Byte [763]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[762] ,Byte [762]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[761] ,Byte [761]" group.long 0x308++0x03 line.long 0x00 "RCI_TXRX_DATA191,Frame Data Send / Receive Register 191" hexmask.long.byte 0x00 24.--31. 1. " BYTE[768] ,Byte [768]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[767] ,Byte [767]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[766] ,Byte [766]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[765] ,Byte [765]" group.long 0x30C++0x03 line.long 0x00 "RCI_TXRX_DATA192,Frame Data Send / Receive Register 192" hexmask.long.byte 0x00 24.--31. 1. " BYTE[772] ,Byte [772]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[771] ,Byte [771]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[770] ,Byte [770]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[769] ,Byte [769]" group.long 0x310++0x03 line.long 0x00 "RCI_TXRX_DATA193,Frame Data Send / Receive Register 193" hexmask.long.byte 0x00 24.--31. 1. " BYTE[776] ,Byte [776]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[775] ,Byte [775]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[774] ,Byte [774]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[773] ,Byte [773]" group.long 0x314++0x03 line.long 0x00 "RCI_TXRX_DATA194,Frame Data Send / Receive Register 194" hexmask.long.byte 0x00 24.--31. 1. " BYTE[780] ,Byte [780]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[779] ,Byte [779]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[778] ,Byte [778]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[777] ,Byte [777]" group.long 0x318++0x03 line.long 0x00 "RCI_TXRX_DATA195,Frame Data Send / Receive Register 195" hexmask.long.byte 0x00 24.--31. 1. " BYTE[784] ,Byte [784]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[783] ,Byte [783]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[782] ,Byte [782]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[781] ,Byte [781]" group.long 0x31C++0x03 line.long 0x00 "RCI_TXRX_DATA196,Frame Data Send / Receive Register 196" hexmask.long.byte 0x00 24.--31. 1. " BYTE[788] ,Byte [788]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[787] ,Byte [787]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[786] ,Byte [786]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[785] ,Byte [785]" group.long 0x320++0x03 line.long 0x00 "RCI_TXRX_DATA197,Frame Data Send / Receive Register 197" hexmask.long.byte 0x00 24.--31. 1. " BYTE[792] ,Byte [792]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[791] ,Byte [791]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[790] ,Byte [790]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[789] ,Byte [789]" group.long 0x324++0x03 line.long 0x00 "RCI_TXRX_DATA198,Frame Data Send / Receive Register 198" hexmask.long.byte 0x00 24.--31. 1. " BYTE[796] ,Byte [796]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[795] ,Byte [795]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[794] ,Byte [794]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[793] ,Byte [793]" group.long 0x328++0x03 line.long 0x00 "RCI_TXRX_DATA199,Frame Data Send / Receive Register 199" hexmask.long.byte 0x00 24.--31. 1. " BYTE[800] ,Byte [800]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[799] ,Byte [799]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[798] ,Byte [798]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[797] ,Byte [797]" group.long 0x32C++0x03 line.long 0x00 "RCI_TXRX_DATA200,Frame Data Send / Receive Register 200" hexmask.long.byte 0x00 24.--31. 1. " BYTE[804] ,Byte [804]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[803] ,Byte [803]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[802] ,Byte [802]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[801] ,Byte [801]" group.long 0x330++0x03 line.long 0x00 "RCI_TXRX_DATA201,Frame Data Send / Receive Register 201" hexmask.long.byte 0x00 24.--31. 1. " BYTE[808] ,Byte [808]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[807] ,Byte [807]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[806] ,Byte [806]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[805] ,Byte [805]" group.long 0x334++0x03 line.long 0x00 "RCI_TXRX_DATA202,Frame Data Send / Receive Register 202" hexmask.long.byte 0x00 24.--31. 1. " BYTE[812] ,Byte [812]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[811] ,Byte [811]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[810] ,Byte [810]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[809] ,Byte [809]" group.long 0x338++0x03 line.long 0x00 "RCI_TXRX_DATA203,Frame Data Send / Receive Register 203" hexmask.long.byte 0x00 24.--31. 1. " BYTE[816] ,Byte [816]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[815] ,Byte [815]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[814] ,Byte [814]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[813] ,Byte [813]" group.long 0x33C++0x03 line.long 0x00 "RCI_TXRX_DATA204,Frame Data Send / Receive Register 204" hexmask.long.byte 0x00 24.--31. 1. " BYTE[820] ,Byte [820]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[819] ,Byte [819]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[818] ,Byte [818]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[817] ,Byte [817]" group.long 0x340++0x03 line.long 0x00 "RCI_TXRX_DATA205,Frame Data Send / Receive Register 205" hexmask.long.byte 0x00 24.--31. 1. " BYTE[824] ,Byte [824]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[823] ,Byte [823]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[822] ,Byte [822]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[821] ,Byte [821]" group.long 0x344++0x03 line.long 0x00 "RCI_TXRX_DATA206,Frame Data Send / Receive Register 206" hexmask.long.byte 0x00 24.--31. 1. " BYTE[828] ,Byte [828]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[827] ,Byte [827]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[826] ,Byte [826]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[825] ,Byte [825]" group.long 0x348++0x03 line.long 0x00 "RCI_TXRX_DATA207,Frame Data Send / Receive Register 207" hexmask.long.byte 0x00 24.--31. 1. " BYTE[832] ,Byte [832]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[831] ,Byte [831]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[830] ,Byte [830]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[829] ,Byte [829]" group.long 0x34C++0x03 line.long 0x00 "RCI_TXRX_DATA208,Frame Data Send / Receive Register 208" hexmask.long.byte 0x00 24.--31. 1. " BYTE[836] ,Byte [836]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[835] ,Byte [835]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[834] ,Byte [834]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[833] ,Byte [833]" group.long 0x350++0x03 line.long 0x00 "RCI_TXRX_DATA209,Frame Data Send / Receive Register 209" hexmask.long.byte 0x00 24.--31. 1. " BYTE[840] ,Byte [840]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[839] ,Byte [839]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[838] ,Byte [838]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[837] ,Byte [837]" group.long 0x354++0x03 line.long 0x00 "RCI_TXRX_DATA210,Frame Data Send / Receive Register 210" hexmask.long.byte 0x00 24.--31. 1. " BYTE[844] ,Byte [844]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[843] ,Byte [843]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[842] ,Byte [842]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[841] ,Byte [841]" group.long 0x358++0x03 line.long 0x00 "RCI_TXRX_DATA211,Frame Data Send / Receive Register 211" hexmask.long.byte 0x00 24.--31. 1. " BYTE[848] ,Byte [848]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[847] ,Byte [847]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[846] ,Byte [846]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[845] ,Byte [845]" group.long 0x35C++0x03 line.long 0x00 "RCI_TXRX_DATA212,Frame Data Send / Receive Register 212" hexmask.long.byte 0x00 24.--31. 1. " BYTE[852] ,Byte [852]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[851] ,Byte [851]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[850] ,Byte [850]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[849] ,Byte [849]" group.long 0x360++0x03 line.long 0x00 "RCI_TXRX_DATA213,Frame Data Send / Receive Register 213" hexmask.long.byte 0x00 24.--31. 1. " BYTE[856] ,Byte [856]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[855] ,Byte [855]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[854] ,Byte [854]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[853] ,Byte [853]" group.long 0x364++0x03 line.long 0x00 "RCI_TXRX_DATA214,Frame Data Send / Receive Register 214" hexmask.long.byte 0x00 24.--31. 1. " BYTE[860] ,Byte [860]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[859] ,Byte [859]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[858] ,Byte [858]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[857] ,Byte [857]" group.long 0x368++0x03 line.long 0x00 "RCI_TXRX_DATA215,Frame Data Send / Receive Register 215" hexmask.long.byte 0x00 24.--31. 1. " BYTE[864] ,Byte [864]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[863] ,Byte [863]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[862] ,Byte [862]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[861] ,Byte [861]" group.long 0x36C++0x03 line.long 0x00 "RCI_TXRX_DATA216,Frame Data Send / Receive Register 216" hexmask.long.byte 0x00 24.--31. 1. " BYTE[868] ,Byte [868]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[867] ,Byte [867]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[866] ,Byte [866]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[865] ,Byte [865]" group.long 0x370++0x03 line.long 0x00 "RCI_TXRX_DATA217,Frame Data Send / Receive Register 217" hexmask.long.byte 0x00 24.--31. 1. " BYTE[872] ,Byte [872]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[871] ,Byte [871]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[870] ,Byte [870]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[869] ,Byte [869]" group.long 0x374++0x03 line.long 0x00 "RCI_TXRX_DATA218,Frame Data Send / Receive Register 218" hexmask.long.byte 0x00 24.--31. 1. " BYTE[876] ,Byte [876]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[875] ,Byte [875]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[874] ,Byte [874]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[873] ,Byte [873]" group.long 0x378++0x03 line.long 0x00 "RCI_TXRX_DATA219,Frame Data Send / Receive Register 219" hexmask.long.byte 0x00 24.--31. 1. " BYTE[880] ,Byte [880]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[879] ,Byte [879]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[878] ,Byte [878]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[877] ,Byte [877]" group.long 0x37C++0x03 line.long 0x00 "RCI_TXRX_DATA220,Frame Data Send / Receive Register 220" hexmask.long.byte 0x00 24.--31. 1. " BYTE[884] ,Byte [884]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[883] ,Byte [883]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[882] ,Byte [882]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[881] ,Byte [881]" group.long 0x380++0x03 line.long 0x00 "RCI_TXRX_DATA221,Frame Data Send / Receive Register 221" hexmask.long.byte 0x00 24.--31. 1. " BYTE[888] ,Byte [888]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[887] ,Byte [887]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[886] ,Byte [886]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[885] ,Byte [885]" group.long 0x384++0x03 line.long 0x00 "RCI_TXRX_DATA222,Frame Data Send / Receive Register 222" hexmask.long.byte 0x00 24.--31. 1. " BYTE[892] ,Byte [892]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[891] ,Byte [891]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[890] ,Byte [890]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[889] ,Byte [889]" group.long 0x388++0x03 line.long 0x00 "RCI_TXRX_DATA223,Frame Data Send / Receive Register 223" hexmask.long.byte 0x00 24.--31. 1. " BYTE[896] ,Byte [896]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[895] ,Byte [895]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[894] ,Byte [894]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[893] ,Byte [893]" group.long 0x38C++0x03 line.long 0x00 "RCI_TXRX_DATA224,Frame Data Send / Receive Register 224" hexmask.long.byte 0x00 24.--31. 1. " BYTE[900] ,Byte [900]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[899] ,Byte [899]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[898] ,Byte [898]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[897] ,Byte [897]" group.long 0x390++0x03 line.long 0x00 "RCI_TXRX_DATA225,Frame Data Send / Receive Register 225" hexmask.long.byte 0x00 24.--31. 1. " BYTE[904] ,Byte [904]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[903] ,Byte [903]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[902] ,Byte [902]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[901] ,Byte [901]" group.long 0x394++0x03 line.long 0x00 "RCI_TXRX_DATA226,Frame Data Send / Receive Register 226" hexmask.long.byte 0x00 24.--31. 1. " BYTE[908] ,Byte [908]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[907] ,Byte [907]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[906] ,Byte [906]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[905] ,Byte [905]" group.long 0x398++0x03 line.long 0x00 "RCI_TXRX_DATA227,Frame Data Send / Receive Register 227" hexmask.long.byte 0x00 24.--31. 1. " BYTE[912] ,Byte [912]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[911] ,Byte [911]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[910] ,Byte [910]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[909] ,Byte [909]" group.long 0x39C++0x03 line.long 0x00 "RCI_TXRX_DATA228,Frame Data Send / Receive Register 228" hexmask.long.byte 0x00 24.--31. 1. " BYTE[916] ,Byte [916]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[915] ,Byte [915]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[914] ,Byte [914]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[913] ,Byte [913]" group.long 0x3A0++0x03 line.long 0x00 "RCI_TXRX_DATA229,Frame Data Send / Receive Register 229" hexmask.long.byte 0x00 24.--31. 1. " BYTE[920] ,Byte [920]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[919] ,Byte [919]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[918] ,Byte [918]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[917] ,Byte [917]" group.long 0x3A4++0x03 line.long 0x00 "RCI_TXRX_DATA230,Frame Data Send / Receive Register 230" hexmask.long.byte 0x00 24.--31. 1. " BYTE[924] ,Byte [924]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[923] ,Byte [923]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[922] ,Byte [922]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[921] ,Byte [921]" group.long 0x3A8++0x03 line.long 0x00 "RCI_TXRX_DATA231,Frame Data Send / Receive Register 231" hexmask.long.byte 0x00 24.--31. 1. " BYTE[928] ,Byte [928]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[927] ,Byte [927]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[926] ,Byte [926]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[925] ,Byte [925]" group.long 0x3AC++0x03 line.long 0x00 "RCI_TXRX_DATA232,Frame Data Send / Receive Register 232" hexmask.long.byte 0x00 24.--31. 1. " BYTE[932] ,Byte [932]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[931] ,Byte [931]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[930] ,Byte [930]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[929] ,Byte [929]" group.long 0x3B0++0x03 line.long 0x00 "RCI_TXRX_DATA233,Frame Data Send / Receive Register 233" hexmask.long.byte 0x00 24.--31. 1. " BYTE[936] ,Byte [936]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[935] ,Byte [935]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[934] ,Byte [934]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[933] ,Byte [933]" group.long 0x3B4++0x03 line.long 0x00 "RCI_TXRX_DATA234,Frame Data Send / Receive Register 234" hexmask.long.byte 0x00 24.--31. 1. " BYTE[940] ,Byte [940]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[939] ,Byte [939]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[938] ,Byte [938]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[937] ,Byte [937]" group.long 0x3B8++0x03 line.long 0x00 "RCI_TXRX_DATA235,Frame Data Send / Receive Register 235" hexmask.long.byte 0x00 24.--31. 1. " BYTE[944] ,Byte [944]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[943] ,Byte [943]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[942] ,Byte [942]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[941] ,Byte [941]" group.long 0x3BC++0x03 line.long 0x00 "RCI_TXRX_DATA236,Frame Data Send / Receive Register 236" hexmask.long.byte 0x00 24.--31. 1. " BYTE[948] ,Byte [948]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[947] ,Byte [947]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[946] ,Byte [946]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[945] ,Byte [945]" group.long 0x3C0++0x03 line.long 0x00 "RCI_TXRX_DATA237,Frame Data Send / Receive Register 237" hexmask.long.byte 0x00 24.--31. 1. " BYTE[952] ,Byte [952]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[951] ,Byte [951]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[950] ,Byte [950]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[949] ,Byte [949]" group.long 0x3C4++0x03 line.long 0x00 "RCI_TXRX_DATA238,Frame Data Send / Receive Register 238" hexmask.long.byte 0x00 24.--31. 1. " BYTE[956] ,Byte [956]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[955] ,Byte [955]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[954] ,Byte [954]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[953] ,Byte [953]" group.long 0x3C8++0x03 line.long 0x00 "RCI_TXRX_DATA239,Frame Data Send / Receive Register 239" hexmask.long.byte 0x00 24.--31. 1. " BYTE[960] ,Byte [960]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[959] ,Byte [959]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[958] ,Byte [958]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[957] ,Byte [957]" group.long 0x3CC++0x03 line.long 0x00 "RCI_TXRX_DATA240,Frame Data Send / Receive Register 240" hexmask.long.byte 0x00 24.--31. 1. " BYTE[964] ,Byte [964]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[963] ,Byte [963]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[962] ,Byte [962]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[961] ,Byte [961]" group.long 0x3D0++0x03 line.long 0x00 "RCI_TXRX_DATA241,Frame Data Send / Receive Register 241" hexmask.long.byte 0x00 24.--31. 1. " BYTE[968] ,Byte [968]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[967] ,Byte [967]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[966] ,Byte [966]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[965] ,Byte [965]" group.long 0x3D4++0x03 line.long 0x00 "RCI_TXRX_DATA242,Frame Data Send / Receive Register 242" hexmask.long.byte 0x00 24.--31. 1. " BYTE[972] ,Byte [972]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[971] ,Byte [971]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[970] ,Byte [970]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[969] ,Byte [969]" group.long 0x3D8++0x03 line.long 0x00 "RCI_TXRX_DATA243,Frame Data Send / Receive Register 243" hexmask.long.byte 0x00 24.--31. 1. " BYTE[976] ,Byte [976]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[975] ,Byte [975]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[974] ,Byte [974]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[973] ,Byte [973]" group.long 0x3DC++0x03 line.long 0x00 "RCI_TXRX_DATA244,Frame Data Send / Receive Register 244" hexmask.long.byte 0x00 24.--31. 1. " BYTE[980] ,Byte [980]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[979] ,Byte [979]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[978] ,Byte [978]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[977] ,Byte [977]" group.long 0x3E0++0x03 line.long 0x00 "RCI_TXRX_DATA245,Frame Data Send / Receive Register 245" hexmask.long.byte 0x00 24.--31. 1. " BYTE[984] ,Byte [984]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[983] ,Byte [983]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[982] ,Byte [982]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[981] ,Byte [981]" group.long 0x3E4++0x03 line.long 0x00 "RCI_TXRX_DATA246,Frame Data Send / Receive Register 246" hexmask.long.byte 0x00 24.--31. 1. " BYTE[988] ,Byte [988]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[987] ,Byte [987]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[986] ,Byte [986]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[985] ,Byte [985]" group.long 0x3E8++0x03 line.long 0x00 "RCI_TXRX_DATA247,Frame Data Send / Receive Register 247" hexmask.long.byte 0x00 24.--31. 1. " BYTE[992] ,Byte [992]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[991] ,Byte [991]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[990] ,Byte [990]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[989] ,Byte [989]" group.long 0x3EC++0x03 line.long 0x00 "RCI_TXRX_DATA248,Frame Data Send / Receive Register 248" hexmask.long.byte 0x00 24.--31. 1. " BYTE[996] ,Byte [996]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[995] ,Byte [995]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[994] ,Byte [994]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[993] ,Byte [993]" group.long 0x3F0++0x03 line.long 0x00 "RCI_TXRX_DATA249,Frame Data Send / Receive Register 249" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1000] ,Byte [1000]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[999] ,Byte [999]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[998] ,Byte [998]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[997] ,Byte [997]" group.long 0x3F4++0x03 line.long 0x00 "RCI_TXRX_DATA250,Frame Data Send / Receive Register 250" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1004] ,Byte [1004]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1003] ,Byte [1003]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1002] ,Byte [1002]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1001] ,Byte [1001]" group.long 0x3F8++0x03 line.long 0x00 "RCI_TXRX_DATA251,Frame Data Send / Receive Register 251" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1008] ,Byte [1008]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1007] ,Byte [1007]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1006] ,Byte [1006]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1005] ,Byte [1005]" group.long 0x3FC++0x03 line.long 0x00 "RCI_TXRX_DATA252,Frame Data Send / Receive Register 252" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1012] ,Byte [1012]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1011] ,Byte [1011]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1010] ,Byte [1010]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1009] ,Byte [1009]" group.long 0x400++0x03 line.long 0x00 "RCI_TXRX_DATA253,Frame Data Send / Receive Register 253" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1016] ,Byte [1016]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1015] ,Byte [1015]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1014] ,Byte [1014]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1013] ,Byte [1013]" group.long 0x404++0x03 line.long 0x00 "RCI_TXRX_DATA254,Frame Data Send / Receive Register 254" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1020] ,Byte [1020]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1019] ,Byte [1019]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1018] ,Byte [1018]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1017] ,Byte [1017]" group.long 0x408++0x03 line.long 0x00 "RCI_TXRX_DATA255,Frame Data Send / Receive Register 255" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1024] ,Byte [1024]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1023] ,Byte [1023]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1022] ,Byte [1022]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1021] ,Byte [1021]" group.long 0x40C++0x03 line.long 0x00 "RCI_TXRX_DATA256,Frame Data Send / Receive Register 256" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1028] ,Byte [1028]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1027] ,Byte [1027]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1026] ,Byte [1026]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1025] ,Byte [1025]" group.long 0x410++0x03 line.long 0x00 "RCI_TXRX_DATA257,Frame Data Send / Receive Register 257" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1032] ,Byte [1032]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1031] ,Byte [1031]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1030] ,Byte [1030]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1029] ,Byte [1029]" group.long 0x414++0x03 line.long 0x00 "RCI_TXRX_DATA258,Frame Data Send / Receive Register 258" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1036] ,Byte [1036]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1035] ,Byte [1035]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1034] ,Byte [1034]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1033] ,Byte [1033]" group.long 0x418++0x03 line.long 0x00 "RCI_TXRX_DATA259,Frame Data Send / Receive Register 259" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1040] ,Byte [1040]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1039] ,Byte [1039]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1038] ,Byte [1038]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1037] ,Byte [1037]" group.long 0x41C++0x03 line.long 0x00 "RCI_TXRX_DATA260,Frame Data Send / Receive Register 260" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1044] ,Byte [1044]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1043] ,Byte [1043]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1042] ,Byte [1042]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1041] ,Byte [1041]" group.long 0x420++0x03 line.long 0x00 "RCI_TXRX_DATA261,Frame Data Send / Receive Register 261" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1048] ,Byte [1048]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1047] ,Byte [1047]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1046] ,Byte [1046]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1045] ,Byte [1045]" group.long 0x424++0x03 line.long 0x00 "RCI_TXRX_DATA262,Frame Data Send / Receive Register 262" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1052] ,Byte [1052]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1051] ,Byte [1051]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1050] ,Byte [1050]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1049] ,Byte [1049]" group.long 0x428++0x03 line.long 0x00 "RCI_TXRX_DATA263,Frame Data Send / Receive Register 263" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1056] ,Byte [1056]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1055] ,Byte [1055]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1054] ,Byte [1054]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1053] ,Byte [1053]" group.long 0x42C++0x03 line.long 0x00 "RCI_TXRX_DATA264,Frame Data Send / Receive Register 264" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1060] ,Byte [1060]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1059] ,Byte [1059]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1058] ,Byte [1058]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1057] ,Byte [1057]" group.long 0x430++0x03 line.long 0x00 "RCI_TXRX_DATA265,Frame Data Send / Receive Register 265" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1064] ,Byte [1064]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1063] ,Byte [1063]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1062] ,Byte [1062]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1061] ,Byte [1061]" group.long 0x434++0x03 line.long 0x00 "RCI_TXRX_DATA266,Frame Data Send / Receive Register 266" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1068] ,Byte [1068]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1067] ,Byte [1067]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1066] ,Byte [1066]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1065] ,Byte [1065]" group.long 0x438++0x03 line.long 0x00 "RCI_TXRX_DATA267,Frame Data Send / Receive Register 267" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1072] ,Byte [1072]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1071] ,Byte [1071]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1070] ,Byte [1070]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1069] ,Byte [1069]" group.long 0x43C++0x03 line.long 0x00 "RCI_TXRX_DATA268,Frame Data Send / Receive Register 268" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1076] ,Byte [1076]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1075] ,Byte [1075]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1074] ,Byte [1074]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1073] ,Byte [1073]" group.long 0x440++0x03 line.long 0x00 "RCI_TXRX_DATA269,Frame Data Send / Receive Register 269" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1080] ,Byte [1080]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1079] ,Byte [1079]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1078] ,Byte [1078]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1077] ,Byte [1077]" group.long 0x444++0x03 line.long 0x00 "RCI_TXRX_DATA270,Frame Data Send / Receive Register 270" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1084] ,Byte [1084]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1083] ,Byte [1083]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1082] ,Byte [1082]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1081] ,Byte [1081]" group.long 0x448++0x03 line.long 0x00 "RCI_TXRX_DATA271,Frame Data Send / Receive Register 271" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1088] ,Byte [1088]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1087] ,Byte [1087]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1086] ,Byte [1086]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1085] ,Byte [1085]" group.long 0x44C++0x03 line.long 0x00 "RCI_TXRX_DATA272,Frame Data Send / Receive Register 272" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1092] ,Byte [1092]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1091] ,Byte [1091]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1090] ,Byte [1090]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1089] ,Byte [1089]" group.long 0x450++0x03 line.long 0x00 "RCI_TXRX_DATA273,Frame Data Send / Receive Register 273" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1096] ,Byte [1096]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1095] ,Byte [1095]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1094] ,Byte [1094]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1093] ,Byte [1093]" group.long 0x454++0x03 line.long 0x00 "RCI_TXRX_DATA274,Frame Data Send / Receive Register 274" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1100] ,Byte [1100]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1099] ,Byte [1099]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1098] ,Byte [1098]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1097] ,Byte [1097]" group.long 0x458++0x03 line.long 0x00 "RCI_TXRX_DATA275,Frame Data Send / Receive Register 275" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1104] ,Byte [1104]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1103] ,Byte [1103]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1102] ,Byte [1102]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1101] ,Byte [1101]" group.long 0x45C++0x03 line.long 0x00 "RCI_TXRX_DATA276,Frame Data Send / Receive Register 276" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1108] ,Byte [1108]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1107] ,Byte [1107]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1106] ,Byte [1106]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1105] ,Byte [1105]" group.long 0x460++0x03 line.long 0x00 "RCI_TXRX_DATA277,Frame Data Send / Receive Register 277" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1112] ,Byte [1112]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1111] ,Byte [1111]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1110] ,Byte [1110]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1109] ,Byte [1109]" group.long 0x464++0x03 line.long 0x00 "RCI_TXRX_DATA278,Frame Data Send / Receive Register 278" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1116] ,Byte [1116]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1115] ,Byte [1115]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1114] ,Byte [1114]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1113] ,Byte [1113]" group.long 0x468++0x03 line.long 0x00 "RCI_TXRX_DATA279,Frame Data Send / Receive Register 279" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1120] ,Byte [1120]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1119] ,Byte [1119]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1118] ,Byte [1118]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1117] ,Byte [1117]" group.long 0x46C++0x03 line.long 0x00 "RCI_TXRX_DATA280,Frame Data Send / Receive Register 280" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1124] ,Byte [1124]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1123] ,Byte [1123]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1122] ,Byte [1122]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1121] ,Byte [1121]" group.long 0x470++0x03 line.long 0x00 "RCI_TXRX_DATA281,Frame Data Send / Receive Register 281" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1128] ,Byte [1128]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1127] ,Byte [1127]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1126] ,Byte [1126]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1125] ,Byte [1125]" group.long 0x474++0x03 line.long 0x00 "RCI_TXRX_DATA282,Frame Data Send / Receive Register 282" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1132] ,Byte [1132]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1131] ,Byte [1131]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1130] ,Byte [1130]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1129] ,Byte [1129]" group.long 0x478++0x03 line.long 0x00 "RCI_TXRX_DATA283,Frame Data Send / Receive Register 283" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1136] ,Byte [1136]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1135] ,Byte [1135]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1134] ,Byte [1134]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1133] ,Byte [1133]" group.long 0x47C++0x03 line.long 0x00 "RCI_TXRX_DATA284,Frame Data Send / Receive Register 284" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1140] ,Byte [1140]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1139] ,Byte [1139]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1138] ,Byte [1138]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1137] ,Byte [1137]" group.long 0x480++0x03 line.long 0x00 "RCI_TXRX_DATA285,Frame Data Send / Receive Register 285" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1144] ,Byte [1144]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1143] ,Byte [1143]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1142] ,Byte [1142]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1141] ,Byte [1141]" group.long 0x484++0x03 line.long 0x00 "RCI_TXRX_DATA286,Frame Data Send / Receive Register 286" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1148] ,Byte [1148]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1147] ,Byte [1147]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1146] ,Byte [1146]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1145] ,Byte [1145]" group.long 0x488++0x03 line.long 0x00 "RCI_TXRX_DATA287,Frame Data Send / Receive Register 287" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1152] ,Byte [1152]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1151] ,Byte [1151]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1150] ,Byte [1150]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1149] ,Byte [1149]" group.long 0x48C++0x03 line.long 0x00 "RCI_TXRX_DATA288,Frame Data Send / Receive Register 288" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1156] ,Byte [1156]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1155] ,Byte [1155]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1154] ,Byte [1154]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1153] ,Byte [1153]" group.long 0x490++0x03 line.long 0x00 "RCI_TXRX_DATA289,Frame Data Send / Receive Register 289" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1160] ,Byte [1160]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1159] ,Byte [1159]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1158] ,Byte [1158]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1157] ,Byte [1157]" group.long 0x494++0x03 line.long 0x00 "RCI_TXRX_DATA290,Frame Data Send / Receive Register 290" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1164] ,Byte [1164]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1163] ,Byte [1163]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1162] ,Byte [1162]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1161] ,Byte [1161]" group.long 0x498++0x03 line.long 0x00 "RCI_TXRX_DATA291,Frame Data Send / Receive Register 291" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1168] ,Byte [1168]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1167] ,Byte [1167]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1166] ,Byte [1166]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1165] ,Byte [1165]" group.long 0x49C++0x03 line.long 0x00 "RCI_TXRX_DATA292,Frame Data Send / Receive Register 292" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1172] ,Byte [1172]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1171] ,Byte [1171]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1170] ,Byte [1170]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1169] ,Byte [1169]" group.long 0x4A0++0x03 line.long 0x00 "RCI_TXRX_DATA293,Frame Data Send / Receive Register 293" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1176] ,Byte [1176]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1175] ,Byte [1175]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1174] ,Byte [1174]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1173] ,Byte [1173]" group.long 0x4A4++0x03 line.long 0x00 "RCI_TXRX_DATA294,Frame Data Send / Receive Register 294" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1180] ,Byte [1180]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1179] ,Byte [1179]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1178] ,Byte [1178]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1177] ,Byte [1177]" group.long 0x4A8++0x03 line.long 0x00 "RCI_TXRX_DATA295,Frame Data Send / Receive Register 295" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1184] ,Byte [1184]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1183] ,Byte [1183]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1182] ,Byte [1182]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1181] ,Byte [1181]" group.long 0x4AC++0x03 line.long 0x00 "RCI_TXRX_DATA296,Frame Data Send / Receive Register 296" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1188] ,Byte [1188]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1187] ,Byte [1187]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1186] ,Byte [1186]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1185] ,Byte [1185]" group.long 0x4B0++0x03 line.long 0x00 "RCI_TXRX_DATA297,Frame Data Send / Receive Register 297" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1192] ,Byte [1192]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1191] ,Byte [1191]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1190] ,Byte [1190]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1189] ,Byte [1189]" group.long 0x4B4++0x03 line.long 0x00 "RCI_TXRX_DATA298,Frame Data Send / Receive Register 298" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1196] ,Byte [1196]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1195] ,Byte [1195]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1194] ,Byte [1194]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1193] ,Byte [1193]" group.long 0x4B8++0x03 line.long 0x00 "RCI_TXRX_DATA299,Frame Data Send / Receive Register 299" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1200] ,Byte [1200]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1199] ,Byte [1199]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1198] ,Byte [1198]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1197] ,Byte [1197]" group.long 0x4BC++0x03 line.long 0x00 "RCI_TXRX_DATA300,Frame Data Send / Receive Register 300" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1204] ,Byte [1204]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1203] ,Byte [1203]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1202] ,Byte [1202]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1201] ,Byte [1201]" group.long 0x4C0++0x03 line.long 0x00 "RCI_TXRX_DATA301,Frame Data Send / Receive Register 301" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1208] ,Byte [1208]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1207] ,Byte [1207]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1206] ,Byte [1206]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1205] ,Byte [1205]" group.long 0x4C4++0x03 line.long 0x00 "RCI_TXRX_DATA302,Frame Data Send / Receive Register 302" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1212] ,Byte [1212]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1211] ,Byte [1211]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1210] ,Byte [1210]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1209] ,Byte [1209]" group.long 0x4C8++0x03 line.long 0x00 "RCI_TXRX_DATA303,Frame Data Send / Receive Register 303" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1216] ,Byte [1216]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1215] ,Byte [1215]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1214] ,Byte [1214]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1213] ,Byte [1213]" group.long 0x4CC++0x03 line.long 0x00 "RCI_TXRX_DATA304,Frame Data Send / Receive Register 304" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1220] ,Byte [1220]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1219] ,Byte [1219]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1218] ,Byte [1218]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1217] ,Byte [1217]" group.long 0x4D0++0x03 line.long 0x00 "RCI_TXRX_DATA305,Frame Data Send / Receive Register 305" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1224] ,Byte [1224]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1223] ,Byte [1223]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1222] ,Byte [1222]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1221] ,Byte [1221]" group.long 0x4D4++0x03 line.long 0x00 "RCI_TXRX_DATA306,Frame Data Send / Receive Register 306" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1228] ,Byte [1228]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1227] ,Byte [1227]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1226] ,Byte [1226]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1225] ,Byte [1225]" group.long 0x4D8++0x03 line.long 0x00 "RCI_TXRX_DATA307,Frame Data Send / Receive Register 307" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1232] ,Byte [1232]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1231] ,Byte [1231]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1230] ,Byte [1230]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1229] ,Byte [1229]" group.long 0x4DC++0x03 line.long 0x00 "RCI_TXRX_DATA308,Frame Data Send / Receive Register 308" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1236] ,Byte [1236]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1235] ,Byte [1235]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1234] ,Byte [1234]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1233] ,Byte [1233]" group.long 0x4E0++0x03 line.long 0x00 "RCI_TXRX_DATA309,Frame Data Send / Receive Register 309" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1240] ,Byte [1240]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1239] ,Byte [1239]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1238] ,Byte [1238]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1237] ,Byte [1237]" group.long 0x4E4++0x03 line.long 0x00 "RCI_TXRX_DATA310,Frame Data Send / Receive Register 310" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1244] ,Byte [1244]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1243] ,Byte [1243]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1242] ,Byte [1242]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1241] ,Byte [1241]" group.long 0x4E8++0x03 line.long 0x00 "RCI_TXRX_DATA311,Frame Data Send / Receive Register 311" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1248] ,Byte [1248]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1247] ,Byte [1247]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1246] ,Byte [1246]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1245] ,Byte [1245]" group.long 0x4EC++0x03 line.long 0x00 "RCI_TXRX_DATA312,Frame Data Send / Receive Register 312" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1252] ,Byte [1252]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1251] ,Byte [1251]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1250] ,Byte [1250]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1249] ,Byte [1249]" group.long 0x4F0++0x03 line.long 0x00 "RCI_TXRX_DATA313,Frame Data Send / Receive Register 313" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1256] ,Byte [1256]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1255] ,Byte [1255]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1254] ,Byte [1254]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1253] ,Byte [1253]" group.long 0x4F4++0x03 line.long 0x00 "RCI_TXRX_DATA314,Frame Data Send / Receive Register 314" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1260] ,Byte [1260]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1259] ,Byte [1259]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1258] ,Byte [1258]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1257] ,Byte [1257]" group.long 0x4F8++0x03 line.long 0x00 "RCI_TXRX_DATA315,Frame Data Send / Receive Register 315" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1264] ,Byte [1264]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1263] ,Byte [1263]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1262] ,Byte [1262]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1261] ,Byte [1261]" group.long 0x4FC++0x03 line.long 0x00 "RCI_TXRX_DATA316,Frame Data Send / Receive Register 316" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1268] ,Byte [1268]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1267] ,Byte [1267]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1266] ,Byte [1266]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1265] ,Byte [1265]" group.long 0x500++0x03 line.long 0x00 "RCI_TXRX_DATA317,Frame Data Send / Receive Register 317" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1272] ,Byte [1272]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1271] ,Byte [1271]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1270] ,Byte [1270]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1269] ,Byte [1269]" group.long 0x504++0x03 line.long 0x00 "RCI_TXRX_DATA318,Frame Data Send / Receive Register 318" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1276] ,Byte [1276]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1275] ,Byte [1275]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1274] ,Byte [1274]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1273] ,Byte [1273]" group.long 0x508++0x03 line.long 0x00 "RCI_TXRX_DATA319,Frame Data Send / Receive Register 319" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1280] ,Byte [1280]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1279] ,Byte [1279]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1278] ,Byte [1278]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1277] ,Byte [1277]" group.long 0x50C++0x03 line.long 0x00 "RCI_TXRX_DATA320,Frame Data Send / Receive Register 320" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1284] ,Byte [1284]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1283] ,Byte [1283]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1282] ,Byte [1282]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1281] ,Byte [1281]" group.long 0x510++0x03 line.long 0x00 "RCI_TXRX_DATA321,Frame Data Send / Receive Register 321" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1288] ,Byte [1288]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1287] ,Byte [1287]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1286] ,Byte [1286]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1285] ,Byte [1285]" group.long 0x514++0x03 line.long 0x00 "RCI_TXRX_DATA322,Frame Data Send / Receive Register 322" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1292] ,Byte [1292]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1291] ,Byte [1291]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1290] ,Byte [1290]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1289] ,Byte [1289]" group.long 0x518++0x03 line.long 0x00 "RCI_TXRX_DATA323,Frame Data Send / Receive Register 323" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1296] ,Byte [1296]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1295] ,Byte [1295]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1294] ,Byte [1294]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1293] ,Byte [1293]" group.long 0x51C++0x03 line.long 0x00 "RCI_TXRX_DATA324,Frame Data Send / Receive Register 324" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1300] ,Byte [1300]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1299] ,Byte [1299]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1298] ,Byte [1298]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1297] ,Byte [1297]" group.long 0x520++0x03 line.long 0x00 "RCI_TXRX_DATA325,Frame Data Send / Receive Register 325" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1304] ,Byte [1304]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1303] ,Byte [1303]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1302] ,Byte [1302]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1301] ,Byte [1301]" group.long 0x524++0x03 line.long 0x00 "RCI_TXRX_DATA326,Frame Data Send / Receive Register 326" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1308] ,Byte [1308]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1307] ,Byte [1307]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1306] ,Byte [1306]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1305] ,Byte [1305]" group.long 0x528++0x03 line.long 0x00 "RCI_TXRX_DATA327,Frame Data Send / Receive Register 327" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1312] ,Byte [1312]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1311] ,Byte [1311]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1310] ,Byte [1310]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1309] ,Byte [1309]" group.long 0x52C++0x03 line.long 0x00 "RCI_TXRX_DATA328,Frame Data Send / Receive Register 328" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1316] ,Byte [1316]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1315] ,Byte [1315]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1314] ,Byte [1314]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1313] ,Byte [1313]" group.long 0x530++0x03 line.long 0x00 "RCI_TXRX_DATA329,Frame Data Send / Receive Register 329" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1320] ,Byte [1320]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1319] ,Byte [1319]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1318] ,Byte [1318]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1317] ,Byte [1317]" group.long 0x534++0x03 line.long 0x00 "RCI_TXRX_DATA330,Frame Data Send / Receive Register 330" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1324] ,Byte [1324]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1323] ,Byte [1323]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1322] ,Byte [1322]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1321] ,Byte [1321]" group.long 0x538++0x03 line.long 0x00 "RCI_TXRX_DATA331,Frame Data Send / Receive Register 331" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1328] ,Byte [1328]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1327] ,Byte [1327]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1326] ,Byte [1326]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1325] ,Byte [1325]" group.long 0x53C++0x03 line.long 0x00 "RCI_TXRX_DATA332,Frame Data Send / Receive Register 332" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1332] ,Byte [1332]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1331] ,Byte [1331]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1330] ,Byte [1330]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1329] ,Byte [1329]" group.long 0x540++0x03 line.long 0x00 "RCI_TXRX_DATA333,Frame Data Send / Receive Register 333" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1336] ,Byte [1336]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1335] ,Byte [1335]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1334] ,Byte [1334]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1333] ,Byte [1333]" group.long 0x544++0x03 line.long 0x00 "RCI_TXRX_DATA334,Frame Data Send / Receive Register 334" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1340] ,Byte [1340]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1339] ,Byte [1339]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1338] ,Byte [1338]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1337] ,Byte [1337]" group.long 0x548++0x03 line.long 0x00 "RCI_TXRX_DATA335,Frame Data Send / Receive Register 335" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1344] ,Byte [1344]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1343] ,Byte [1343]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1342] ,Byte [1342]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1341] ,Byte [1341]" group.long 0x54C++0x03 line.long 0x00 "RCI_TXRX_DATA336,Frame Data Send / Receive Register 336" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1348] ,Byte [1348]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1347] ,Byte [1347]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1346] ,Byte [1346]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1345] ,Byte [1345]" group.long 0x550++0x03 line.long 0x00 "RCI_TXRX_DATA337,Frame Data Send / Receive Register 337" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1352] ,Byte [1352]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1351] ,Byte [1351]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1350] ,Byte [1350]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1349] ,Byte [1349]" group.long 0x554++0x03 line.long 0x00 "RCI_TXRX_DATA338,Frame Data Send / Receive Register 338" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1356] ,Byte [1356]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1355] ,Byte [1355]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1354] ,Byte [1354]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1353] ,Byte [1353]" group.long 0x558++0x03 line.long 0x00 "RCI_TXRX_DATA339,Frame Data Send / Receive Register 339" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1360] ,Byte [1360]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1359] ,Byte [1359]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1358] ,Byte [1358]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1357] ,Byte [1357]" group.long 0x55C++0x03 line.long 0x00 "RCI_TXRX_DATA340,Frame Data Send / Receive Register 340" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1364] ,Byte [1364]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1363] ,Byte [1363]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1362] ,Byte [1362]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1361] ,Byte [1361]" group.long 0x560++0x03 line.long 0x00 "RCI_TXRX_DATA341,Frame Data Send / Receive Register 341" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1368] ,Byte [1368]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1367] ,Byte [1367]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1366] ,Byte [1366]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1365] ,Byte [1365]" group.long 0x564++0x03 line.long 0x00 "RCI_TXRX_DATA342,Frame Data Send / Receive Register 342" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1372] ,Byte [1372]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1371] ,Byte [1371]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1370] ,Byte [1370]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1369] ,Byte [1369]" group.long 0x568++0x03 line.long 0x00 "RCI_TXRX_DATA343,Frame Data Send / Receive Register 343" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1376] ,Byte [1376]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1375] ,Byte [1375]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1374] ,Byte [1374]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1373] ,Byte [1373]" group.long 0x56C++0x03 line.long 0x00 "RCI_TXRX_DATA344,Frame Data Send / Receive Register 344" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1380] ,Byte [1380]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1379] ,Byte [1379]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1378] ,Byte [1378]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1377] ,Byte [1377]" group.long 0x570++0x03 line.long 0x00 "RCI_TXRX_DATA345,Frame Data Send / Receive Register 345" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1384] ,Byte [1384]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1383] ,Byte [1383]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1382] ,Byte [1382]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1381] ,Byte [1381]" group.long 0x574++0x03 line.long 0x00 "RCI_TXRX_DATA346,Frame Data Send / Receive Register 346" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1388] ,Byte [1388]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1387] ,Byte [1387]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1386] ,Byte [1386]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1385] ,Byte [1385]" group.long 0x578++0x03 line.long 0x00 "RCI_TXRX_DATA347,Frame Data Send / Receive Register 347" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1392] ,Byte [1392]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1391] ,Byte [1391]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1390] ,Byte [1390]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1389] ,Byte [1389]" group.long 0x57C++0x03 line.long 0x00 "RCI_TXRX_DATA348,Frame Data Send / Receive Register 348" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1396] ,Byte [1396]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1395] ,Byte [1395]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1394] ,Byte [1394]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1393] ,Byte [1393]" group.long 0x580++0x03 line.long 0x00 "RCI_TXRX_DATA349,Frame Data Send / Receive Register 349" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1400] ,Byte [1400]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1399] ,Byte [1399]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1398] ,Byte [1398]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1397] ,Byte [1397]" group.long 0x584++0x03 line.long 0x00 "RCI_TXRX_DATA350,Frame Data Send / Receive Register 350" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1404] ,Byte [1404]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1403] ,Byte [1403]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1402] ,Byte [1402]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1401] ,Byte [1401]" group.long 0x588++0x03 line.long 0x00 "RCI_TXRX_DATA351,Frame Data Send / Receive Register 351" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1408] ,Byte [1408]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1407] ,Byte [1407]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1406] ,Byte [1406]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1405] ,Byte [1405]" group.long 0x58C++0x03 line.long 0x00 "RCI_TXRX_DATA352,Frame Data Send / Receive Register 352" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1412] ,Byte [1412]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1411] ,Byte [1411]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1410] ,Byte [1410]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1409] ,Byte [1409]" group.long 0x590++0x03 line.long 0x00 "RCI_TXRX_DATA353,Frame Data Send / Receive Register 353" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1416] ,Byte [1416]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1415] ,Byte [1415]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1414] ,Byte [1414]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1413] ,Byte [1413]" group.long 0x594++0x03 line.long 0x00 "RCI_TXRX_DATA354,Frame Data Send / Receive Register 354" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1420] ,Byte [1420]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1419] ,Byte [1419]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1418] ,Byte [1418]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1417] ,Byte [1417]" group.long 0x598++0x03 line.long 0x00 "RCI_TXRX_DATA355,Frame Data Send / Receive Register 355" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1424] ,Byte [1424]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1423] ,Byte [1423]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1422] ,Byte [1422]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1421] ,Byte [1421]" group.long 0x59C++0x03 line.long 0x00 "RCI_TXRX_DATA356,Frame Data Send / Receive Register 356" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1428] ,Byte [1428]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1427] ,Byte [1427]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1426] ,Byte [1426]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1425] ,Byte [1425]" group.long 0x5A0++0x03 line.long 0x00 "RCI_TXRX_DATA357,Frame Data Send / Receive Register 357" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1432] ,Byte [1432]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1431] ,Byte [1431]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1430] ,Byte [1430]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1429] ,Byte [1429]" group.long 0x5A4++0x03 line.long 0x00 "RCI_TXRX_DATA358,Frame Data Send / Receive Register 358" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1436] ,Byte [1436]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1435] ,Byte [1435]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1434] ,Byte [1434]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1433] ,Byte [1433]" group.long 0x5A8++0x03 line.long 0x00 "RCI_TXRX_DATA359,Frame Data Send / Receive Register 359" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1440] ,Byte [1440]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1439] ,Byte [1439]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1438] ,Byte [1438]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1437] ,Byte [1437]" group.long 0x5AC++0x03 line.long 0x00 "RCI_TXRX_DATA360,Frame Data Send / Receive Register 360" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1444] ,Byte [1444]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1443] ,Byte [1443]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1442] ,Byte [1442]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1441] ,Byte [1441]" group.long 0x5B0++0x03 line.long 0x00 "RCI_TXRX_DATA361,Frame Data Send / Receive Register 361" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1448] ,Byte [1448]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1447] ,Byte [1447]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1446] ,Byte [1446]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1445] ,Byte [1445]" group.long 0x5B4++0x03 line.long 0x00 "RCI_TXRX_DATA362,Frame Data Send / Receive Register 362" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1452] ,Byte [1452]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1451] ,Byte [1451]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1450] ,Byte [1450]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1449] ,Byte [1449]" group.long 0x5B8++0x03 line.long 0x00 "RCI_TXRX_DATA363,Frame Data Send / Receive Register 363" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1456] ,Byte [1456]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1455] ,Byte [1455]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1454] ,Byte [1454]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1453] ,Byte [1453]" group.long 0x5BC++0x03 line.long 0x00 "RCI_TXRX_DATA364,Frame Data Send / Receive Register 364" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1460] ,Byte [1460]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1459] ,Byte [1459]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1458] ,Byte [1458]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1457] ,Byte [1457]" group.long 0x5C0++0x03 line.long 0x00 "RCI_TXRX_DATA365,Frame Data Send / Receive Register 365" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1464] ,Byte [1464]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1463] ,Byte [1463]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1462] ,Byte [1462]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1461] ,Byte [1461]" group.long 0x5C4++0x03 line.long 0x00 "RCI_TXRX_DATA366,Frame Data Send / Receive Register 366" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1468] ,Byte [1468]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1467] ,Byte [1467]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1466] ,Byte [1466]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1465] ,Byte [1465]" group.long 0x5C8++0x03 line.long 0x00 "RCI_TXRX_DATA367,Frame Data Send / Receive Register 367" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1472] ,Byte [1472]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1471] ,Byte [1471]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1470] ,Byte [1470]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1469] ,Byte [1469]" group.long 0x5CC++0x03 line.long 0x00 "RCI_TXRX_DATA368,Frame Data Send / Receive Register 368" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1476] ,Byte [1476]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1475] ,Byte [1475]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1474] ,Byte [1474]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1473] ,Byte [1473]" group.long 0x5D0++0x03 line.long 0x00 "RCI_TXRX_DATA369,Frame Data Send / Receive Register 369" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1480] ,Byte [1480]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1479] ,Byte [1479]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1478] ,Byte [1478]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1477] ,Byte [1477]" group.long 0x5D4++0x03 line.long 0x00 "RCI_TXRX_DATA370,Frame Data Send / Receive Register 370" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1484] ,Byte [1484]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1483] ,Byte [1483]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1482] ,Byte [1482]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1481] ,Byte [1481]" group.long 0x5D8++0x03 line.long 0x00 "RCI_TXRX_DATA371,Frame Data Send / Receive Register 371" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1488] ,Byte [1488]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1487] ,Byte [1487]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1486] ,Byte [1486]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1485] ,Byte [1485]" group.long 0x5DC++0x03 line.long 0x00 "RCI_TXRX_DATA372,Frame Data Send / Receive Register 372" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1492] ,Byte [1492]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1491] ,Byte [1491]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1490] ,Byte [1490]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1489] ,Byte [1489]" group.long 0x5E0++0x03 line.long 0x00 "RCI_TXRX_DATA373,Frame Data Send / Receive Register 373" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1496] ,Byte [1496]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1495] ,Byte [1495]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1494] ,Byte [1494]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1493] ,Byte [1493]" group.long 0x5E4++0x03 line.long 0x00 "RCI_TXRX_DATA374,Frame Data Send / Receive Register 374" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1500] ,Byte [1500]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1499] ,Byte [1499]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1498] ,Byte [1498]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1497] ,Byte [1497]" group.long 0x5E8++0x03 line.long 0x00 "RCI_TXRX_DATA375,Frame Data Send / Receive Register 375" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1504] ,Byte [1504]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1503] ,Byte [1503]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1502] ,Byte [1502]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1501] ,Byte [1501]" group.long 0x5EC++0x03 line.long 0x00 "RCI_TXRX_DATA376,Frame Data Send / Receive Register 376" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1508] ,Byte [1508]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1507] ,Byte [1507]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1506] ,Byte [1506]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1505] ,Byte [1505]" group.long 0x5F0++0x03 line.long 0x00 "RCI_TXRX_DATA377,Frame Data Send / Receive Register 377" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1512] ,Byte [1512]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1511] ,Byte [1511]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1510] ,Byte [1510]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1509] ,Byte [1509]" group.long 0x5F4++0x03 line.long 0x00 "RCI_TXRX_DATA378,Frame Data Send / Receive Register 378" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1516] ,Byte [1516]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1515] ,Byte [1515]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1514] ,Byte [1514]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1513] ,Byte [1513]" group.long 0x5F8++0x03 line.long 0x00 "RCI_TXRX_DATA379,Frame Data Send / Receive Register 379" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1520] ,Byte [1520]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1519] ,Byte [1519]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1518] ,Byte [1518]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1517] ,Byte [1517]" group.long 0x5FC++0x03 line.long 0x00 "RCI_TXRX_DATA380,Frame Data Send / Receive Register 380" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1524] ,Byte [1524]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1523] ,Byte [1523]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1522] ,Byte [1522]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1521] ,Byte [1521]" group.long 0x600++0x03 line.long 0x00 "RCI_TXRX_DATA381,Frame Data Send / Receive Register 381" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1528] ,Byte [1528]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1527] ,Byte [1527]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1526] ,Byte [1526]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1525] ,Byte [1525]" group.long 0x604++0x03 line.long 0x00 "RCI_TXRX_DATA382,Frame Data Send / Receive Register 382" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1532] ,Byte [1532]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1531] ,Byte [1531]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1530] ,Byte [1530]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1529] ,Byte [1529]" group.long 0x608++0x03 line.long 0x00 "RCI_TXRX_DATA383,Frame Data Send / Receive Register 383" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1536] ,Byte [1536]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1535] ,Byte [1535]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1534] ,Byte [1534]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1533] ,Byte [1533]" group.long 0x60C++0x03 line.long 0x00 "RCI_TXRX_DATA384,Frame Data Send / Receive Register 384" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1540] ,Byte [1540]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1539] ,Byte [1539]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1538] ,Byte [1538]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1537] ,Byte [1537]" group.long 0x610++0x03 line.long 0x00 "RCI_TXRX_DATA385,Frame Data Send / Receive Register 385" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1544] ,Byte [1544]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1543] ,Byte [1543]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1542] ,Byte [1542]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1541] ,Byte [1541]" group.long 0x614++0x03 line.long 0x00 "RCI_TXRX_DATA386,Frame Data Send / Receive Register 386" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1548] ,Byte [1548]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1547] ,Byte [1547]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1546] ,Byte [1546]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1545] ,Byte [1545]" group.long 0x618++0x03 line.long 0x00 "RCI_TXRX_DATA387,Frame Data Send / Receive Register 387" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1552] ,Byte [1552]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1551] ,Byte [1551]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1550] ,Byte [1550]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1549] ,Byte [1549]" group.long 0x61C++0x03 line.long 0x00 "RCI_TXRX_DATA388,Frame Data Send / Receive Register 388" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1556] ,Byte [1556]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1555] ,Byte [1555]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1554] ,Byte [1554]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1553] ,Byte [1553]" group.long 0x620++0x03 line.long 0x00 "RCI_TXRX_DATA389,Frame Data Send / Receive Register 389" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1560] ,Byte [1560]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1559] ,Byte [1559]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1558] ,Byte [1558]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1557] ,Byte [1557]" group.long 0x624++0x03 line.long 0x00 "RCI_TXRX_DATA390,Frame Data Send / Receive Register 390" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1564] ,Byte [1564]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1563] ,Byte [1563]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1562] ,Byte [1562]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1561] ,Byte [1561]" group.long 0x628++0x03 line.long 0x00 "RCI_TXRX_DATA391,Frame Data Send / Receive Register 391" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1568] ,Byte [1568]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1567] ,Byte [1567]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1566] ,Byte [1566]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1565] ,Byte [1565]" group.long 0x62C++0x03 line.long 0x00 "RCI_TXRX_DATA392,Frame Data Send / Receive Register 392" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1572] ,Byte [1572]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1571] ,Byte [1571]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1570] ,Byte [1570]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1569] ,Byte [1569]" group.long 0x630++0x03 line.long 0x00 "RCI_TXRX_DATA393,Frame Data Send / Receive Register 393" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1576] ,Byte [1576]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1575] ,Byte [1575]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1574] ,Byte [1574]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1573] ,Byte [1573]" group.long 0x634++0x03 line.long 0x00 "RCI_TXRX_DATA394,Frame Data Send / Receive Register 394" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1580] ,Byte [1580]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1579] ,Byte [1579]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1578] ,Byte [1578]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1577] ,Byte [1577]" group.long 0x638++0x03 line.long 0x00 "RCI_TXRX_DATA395,Frame Data Send / Receive Register 395" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1584] ,Byte [1584]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1583] ,Byte [1583]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1582] ,Byte [1582]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1581] ,Byte [1581]" group.long 0x63C++0x03 line.long 0x00 "RCI_TXRX_DATA396,Frame Data Send / Receive Register 396" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1588] ,Byte [1588]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1587] ,Byte [1587]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1586] ,Byte [1586]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1585] ,Byte [1585]" group.long 0x640++0x03 line.long 0x00 "RCI_TXRX_DATA397,Frame Data Send / Receive Register 397" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1592] ,Byte [1592]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1591] ,Byte [1591]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1590] ,Byte [1590]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1589] ,Byte [1589]" group.long 0x644++0x03 line.long 0x00 "RCI_TXRX_DATA398,Frame Data Send / Receive Register 398" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1596] ,Byte [1596]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1595] ,Byte [1595]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1594] ,Byte [1594]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1593] ,Byte [1593]" group.long 0x648++0x03 line.long 0x00 "RCI_TXRX_DATA399,Frame Data Send / Receive Register 399" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1600] ,Byte [1600]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1599] ,Byte [1599]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1598] ,Byte [1598]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1597] ,Byte [1597]" group.long 0x64C++0x03 line.long 0x00 "RCI_TXRX_DATA400,Frame Data Send / Receive Register 400" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1604] ,Byte [1604]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1603] ,Byte [1603]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1602] ,Byte [1602]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1601] ,Byte [1601]" group.long 0x650++0x03 line.long 0x00 "RCI_TXRX_DATA401,Frame Data Send / Receive Register 401" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1608] ,Byte [1608]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1607] ,Byte [1607]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1606] ,Byte [1606]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1605] ,Byte [1605]" group.long 0x654++0x03 line.long 0x00 "RCI_TXRX_DATA402,Frame Data Send / Receive Register 402" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1612] ,Byte [1612]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1611] ,Byte [1611]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1610] ,Byte [1610]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1609] ,Byte [1609]" group.long 0x658++0x03 line.long 0x00 "RCI_TXRX_DATA403,Frame Data Send / Receive Register 403" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1616] ,Byte [1616]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1615] ,Byte [1615]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1614] ,Byte [1614]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1613] ,Byte [1613]" group.long 0x65C++0x03 line.long 0x00 "RCI_TXRX_DATA404,Frame Data Send / Receive Register 404" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1620] ,Byte [1620]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1619] ,Byte [1619]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1618] ,Byte [1618]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1617] ,Byte [1617]" group.long 0x660++0x03 line.long 0x00 "RCI_TXRX_DATA405,Frame Data Send / Receive Register 405" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1624] ,Byte [1624]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1623] ,Byte [1623]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1622] ,Byte [1622]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1621] ,Byte [1621]" group.long 0x664++0x03 line.long 0x00 "RCI_TXRX_DATA406,Frame Data Send / Receive Register 406" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1628] ,Byte [1628]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1627] ,Byte [1627]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1626] ,Byte [1626]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1625] ,Byte [1625]" group.long 0x668++0x03 line.long 0x00 "RCI_TXRX_DATA407,Frame Data Send / Receive Register 407" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1632] ,Byte [1632]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1631] ,Byte [1631]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1630] ,Byte [1630]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1629] ,Byte [1629]" group.long 0x66C++0x03 line.long 0x00 "RCI_TXRX_DATA408,Frame Data Send / Receive Register 408" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1636] ,Byte [1636]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1635] ,Byte [1635]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1634] ,Byte [1634]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1633] ,Byte [1633]" group.long 0x670++0x03 line.long 0x00 "RCI_TXRX_DATA409,Frame Data Send / Receive Register 409" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1640] ,Byte [1640]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1639] ,Byte [1639]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1638] ,Byte [1638]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1637] ,Byte [1637]" group.long 0x674++0x03 line.long 0x00 "RCI_TXRX_DATA410,Frame Data Send / Receive Register 410" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1644] ,Byte [1644]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1643] ,Byte [1643]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1642] ,Byte [1642]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1641] ,Byte [1641]" group.long 0x678++0x03 line.long 0x00 "RCI_TXRX_DATA411,Frame Data Send / Receive Register 411" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1648] ,Byte [1648]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1647] ,Byte [1647]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1646] ,Byte [1646]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1645] ,Byte [1645]" group.long 0x67C++0x03 line.long 0x00 "RCI_TXRX_DATA412,Frame Data Send / Receive Register 412" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1652] ,Byte [1652]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1651] ,Byte [1651]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1650] ,Byte [1650]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1649] ,Byte [1649]" group.long 0x680++0x03 line.long 0x00 "RCI_TXRX_DATA413,Frame Data Send / Receive Register 413" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1656] ,Byte [1656]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1655] ,Byte [1655]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1654] ,Byte [1654]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1653] ,Byte [1653]" group.long 0x684++0x03 line.long 0x00 "RCI_TXRX_DATA414,Frame Data Send / Receive Register 414" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1660] ,Byte [1660]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1659] ,Byte [1659]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1658] ,Byte [1658]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1657] ,Byte [1657]" group.long 0x688++0x03 line.long 0x00 "RCI_TXRX_DATA415,Frame Data Send / Receive Register 415" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1664] ,Byte [1664]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1663] ,Byte [1663]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1662] ,Byte [1662]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1661] ,Byte [1661]" group.long 0x68C++0x03 line.long 0x00 "RCI_TXRX_DATA416,Frame Data Send / Receive Register 416" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1668] ,Byte [1668]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1667] ,Byte [1667]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1666] ,Byte [1666]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1665] ,Byte [1665]" group.long 0x690++0x03 line.long 0x00 "RCI_TXRX_DATA417,Frame Data Send / Receive Register 417" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1672] ,Byte [1672]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1671] ,Byte [1671]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1670] ,Byte [1670]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1669] ,Byte [1669]" group.long 0x694++0x03 line.long 0x00 "RCI_TXRX_DATA418,Frame Data Send / Receive Register 418" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1676] ,Byte [1676]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1675] ,Byte [1675]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1674] ,Byte [1674]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1673] ,Byte [1673]" group.long 0x698++0x03 line.long 0x00 "RCI_TXRX_DATA419,Frame Data Send / Receive Register 419" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1680] ,Byte [1680]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1679] ,Byte [1679]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1678] ,Byte [1678]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1677] ,Byte [1677]" group.long 0x69C++0x03 line.long 0x00 "RCI_TXRX_DATA420,Frame Data Send / Receive Register 420" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1684] ,Byte [1684]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1683] ,Byte [1683]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1682] ,Byte [1682]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1681] ,Byte [1681]" group.long 0x6A0++0x03 line.long 0x00 "RCI_TXRX_DATA421,Frame Data Send / Receive Register 421" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1688] ,Byte [1688]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1687] ,Byte [1687]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1686] ,Byte [1686]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1685] ,Byte [1685]" group.long 0x6A4++0x03 line.long 0x00 "RCI_TXRX_DATA422,Frame Data Send / Receive Register 422" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1692] ,Byte [1692]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1691] ,Byte [1691]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1690] ,Byte [1690]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1689] ,Byte [1689]" group.long 0x6A8++0x03 line.long 0x00 "RCI_TXRX_DATA423,Frame Data Send / Receive Register 423" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1696] ,Byte [1696]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1695] ,Byte [1695]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1694] ,Byte [1694]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1693] ,Byte [1693]" group.long 0x6AC++0x03 line.long 0x00 "RCI_TXRX_DATA424,Frame Data Send / Receive Register 424" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1700] ,Byte [1700]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1699] ,Byte [1699]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1698] ,Byte [1698]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1697] ,Byte [1697]" group.long 0x6B0++0x03 line.long 0x00 "RCI_TXRX_DATA425,Frame Data Send / Receive Register 425" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1704] ,Byte [1704]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1703] ,Byte [1703]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1702] ,Byte [1702]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1701] ,Byte [1701]" group.long 0x6B4++0x03 line.long 0x00 "RCI_TXRX_DATA426,Frame Data Send / Receive Register 426" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1708] ,Byte [1708]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1707] ,Byte [1707]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1706] ,Byte [1706]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1705] ,Byte [1705]" group.long 0x6B8++0x03 line.long 0x00 "RCI_TXRX_DATA427,Frame Data Send / Receive Register 427" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1712] ,Byte [1712]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1711] ,Byte [1711]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1710] ,Byte [1710]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1709] ,Byte [1709]" group.long 0x6BC++0x03 line.long 0x00 "RCI_TXRX_DATA428,Frame Data Send / Receive Register 428" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1716] ,Byte [1716]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1715] ,Byte [1715]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1714] ,Byte [1714]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1713] ,Byte [1713]" group.long 0x6C0++0x03 line.long 0x00 "RCI_TXRX_DATA429,Frame Data Send / Receive Register 429" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1720] ,Byte [1720]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1719] ,Byte [1719]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1718] ,Byte [1718]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1717] ,Byte [1717]" group.long 0x6C4++0x03 line.long 0x00 "RCI_TXRX_DATA430,Frame Data Send / Receive Register 430" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1724] ,Byte [1724]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1723] ,Byte [1723]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1722] ,Byte [1722]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1721] ,Byte [1721]" group.long 0x6C8++0x03 line.long 0x00 "RCI_TXRX_DATA431,Frame Data Send / Receive Register 431" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1728] ,Byte [1728]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1727] ,Byte [1727]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1726] ,Byte [1726]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1725] ,Byte [1725]" group.long 0x6CC++0x03 line.long 0x00 "RCI_TXRX_DATA432,Frame Data Send / Receive Register 432" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1732] ,Byte [1732]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1731] ,Byte [1731]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1730] ,Byte [1730]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1729] ,Byte [1729]" group.long 0x6D0++0x03 line.long 0x00 "RCI_TXRX_DATA433,Frame Data Send / Receive Register 433" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1736] ,Byte [1736]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1735] ,Byte [1735]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1734] ,Byte [1734]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1733] ,Byte [1733]" group.long 0x6D4++0x03 line.long 0x00 "RCI_TXRX_DATA434,Frame Data Send / Receive Register 434" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1740] ,Byte [1740]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1739] ,Byte [1739]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1738] ,Byte [1738]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1737] ,Byte [1737]" group.long 0x6D8++0x03 line.long 0x00 "RCI_TXRX_DATA435,Frame Data Send / Receive Register 435" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1744] ,Byte [1744]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1743] ,Byte [1743]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1742] ,Byte [1742]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1741] ,Byte [1741]" group.long 0x6DC++0x03 line.long 0x00 "RCI_TXRX_DATA436,Frame Data Send / Receive Register 436" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1748] ,Byte [1748]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1747] ,Byte [1747]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1746] ,Byte [1746]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1745] ,Byte [1745]" group.long 0x6E0++0x03 line.long 0x00 "RCI_TXRX_DATA437,Frame Data Send / Receive Register 437" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1752] ,Byte [1752]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1751] ,Byte [1751]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1750] ,Byte [1750]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1749] ,Byte [1749]" group.long 0x6E4++0x03 line.long 0x00 "RCI_TXRX_DATA438,Frame Data Send / Receive Register 438" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1756] ,Byte [1756]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1755] ,Byte [1755]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1754] ,Byte [1754]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1753] ,Byte [1753]" group.long 0x6E8++0x03 line.long 0x00 "RCI_TXRX_DATA439,Frame Data Send / Receive Register 439" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1760] ,Byte [1760]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1759] ,Byte [1759]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1758] ,Byte [1758]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1757] ,Byte [1757]" group.long 0x6EC++0x03 line.long 0x00 "RCI_TXRX_DATA440,Frame Data Send / Receive Register 440" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1764] ,Byte [1764]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1763] ,Byte [1763]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1762] ,Byte [1762]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1761] ,Byte [1761]" group.long 0x6F0++0x03 line.long 0x00 "RCI_TXRX_DATA441,Frame Data Send / Receive Register 441" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1768] ,Byte [1768]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1767] ,Byte [1767]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1766] ,Byte [1766]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1765] ,Byte [1765]" group.long 0x6F4++0x03 line.long 0x00 "RCI_TXRX_DATA442,Frame Data Send / Receive Register 442" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1772] ,Byte [1772]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1771] ,Byte [1771]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1770] ,Byte [1770]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1769] ,Byte [1769]" group.long 0x6F8++0x03 line.long 0x00 "RCI_TXRX_DATA443,Frame Data Send / Receive Register 443" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1776] ,Byte [1776]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1775] ,Byte [1775]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1774] ,Byte [1774]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1773] ,Byte [1773]" group.long 0x6FC++0x03 line.long 0x00 "RCI_TXRX_DATA444,Frame Data Send / Receive Register 444" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1780] ,Byte [1780]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1779] ,Byte [1779]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1778] ,Byte [1778]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1777] ,Byte [1777]" group.long 0x700++0x03 line.long 0x00 "RCI_TXRX_DATA445,Frame Data Send / Receive Register 445" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1784] ,Byte [1784]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1783] ,Byte [1783]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1782] ,Byte [1782]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1781] ,Byte [1781]" group.long 0x704++0x03 line.long 0x00 "RCI_TXRX_DATA446,Frame Data Send / Receive Register 446" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1788] ,Byte [1788]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1787] ,Byte [1787]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1786] ,Byte [1786]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1785] ,Byte [1785]" group.long 0x708++0x03 line.long 0x00 "RCI_TXRX_DATA447,Frame Data Send / Receive Register 447" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1792] ,Byte [1792]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1791] ,Byte [1791]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1790] ,Byte [1790]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1789] ,Byte [1789]" group.long 0x70C++0x03 line.long 0x00 "RCI_TXRX_DATA448,Frame Data Send / Receive Register 448" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1796] ,Byte [1796]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1795] ,Byte [1795]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1794] ,Byte [1794]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1793] ,Byte [1793]" group.long 0x710++0x03 line.long 0x00 "RCI_TXRX_DATA449,Frame Data Send / Receive Register 449" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1800] ,Byte [1800]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1799] ,Byte [1799]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1798] ,Byte [1798]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1797] ,Byte [1797]" group.long 0x714++0x03 line.long 0x00 "RCI_TXRX_DATA450,Frame Data Send / Receive Register 450" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1804] ,Byte [1804]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1803] ,Byte [1803]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1802] ,Byte [1802]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1801] ,Byte [1801]" group.long 0x718++0x03 line.long 0x00 "RCI_TXRX_DATA451,Frame Data Send / Receive Register 451" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1808] ,Byte [1808]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1807] ,Byte [1807]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1806] ,Byte [1806]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1805] ,Byte [1805]" group.long 0x71C++0x03 line.long 0x00 "RCI_TXRX_DATA452,Frame Data Send / Receive Register 452" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1812] ,Byte [1812]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1811] ,Byte [1811]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1810] ,Byte [1810]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1809] ,Byte [1809]" group.long 0x720++0x03 line.long 0x00 "RCI_TXRX_DATA453,Frame Data Send / Receive Register 453" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1816] ,Byte [1816]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1815] ,Byte [1815]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1814] ,Byte [1814]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1813] ,Byte [1813]" group.long 0x724++0x03 line.long 0x00 "RCI_TXRX_DATA454,Frame Data Send / Receive Register 454" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1820] ,Byte [1820]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1819] ,Byte [1819]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1818] ,Byte [1818]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1817] ,Byte [1817]" group.long 0x728++0x03 line.long 0x00 "RCI_TXRX_DATA455,Frame Data Send / Receive Register 455" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1824] ,Byte [1824]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1823] ,Byte [1823]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1822] ,Byte [1822]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1821] ,Byte [1821]" group.long 0x72C++0x03 line.long 0x00 "RCI_TXRX_DATA456,Frame Data Send / Receive Register 456" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1828] ,Byte [1828]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1827] ,Byte [1827]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1826] ,Byte [1826]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1825] ,Byte [1825]" group.long 0x730++0x03 line.long 0x00 "RCI_TXRX_DATA457,Frame Data Send / Receive Register 457" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1832] ,Byte [1832]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1831] ,Byte [1831]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1830] ,Byte [1830]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1829] ,Byte [1829]" group.long 0x734++0x03 line.long 0x00 "RCI_TXRX_DATA458,Frame Data Send / Receive Register 458" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1836] ,Byte [1836]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1835] ,Byte [1835]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1834] ,Byte [1834]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1833] ,Byte [1833]" group.long 0x738++0x03 line.long 0x00 "RCI_TXRX_DATA459,Frame Data Send / Receive Register 459" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1840] ,Byte [1840]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1839] ,Byte [1839]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1838] ,Byte [1838]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1837] ,Byte [1837]" group.long 0x73C++0x03 line.long 0x00 "RCI_TXRX_DATA460,Frame Data Send / Receive Register 460" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1844] ,Byte [1844]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1843] ,Byte [1843]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1842] ,Byte [1842]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1841] ,Byte [1841]" group.long 0x740++0x03 line.long 0x00 "RCI_TXRX_DATA461,Frame Data Send / Receive Register 461" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1848] ,Byte [1848]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1847] ,Byte [1847]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1846] ,Byte [1846]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1845] ,Byte [1845]" group.long 0x744++0x03 line.long 0x00 "RCI_TXRX_DATA462,Frame Data Send / Receive Register 462" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1852] ,Byte [1852]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1851] ,Byte [1851]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1850] ,Byte [1850]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1849] ,Byte [1849]" group.long 0x748++0x03 line.long 0x00 "RCI_TXRX_DATA463,Frame Data Send / Receive Register 463" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1856] ,Byte [1856]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1855] ,Byte [1855]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1854] ,Byte [1854]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1853] ,Byte [1853]" group.long 0x74C++0x03 line.long 0x00 "RCI_TXRX_DATA464,Frame Data Send / Receive Register 464" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1860] ,Byte [1860]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1859] ,Byte [1859]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1858] ,Byte [1858]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1857] ,Byte [1857]" group.long 0x750++0x03 line.long 0x00 "RCI_TXRX_DATA465,Frame Data Send / Receive Register 465" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1864] ,Byte [1864]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1863] ,Byte [1863]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1862] ,Byte [1862]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1861] ,Byte [1861]" group.long 0x754++0x03 line.long 0x00 "RCI_TXRX_DATA466,Frame Data Send / Receive Register 466" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1868] ,Byte [1868]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1867] ,Byte [1867]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1866] ,Byte [1866]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1865] ,Byte [1865]" group.long 0x758++0x03 line.long 0x00 "RCI_TXRX_DATA467,Frame Data Send / Receive Register 467" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1872] ,Byte [1872]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1871] ,Byte [1871]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1870] ,Byte [1870]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1869] ,Byte [1869]" group.long 0x75C++0x03 line.long 0x00 "RCI_TXRX_DATA468,Frame Data Send / Receive Register 468" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1876] ,Byte [1876]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1875] ,Byte [1875]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1874] ,Byte [1874]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1873] ,Byte [1873]" group.long 0x760++0x03 line.long 0x00 "RCI_TXRX_DATA469,Frame Data Send / Receive Register 469" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1880] ,Byte [1880]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1879] ,Byte [1879]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1878] ,Byte [1878]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1877] ,Byte [1877]" group.long 0x764++0x03 line.long 0x00 "RCI_TXRX_DATA470,Frame Data Send / Receive Register 470" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1884] ,Byte [1884]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1883] ,Byte [1883]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1882] ,Byte [1882]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1881] ,Byte [1881]" group.long 0x768++0x03 line.long 0x00 "RCI_TXRX_DATA471,Frame Data Send / Receive Register 471" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1888] ,Byte [1888]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1887] ,Byte [1887]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1886] ,Byte [1886]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1885] ,Byte [1885]" group.long 0x76C++0x03 line.long 0x00 "RCI_TXRX_DATA472,Frame Data Send / Receive Register 472" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1892] ,Byte [1892]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1891] ,Byte [1891]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1890] ,Byte [1890]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1889] ,Byte [1889]" group.long 0x770++0x03 line.long 0x00 "RCI_TXRX_DATA473,Frame Data Send / Receive Register 473" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1896] ,Byte [1896]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1895] ,Byte [1895]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1894] ,Byte [1894]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1893] ,Byte [1893]" group.long 0x774++0x03 line.long 0x00 "RCI_TXRX_DATA474,Frame Data Send / Receive Register 474" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1900] ,Byte [1900]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1899] ,Byte [1899]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1898] ,Byte [1898]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1897] ,Byte [1897]" group.long 0x778++0x03 line.long 0x00 "RCI_TXRX_DATA475,Frame Data Send / Receive Register 475" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1904] ,Byte [1904]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1903] ,Byte [1903]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1902] ,Byte [1902]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1901] ,Byte [1901]" group.long 0x77C++0x03 line.long 0x00 "RCI_TXRX_DATA476,Frame Data Send / Receive Register 476" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1908] ,Byte [1908]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1907] ,Byte [1907]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1906] ,Byte [1906]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1905] ,Byte [1905]" group.long 0x780++0x03 line.long 0x00 "RCI_TXRX_DATA477,Frame Data Send / Receive Register 477" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1912] ,Byte [1912]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1911] ,Byte [1911]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1910] ,Byte [1910]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1909] ,Byte [1909]" group.long 0x784++0x03 line.long 0x00 "RCI_TXRX_DATA478,Frame Data Send / Receive Register 478" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1916] ,Byte [1916]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1915] ,Byte [1915]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1914] ,Byte [1914]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1913] ,Byte [1913]" group.long 0x788++0x03 line.long 0x00 "RCI_TXRX_DATA479,Frame Data Send / Receive Register 479" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1920] ,Byte [1920]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1919] ,Byte [1919]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1918] ,Byte [1918]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1917] ,Byte [1917]" group.long 0x78C++0x03 line.long 0x00 "RCI_TXRX_DATA480,Frame Data Send / Receive Register 480" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1924] ,Byte [1924]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1923] ,Byte [1923]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1922] ,Byte [1922]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1921] ,Byte [1921]" group.long 0x790++0x03 line.long 0x00 "RCI_TXRX_DATA481,Frame Data Send / Receive Register 481" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1928] ,Byte [1928]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1927] ,Byte [1927]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1926] ,Byte [1926]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1925] ,Byte [1925]" group.long 0x794++0x03 line.long 0x00 "RCI_TXRX_DATA482,Frame Data Send / Receive Register 482" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1932] ,Byte [1932]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1931] ,Byte [1931]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1930] ,Byte [1930]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1929] ,Byte [1929]" group.long 0x798++0x03 line.long 0x00 "RCI_TXRX_DATA483,Frame Data Send / Receive Register 483" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1936] ,Byte [1936]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1935] ,Byte [1935]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1934] ,Byte [1934]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1933] ,Byte [1933]" group.long 0x79C++0x03 line.long 0x00 "RCI_TXRX_DATA484,Frame Data Send / Receive Register 484" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1940] ,Byte [1940]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1939] ,Byte [1939]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1938] ,Byte [1938]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1937] ,Byte [1937]" group.long 0x7A0++0x03 line.long 0x00 "RCI_TXRX_DATA485,Frame Data Send / Receive Register 485" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1944] ,Byte [1944]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1943] ,Byte [1943]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1942] ,Byte [1942]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1941] ,Byte [1941]" group.long 0x7A4++0x03 line.long 0x00 "RCI_TXRX_DATA486,Frame Data Send / Receive Register 486" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1948] ,Byte [1948]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1947] ,Byte [1947]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1946] ,Byte [1946]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1945] ,Byte [1945]" group.long 0x7A8++0x03 line.long 0x00 "RCI_TXRX_DATA487,Frame Data Send / Receive Register 487" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1952] ,Byte [1952]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1951] ,Byte [1951]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1950] ,Byte [1950]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1949] ,Byte [1949]" group.long 0x7AC++0x03 line.long 0x00 "RCI_TXRX_DATA488,Frame Data Send / Receive Register 488" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1956] ,Byte [1956]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1955] ,Byte [1955]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1954] ,Byte [1954]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1953] ,Byte [1953]" group.long 0x7B0++0x03 line.long 0x00 "RCI_TXRX_DATA489,Frame Data Send / Receive Register 489" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1960] ,Byte [1960]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1959] ,Byte [1959]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1958] ,Byte [1958]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1957] ,Byte [1957]" group.long 0x7B4++0x03 line.long 0x00 "RCI_TXRX_DATA490,Frame Data Send / Receive Register 490" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1964] ,Byte [1964]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1963] ,Byte [1963]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1962] ,Byte [1962]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1961] ,Byte [1961]" group.long 0x7B8++0x03 line.long 0x00 "RCI_TXRX_DATA491,Frame Data Send / Receive Register 491" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1968] ,Byte [1968]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1967] ,Byte [1967]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1966] ,Byte [1966]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1965] ,Byte [1965]" group.long 0x7BC++0x03 line.long 0x00 "RCI_TXRX_DATA492,Frame Data Send / Receive Register 492" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1972] ,Byte [1972]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1971] ,Byte [1971]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1970] ,Byte [1970]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1969] ,Byte [1969]" group.long 0x7C0++0x03 line.long 0x00 "RCI_TXRX_DATA493,Frame Data Send / Receive Register 493" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1976] ,Byte [1976]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1975] ,Byte [1975]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1974] ,Byte [1974]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1973] ,Byte [1973]" group.long 0x7C4++0x03 line.long 0x00 "RCI_TXRX_DATA494,Frame Data Send / Receive Register 494" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1980] ,Byte [1980]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1979] ,Byte [1979]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1978] ,Byte [1978]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1977] ,Byte [1977]" group.long 0x7C8++0x03 line.long 0x00 "RCI_TXRX_DATA495,Frame Data Send / Receive Register 495" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1984] ,Byte [1984]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1983] ,Byte [1983]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1982] ,Byte [1982]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1981] ,Byte [1981]" group.long 0x7CC++0x03 line.long 0x00 "RCI_TXRX_DATA496,Frame Data Send / Receive Register 496" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1988] ,Byte [1988]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1987] ,Byte [1987]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1986] ,Byte [1986]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1985] ,Byte [1985]" group.long 0x7D0++0x03 line.long 0x00 "RCI_TXRX_DATA497,Frame Data Send / Receive Register 497" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1992] ,Byte [1992]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1991] ,Byte [1991]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1990] ,Byte [1990]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1989] ,Byte [1989]" group.long 0x7D4++0x03 line.long 0x00 "RCI_TXRX_DATA498,Frame Data Send / Receive Register 498" hexmask.long.byte 0x00 24.--31. 1. " BYTE[1996] ,Byte [1996]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1995] ,Byte [1995]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1994] ,Byte [1994]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1993] ,Byte [1993]" group.long 0x7D8++0x03 line.long 0x00 "RCI_TXRX_DATA499,Frame Data Send / Receive Register 499" hexmask.long.byte 0x00 24.--31. 1. " BYTE[2000] ,Byte [2000]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[1999] ,Byte [1999]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[1998] ,Byte [1998]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[1997] ,Byte [1997]" group.long 0x7DC++0x03 line.long 0x00 "RCI_TXRX_DATA500,Frame Data Send / Receive Register 500" hexmask.long.byte 0x00 24.--31. 1. " BYTE[2004] ,Byte [2004]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[2003] ,Byte [2003]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[2002] ,Byte [2002]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[2001] ,Byte [2001]" group.long 0x7E0++0x03 line.long 0x00 "RCI_TXRX_DATA501,Frame Data Send / Receive Register 501" hexmask.long.byte 0x00 24.--31. 1. " BYTE[2008] ,Byte [2008]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[2007] ,Byte [2007]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[2006] ,Byte [2006]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[2005] ,Byte [2005]" group.long 0x7E4++0x03 line.long 0x00 "RCI_TXRX_DATA502,Frame Data Send / Receive Register 502" hexmask.long.byte 0x00 24.--31. 1. " BYTE[2012] ,Byte [2012]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[2011] ,Byte [2011]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[2010] ,Byte [2010]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[2009] ,Byte [2009]" group.long 0x7E8++0x03 line.long 0x00 "RCI_TXRX_DATA503,Frame Data Send / Receive Register 503" hexmask.long.byte 0x00 24.--31. 1. " BYTE[2016] ,Byte [2016]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[2015] ,Byte [2015]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[2014] ,Byte [2014]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[2013] ,Byte [2013]" group.long 0x7EC++0x03 line.long 0x00 "RCI_TXRX_DATA504,Frame Data Send / Receive Register 504" hexmask.long.byte 0x00 24.--31. 1. " BYTE[2020] ,Byte [2020]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[2019] ,Byte [2019]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[2018] ,Byte [2018]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[2017] ,Byte [2017]" group.long 0x7F0++0x03 line.long 0x00 "RCI_TXRX_DATA505,Frame Data Send / Receive Register 505" hexmask.long.byte 0x00 24.--31. 1. " BYTE[2024] ,Byte [2024]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[2023] ,Byte [2023]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[2022] ,Byte [2022]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[2021] ,Byte [2021]" group.long 0x7F4++0x03 line.long 0x00 "RCI_TXRX_DATA506,Frame Data Send / Receive Register 506" hexmask.long.byte 0x00 24.--31. 1. " BYTE[2028] ,Byte [2028]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[2027] ,Byte [2027]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[2026] ,Byte [2026]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[2025] ,Byte [2025]" group.long 0x7F8++0x03 line.long 0x00 "RCI_TXRX_DATA507,Frame Data Send / Receive Register 507" hexmask.long.byte 0x00 24.--31. 1. " BYTE[2032] ,Byte [2032]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[2031] ,Byte [2031]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[2030] ,Byte [2030]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[2029] ,Byte [2029]" group.long 0x7FC++0x03 line.long 0x00 "RCI_TXRX_DATA508,Frame Data Send / Receive Register 508" hexmask.long.byte 0x00 24.--31. 1. " BYTE[2036] ,Byte [2036]" hexmask.long.byte 0x00 16.--23. 1. " BYTE[2035] ,Byte [2035]" hexmask.long.byte 0x00 8.--15. 1. " BYTE[2034] ,Byte [2034]" hexmask.long.byte 0x00 0.--7. 1. " BYTE[2033] ,Byte [2033]" textline " " tree.end group.long 0x8000++0x07 line.long 0x00 "R_MACADL,Own MAC Address Low Register" line.long 0x04 "R_MACADH,Own MAC Address High Register" bitfld.long 0x04 31. " MLE ,MAC learning enable" "Disabled,Enabled" hexmask.long.word 0x04 0.--15. 0x01 " MAH ,MAC address high" rgroup.long 0x8008++0x03 line.long 0x00 "R_TST1,Alive Test 1 Register" group.long 0x800C++0x0F line.long 0x00 "R_TST2,Alive Test 2 Register" line.long 0x04 "R_PEN,Port Enable Register" bitfld.long 0x04 29.--31. " RBM ,RedBox operation mode" "HSR-SAN,HSR-PRP A,HSR-PRP B,HSR-HSR,?..." bitfld.long 0x04 25.--28. " HPC ,HSR path CPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 21.--24. " HPI ,HSR path interlink" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 18.--20. " NOM ,Node operating mode" "H,N,T,,U,?..." textline " " bitfld.long 0x04 8. " CUP ,Cut PRP trailer" "Not cut,Cut" bitfld.long 0x04 7. " BTE ,Port B TX enable" "Disabled,Enabled" bitfld.long 0x04 6. " ATE ,Port A TX enable" "Disabled,Enabled" bitfld.long 0x04 5. " ITE ,Interlink TX enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " CTE ,CPU TX enable" "Disabled,Enabled" bitfld.long 0x04 3. " BRE ,Port B RX enable" "Disabled,Enabled" bitfld.long 0x04 2. " ARE ,Port A RX enable" "Disabled,Enabled" bitfld.long 0x04 1. " IRE ,Interlink RX enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " CRE ,CPU RX enable" "Disabled,Enabled" line.long 0x08 "R_PNT_AGT,Proxynode Table Aging Time Register" hexmask.long.word 0x08 0.--15. 1. " AT ,Aging time" line.long 0x0C "R_DD_AGT,Duplicate Detection Aging Time Register" bitfld.long 0x0C 31. " DIS ,Aging disable" "No,Yes" rbitfld.long 0x0C 27.--30. " LEN ,Length" "0,256,512,768,1024,1280,1536,1792,2048,2304,2560,2816,3072,3328,3584,3840" hexmask.long.tbyte 0x0C 0.--17. 1. " AT ,Aging time" textline " " group.long 0x801C++0x07 line.long 0x00 "R_MACFLT_I1L,Filter MAC Address Interlink 1 Low Register" line.long 0x04 "R_MACFLT_I1H,Filter MAC Address Interlink 1 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x8024++0x07 line.long 0x00 "R_MACFLT_I2L,Filter MAC Address Interlink 2 Low Register" line.long 0x04 "R_MACFLT_I2H,Filter MAC Address Interlink 2 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x802C++0x07 line.long 0x00 "R_MACFLT_I3L,Filter MAC Address Interlink 3 Low Register" line.long 0x04 "R_MACFLT_I3H,Filter MAC Address Interlink 3 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x8034++0x07 line.long 0x00 "R_MACFLT_I4L,Filter MAC Address Interlink 4 Low Register" line.long 0x04 "R_MACFLT_I4H,Filter MAC Address Interlink 4 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x803C++0x07 line.long 0x00 "R_MACFLT_I5L,Filter MAC Address Interlink 5 Low Register" line.long 0x04 "R_MACFLT_I5H,Filter MAC Address Interlink 5 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x8044++0x07 line.long 0x00 "R_MACFLT_I6L,Filter MAC Address Interlink 6 Low Register" line.long 0x04 "R_MACFLT_I6H,Filter MAC Address Interlink 6 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x804C++0x07 line.long 0x00 "R_MACFLT_I7L,Filter MAC Address Interlink 7 Low Register" line.long 0x04 "R_MACFLT_I7H,Filter MAC Address Interlink 7 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x8054++0x07 line.long 0x00 "R_MACFLT_I8L,Filter MAC Address Interlink 8 Low Register" line.long 0x04 "R_MACFLT_I8H,Filter MAC Address Interlink 8 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x805C++0x07 line.long 0x00 "R_MACFLT_C1L,Filter MAC Address CPU 1 Low Register" line.long 0x04 "R_MACFLT_C1H,Filter MAC Address CPU 1 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x8064++0x07 line.long 0x00 "R_MACFLT_C2L,Filter MAC Address CPU 2 Low Register" line.long 0x04 "R_MACFLT_C2H,Filter MAC Address CPU 2 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x806C++0x07 line.long 0x00 "R_MACFLT_C3L,Filter MAC Address CPU 3 Low Register" line.long 0x04 "R_MACFLT_C3H,Filter MAC Address CPU 3 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x8074++0x07 line.long 0x00 "R_MACFLT_C4L,Filter MAC Address CPU 4 Low Register" line.long 0x04 "R_MACFLT_C4H,Filter MAC Address CPU 4 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x807C++0x07 line.long 0x00 "R_MACFLT_C5L,Filter MAC Address CPU 5 Low Register" line.long 0x04 "R_MACFLT_C5H,Filter MAC Address CPU 5 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" group.long 0x8084++0x07 line.long 0x00 "R_MACFLT_C6L,Filter MAC Address CPU 6 Low Register" line.long 0x04 "R_MACFLT_C6H,Filter MAC Address CPU 6 High Register" bitfld.long 0x04 31. " FBM[11] ,Filter bit mask[11]" "Unmasked,Masked" bitfld.long 0x04 30. " [10] ,Filter bit mask[10]" "Unmasked,Masked" bitfld.long 0x04 29. " [9] ,Filter bit mask[9]" "Unmasked,Masked" bitfld.long 0x04 28. " [8] ,Filter bit mask[8]" "Unmasked,Masked" textline " " bitfld.long 0x04 27. " [7] ,Filter bit mask[7]" "Unmasked,Masked" bitfld.long 0x04 26. " [6] ,Filter bit mask[6]" "Unmasked,Masked" bitfld.long 0x04 25. " [5] ,Filter bit mask[5]" "Unmasked,Masked" bitfld.long 0x04 24. " [4] ,Filter bit mask[4]" "Unmasked,Masked" textline " " bitfld.long 0x04 23. " [3] ,Filter bit mask[3]" "Unmasked,Masked" bitfld.long 0x04 22. " [2] ,Filter bit mask[2]" "Unmasked,Masked" bitfld.long 0x04 21. " [1] ,Filter bit mask[1]" "Unmasked,Masked" bitfld.long 0x04 20. " [0] ,Filter bit mask[0]" "Unmasked,Masked" textline " " hexmask.long.word 0x04 0.--15. 0x01 " FMH ,Mac address high" textline " " rgroup.long 0x808C++0x6F line.long 0x00 "R_VER,HSR Version Register" bitfld.long 0x00 30.--31. " NT ,Node type" "0,1,HSR,3" hexmask.long.byte 0x00 8.--15. 1. " CVM ,Core version main" hexmask.long.byte 0x00 0.--7. 1. " CVS ,Core version sub" line.long 0x04 "R_RAM_STA,RAM Status Register" hexmask.long.word 0x04 16.--31. 1. " FP ,Free pages" hexmask.long.word 0x04 0.--15. 1. " FH ,Free headers" line.long 0x08 "R_UFMC,Used Frame Memory Count Register" line.long 0x0C "R_FRA_ALL_ARX,Received Frame A Register" line.long 0x10 "R_FRA_TAG_ARX,Received Tagged Frame A Register" line.long 0x14 "R_FRA_NLL_ARX,Received Not Linklocal Frame A Register" line.long 0x18 "R_FRA_ERR_ARX,Received Error Frame A Register" line.long 0x1C "R_FRA_WRO_ARX,Wrong LAN Frame A Register" line.long 0x20 "R_FRA_ALL_ATX,Sent Frame A Register" line.long 0x24 "R_FRA_TAG_ATX,Sent Tagged Frame A Register" line.long 0x28 "R_FRA_NLL_ATX,Sent Not Linklocal Frame A Register" line.long 0x2C "R_FRA_ALL_BRX,Received Not Linklocal Frame B Register" line.long 0x30 "R_FRA_TAG_BRX,Received Tagged Frame B Register" line.long 0x34 "R_FRA_NLL_BRX,Received Not Linklocal Frame B Reg" line.long 0x38 "R_FRA_ERR_BRX,Received Error B Register" line.long 0x3C "R_FRA_WRO_BRX,Wrong LAN Count B Register" line.long 0x40 "R_FRA_ALL_BTX,Sent Frame B Register" line.long 0x44 "R_FRA_TAG_BTX,Sent Tagged Frame B Register" line.long 0x48 "R_FRA_NLL_BTX,Sent Not Linklocal Frame B Register" line.long 0x4C "R_FRA_ALL_CRX,Received Frame C Register" line.long 0x50 "R_FRA_TAG_CRX,Received Tagged Frame C Register" line.long 0x54 "R_FRA_NLL_CRX,Received Not Linklocal Frame C Register" line.long 0x58 "R_FRA_ERR_CRX,Received Error C Register" line.long 0x5C "R_FRA_WRO_CRX,Wrong LAN Count C Register" line.long 0x60 "R_FRA_ALL_CTX,Sent Frame C Register" line.long 0x64 "R_FRA_TAG_CTX,Sent Tagged Frame C Register" line.long 0x68 "R_FRA_NLL_CTX,Sent Not Linklocal Frame C Reg" line.long 0x6C "R_FREE_FRA_M,Free Frame Memory Count" group.long 0x80FC++0x07 line.long 0x00 "R_DBG_RPT1,Internal Debug Reports Register 1" bitfld.long 0x00 12. " D44 ,Internal error" "No error,Error" bitfld.long 0x00 11. " D43 ,RX very short frame" "No error,Error" bitfld.long 0x00 10. " D42 ,RX SFD missing" "No error,Error" bitfld.long 0x00 9. " D41 ,Internal error" "No error,Error" textline " " bitfld.long 0x00 8. " D40 ,Internal error" "No error,Error" bitfld.long 0x00 7. " D39 ,Internal error" "No error,Error" bitfld.long 0x00 6. " D38 ,Internal error" "No error,Error" bitfld.long 0x00 5. " D37 ,Internal error" "No error,Error" textline " " bitfld.long 0x00 4. " D36 ,Internal error" "No error,Error" bitfld.long 0x00 3. " D35 ,Internal error" "No error,Error" bitfld.long 0x00 2. " D34 ,Internal error" "No error,Error" bitfld.long 0x00 1. " D33 ,RX freeing frame" "No error,Error" textline " " bitfld.long 0x00 0. " D32 ,RX CRC error" "No error,Error" line.long 0x04 "R_DBG_RPT2,Internal Debug Reports Register 2" bitfld.long 0x04 31. " D31 ,RX frame error" "No error,Error" bitfld.long 0x04 30. " D30 ,RX oversized frame" "No error,Error" bitfld.long 0x04 29. " D29 ,RX short frame" "No error,Error" bitfld.long 0x04 28. " D28 ,RX destroy frame" "No error,Error" textline " " bitfld.long 0x04 27. " D27 ,RX switch not ready" "No error,Error" bitfld.long 0x04 26. " D26 ,RX data-ram full" "No error,Error" bitfld.long 0x04 25. " D25 ,TX truncating" "No error,Error" bitfld.long 0x04 24. " D24 ,Internal error" "No error,Error" textline " " bitfld.long 0x04 23. " D23 ,Internal error" "No error,Error" bitfld.long 0x04 22. " D22 ,Internal error" "No error,Error" bitfld.long 0x04 21. " D21 ,Internal error" "No error,Error" bitfld.long 0x04 20. " D20 ,CPU queue full" "No error,Error" textline " " bitfld.long 0x04 19. " D19 ,Port A queue full" "No error,Error" bitfld.long 0x04 18. " D18 ,Port B queue full" "No error,Error" bitfld.long 0x04 17. " D17 ,Interlink queue full" "No error,Error" bitfld.long 0x04 15. " D15 ,Data-ram full" "No error,Error" textline " " bitfld.long 0x04 12. " D12 ,Internal error" "No error,Error" bitfld.long 0x04 11. " D11 ,Internal error" "No error,Error" bitfld.long 0x04 10. " D10 ,Internal error" "No error,Error" bitfld.long 0x04 9. " D9 ,Header ram full" "No error,Error" textline " " bitfld.long 0x04 8. " D8 ,TX skip frame" "No error,Error" bitfld.long 0x04 7. " D7 ,TX discarding duplicate" "No error,Error" bitfld.long 0x04 6. " D6 ,Internal error" "No error,Error" bitfld.long 0x04 5. " D5 ,Ready still high" "No error,Error" textline " " bitfld.long 0x04 4. " D4 ,Internal error" "No error,Error" bitfld.long 0x04 3. " D3 ,Proxynode table full" "No error,Error" bitfld.long 0x04 2. " D2 ,No proxynode entry" "No error,Error" bitfld.long 0x04 1. " D1 ,Internal error" "No error,Error" textline " " bitfld.long 0x04 0. " D0 ,Internal error" "No error,Error" rgroup.long 0x8104++0x07 line.long 0x00 "R_PNT_S,Proxynodetable Status Register" hexmask.long.word 0x00 16.--31. 1. " PNTS ,Proxynodetable size" hexmask.long.word 0x00 0.--15. 1. " PNTP ,Proxynodetable pointer" line.long 0x04 "R_PNT_D,Proxynodetable Data Register" rgroup.long 0xC000++0x03 line.long 0x00 "RPTP_ID,PTP Core ID Register" hexmask.long.word 0x00 0.--15. 1. " ID ,ID" group.long 0xC004++0x03 line.long 0x00 "RPTP_TST,PTP Core Test Register" hexmask.long.word 0x00 0.--15. 1. " TST ,Test 2" rgroup.long 0xC008++0x03 line.long 0x00 "RPTP_VER,Version Register" bitfld.long 0x00 12.--15. " IJV ,Interface major version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " IIV ,Interface minor version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " FJV ,PTP FPGA major version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " FIV ,PTP FPGA minor version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xC00C++0x03 line.long 0x00 "RPTP_GPO,General Purpose Register" bitfld.long 0x00 10. " OSE ,One-step enable" "Disabled,Enabled" hexmask.long.byte 0x00 2.--9. 1. " PDN ,PTPv2 domain number" bitfld.long 0x00 0. " RPT ,Reset PTP" "Disabled,Enabled" rgroup.long 0xC014++0x03 line.long 0x00 "RPTP_INT,Interrupt Register" bitfld.long 0x00 3. " B ,Port B interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " A ,Port A interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " I ,Interlink interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " CPU ,CPU interrupt" "No interrupt,Interrupt" group.long 0xC018++0x03 line.long 0x00 "RPTP_INT_MSK,Interrupt Mask Register" bitfld.long 0x00 3. " B ,Port B interrupt" "Masked,Unmasked" bitfld.long 0x00 2. " A ,Port A interrupt" "Masked,Unmasked" bitfld.long 0x00 1. " I ,Interlink interrupt" "Masked,Unmasked" bitfld.long 0x00 0. " CPU ,CPU interrupt" "Masked,Unmasked" group.long 0xC044++0x03 line.long 0x00 "RPTP_TS_STAT_1,Timestamp Status Register P 1" bitfld.long 0x00 15. " EN ,Timestamp enable" "Disabled,Enabled" rbitfld.long 0x00 8.--12. " TRP ,Timestamp read position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 4.--7. " DE ,Discarded events" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0xC044+0x04)++0x07 line.long 0x00 "RPTP_TS_RD_1,Timestamp Read Register P 1" hexmask.long.word 0x00 0.--15. 1. " TS ,Timestamp" line.long 0x04 "RPTP_PORT_CONF_1,Port Config Register P 1" bitfld.long 0x04 2.--3. " PDP ,Peer delay position" "0,1,2,3" group.long (0xC044+0x0C)++0x0B line.long 0x00 "RPTP_P_DELAY_1,Peer Delay Register P 1" hexmask.long.word 0x00 0.--15. 1. " PED ,Peer delay" line.long 0x04 "RPTP_PHY_DLY_TX_1,PHY Tx Delay Register P 1" hexmask.long.word 0x04 0.--15. 1. " PDT ,PHY delay TX" line.long 0x08 "RPTP_PHY_DLY_RX_1,PHY Rx Delay Register P 1" hexmask.long.word 0x08 0.--15. 1. " PDR ,PHY delay RX" group.long 0xC05C++0x03 line.long 0x00 "RPTP_TS_STAT_2,Timestamp Status Register P 2" bitfld.long 0x00 15. " EN ,Timestamp enable" "Disabled,Enabled" rbitfld.long 0x00 8.--12. " TRP ,Timestamp read position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 4.--7. " DE ,Discarded events" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0xC05C+0x04)++0x07 line.long 0x00 "RPTP_TS_RD_2,Timestamp Read Register P 2" hexmask.long.word 0x00 0.--15. 1. " TS ,Timestamp" line.long 0x04 "RPTP_PORT_CONF_2,Port Config Register P 2" bitfld.long 0x04 2.--3. " PDP ,Peer delay position" "0,1,2,3" group.long (0xC05C+0x0C)++0x0B line.long 0x00 "RPTP_P_DELAY_2,Peer Delay Register P 2" hexmask.long.word 0x00 0.--15. 1. " PED ,Peer delay" line.long 0x04 "RPTP_PHY_DLY_TX_2,PHY Tx Delay Register P 2" hexmask.long.word 0x04 0.--15. 1. " PDT ,PHY delay TX" line.long 0x08 "RPTP_PHY_DLY_RX_2,PHY Rx Delay Register P 2" hexmask.long.word 0x08 0.--15. 1. " PDR ,PHY delay RX" group.long 0xC074++0x03 line.long 0x00 "RPTP_TS_STAT_3,Timestamp Status Register P 3" bitfld.long 0x00 15. " EN ,Timestamp enable" "Disabled,Enabled" rbitfld.long 0x00 8.--12. " TRP ,Timestamp read position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 4.--7. " DE ,Discarded events" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0xC074+0x04)++0x07 line.long 0x00 "RPTP_TS_RD_3,Timestamp Read Register P 3" hexmask.long.word 0x00 0.--15. 1. " TS ,Timestamp" line.long 0x04 "RPTP_PORT_CONF_3,Port Config Register P 3" bitfld.long 0x04 2.--3. " PDP ,Peer delay position" "0,1,2,3" group.long (0xC074+0x0C)++0x0B line.long 0x00 "RPTP_P_DELAY_3,Peer Delay Register P 3" hexmask.long.word 0x00 0.--15. 1. " PED ,Peer delay" line.long 0x04 "RPTP_PHY_DLY_TX_3,PHY Tx Delay Register P 3" hexmask.long.word 0x04 0.--15. 1. " PDT ,PHY delay TX" line.long 0x08 "RPTP_PHY_DLY_RX_3,PHY Rx Delay Register P 3" hexmask.long.word 0x08 0.--15. 1. " PDR ,PHY delay RX" group.long 0xC08C++0x03 line.long 0x00 "RPTP_TS_STAT_4,Timestamp Status Register P 4" bitfld.long 0x00 15. " EN ,Timestamp enable" "Disabled,Enabled" rbitfld.long 0x00 8.--12. " TRP ,Timestamp read position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 4.--7. " DE ,Discarded events" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long (0xC08C+0x04)++0x07 line.long 0x00 "RPTP_TS_RD_4,Timestamp Read Register P 4" hexmask.long.word 0x00 0.--15. 1. " TS ,Timestamp" line.long 0x04 "RPTP_PORT_CONF_4,Port Config Register P 4" bitfld.long 0x04 2.--3. " PDP ,Peer delay position" "0,1,2,3" group.long (0xC08C+0x0C)++0x0B line.long 0x00 "RPTP_P_DELAY_4,Peer Delay Register P 4" hexmask.long.word 0x00 0.--15. 1. " PED ,Peer delay" line.long 0x04 "RPTP_PHY_DLY_TX_4,PHY Tx Delay Register P 4" hexmask.long.word 0x04 0.--15. 1. " PDT ,PHY delay TX" line.long 0x08 "RPTP_PHY_DLY_RX_4,PHY Rx Delay Register P 4" hexmask.long.word 0x08 0.--15. 1. " PDR ,PHY delay RX" rgroup.long 0xC0A4++0x03 line.long 0x00 "RPTP_BUF_STAT,Buffer Status Register" bitfld.long 0x00 3. " B ,Port B timestamp ready" "Not ready,Ready" bitfld.long 0x00 2. " A ,Port A timestamp ready" "Not ready,Ready" bitfld.long 0x00 1. " I ,Interlink timestamp ready" "Not ready,Ready" bitfld.long 0x00 0. " CPU ,CPU timestamp ready" "Not ready,Ready" width 0x0B tree.end endif tree "Sercos III Slave Controller" base ad:0x44020000 width 14. rgroup.long 0x00++0x03 line.long 0x00 "IDR,Identification Register" hexmask.long.word 0x00 16.--31. 1. " S3FRAMETYPE ,Sercos III ethernet type" bitfld.long 0x00 13.--15. " DEVICETYPE ,Device type" "Master,Slave,?..." bitfld.long 0x00 10.--12. " TESTVERSION ,Test version" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 5.--9. " VERSION ,Device version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. " RELASE ,Device release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x04++0x07 line.long 0x00 "GCSFR,Global Control / Status / Feature Register" hexmask.long.byte 0x00 24.--31. 1. " HARDWAREVERSIONBUS ,Hardware version of the bus interface" rbitfld.long 0x00 16.--19. " SIZE_OF_MEMORY_BANKS ,Size of the memory bank when address space is segmented" "256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608" bitfld.long 0x00 15. " LINE_BREAD_MODE ,Line break detection delayed to following MST loss event" "Not detected,Detected" textline " " bitfld.long 0x00 8.--11. " LINE_BREAK_SENSITIVITY ,Line break sensitivity (RxErr and MII false carrier)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4. " DESCRIPTORFEEDBACK ,Enable usage of descriptor enable feedback status bits inside DFCSR" "Disabled,Enabled" bitfld.long 0x00 3. " BCASTDIS ,Disable forwarding of sercos III frames during NRT and to inactive port of loopback slave" "No,Yes" textline " " bitfld.long 0x00 2. " BCASTRED ,Reduce amount of forwarded sercos III frames to inactive port of a loopback slave" "Not reduced,Reduced" bitfld.long 0x00 1. " PHYRESET ,PHY Reset" "No reset,Reset" bitfld.long 0x00 0. " SR ,Software reset" "No reset,Reset" textline " " line.long 0x04 "IER0,Interrupt Enable Register" bitfld.long 0x04 23. " IE[23] ,Service channel interrupt 7" "No interrupt,Interrupt" bitfld.long 0x04 22. " [22] ,Service channel interrupt 6" "No interrupt,Interrupt" bitfld.long 0x04 21. " [21] ,Service channel interrupt 5" "No interrupt,Interrupt" textline " " bitfld.long 0x04 20. " [20] ,Service channel interrupt 4" "No interrupt,Interrupt" bitfld.long 0x04 19. " [19] ,Service channel interrupt 3" "No interrupt,Interrupt" bitfld.long 0x04 18. " [18] ,Service channel interrupt 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " [17] ,Service channel interrupt 1" "No interrupt,Interrupt" bitfld.long 0x04 16. " [16] ,Service channel interrupt 0" "No interrupt,Interrupt" bitfld.long 0x04 13. " [13] ,Internal reception buffer change for port 2 interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 12. " [12] ,Internal reception buffer change for port 1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 11. " [11] ,Maximum count of sequential MST errors reached interrupt" "No interrupt,Interrupt" bitfld.long 0x04 10. " [10] ,Int_Half_MST_error interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " [9] ,Event IP port 2 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Event IP port 1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 7. " [7] ,Interrupt from DIVCLK unit" "No interrupt,Interrupt" textline " " bitfld.long 0x04 6. " [6] ,Interrupt after valid user defined sercos III frame (SFCR)" "No interrupt,Interrupt" bitfld.long 0x04 5. " [5] ,Interrupt after valid user defined sercos III frame (SFCR)" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Event TMAX, created by timer/counter TCNT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " [3] ,Event TINT[3] created by timer/counter TCNT interrupt" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Event TINT[2] created by timer/counter TCNT interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " [1] ,Event TINT[1] created by timer/counter TCNT interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x04 0. " [0] ,Event TINT[0] created by timer/counter TCNT interrupt" "No interrupt,Interrupt" group.long 0x10++0x03 line.long 0x00 "IMR0,Interrupt Multiplex Register" bitfld.long 0x00 23. " IM[23] ,Service channel interrupt 7 output assign" "Not assigned,Assigned" bitfld.long 0x00 22. " [22] ,Service channel interrupt 6 output assign" "Not assigned,Assigned" bitfld.long 0x00 21. " [21] ,Service channel interrupt 5 output assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 20. " [20] ,Service channel interrupt 4 output assign" "Not assigned,Assigned" bitfld.long 0x00 19. " [19] ,Service channel interrupt 3 output assign" "Not assigned,Assigned" bitfld.long 0x00 18. " [18] ,Service channel interrupt 2 output assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 17. " [17] ,Service channel interrupt 1 output assign" "Not assigned,Assigned" bitfld.long 0x00 16. " [16] ,Service channel interrupt 0 output assign" "Not assigned,Assigned" bitfld.long 0x00 13. " [13] ,Internal reception buffer change for port 2 interrupt output assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 12. " [12] ,Internal reception buffer change for port 1 interrupt output assign" "Not assigned,Assigned" bitfld.long 0x00 11. " [11] ,Maximum count of sequential MST errors reached interrupt output assign" "Not assigned,Assigned" bitfld.long 0x00 10. " [10] ,Int_Half_MST_error interrupt output assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 9. " [9] ,Event IP port 2 interrupt output assign" "Not assigned,Assigned" bitfld.long 0x00 8. " [8] ,Event IP port 1 interrupt output assign" "Not assigned,Assigned" bitfld.long 0x00 7. " [7] ,Interrupt from DIVCLK unit output assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 6. " [6] ,Interrupt after valid user defined sercos III frame (SFCR) output assign" "Not assigned,Assigned" bitfld.long 0x00 5. " [5] ,Interrupt after valid user defined sercos III frame (SFCR) output assign" "Not assigned,Assigned" bitfld.long 0x00 4. " [4] ,Event TMAX, created by timer/counter TCNT interrupt output assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 3. " [3] ,Event TINT[3] created by timer/counter TCNT interrupt output assign" "Not assigned,Assigned" bitfld.long 0x00 2. " [2] ,Event TINT[2] created by timer/counter TCNT interrupt output assign" "Not assigned,Assigned" bitfld.long 0x00 1. " [1] ,Event TINT[1] created by timer/counter TCNT interrupt output assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 0. " [0] ,Event TINT[0] created by timer/counter TCNT interrupt output assign" "Not assigned,Assigned" textline " " group.long 0x18++0x03 line.long 0x00 "IRR0,Interrupt Reset/Status Register" bitfld.long 0x00 23. " IS[23] ,Service channel interrupt 7 reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 22. " [22] ,Service channel interrupt 6 reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 21. " [21] ,Service channel interrupt 5 reset/status bit" "No effect/No interrupt,Reset/Interrupt" textline " " bitfld.long 0x00 20. " [20] ,Service channel interrupt 4 reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 19. " [19] ,Service channel interrupt 3 reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 18. " [18] ,Service channel interrupt 2 reset/status bit" "No effect/No interrupt,Reset/Interrupt" textline " " bitfld.long 0x00 17. " [17] ,Service channel interrupt 1 reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 16. " [16] ,Service channel interrupt 0 reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 13. " [13] ,Internal reception buffer change for port 2 interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" textline " " bitfld.long 0x00 12. " [12] ,Internal reception buffer change for port 1 interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 11. " [11] ,Maximum count of sequential MST errors reached interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 10. " [10] ,Int_Half_MST_error interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" textline " " bitfld.long 0x00 9. " [9] ,Event IP port 2 interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 8. " [8] ,Event IP port 1 interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 7. " [7] ,Interrupt from DIVCLK unit reset/status bit" "No effect/No interrupt,Reset/Interrupt" textline " " bitfld.long 0x00 6. " [6] ,Interrupt after valid user defined sercos III frame (SFCR) reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 5. " [5] ,Interrupt after valid user defined sercos III frame (SFCR) reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 4. " [4] ,Event TMAX, created by timer/counter TCNT interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" textline " " bitfld.long 0x00 3. " [3] ,Event TINT[3] created by timer/counter TCNT interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 2. " [2] ,Event TINT[2] created by timer/counter TCNT interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" bitfld.long 0x00 1. " [1] ,Event TINT[1] created by timer/counter TCNT interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" textline " " bitfld.long 0x00 0. " [0] ,Event TINT[0] created by timer/counter TCNT interrupt reset/status bit" "No effect/No interrupt,Reset/Interrupt" textline " " group.long 0x20++0x03 line.long 0x00 "DFCSR,Data Flow Control/Status Register" rbitfld.long 0x00 31. " RXENABLEFEEDBACK ,Feedback of internal enable of the Rx descriptor units" "Disabled,Enabled" textline " " rbitfld.long 0x00 30. " TXENABLEFEEDBACK ,Feedback of internal enable of the Tx descriptor units" "Disabled,Enabled" textline " " rbitfld.long 0x00 27. " P2_RX_ALL_DONE ,Rx buffer change has finished for all systems" "Not finished,Finished" textline " " rbitfld.long 0x00 26. " P2_TX_ALL_DONE ,Tx buffer change has finished for all systems" "Not finished,Finished" textline " " rbitfld.long 0x00 25. " P1_RX_ALL_DONE ,Rx buffer change has finished for all systems" "Not finished,Finished" textline " " rbitfld.long 0x00 24. " P1_TX_ALL_DONE ,Tx buffer change has finished for all systems" "Not finished,Finished" textline " " rbitfld.long 0x00 23. " SWAP_COUNTERS ,P/S interpretation equal/inverse bit" "Equal to Port1/Port2,Inverse to Port1/Port2" textline " " rbitfld.long 0x00 22. " LINE_TOPOLOGY ,Line topology" "Ring || No MSTs,Receiving P- || S-MSTs at both ports" textline " " rbitfld.long 0x00 21. " NRT_FORWARD ,Nrt forward" "Topology is 3 and ring topology and CP>0,Info for enabling collision buffer" textline " " rbitfld.long 0x00 20. " RING_TOPOLOGY ,Ring topology" "Line || No MSTs,Receiving P- || S-MSTs at diff ports" textline " " rbitfld.long 0x00 19. " PORT2_LINK ,Link attached" "Not attached,Attached" textline " " rbitfld.long 0x00 18. " PORT1_LINK ,Link attached" "Not attached,Attached" textline " " rbitfld.long 0x00 17. " PORT2_LINE_STATUS ,Port2 line status" "No error,Error" textline " " rbitfld.long 0x00 16. " PORT1_LINE_STATUS ,Port1 line status" "No error,Error" textline " " bitfld.long 0x00 12.--15. " TOPOLOGY_ADDRESS_INCREMENT ,Topology address increment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 11. " TX_MDT_ENABLE ,Produce enable for MDTs" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DISABLELENGTHCTRL ,Disable packet length check" "No,Yes" textline " " bitfld.long 0x00 9. " RX_ENABLE ,Enable the Rx descriptor units" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TX_ENABLE ,Enable the Tx descriptor units" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " TOPOLOGY_WRITE_MODE ,Topology update mode" "Port mode,P/S mode" textline " " bitfld.long 0x00 6. " AUTOMATIC_TOPOLOGY_DETECTION ,Enable automatic topology detection" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " TOPOLOGY_PRIMARY_SECONDARY ,Set topology" "Fast-frwd on both ports,Loopback with frwd of P-Telegrams,Loopback with frwd of S-Telegrams,NRT mode" textline " " bitfld.long 0x00 2.--3. " STATE_OF_INACTIVE_PORT ,Device status" "No Link on inactive port,Link at inactive port,P-Telegram on inactive port,S-Telegram on inactive port" textline " " bitfld.long 0x00 0.--1. " TOPOLOGY_PORT ,Set topology" "Frwd Port 1 to Port 2 and Port 2 to Port 1,Loopback on Port 2 and frwd to Port 1,Loopback on Port 1 and frwd to Port 2,Frwd Port 1 to Port 2 and Port 2 to Port 1" if (((per.l(ad:0x44020000+0x24)&0x8000)==0x8000)) group.long 0x24++0x03 line.long 0x00 "PHASESR,Phase Status Register" eventfld.long 0x00 15. " VALID ,CPS && MST_Phase are valid" "Not valid,Valid" textline " " rbitfld.long 0x00 7. " CPS ,Current phase switch bit set in MST" "Disabled,Enabled" textline " " rbitfld.long 0x00 0.--3. " MST_PHASE ,Current phase information out of MST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x24++0x03 line.long 0x00 "PHASESR,Phase Status Register" eventfld.long 0x00 15. " VALID ,CPS && MST_Phase are valid" "Not valid,Valid" endif group.long 0x28++0x1F line.long 0x00 "TGSR1,Telegram Reset/Status Register Port 1" rbitfld.long 0x00 28. " FIRST_MST ,Indicates that the first MST arrives at this port" "Not arrived,Arrived" textline " " rbitfld.long 0x00 27. " CYCCNT_VALID ,Cycle count valid bit from the MST header of MDT0" "Not valid,Valid" textline " " rbitfld.long 0x00 24.--26. " CYCLE_COUNT ,Cycle count from the MST header of MDT0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 13. " AT0_MISSS ,AT0 missed inside AT0 window or CRC invalid" "Not missed\CRC valid,Missed\CRC invalid" textline " " bitfld.long 0x00 12. " MST_DOUBLE_MISS ,MST missed for 2 times consecutively" "Not missed,Missed" textline " " bitfld.long 0x00 11. " MST_MISS ,MST missed or CRC invalid" "Not missed\CRC valid,Missed\CRC invalid" textline " " bitfld.long 0x00 10. " MST_WINDOW_ERROR ,MST received CRC valid out of MST receive window" "No error,Error" textline " " rbitfld.long 0x00 9. " PRIMARY_SECONDARY ,Primary / secondary telegram" "Primary,Secondary" textline " " bitfld.long 0x00 8. " MST_VALIDE ,MST received CRC valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x00 7. " AT3 ,AT 3 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x00 6. " AT2 ,AT 2 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x00 5. " AT1 ,AT 1 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x00 4. " AT0 ,AT 0 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x00 3. " MDT3 ,MDT 3 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x00 2. " MDT2 ,MDT 2 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x00 1. " MDT1 ,MDT 1 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x00 0. " MDT0 ,MDT 0 received FCS valid" "Not received/Not valid,Received/Valid" line.long 0x04 "TGSR2,Telegram Reset/Status Register Port 2" rbitfld.long 0x04 28. " FIRST_MST ,Indicates that the first MST arrives at this port" "Not arrived,Arrived" textline " " rbitfld.long 0x04 27. " CYCCNT_VALID ,Cycle count valid bit from the MST header of MDT0" "Not valid,Valid" textline " " rbitfld.long 0x04 24.--26. " CYCLE_COUNT ,Cycle count from the MST header of MDT0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 13. " AT0_MISSS ,AT0 missed inside AT0 window or CRC invalid" "Not missed\CRC valid,Missed\CRC invalid" textline " " bitfld.long 0x04 12. " MST_DOUBLE_MISS ,MST missed for 2 times consecutively" "Not missed,Missed" textline " " bitfld.long 0x04 11. " MST_MISS ,MST missed or CRC invalid" "Not missed\CRC valid,Missed\CRC invalid" textline " " bitfld.long 0x04 10. " MST_WINDOW_ERROR ,MST received CRC valid out of MST receive window" "No error,Error" textline " " rbitfld.long 0x04 9. " PRIMARY_SECONDARY ,Primary / secondary telegram" "Primary,Secondary" textline " " bitfld.long 0x04 8. " MST_VALIDE ,MST received CRC valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x04 7. " AT3 ,AT 3 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x04 6. " AT2 ,AT 2 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x04 5. " AT1 ,AT 1 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x04 4. " AT0 ,AT 0 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x04 3. " MDT3 ,MDT 3 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x04 2. " MDT2 ,MDT 2 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x04 1. " MDT1 ,MDT 1 received FCS valid" "Not received/Not valid,Received/Valid" textline " " bitfld.long 0x04 0. " MDT0 ,MDT 0 received FCS valid" "Not received/Not valid,Received/Valid" textline " " line.long 0x08 "DESCR,Descriptor Control Register" hexmask.long.word 0x08 18.--28. 0x04 " TX_IDXTBL_OFFSET ,Offset list inside Tx RAM" hexmask.long.word 0x08 2.--12. 0x04 " RX_IDXTBL_OFFSET ,Offset list inside Rx RAM" line.long 0x0C "STRBR,System Timer Read Back Register" hexmask.long 0x0C 0.--25. 1. " TCNT ,TCNT counter value" line.long 0x10 "TCSR,Timing Control/Status Register" bitfld.long 0x10 31. " SYSTIMEUPDATE ,System time update information" "Not updated,Updated" bitfld.long 0x10 17. " P2_MST_DIS ,Port2 MST disable" "No,Yes" bitfld.long 0x10 16. " P1_MST_DIS ,Port1 MST disable" "No,Yes" textline " " bitfld.long 0x10 15. " TIMESYNC_ENABLE ,Enables synchronization of system time" "Disabled,Enabled" bitfld.long 0x10 14. " DIVOD ,DivClk output disable" "No,Yes" bitfld.long 0x10 13. " DIVCLKPOL ,DIV_CLK polarity" "Positive,Negative" textline " " bitfld.long 0x10 12. " DIVCLK_MODE ,DIV_CLK modes" "Mode 0,Mode 1" bitfld.long 0x10 10. " CONOE ,Output enable of output CON_CLK" "Disabled,Enabled" bitfld.long 0x10 9. " CON_POL ,Polarity of output CON_CLK" "High,Low" textline " " bitfld.long 0x10 8. " CON_EN ,Enable of CON_CLK" "Disabled,Enabled" bitfld.long 0x10 3. " ET3 ,Enable system time increment" "Disabled,Enabled" bitfld.long 0x10 1. " ET1_2 ,Enable timer for port 1/2" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " ET0 ,Enable main timer TCNT" "Disabled,Enabled" line.long 0x14 "TRDLY,Ring Delay Register" hexmask.long.tbyte 0x14 0.--19. 1. " RINGDELAY ,Ring delay of sercos III" line.long 0x18 "TDMST1,Time Delay MST Port 1" hexmask.long.tbyte 0x18 0.--19. 1. " TIME_DELAY_MST ,Time delay MST port 1" line.long 0x1C "TDMST2,Time Delay MST Port 2" hexmask.long.tbyte 0x1C 0.--19. 1. " TIME_DELAY_MST ,Time delay MST port 2" rgroup.long 0x48++0x07 line.long 0x00 "SCR1,Sync Time Register Port 1" hexmask.long.tbyte 0x00 0.--19. 1. " SYNC_COUNT ,Sync time register port 1" line.long 0x04 "SCR2,Sync Time Register Port 2" hexmask.long.tbyte 0x04 0.--19. 1. " SYNC_COUNT ,Sync time register port 2" group.long 0x50++0x0F line.long 0x00 "SVCCSR,SVC Control / Status" bitfld.long 0x00 9. " SVC_BUSY ,The SVC machine is busy" "Not busy,Busy" bitfld.long 0x00 8. " PROCESS_ERROR ,Process error occurred while MDT processing (read) clear process error (write)" "No error,Error" bitfld.long 0x00 7. " PROCESS_START ,Start SVC machine manually with positive edge of bit location (for debug use)" "Not started,Started" textline " " bitfld.long 0x00 2.--3. " MDT_SELECT ,Last MDT that contains relevant SVC data" "0,1,2,3" bitfld.long 0x00 1. " PORT_SELECT ,Trigger SVC machine from port 1 (0) or port 2 (1)" "Not triggered,Triggered" bitfld.long 0x00 0. " SVC_ENABLE ,Enable service-channel operation" "Disabled,Enabled" line.long 0x04 "DTDIVCLK,Delay Time For DIVCLK" hexmask.long 0x04 0.--25. 1. " DTDIVCLK ,Delay time for DIVCLK" line.long 0x08 "TDIV_NDIVCLK,DIVCLK Time / Count Register" hexmask.long.byte 0x08 24.--31. 1. " NDIVCLK ,DIVCLK count" hexmask.long.tbyte 0x08 0.--23. 1. " TDIVCLK ,DIVCLK time" line.long 0x0C "S3LED,Sercos III LED Control" bitfld.long 0x0C 28.--29. " COLOR_6 ,Sixth color for watchdog" "Dark,Green,Red,Orange" bitfld.long 0x0C 24.--25. " COLOR_5 ,Fifth color for watchdog" "Dark,Green,Red,Orange" bitfld.long 0x0C 21.--22. " CYCSKIP ,Half amount of cycles to be skipped" "0,1,2,3" textline " " bitfld.long 0x0C 20. " FLASH_2HZ ,LED flashes with roughly 2Hz instead of 4 Hz" "4Hz,2Hz" bitfld.long 0x0C 16.--18. " CYCSPLIT ,Amount of cycles for color 3 and color 4 activity" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 12.--13. " COLOR_4 ,Forth color for second period" "Dark,Green,Red,Orange" textline " " bitfld.long 0x0C 8.--9. " COLOR_3 ,Third color for second period" "Dark,Green,Red,Orange" bitfld.long 0x0C 4.--5. " COLOR_2 ,Second color" "Dark,Green,Red,Orange" bitfld.long 0x0C 0.--1. " COLOR_1 ,First color" "Dark,Green,Red,Orange" group.long 0x68++0x0B line.long 0x00 "WDCSR,Watchdog Control & Status" bitfld.long 0x00 17. " ALARM ,Watchdog alarm when actual count is zero" "No alarm,Alarm" bitfld.long 0x00 16. " ACTIVE ,Watchdog is active" "Not active,Active" hexmask.long.word 0x00 0.--15. 1. " MAGIC_PATTERN ,Magic pattern to trigger watchdog" line.long 0x04 "WDCNT,Watchdog Counter" hexmask.long.word 0x04 16.--31. 1. " ACTUAL_COUNT ,Actual watchdog counter value" hexmask.long.word 0x04 0.--15. 1. " RESET_COUNT ,Counter reset value when watchdog is triggered" line.long 0x08 "SFCR,Sercos Frame Control" bitfld.long 0x08 13. " FRAME_TYPE2 ,The frame type (MDT/AT) of interrupt 6" "MDT,AT" bitfld.long 0x08 12. " PORTSELECT2 ,The reception port of interrupt 6" "Not selected,Selected" bitfld.long 0x08 8.--9. " FRAMENUMBER2 ,The sercos III frame number of interrupt 6" "0,1,2,3" textline " " bitfld.long 0x08 5. " FRAMETYPE1 ,The frame type (MDT/AT) of interrupt 5" "MDT,AT" bitfld.long 0x08 4. " PORTSELECT1 ,The reception port of interrupt 5" "Not selected,Selected" bitfld.long 0x08 0.--1. " FRAMENUMBER1 ,The sercos III frame number of interrupt 5" "0,1,2,3" if (((per.l(ad:0x44020000+0x74)&0x404)==0x404)) group.long 0x74++0x03 line.long 0x00 "MIICSR,MDIO Control / Status Register" bitfld.long 0x00 10. " MDIO_EN_P2 ,MDIO direction" "Read,Write" bitfld.long 0x00 9. " MDIO_P2 ,State of the output level" "Low,High" bitfld.long 0x00 8. " MDC_P2 ,Direct output to the PHY MII MDC pin" "0,1" textline " " bitfld.long 0x00 2. " MDIO_EN_P1 ,MDIO direction" "Read,Write" bitfld.long 0x00 1. " MDIO_P1 ,State of the output level" "Low,High" bitfld.long 0x00 0. " MDC_P1 ,Direct output to the PHY MII MDC pin" "0,1" elif (((per.l(ad:0x44020000+0x74)&0x404)==0x400)) group.long 0x74++0x03 line.long 0x00 "MIICSR,MDIO Control / Status Register" bitfld.long 0x00 10. " MDIO_EN_P2 ,MDIO direction" "Read,Write" bitfld.long 0x00 9. " MDIO_P2 ,State of the output level" "Low,High" bitfld.long 0x00 8. " MDC_P2 ,Direct output to the PHY MII MDC pin" "0,1" textline " " bitfld.long 0x00 2. " MDIO_EN_P1 ,MDIO direction" "Read,Write" bitfld.long 0x00 1. " MDIO_P1 ,State of the MDIO pin" "Low,High" bitfld.long 0x00 0. " MDC_P1 ,Direct output to the PHY MII MDC pin" "0,1" elif (((per.l(ad:0x44020000+0x74)&0x404)==0x04)) group.long 0x74++0x03 line.long 0x00 "MIICSR,MDIO Control / Status Register" bitfld.long 0x00 10. " MDIO_EN_P2 ,MDIO direction" "Read,Write" bitfld.long 0x00 9. " MDIO_P2 ,State of the MDIO pin" "Low,High" bitfld.long 0x00 8. " MDC_P2 ,Direct output to the PHY MII MDC pin" "0,1" textline " " bitfld.long 0x00 2. " MDIO_EN_P1 ,MDIO direction" "Read,Write" bitfld.long 0x00 1. " MDIO_P1 ,State of the output level" "Low,High" bitfld.long 0x00 0. " MDC_P1 ,Direct output to the PHY MII MDC pin" "0,1" else group.long 0x74++0x03 line.long 0x00 "MIICSR,MDIO Control / Status Register" bitfld.long 0x00 10. " MDIO_EN_P2 ,MDIO direction" "Read,Write" bitfld.long 0x00 9. " MDIO_P2 ,State of the MDIO pin" "Low,High" bitfld.long 0x00 8. " MDC_P2 ,Direct output to the PHY MII MDC pin" "0,1" textline " " bitfld.long 0x00 2. " MDIO_EN_P1 ,MDIO direction" "Read,Write" bitfld.long 0x00 1. " MDIO_P1 ,State of the MDIO pin" "Low,High" bitfld.long 0x00 0. " MDC_P1 ,Direct output to the PHY MII MDC pin" "0,1" endif textline " " group.long 0x78++0x0F line.long 0x00 "DBGOCR,Debug Output Control" bitfld.long 0x00 8.--12. " TS2 ,Selects the signal to be output on test pin S3_TESTPIN2" "Port 1 MST,Port 2 MST,TMST,CON_CLK,DIV_CLK,TCNT Reload,Port 1 TCNT Reload,Port 2 TCNT Reload,Port 1 IP Open,Port 1 IP Open Write,Port 2 IP Open,Port 2 IP Open Write,Port 1 MST Window Open,Port 2 MST Window Open,Port 1 Rx Frame,Port 2 Rx Frame,?..." bitfld.long 0x00 0.--4. " TS1 ,Selects the signal to be output on test pin S3_TESTPIN1" "Port 1 MST,Port 2 MST,TMST,CON_CLK,DIV_CLK,TCNT Reload,Port 1 TCNT Reload,Port 2 TCNT Reload,Port 1 IP Open,Port 1 IP Open Write,Port 2 IP Open,Port 2 IP Open Write,Port 1 MST Window Open,Port 2 MST Window Open,Port 1 Rx Frame,Port 2 Rx Frame,?..." line.long 0x04 "SEQCNT,Sequence Counter" hexmask.long.word 0x04 16.--31. 1. " SEQCNT_P2 ,Value of sequence counter field in MSTs at port 2" hexmask.long.word 0x04 0.--15. 1. " SEQCNT_P1 ,Value of sequence counter field in MSTs at port 1" line.long 0x08 "MAC1P1_0,MAC Address" hexmask.long.byte 0x08 24.--31. 0x01 " B2 ,MAC address" hexmask.long.byte 0x08 16.--23. 0x01 " B3 ,MAC address" hexmask.long.byte 0x08 8.--15. 0x01 " B4 ,MAC address" textline " " hexmask.long.byte 0x08 0.--7. 0x01 " B5 ,MAC address" line.long 0x0C "MAC1P1_1,MAC Address" hexmask.long.byte 0x0C 8.--15. 0x01 " B0 ,MAC address" hexmask.long.byte 0x0C 0.--7. 0x01 " B1 ,MAC address" textline " " group.long 0x90++0x23 line.long 0x00 "IPCSR1,IP Status/Control Register Port 1" rbitfld.long 0x00 31. " LINK ,Link exists at port 1" "Not linked,Linked" rbitfld.long 0x00 19. " IPTXBUFEMPTY ,Set when IP transmit buffer is empty for port 1" "Not empty,Empty" rbitfld.long 0x00 18. " IPTXBUFRDY ,Set after each transmitted frame IP transmit buffer able to accept a frame by the host" "Not ready,Ready" textline " " rbitfld.long 0x00 17. " IPRXBUFFULL ,Set when IP Rx-buffer of port 1 is full" "Not full,Full" rbitfld.long 0x00 16. " IPRXRDY ,Set when an IP ethernet frame is received port 1 without error" "Not ready,Ready" bitfld.long 0x00 11. " IPTXBUFEMPTYINTEN ,Set to ONE enables interrupt Int_IPIntPort1 on event IPTxBufEmpty" "No interrupt,Interrupt" textline " " bitfld.long 0x00 10. " IPTXBUFRDYINTEN ,Set to ONE enables interrupt Int_IPIntPort1 on event IPTxBufRdy" "No interrupt,Interrupt" bitfld.long 0x00 9. " IPRXBUFFULLINTEN ,Set to ONE enables interrupt Int_IPIntPort1 on event IPRxBufFull" "No interrupt,Interrupt" bitfld.long 0x00 8. " IPRXRDYINTEN ,Set to ONE enables interrupt Int_IPIntPort1 on event IPRxRdy" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " PROMISCUOUS ,Receive all frames without checking the destination address" "Not received,Received" bitfld.long 0x00 5. " COLBUFDISABLE ,Disables collision buffer" "No,Yes" bitfld.long 0x00 4. " MULTICASTDISABLE ,Disables reception of multicast frames in IP channel" "No,Yes" textline " " bitfld.long 0x00 3. " BROADCASTDISABLE ,Disables reception of broadcast frames in IP channel" "No,Yes" bitfld.long 0x00 2. " S3FRAMEFILTER ,Filter sercos III frame of communication phase greater zero" "No filter,Filter" bitfld.long 0x00 1. " IPRXEN ,Receive enable port 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " IPTXEN ,Transmit enable port 1" "Disabled,Enabled" line.long 0x04 "IPCSR2,IP Status/Control Register Port 2" rbitfld.long 0x04 31. " LINK ,Link exists at port 2" "Not linked,Linked" rbitfld.long 0x04 19. " IPTXBUFEMPTY ,Set when IP transmit buffer is empty for port 2" "Not empty,Empty" rbitfld.long 0x04 18. " IPTXBUFRDY ,Set after each transmitted frame IP transmit buffer able to accept a frame by the host" "Not ready,Ready" textline " " rbitfld.long 0x04 17. " IPRXBUFFULL ,Set when IP Rx-buffer of port 2 is full" "Not full,Full" rbitfld.long 0x04 16. " IPRXRDY ,Set when an IP ethernet frame is received port 2 without error" "Not ready,Ready" bitfld.long 0x04 11. " IPTXBUFEMPTYINTEN ,Set to ONE enables interrupt Int_IPIntPort2 on event IPTxBufEmpty" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " IPTXBUFRDYINTEN ,Set to ONE enables interrupt Int_IPIntPort2 on event IPTxBufRdy" "No interrupt,Interrupt" bitfld.long 0x04 9. " IPRXBUFFULLINTEN ,Set to ONE enables interrupt Int_IPIntPort2 on event IPRxBufFull" "No interrupt,Interrupt" bitfld.long 0x04 8. " IPRXRDYINTEN ,Set to ONE enables interrupt Int_IPIntPort2 on event IPRxRdy" "No interrupt,Interrupt" textline " " bitfld.long 0x04 6. " PROMISCUOUS ,Receive all frames without checking the destination address" "Not received,Received" bitfld.long 0x04 5. " COLBUFDISABLE ,Disables collision buffer" "No,Yes" bitfld.long 0x04 4. " MULTICASTDISABLE ,Disables reception of multicast frames in IP channel" "No,Yes" textline " " bitfld.long 0x04 3. " BROADCASTDISABLE ,Disables reception of broadcast frames in IP channel" "No,Yes" bitfld.long 0x04 2. " S3FRAMEFILTER ,Filter sercos III frame of communication phase greater zero" "No filter,Filter" bitfld.long 0x04 1. " IPRXEN ,Receive enable port 2" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " IPTXEN ,Transmit enable port 2" "Disabled,Enabled" line.long 0x08 "IPRRS1,IP Rx Ram Segment Port 1" hexmask.long.word 0x08 16.--31. 1. " RAM_SEGMENT_LAST ,Last segment in the Rx ram for storing IP data" hexmask.long.word 0x08 0.--15. 1. " RAM_SEGMENT_FIRST ,First segment in the Rx ram for storing IP data" line.long 0x0C "IPRRS2,IP Rx Ram Segment Port 2" hexmask.long.word 0x0C 16.--31. 1. " RAM_SEGMENT_LAST ,Last segment in the Rx Ram for storing IP data" hexmask.long.word 0x0C 0.--15. 1. " RAM_SEGMENT_FIRST ,First segment in the Rx Ram for storing IP data" line.long 0x10 "IPRXS1,IP Receive Stack Port 1" hexmask.long.word 0x10 16.--26. 1. " DATA_LENGTH ,Defines the number of received data bytes" hexmask.long.word 0x10 0.--15. 0x01 " RAM_SEGMENT_ADDRESS ,Defines the segment position of received data in the Rx ram" line.long 0x14 "IPRXS2,IP Receive Stack Port 2" hexmask.long.word 0x14 16.--26. 1. " DATA_LENGTH ,Defines the number of received data bytes" hexmask.long.word 0x14 0.--15. 0x01 " RAM_SEGMENT_ADDRESS ,Defines the segment position of received data in the Rx ram" line.long 0x18 "IPTXS1,IP Transmit Stack Port 1" bitfld.long 0x18 28.--30. " COUNT ,Amount of frames stored on stack" "0,1,2,3,4,5,6,7" hexmask.long.word 0x18 16.--26. 1. " DATA_LENGTH ,Defines the number of data bytes to be transmitted" hexmask.long.word 0x18 0.--15. 0x01 " RAM_SEGMENT_ADDRESS ,Defines the segment position of Tx data in the Tx ram" line.long 0x1C "IPTXS2,IP Transmit Stack Port 2" bitfld.long 0x1C 28.--30. " COUNT ,Amount of frames stored on stack" "0,1,2,3,4,5,6,7" hexmask.long.word 0x1C 16.--26. 1. " DATA_LENGTH ,Defines the number of data bytes to be transmitted" hexmask.long.word 0x1C 0.--15. 0x01 " RAM_SEGMENT_ADDRESS ,Defines the segment position of Tx data in the Tx ram" line.long 0x20 "IPLASTFL,Remaining Frame Length" hexmask.long.word 0x20 0.--10. 1. " LENGTH ,Remaining frame length after last transmit event" rgroup.long 0xC0++0x1F line.long 0x00 "IPFRXOK,IP Frames Received OK" hexmask.long.word 0x00 16.--31. 1. " FRAMESRECEIVEDOK_2 ,Counts all received frames without error on the port" hexmask.long.word 0x00 0.--15. 1. " FRAMESRECEIVEDOK_1 ,Counts all received frames without error on the port" line.long 0x04 "IPFTXOK,IP Frames Transmitted OK" hexmask.long.word 0x04 16.--31. 1. " FRAMESTRANSMITTEDOK_2 ,Counts all transmitted frames on the port" hexmask.long.word 0x04 0.--15. 1. " FRAMESTRANSMITTEDOK_1 ,Counts all transmitted frames on the port" line.long 0x08 "IPFCSERR,IP FCS Errors" hexmask.long.word 0x08 16.--31. 1. " FCSERRORS_PORT_2 ,Counts the received ethernet frames with defective frame check sequence FCS or RxER indications" hexmask.long.word 0x08 0.--15. 1. " FCSERRORS_PORT_1 ,Counts the received ethernet frames with defective frame check sequence FCS or RxER indications" line.long 0x0C "IPALGNERR,IP Alignment Errors" hexmask.long.word 0x0C 16.--31. 1. " FRAMEERRORS_PORT_2 ,The counters increment when a defective ethernet frame is detected" hexmask.long.word 0x0C 0.--15. 1. " FRAMEERRORS_PORT_1 ,The counters increment when a defective ethernet frame is detected" line.long 0x10 "IPDISRXB,IP Discard ResRxBuf" hexmask.long.word 0x10 16.--31. 1. " DISCARDRESRXBUF_PORT_2 ,The counters counts the discarded receive ethernet frames in case of missing Rx-buffer resources" hexmask.long.word 0x10 0.--15. 1. " DISCARDRESRXBUF_PORT_1 ,The counters counts the discarded receive ethernet frames in case of missing Rx-buffer resources" line.long 0x14 "IPDISCLB,IP Discard ColRxBuf" hexmask.long.word 0x14 16.--31. 1. " DISCARDRESCOLBUF_PORT_2 ,The counters count the discarded forwarding ethernet frames in case of missing collision buffer resources" hexmask.long.word 0x14 0.--15. 1. " DISCARDRESCOLBUF_PORT_1 ,The counters count the discarded forwarding ethernet frames in case of missing collision buffer resources" line.long 0x18 "IPCHVIOL,IP IP Channel Violation" hexmask.long.word 0x18 16.--31. 1. " IPCHANNELVIOLATION_PORT_2 ,The counters increments on ethernet frames that violate IP channel time boundaries" hexmask.long.word 0x18 0.--15. 1. " IPCHANNELVIOLATION_PORT_1 ,The counters increments on ethernet frames that violate IP channel time boundaries" line.long 0x1C "SIIIERRCNT,Sercos III Error Counter" hexmask.long.word 0x1C 16.--31. 1. " SERCOSERRORCOUNT_PORT_2 ,The counter counts sercos III Ethernet frames that have a wrong FCS or are misaligned" hexmask.long.word 0x1C 0.--15. 1. " SERCOSERRORCOUNT_PORT_1 ,The counter counts sercos III Ethernet frames that have a wrong FCS or are misaligned" group.long 0xE0++0x0B line.long 0x00 "MSTLMAX,Maximum Sequential MST Losses" hexmask.long.word 0x00 0.--15. 1. " VALUE ,Amount of sequential MST losses for interrupt 10 and 11" line.long 0x04 "MSTLSUM,Sum MST Losses" hexmask.long.word 0x04 0.--15. 1. " VALUE ,Sum of sequential MST losses" line.long 0x08 "MSTLACT,Actual Sequential MST Losses" hexmask.long.word 0x08 0.--15. 1. " VALUE ,Actual sequential MST losses" textline " " group.long 0x100++0x0B line.long 0x00 "TMDSCL,Timing Descriptor" hexmask.long 0x00 0.--26. 1. " EVENT_TCNT_VALUE ,Nanosecond value for TCNT event" line.long 0x04 "TMDSCU,Timing Descriptor" bitfld.long 0x04 24.--27. " EVENT_TYPE ,Type of event" "No event,Event_TINT[0],Event_TINT[1],Event_TINT[2],Event_TINT[3],Sync Set,Sync Reset,,,,,,Reload,Reload value,?..." bitfld.long 0x04 16.--17. " SCC_SELECT ,Selection of subcycle counter" "Sercos III cycle,Subcycle counter A,Subcycle counter B,Cycle Counter MDT" hexmask.long.byte 0x04 0.--7. 1. " SCC_VALUE ,Subcycle count for event enable" line.long 0x08 "TMDSCSEL,Timing Descriptor Select" group.long 0x110++0x0B line.long 0x00 "PTMDSCL,Port Timing Descriptor" hexmask.long 0x00 0.--26. 1. " EVENT_TCNT_VALUE ,Nanosecond value for TCNT event" line.long 0x04 "PTMDSCU,Port Timing Descriptor" bitfld.long 0x04 24.--27. " EVENT_TYPE ,Type of event" "No event,Event_IPChannel_Open,Event_IPChannel_TxClose,Event_IPChannel_RxClose,Event_AT0WindowOpen,Event_AT0WindowClose,Event_RxBufRequest_BufSysA,Event_RxBufRequest_BufSysB,Event_TxBufRequest_BufSysA,Event_TxBufRequest_BufSysB,Event_MSTWindowOpen,Event_MSTWindowClose,Reload value,Event_SVCStart,Event_MSTHeaderWindowOpen,?..." bitfld.long 0x04 16.--17. " SCC_SELECT ,Selection of subcycle counter" "Sercos III cycle,Subcycle counter A,Subcycle counter B,Cycle Counter MDT" hexmask.long.byte 0x04 0.--7. 1. " SCC_VALUE ,Subcycle count for event enable" line.long 0x08 "PTMDSCSEL,Port Timing Descriptor Select" textline " " rgroup.long 0x130++0x0F line.long 0x00 "STNS,System Time (Nanoseconds)" hexmask.long 0x00 0.--29. 1. " NANOSECONDS ,Nanosecond value of system time" line.long 0x04 "STSEC,System Time (Seconds)" line.long 0x08 "STNSTSR,System Time TSRef (Nanoseconds)" hexmask.long 0x08 0.--29. 1. " NANOSECONDS ,Nanosecond value of system time at last TSRef" line.long 0x0C "STSECTSR,System Time TSRef (Seconds)" group.long 0x140++0x0B line.long 0x00 "SCCAB,Subcycle Counter Control & Status" hexmask.long.byte 0x00 24.--31. 1. " SCCVALUEB ,Subcycle value of sub cycle counter B" hexmask.long.byte 0x00 16.--23. 1. " SCCVALUEA ,Subcycle value of sub cycle counter A" hexmask.long.byte 0x00 8.--15. 1. " SCCMAXB ,Maximum value for sub cycle counter B" textline " " hexmask.long.byte 0x00 0.--7. 1. " SCCMAXA ,Maximum value for sub cycle counter A" group.long 0x150++0x0B line.long 0x00 "SCCMDT,Subcycle Counter MDT" hexmask.long.word 0x00 16.--29. 1. " ACTUAL_COUNTER ,Actual value active in timing processor" hexmask.long.word 0x00 0.--13. 1. " MAXIMUM_COUNT ,Internal counter is reset when it exceeds this value or cycle counter in MDT0 is zero" textline " " group.long 0x180++0x03 line.long 0x00 "RXBUF0_P1A,Receive Buffer 0 Base Address For Port 1 And Buffer System A" group.long 0x184++0x03 line.long 0x00 "RXBUF1_P1A,Receive Buffer 1 Base Address For Port 1 And Buffer System A" group.long 0x188++0x03 line.long 0x00 "RXBUF2_P1A,Receive Buffer 2 Base Address For Port 1 And Buffer System A" group.long 0x190++0x03 line.long 0x00 "RXBUF0_P1B,Receive Buffer 0 Base Address For Port 1 And Buffer System B" group.long 0x194++0x03 line.long 0x00 "RXBUF1_P1B,Receive Buffer 1 Base Address For Port 1 And Buffer System B" group.long 0x198++0x03 line.long 0x00 "RXBUF2_P1B,Receive Buffer 2 Base Address For Port 1 And Buffer System B" group.long 0x19C++0x03 line.long 0x00 "RXBUF_P1SVC,Receive Buffer Base Address For Service Channel Data At Port 1" group.long 0x1A0++0x03 line.long 0x00 "RXBUF0_P2A,Receive Buffer 0 Base Address For Port 2 And Buffer System A" group.long 0x1A4++0x03 line.long 0x00 "RXBUF1_P2A,Receive Buffer 1 Base Address For Port 2 And Buffer System A" group.long 0x1A8++0x03 line.long 0x00 "RXBUF2_P2A,Receive Buffer 2 Base Address For Port 2 And Buffer System A" group.long 0x1B0++0x03 line.long 0x00 "RXBUF0_P2B,Receive Buffer 0 Base Address For Port 2 And Buffer System B" group.long 0x1B4++0x03 line.long 0x00 "RXBUF1_P2B,Receive Buffer 1 Base Address For Port 2 And Buffer System B" group.long 0x1B8++0x03 line.long 0x00 "RXBUF2_P2B,Receive Buffer 2 Base Address For Port 2 And Buffer System B" group.long 0x1BC++0x03 line.long 0x00 "RXBUF_P2SVC,Receive Buffer Base Address For Service Channel Data At Port 2" group.long 0x1C0++0x03 line.long 0x00 "TXBUF0_A,Transmit Buffer 0 Base Address For Buffer System A" group.long 0x1C4++0x03 line.long 0x00 "TXBUF1_A,Transmit Buffer 1 Base Address For Buffer System A" group.long 0x1C8++0x03 line.long 0x00 "TXBUF2_A,Transmit Buffer 2 Base Address For Buffer System A" group.long 0x1CC++0x03 line.long 0x00 "TXBUF3_A,Transmit Buffer 3 Base Address For Buffer System A" group.long 0x1D0++0x03 line.long 0x00 "TXBUF0_B,Transmit Buffer 0 Base Address For Buffer System B" group.long 0x1D4++0x03 line.long 0x00 "TXBUF1_B,Transmit Buffer 1 Base Address For Buffer System B" group.long 0x1D8++0x03 line.long 0x00 "TXBUF2_B,Transmit Buffer 2 Base Address For Buffer System B" group.long 0x1DC++0x03 line.long 0x00 "TXBUF3_B,Transmit Buffer 3 Base Address For Buffer System B" textline " " group.long 0x1F0++0x07 line.long 0x00 "TXBUF_P1,Transmit Buffer Base Address For Port 1 Only" line.long 0x04 "TXBUF_P2,Transmit Buffer Base Address For Port 2 Only" group.long 0x1FC++0x07 line.long 0x00 "TXBUF_SVC,Transmit Buffer Base Address For Service Channel Data" line.long 0x04 "RXBUFCSR_A,Receive Buffer Control Buffer System A" bitfld.long 0x04 31. " RXREQUEST ,Buffer system is usable (read) / request newest receive buffers (write)" "Read,Write" rbitfld.long 0x04 29. " PORT_2_OVERFLOW ,Data overflow of port 2 between last two receive buffer requests" "Not overflowed,Overflowed" rbitfld.long 0x04 28. " PORT_2_NEW_DATA ,Actual receive buffer for port 2 contains new valid data" "Not contains,Contains" textline " " rbitfld.long 0x04 24.--25. " RXBUF_PORT_2 ,Actual receive buffer for port 2 (system buffer)" "0,1,2,3" rbitfld.long 0x04 21. " PORT_1_OVERFLOW ,Data overflow of port 1 between last two receive buffer requests" "Not overflowed,Overflowed" rbitfld.long 0x04 20. " PORT_1_NEW_DATA ,Actual receive buffer for port 1 contains new valid data" "Not contains,Contains" textline " " rbitfld.long 0x04 16.--17. " RXBUF_PORT_1 ,Actual receive buffer for port 1 (system buffer)" "0,1,2,3" bitfld.long 0x04 0.--1. " BUFFER_COUNT ,Buffer count" "Single,Double,Triple,?..." rgroup.long 0x204++0x03 line.long 0x00 "RXBUFTV_A,Rx Buffer Telegram Valid A" bitfld.long 0x00 27. " PORT_2_AT3 ,Buffer contains valid data of AT3 from port 2" "Not contains,Contains" bitfld.long 0x00 26. " PORT_2_AT2 ,Buffer contains valid data of AT2 from port 2" "Not contains,Contains" bitfld.long 0x00 25. " PORT_2_AT1 ,Buffer contains valid data of AT1 from port 2" "Not contains,Contains" textline " " bitfld.long 0x00 24. " PORT_2_AT0 ,Buffer contains valid data of AT0 from port 2" "Not contains,Contains" bitfld.long 0x00 19. " PORT_2_MDT3 ,Buffer contains valid data of MDT3 from port 2" "Not contains,Contains" bitfld.long 0x00 18. " PORT_2_MDT2 ,Buffer contains valid data of MDT2 from port 2" "Not contains,Contains" textline " " bitfld.long 0x00 17. " PORT_2_MDT1 ,Buffer contains valid data of MDT1 from port 2" "Not contains,Contains" bitfld.long 0x00 16. " PORT_2_MDT0 ,Buffer contains valid data of MDT0 from port 2" "Not contains,Contains" bitfld.long 0x00 11. " PORT_1_AT3 ,Buffer contains valid data of AT3 from port 1" "Not contains,Contains" textline " " bitfld.long 0x00 10. " PORT_1_AT2 ,Buffer contains valid data of AT2 from port 1" "Not contains,Contains" bitfld.long 0x00 9. " PORT_1_AT1 ,Buffer contains valid data of AT1 from port 1" "Not contains,Contains" bitfld.long 0x00 8. " PORT_1_AT0 ,Buffer contains valid data of AT0 from port 1" "Not contains,Contains" textline " " bitfld.long 0x00 3. " PORT_1_MDT3 ,Buffer contains valid data of MDT3 from port 1" "Not contains,Contains" bitfld.long 0x00 2. " PORT_1_MDT2 ,Buffer contains valid data of MDT2 from port 1" "Not contains,Contains" bitfld.long 0x00 1. " PORT_1_MDT1 ,Buffer contains valid data of MDT1 from port 1" "Not contains,Contains" textline " " bitfld.long 0x00 0. " PORT_1_MDT0 ,Buffer contains valid data of MDT0 from port 1" "Not contains,Contains" group.long 0x208++0x0B line.long 0x00 "RXBUFTR_A,Rx Buffer Telegram Requirements A" bitfld.long 0x00 11. " AT3_REQUIRED ,Buffer change only when AT3 was valid" "Not changed,Changed" bitfld.long 0x00 10. " AT2_REQUIRED ,Buffer change only when AT2 was valid" "Not changed,Changed" bitfld.long 0x00 9. " AT1_REQUIRED ,Buffer change only when AT1 was valid" "Not changed,Changed" textline " " bitfld.long 0x00 8. " AT0_REQUIRED ,Buffer change only when AT0 was valid" "Not changed,Changed" bitfld.long 0x00 3. " MDT3_REQUIRED ,Buffer change only when MDT3 was valid" "Not changed,Changed" bitfld.long 0x00 2. " MDT2_REQUIRED ,Buffer change only when MDT2 was valid" "Not changed,Changed" textline " " bitfld.long 0x00 1. " MDT1_REQUIRED ,Buffer change only when MDT1 was valid" "Not changed,Changed" bitfld.long 0x00 0. " MDT0_REQUIRED ,Buffer change only when MDT0 was valid" "Not changed,Changed" line.long 0x04 "TXBUFCSR_A,Transmit Buffer Control for Buffer System A" bitfld.long 0x04 31. " TXREQUEST ,Buffer system is usable (read) / request newest transmit buffer (write)" "Read,Write" bitfld.long 0x04 16.--17. " TXBUF ,Actual transmit buffer (system buffer)" "0,1,2,3" bitfld.long 0x04 0.--1. " BUFFER_COUNT ,Actual transmit buffer (system buffer)" "Single,Double,Triple,Quad" line.long 0x08 "RXBUFCSR_B,Receive Buffer Control Buffer System B" bitfld.long 0x08 31. " RXREQUEST ,Buffer system is usable (read) / request newest receive buffers (write)" "Read,Write" rbitfld.long 0x08 29. " PORT_2_OVERFLOW ,Data overflow of port 2 between last two receive buffer requests" "Not overflowed,Overflowed" rbitfld.long 0x08 28. " PORT_2_NEW_DATA ,Actual receive buffer for port 2 contains new valid data" "Not contains,Contains" textline " " rbitfld.long 0x08 24.--25. " RXBUF_PORT_2 ,Actual receive buffer for port 2 (system buffer)" "0,1,2,3" rbitfld.long 0x08 21. " PORT_1_OVERFLOW ,Data overflow of port 1 between last two receive buffer requests" "Not overflowed,Overflowed" rbitfld.long 0x08 20. " PORT_1_NEW_DATA ,Actual receive buffer for port 1 contains new valid data" "Not contains,Contains" textline " " rbitfld.long 0x08 16.--17. " RXBUF_PORT_1 ,Actual receive buffer for port 1 (system buffer)" "0,1,2,3" bitfld.long 0x08 0.--1. " BUFFER_COUNT ,Buffer count" "Single,Double,Triple,?..." rgroup.long 0x214++0x03 line.long 0x00 "RXBUFTV_B,Rx Buffer Telegram Valid B" bitfld.long 0x00 27. " PORT_2_AT3 ,Buffer contains valid data of AT3 from port 2" "Not contains,Contains" bitfld.long 0x00 26. " PORT_2_AT2 ,Buffer contains valid data of AT2 from port 2" "Not contains,Contains" bitfld.long 0x00 25. " PORT_2_AT1 ,Buffer contains valid data of AT1 from port 2" "Not contains,Contains" textline " " bitfld.long 0x00 24. " PORT_2_AT0 ,Buffer contains valid data of AT0 from port 2" "Not contains,Contains" bitfld.long 0x00 19. " PORT_2_MDT3 ,Buffer contains valid data of MDT3 from port 2" "Not contains,Contains" bitfld.long 0x00 18. " PORT_2_MDT2 ,Buffer contains valid data of MDT2 from port 2" "Not contains,Contains" textline " " bitfld.long 0x00 17. " PORT_2_MDT1 ,Buffer contains valid data of MDT1 from port 2" "Not contains,Contains" bitfld.long 0x00 16. " PORT_2_MDT0 ,Buffer contains valid data of MDT0 from port 2" "Not contains,Contains" bitfld.long 0x00 11. " PORT_1_AT3 ,Buffer contains valid data of AT3 from port 1" "Not contains,Contains" textline " " bitfld.long 0x00 10. " PORT_1_AT2 ,Buffer contains valid data of AT2 from port 1" "Not contains,Contains" bitfld.long 0x00 9. " PORT_1_AT1 ,Buffer contains valid data of AT1 from port 1" "Not contains,Contains" bitfld.long 0x00 8. " PORT_1_AT0 ,Buffer contains valid data of AT0 from port 1" "Not contains,Contains" textline " " bitfld.long 0x00 3. " PORT_1_MDT3 ,Buffer contains valid data of MDT3 from port 1" "Not contains,Contains" bitfld.long 0x00 2. " PORT_1_MDT2 ,Buffer contains valid data of MDT2 from port 1" "Not contains,Contains" bitfld.long 0x00 1. " PORT_1_MDT1 ,Buffer contains valid data of MDT1 from port 1" "Not contains,Contains" textline " " bitfld.long 0x00 0. " PORT_1_MDT0 ,Buffer contains valid data of MDT0 from port 1" "Not contains,Contains" group.long 0x218++0x07 line.long 0x00 "RXBUFTR_B,Rx Buffer Telegram Requirements B" bitfld.long 0x00 11. " AT3_REQUIRED ,Buffer change only when AT3 was valid" "Not changed,Changed" bitfld.long 0x00 10. " AT2_REQUIRED ,Buffer change only when AT2 was valid" "Not changed,Changed" bitfld.long 0x00 9. " AT1_REQUIRED ,Buffer change only when AT1 was valid" "Not changed,Changed" textline " " bitfld.long 0x00 8. " AT0_REQUIRED ,Buffer change only when AT0 was valid" "Not changed,Changed" bitfld.long 0x00 3. " MDT3_REQUIRED ,Buffer change only when MDT3 was valid" "Not changed,Changed" bitfld.long 0x00 2. " MDT2_REQUIRED ,Buffer change only when MDT2 was valid" "Not changed,Changed" textline " " bitfld.long 0x00 1. " MDT1_REQUIRED ,Buffer change only when MDT1 was valid" "Not changed,Changed" bitfld.long 0x00 0. " MDT0_REQUIRED ,Buffer change only when MDT0 was valid" "Not changed,Changed" line.long 0x04 "TXBUFCSR_B,Transmit Buffer Control for Buffer System B" bitfld.long 0x04 31. " TXREQUEST ,Buffer system is usable (read) / request newest transmit buffer (write)" "Read,Write" bitfld.long 0x04 16.--17. " TXBUF ,Actual transmit buffer (system buffer)" "0,1,2,3" bitfld.long 0x04 0.--1. " BUFFER_COUNT ,Buffer count" "Single,Double,Triple,Quad" width 0x0B tree.end tree "R-IN Engine Accessory Register" base ad:0x400F2000 width 10. rgroup.long 0x04++0x03 line.long 0x00 "IDCODE,IDCODE Register" group.long 0x10++0x03 line.long 0x00 "SCRATCH0,Scratch Register 0" group.long 0x14++0x03 line.long 0x00 "SCRATCH1,Scratch Register 1" group.long 0x18++0x03 line.long 0x00 "SCRATCH2,Scratch Register 2" group.long 0x1C++0x03 line.long 0x00 "SCRATCH3,Scratch Register 3" group.long 0x100++0x03 line.long 0x00 "RINSPCMD,R-IN System Protect Command Register" bitfld.long 0x00 0. " RINSPCMD ,Write access to protected register" "Prohibited,Permitted" if (((per.l(ad:0x400F2000+0x100)&0x01)==0x01)) group.long 0x110++0x03 line.long 0x00 "RTOSRST,HW-RTOS and HW-RTOS GMAC Reset Register" bitfld.long 0x00 0. " OSRST ,HW-RTOS and HW-RTOS GMAC reset control" "Asserted,Not asserted" else rgroup.long 0x110++0x03 line.long 0x00 "RTOSRST,HW-RTOS and HW-RTOS GMAC Reset Register" bitfld.long 0x00 0. " OSRST ,HW-RTOS and HW-RTOS GMAC reset control" "Asserted,Not asserted" endif width 0x0B tree.end tree "Ethernet Accessory Register" base ad:0x44030000 width 12. group.long 0x00++0x03 line.long 0x00 "PRCMD,Ethernet Protect Register" bitfld.long 0x00 0. " PRCMD ,Permit write access to protected registers" "Prohibited,Permitted" rgroup.long 0x04++0x03 line.long 0x00 "ESIDCODE,EtherSwitch IDCODE Register" group.long 0x08++0x07 line.long 0x00 "MODCTRL,Mode Control Register" bitfld.long 0x00 0.--4. " SW_MODE ,Select ethernet interface connection" "0,1,2,3,,,,,8,9,10,11,,,,,16,17,18,19,,,,,,,,,28,29,30,31" line.long 0x04 "PTPMCTRL,PTP Mode Control Register" bitfld.long 0x04 4. " RGMII_CLKSEL ,Clock source of RGMII" "125 MHz from PLL,RGMII_REFCLK" bitfld.long 0x04 0.--3. " PTP_MODE ,Clock source of PTP timer for GMAC1 and GMAC2" "Stop,RGMII_REFCLK,125 MHz from PLL,50 MHz from PLL,25 MHz from PLL,?..." group.long 0x14++0x03 line.long 0x00 "PHYLNK,Ethernet PHY Link Mode Register" bitfld.long 0x00 9. " S3LNK[1] ,S3_MII_LINKP[2] link signal active level" "Low,High" bitfld.long 0x00 8. " S3LNK[0] ,S3_MII_LINKP[1] link signal active level" "Low,High" bitfld.long 0x00 6. " CATLNK[2] ,CAT_MII_LINK[2] link signal active level" "Low,High" bitfld.long 0x00 5. " CATLNK[1] ,CAT_MII_LINK[1] link signal active level" "Low,High" textline " " bitfld.long 0x00 4. " CATLNK[0] ,CAT_MII_LINK[0] link signal active level" "Low,High" bitfld.long 0x00 3. " SWLNK[3] ,SWITCH_MII_LINK[2] link signal control active level" "High,Low" bitfld.long 0x00 2. " SWLNK[2] ,SWITCH_MII_LINK[3] link signal control active level" "High,Low" bitfld.long 0x00 1. " SWLNK[1] ,SWITCH_MII_LINK[4] link signal control active level" "High,Low" textline " " bitfld.long 0x00 0. " SWLNK[0] ,SWITCH_MII_LINK[5] link signal control active level" "High,Low" textline " " group.long 0x20++0x07 line.long 0x00 "PTCTRL,PortTrigger Control Register" bitfld.long 0x00 0.--2. " TRG_SEL ,Select port trigger source per GPIO (GPIO_TRIG0/../GPIO_TRIG3)" "CATSYNC0/CATSYNC1/MAC_PPS[0]/MAC_PPS[1],SERCOS3_Int[0]/SERCOS3_Int[1]/MAC_PPS[0]/MAC_PPS[1],CATSYNC0/CATSYNC1/MAC_TRIG[1]/MAC_PPS[0],SERCOS3_Int[0]/SERCOS3_Int[1]/MAC_TRIG[1]/MAC_PPS[0],-/MAC_TRIG[1]/MAC_PPS[0]/MAC_PPS[1],?..." textline " " line.long 0x04 "DMACTRL,DMAC Control Register" hexmask.long.byte 0x04 24.--31. 1. " DREQ_WCNT ,DMA transfer request wait control" textline " " bitfld.long 0x04 22. " DREQ_ERR[6] ,ETH_DMA_Request[6] error status" "No error,Error" bitfld.long 0x04 21. " [5] ,ETH_DMA_Request[5] error status" "No error,Error" bitfld.long 0x04 20. " [4] ,ETH_DMA_Request[4] error status" "No error,Error" bitfld.long 0x04 19. " [3] ,ETH_DMA_Request[3] error status" "No error,Error" textline " " bitfld.long 0x04 18. " [2] ,ETH_DMA_Request[2] error status" "No error,Error" bitfld.long 0x04 17. " [1] ,ETH_DMA_Request[1] error status" "No error,Error" bitfld.long 0x04 16. " [0] ,ETH_DMA_Request[0] error status" "No error,Error" textline " " rbitfld.long 0x04 14. " DREQ_BSY[6] ,ETH_DMA_Request[6] busy status" "Not busy,Busy" rbitfld.long 0x04 13. " [5] ,ETH_DMA_Request[5] busy status" "Not busy,Busy" rbitfld.long 0x04 12. " [4] ,ETH_DMA_Request[4] busy status" "Not busy,Busy" rbitfld.long 0x04 11. " [3] ,ETH_DMA_Request[3] busy status" "Not busy,Busy" textline " " rbitfld.long 0x04 10. " [2] ,ETH_DMA_Request[2] busy status" "Not busy,Busy" rbitfld.long 0x04 9. " [1] ,ETH_DMA_Request[1] busy status" "Not busy,Busy" rbitfld.long 0x04 8. " [0] ,ETH_DMA_Request[0] busy status" "Not busy,Busy" textline " " bitfld.long 0x04 7. " DREQ_SEL ,DMA request select" "EtherCAT,Sercos3" textline " " bitfld.long 0x04 6. " DREQ_EN[6] ,ETH_DMA_Request[6] request enable" "Disabled,Enabled" bitfld.long 0x04 5. " [5] ,ETH_DMA_Request[5] request enable" "Disabled,Enabled" bitfld.long 0x04 4. " [4] ,ETH_DMA_Request[4] request enable" "Disabled,Enabled" bitfld.long 0x04 3. " [3] ,ETH_DMA_Request[3] request enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " [2] ,ETH_DMA_Request[2] request enable" "Disabled,Enabled" bitfld.long 0x04 1. " [1] ,ETH_DMA_Request[1] request enable" "Disabled,Enabled" bitfld.long 0x04 0. " [0] ,ETH_DMA_Request[0] request enable" "Disabled,Enabled" textline " " if (((per.l(ad:0x44030000+0x100)&0x1F)==(0x04||0x05||0x14||0x15))) group.long 0x100++0x03 line.long 0x00 "CONVCTRL1,RGMII/RMII Converter 1 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" ",Normal clk input,?..." bitfld.long 0x00 10. " RMII_CRS_MODE ,CRS detection mode" "CRS||TX_EN,CRS||TX_EN||RX_DV" textline " " bitfld.long 0x00 9. " RMII_RX_ER_EN ,ETH_RX_ER pin input control" "RX_ER,ETH_RX_ER" bitfld.long 0x00 8. " FULLD ,Duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." elif (((per.l(ad:0x44030000+0x100)&0x1F)==(0x08||0x18||0x09||0x19||0x0A||0x1A))) group.long 0x100++0x03 line.long 0x00 "CONVCTRL1,RGMII/RMII Converter 1 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" "Normal clk input,?..." bitfld.long 0x00 14.--15. " RGMII_SPEED ,Link speed" "2.5 MHz,25 MHz,125 MHz,?..." textline " " bitfld.long 0x00 13. " RGMII_DUPLEX ,Duplex status" "Half duplex,Full duplex" bitfld.long 0x00 12. " RGMII_LINK ,Link status" "Down,Up" bitfld.long 0x00 8. " FULLD ,Duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." else group.long 0x100++0x03 line.long 0x00 "CONVCTRL1,RGMII/RMII Converter 1 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" "Normal clk input,?..." textline " " textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." endif if (((per.l(ad:0x44030000+0x104)&0x1F)==(0x04||0x05||0x14||0x15))) group.long 0x104++0x03 line.long 0x00 "CONVCTRL2,RGMII/RMII Converter 2 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" ",Normal clk input,?..." bitfld.long 0x00 10. " RMII_CRS_MODE ,CRS detection mode" "CRS||TX_EN,CRS||TX_EN||RX_DV" textline " " bitfld.long 0x00 9. " RMII_RX_ER_EN ,ETH_RX_ER pin input control" "RX_ER,ETH_RX_ER" bitfld.long 0x00 8. " FULLD ,Duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." elif (((per.l(ad:0x44030000+0x104)&0x1F)==(0x08||0x18||0x09||0x19||0x0A||0x1A))) group.long 0x104++0x03 line.long 0x00 "CONVCTRL2,RGMII/RMII Converter 2 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" "Normal clk input,?..." bitfld.long 0x00 14.--15. " RGMII_SPEED ,Link speed" "2.5 MHz,25 MHz,125 MHz,?..." textline " " bitfld.long 0x00 13. " RGMII_DUPLEX ,Duplex status" "Half duplex,Full duplex" bitfld.long 0x00 12. " RGMII_LINK ,Link status" "Down,Up" bitfld.long 0x00 8. " FULLD ,Duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." else group.long 0x104++0x03 line.long 0x00 "CONVCTRL2,RGMII/RMII Converter 2 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" "Normal clk input,?..." textline " " textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." endif if (((per.l(ad:0x44030000+0x108)&0x1F)==(0x04||0x05||0x14||0x15))) group.long 0x108++0x03 line.long 0x00 "CONVCTRL3,RGMII/RMII Converter 3 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" ",Normal clk input,?..." bitfld.long 0x00 10. " RMII_CRS_MODE ,CRS detection mode" "CRS||TX_EN,CRS||TX_EN||RX_DV" textline " " bitfld.long 0x00 9. " RMII_RX_ER_EN ,ETH_RX_ER pin input control" "RX_ER,ETH_RX_ER" bitfld.long 0x00 8. " FULLD ,Duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." elif (((per.l(ad:0x44030000+0x108)&0x1F)==(0x08||0x18||0x09||0x19||0x0A||0x1A))) group.long 0x108++0x03 line.long 0x00 "CONVCTRL3,RGMII/RMII Converter 3 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" "Normal clk input,?..." bitfld.long 0x00 14.--15. " RGMII_SPEED ,Link speed" "2.5 MHz,25 MHz,125 MHz,?..." textline " " bitfld.long 0x00 13. " RGMII_DUPLEX ,Duplex status" "Half duplex,Full duplex" bitfld.long 0x00 12. " RGMII_LINK ,Link status" "Down,Up" bitfld.long 0x00 8. " FULLD ,Duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." else group.long 0x108++0x03 line.long 0x00 "CONVCTRL3,RGMII/RMII Converter 3 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" "Normal clk input,?..." textline " " textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." endif if (((per.l(ad:0x44030000+0x10C)&0x1F)==(0x04||0x05||0x14||0x15))) group.long 0x10C++0x03 line.long 0x00 "CONVCTRL4,RGMII/RMII Converter 4 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" ",Normal clk input,?..." bitfld.long 0x00 10. " RMII_CRS_MODE ,CRS detection mode" "CRS||TX_EN,CRS||TX_EN||RX_DV" textline " " bitfld.long 0x00 9. " RMII_RX_ER_EN ,ETH_RX_ER pin input control" "RX_ER,ETH_RX_ER" bitfld.long 0x00 8. " FULLD ,Duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." elif (((per.l(ad:0x44030000+0x10C)&0x1F)==(0x08||0x18||0x09||0x19||0x0A||0x1A))) group.long 0x10C++0x03 line.long 0x00 "CONVCTRL4,RGMII/RMII Converter 4 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" "Normal clk input,?..." bitfld.long 0x00 14.--15. " RGMII_SPEED ,Link speed" "2.5 MHz,25 MHz,125 MHz,?..." textline " " bitfld.long 0x00 13. " RGMII_DUPLEX ,Duplex status" "Half duplex,Full duplex" bitfld.long 0x00 12. " RGMII_LINK ,Link status" "Down,Up" bitfld.long 0x00 8. " FULLD ,Duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." else group.long 0x10C++0x03 line.long 0x00 "CONVCTRL4,RGMII/RMII Converter 4 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" "Normal clk input,?..." textline " " textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." endif if (((per.l(ad:0x44030000+0x110)&0x1F)==(0x04||0x05||0x14||0x15))) group.long 0x110++0x03 line.long 0x00 "CONVCTRL5,RGMII/RMII Converter 5 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" ",Normal clk input,?..." bitfld.long 0x00 10. " RMII_CRS_MODE ,CRS detection mode" "CRS||TX_EN,CRS||TX_EN||RX_DV" textline " " bitfld.long 0x00 9. " RMII_RX_ER_EN ,ETH_RX_ER pin input control" "RX_ER,ETH_RX_ER" bitfld.long 0x00 8. " FULLD ,Duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." elif (((per.l(ad:0x44030000+0x110)&0x1F)==(0x08||0x18||0x09||0x19||0x0A||0x1A))) group.long 0x110++0x03 line.long 0x00 "CONVCTRL5,RGMII/RMII Converter 5 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" "Normal clk input,?..." bitfld.long 0x00 14.--15. " RGMII_SPEED ,Link speed" "2.5 MHz,25 MHz,125 MHz,?..." textline " " bitfld.long 0x00 13. " RGMII_DUPLEX ,Duplex status" "Half duplex,Full duplex" bitfld.long 0x00 12. " RGMII_LINK ,Link status" "Down,Up" bitfld.long 0x00 8. " FULLD ,Duplex mode" "Half duplex,Full duplex" textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." else group.long 0x110++0x03 line.long 0x00 "CONVCTRL5,RGMII/RMII Converter 5 Control Register" bitfld.long 0x00 26.--27. " RGMII_DLY_TYPE ,RGMII clock delay control type" "Not applicable,?..." bitfld.long 0x00 24.--25. " RGMII_TX_TYPE ,RGMII TX clock control type" "Normal clk input,?..." textline " " textline " " bitfld.long 0x00 0.--4. " CONV_MODE ,Converter operation mode" "MII,,,,RMII 10 Mbps REF_CLK input,RMII 100 Mbps REF_CLK input,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,,,,,,MII,,,,RMII 10 Mbps REF_CLK output,RMII 100 Mbps REF_CLK output,,,RGMII 10 Mbps,RGMII 100 Mbps,RGMII 1000 Mbps,?..." endif textline " " group.long 0x114++0x03 line.long 0x00 "CONVRST,RGMII/RMII Converter Reset Control Register" bitfld.long 0x00 4. " PHYIF_RST[4] ,Release reset of RGMII[4] converter" "Reset,No reset" bitfld.long 0x00 3. " [3] ,Release reset of RGMII[3] converter" "Reset,No reset" bitfld.long 0x00 2. " [2] ,Release reset of RGMII[2] converter" "Reset,No reset" bitfld.long 0x00 1. " [1] ,Release reset of RGMII[1] converter" "Reset,No reset" textline " " bitfld.long 0x00 0. " [0] ,Release reset of RGMII[0] converter" "Reset,No reset" group.long 0x200++0x0B line.long 0x00 "ECATOFFADR,EtherCAT PHY Offset Address Register" hexmask.long.byte 0x00 0.--4. 0x01 " OADD ,PHY address offset for EtherCAT" line.long 0x04 "ECATOPMOD,EtherCAT Operation Mode Register" bitfld.long 0x04 0. " I2CSIZE ,I2C memory size for EtherCAT" "Up to 16 kbit EEPROM,32 kbit to 4 Mbit EEPROM" line.long 0x08 "ECATDBGC,EtherCAT Debug Control Register" bitfld.long 0x08 4.--5. " TXSFT2 ,RGMII3_TXCLK delay of EtherCAT slave controller" "0 ns,10 ns,20 ns,30 ns" bitfld.long 0x08 2.--3. " TXSFT1 ,RGMII4_TXCLK delay of EtherCAT slave controller" "0 ns,10 ns,20 ns,30 ns" bitfld.long 0x08 0.--1. " TXSFT0 ,RGMII5_TXCLK delay of EtherCAT slave controller" "0 ns,10 ns,20 ns,30 ns" group.long 0x280++0x03 line.long 0x00 "SCINTCON,SERCOS Interrupt Control Register" bitfld.long 0x00 4.--5. " SC_DIV_SEL ,DIV_CLK interrupt (SERCOS3_DIV_CLK_Int) detection type control" "Through mode,Rising edge,Falling edge,Both edges" bitfld.long 0x00 0.--1. " SC_CON_SEL ,CON_CLK interrupt (SERCOS3_DIV_CLK_Int) detection type control" "Through mode,Rising edge,Falling edge,Both edges" textline " " if (((per.l(ad:0x44030000+0x304)&0x30000)==0x00000)) group.long 0x304++0x03 line.long 0x00 "SWCTRL,SwitchCore Control Register" bitfld.long 0x00 17. " STRAP_HUB_ENB ,Initial port operation by controlling PORT_ENA and AUTH_PORTn register initial value" "All ports disabled,Port0 && Port1 enabled" bitfld.long 0x00 16. " STRAP_SX_ENB ,Initial port operation by controlling PORT_ENA and AUTH_PORTn register initial value" "All ports disabled,All ports enabled (Exc management port)" textline " " bitfld.long 0x00 7. " SET1000[3] ,Control of 1000 Mbps port 3" "Not 1000 Mbps,1000 Mbps" bitfld.long 0x00 6. " [2] ,Control of 1000 Mbps port 2" "Not 1000 Mbps,1000 Mbps" textline " " bitfld.long 0x00 5. " [1] ,Control of 1000 Mbps port 1" "Not 1000 Mbps,1000 Mbps" bitfld.long 0x00 4. " [0] ,Control of 1000 Mbps port 0" "Not 1000 Mbps,1000 Mbps" textline " " bitfld.long 0x00 3. " SET10[3] ,Control of 10 Mbps port 3" "Not 10 Mbps,10 Mbps" bitfld.long 0x00 2. " [2] ,Control of 10 Mbps port 2" "Not 10 Mbps,10 Mbps" textline " " bitfld.long 0x00 1. " [1] ,Control of 10 Mbps port 1" "Not 10 Mbps,10 Mbps" bitfld.long 0x00 0. " [0] ,Control of 10 Mbps port 0" "Not 10 Mbps,10 Mbps" elif (((per.l(ad:0x44030000+0x304)&0x30000)==0x10000)) group.long 0x304++0x03 line.long 0x00 "SWCTRL,SwitchCore Control Register" bitfld.long 0x00 17. " STRAP_HUB_ENB ,Initial port operation by controlling PORT_ENA and AUTH_PORTn register initial value" "All ports enabled (Exc management port),All ports enabled" bitfld.long 0x00 16. " STRAP_SX_ENB ,Initial port operation by controlling PORT_ENA and AUTH_PORTn register initial value" "All ports disabled,All ports enabled (Exc management port)" textline " " bitfld.long 0x00 7. " SET1000[3] ,Control of 1000 Mbps port 3" "Not 1000 Mbps,1000 Mbps" bitfld.long 0x00 6. " [2] ,Control of 1000 Mbps port 2" "Not 1000 Mbps,1000 Mbps" textline " " bitfld.long 0x00 5. " [1] ,Control of 1000 Mbps port 1" "Not 1000 Mbps,1000 Mbps" bitfld.long 0x00 4. " [0] ,Control of 1000 Mbps port 0" "Not 1000 Mbps,1000 Mbps" textline " " bitfld.long 0x00 3. " SET10[3] ,Control of 10 Mbps port 3" "Not 10 Mbps,10 Mbps" bitfld.long 0x00 2. " [2] ,Control of 10 Mbps port 2" "Not 10 Mbps,10 Mbps" textline " " bitfld.long 0x00 1. " [1] ,Control of 10 Mbps port 1" "Not 10 Mbps,10 Mbps" bitfld.long 0x00 0. " [0] ,Control of 10 Mbps port 0" "Not 10 Mbps,10 Mbps" elif (((per.l(ad:0x44030000+0x304)&0x30000)==0x20000)) group.long 0x304++0x03 line.long 0x00 "SWCTRL,SwitchCore Control Register" bitfld.long 0x00 17. " STRAP_HUB_ENB ,Initial port operation by controlling PORT_ENA and AUTH_PORTn register initial value" "All ports disabled,Port0 && Port1 enabled" bitfld.long 0x00 16. " STRAP_SX_ENB ,Initial port operation by controlling PORT_ENA and AUTH_PORTn register initial value" "Port0 && Port1 enabled,All ports enabled" textline " " bitfld.long 0x00 7. " SET1000[3] ,Control of 1000 Mbps port 3" "Not 1000 Mbps,1000 Mbps" bitfld.long 0x00 6. " [2] ,Control of 1000 Mbps port 2" "Not 1000 Mbps,1000 Mbps" textline " " bitfld.long 0x00 5. " [1] ,Control of 1000 Mbps port 1" "Not 1000 Mbps,1000 Mbps" bitfld.long 0x00 4. " [0] ,Control of 1000 Mbps port 0" "Not 1000 Mbps,1000 Mbps" textline " " bitfld.long 0x00 3. " SET10[3] ,Control of 10 Mbps port 3" "Not 10 Mbps,10 Mbps" bitfld.long 0x00 2. " [2] ,Control of 10 Mbps port 2" "Not 10 Mbps,10 Mbps" textline " " bitfld.long 0x00 1. " [1] ,Control of 10 Mbps port 1" "Not 10 Mbps,10 Mbps" bitfld.long 0x00 0. " [0] ,Control of 10 Mbps port 0" "Not 10 Mbps,10 Mbps" else group.long 0x304++0x03 line.long 0x00 "SWCTRL,SwitchCore Control Register" bitfld.long 0x00 17. " STRAP_HUB_ENB ,Initial port operation by controlling PORT_ENA and AUTH_PORTn register initial value" "All ports enabled (Exc management port),All ports enabled" bitfld.long 0x00 16. " STRAP_SX_ENB ,Initial port operation by controlling PORT_ENA and AUTH_PORTn register initial value" "Port0 && Port1 enabled,All ports enabled" textline " " bitfld.long 0x00 7. " SET1000[3] ,Control of 1000 Mbps port 3" "Not 1000 Mbps,1000 Mbps" bitfld.long 0x00 6. " [2] ,Control of 1000 Mbps port 2" "Not 1000 Mbps,1000 Mbps" textline " " bitfld.long 0x00 5. " [1] ,Control of 1000 Mbps port 1" "Not 1000 Mbps,1000 Mbps" bitfld.long 0x00 4. " [0] ,Control of 1000 Mbps port 0" "Not 1000 Mbps,1000 Mbps" textline " " bitfld.long 0x00 3. " SET10[3] ,Control of 10 Mbps port 3" "Not 10 Mbps,10 Mbps" bitfld.long 0x00 2. " [2] ,Control of 10 Mbps port 2" "Not 10 Mbps,10 Mbps" textline " " bitfld.long 0x00 1. " [1] ,Control of 10 Mbps port 1" "Not 10 Mbps,10 Mbps" bitfld.long 0x00 0. " [0] ,Control of 10 Mbps port 0" "Not 10 Mbps,10 Mbps" endif textline " " group.long 0x308++0x03 line.long 0x00 "SWDUPC,SwitchCore Duplex Mode Register" bitfld.long 0x00 3. " PHY_DUPLEX[3] ,MAC port 3 full duplex/half duplex configuration" "Half duplex,Full duplex" bitfld.long 0x00 2. " [2] ,MAC port 2 full duplex/half duplex configuration" "Half duplex,Full duplex" bitfld.long 0x00 1. " [1] ,MAC port 1 full duplex/half duplex configuration" "Half duplex,Full duplex" bitfld.long 0x00 0. " [0] ,MAC port 0 full duplex/half duplex configuration" "Half duplex,Full duplex" group.long 0x500++0x03 line.long 0x00 "RMTAGCTRL,HW-RTOS GMAC Management TAG Control Register" hexmask.long.word 0x00 16.--31. 1. " MGMT_TAG ,EtherType of management tag" bitfld.long 0x00 0. " MGMT_ENB ,Enable to insert management tag to ethernet frame" "Disabled,Enabled" rgroup.long 0x600++0x03 line.long 0x00 "HSRMOD,HSR Mode Indication Register" bitfld.long 0x00 0. " HSR_SEL ,HSR mode" "Disabled,Enabled" width 0x0B tree.end textline ""